Counter electromotive force electric energy recovery circuit and method of unmanned aerial vehicle and unmanned aerial vehicle
By combining a combined output circuit, a comparison circuit, and a reverse charging circuit, the problem of the inability to absorb back electromotive force energy during deceleration in multi-battery powered drones is solved, enabling continuous power supply and efficient operation of drones under hot-swappable battery conditions.
Patent Information
- Application Number
- CN202411911818.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-23
- Publication Date
- 2025-02-25
AI Technical Summary
Drones powered by multiple batteries and supporting hot battery replacement cannot have their back electromotive force generated during deceleration absorbed directly by the batteries, leading to damage to electronic components. Existing protection methods cannot effectively solve this problem.
The system employs a combination of a combined output circuit, a comparator circuit, and a reverse charging circuit. It supplies power to the load through the combined output voltage and activates the reverse charging circuit to charge the battery module when back EMF is detected, preventing batteries from charging each other and absorbing back EMF energy.
This technology enables multi-battery powered drones to effectively absorb back electromotive force during deceleration, prevents charging between batteries, supports hot-swappable batteries, reduces drone power-on and power-off and initialization time, and improves operational efficiency.
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Figure CN119519079A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of electronic technology, and in particular to a back electromotive force energy recovery circuit and method for a drone and a drone. Background Art
[0002] It is common for multi-rotor drones to generate back electromotive force during deceleration. If the excessive back electromotive force voltage is not handled well, it will damage electronic devices and affect the normal operation of the circuit. In severe cases, it may directly cause the drone to explode.
[0003] Currently, for drones powered by a single battery, the back EMF generated by motor deceleration can be directly absorbed by the battery, and the back EMF has little effect on the electronic circuit.
[0004] However, for drones powered by multiple batteries and supporting hot battery swapping, the back EMF cannot be directly absorbed by the battery. This is because the battery needs to be hot swapped, that is, the batteries cannot charge each other during hot swapping, thus blocking the battery charging circuit. That is, the back EMF generated by deceleration cannot be absorbed by the battery, resulting in the back EMF having nowhere to be released, which will damage the electronic devices in the aircraft. The commonly used protection method is to add a high-power TVS tube to the voltage input port to discharge the instantaneous back EMF voltage and maintain the voltage within the normal power supply range to ensure the stable operation of the electronic circuit. Summary of the invention
[0005] The purpose of the embodiments of the present application is to provide a back-electromotive force energy recovery circuit, method and drone for a drone, so as to solve the problem that existing drones that are powered by multiple batteries and support hot battery replacement are difficult to recover back-electromotive force energy.
[0006] An embodiment of the present application provides a back electromotive force energy recovery circuit for a drone, comprising: at least two combined output circuits, at least two comparison circuits, and at least two reverse charging circuits;
[0007] The first end of the combined output circuit is used to connect to the output end of a battery module, the first end of the combined output circuit is also connected to the first end of the comparison circuit, the second end of the combined output circuit is connected to the third end of the comparison circuit, the third end of the combined output circuit is connected to the second end of the comparison circuit, the fourth end of the comparison circuit is connected to the second end of the reverse charging circuit, the second end of the combined output circuit is also connected to the third end of the reverse charging circuit, the first end of the reverse charging circuit is used to connect to the input end of the battery module; the second end of the combined output circuit is also used to connect to the flight control system.
[0008] At least two combining output circuits, used to combine at least two battery voltages to output a first battery voltage to supply power to a load; wherein the first battery voltage is the highest voltage of the at least two battery voltages;
[0009] At least two comparison circuits are used to detect whether each battery voltage is less than the back electromotive force voltage when the flight control system generates the back electromotive force voltage;
[0010] At least two reverse charging circuits are used to open the reverse charging circuit corresponding to at least one battery module when each battery voltage is less than the back electromotive force voltage, and the back electromotive force voltage charges the battery module.
[0011] In the above technical solution, multiple battery voltages are combined through a combined output circuit to supply power to the load. When there is a back electromotive force due to the deceleration of the drone, multiple battery voltages are detected through a comparison circuit. If the back electromotive force voltage is greater than each battery voltage, at least one reverse charging circuit is turned on to charge the battery. This embodiment realizes that when multiple batteries are used to power the drone, it can prevent the batteries from charging each other, and absorb the back electromotive force energy generated when the motor decelerates through the battery. It also supports the drone in standby mode, and hot-swappable batteries can be used to keep the drone powered on, reduce the time for the drone to be turned on and off and initialized due to battery replacement, and improve the operation efficiency of the drone.
[0012] In some optional embodiments, a control signal logic circuit is also included;
[0013] The output end of the first comparison circuit is connected to the first end of the control signal logic circuit, the output end of the second comparison circuit is connected to the second end of the control signal logic circuit, the third end of the control signal logic circuit is connected to the second end of the first reverse charging circuit, and the third end of the control signal logic circuit is also connected to the second end of the second reverse charging circuit.
[0014] In the above technical solution, the control signal logic circuit outputs a corresponding control signal according to the comparison result of the first comparison circuit and the second comparison circuit to control the opening or closing of the first reverse charging circuit and the second reverse charging circuit.
[0015] In some optional embodiments, the first comparison circuit includes a first comparator and a third comparator; the second comparison circuit includes a second comparator and a fourth comparator;
[0016] The output terminal Vbat1 of the first battery module is connected to the VIN- terminal of the first comparator, and the VIN+ terminal of the first comparator is connected to the output voltage terminal VCC_POWER;
[0017] The output terminal Vbat1 of the first battery module is connected to the VIN- terminal of the third comparator, and the VIN+ terminal of the third comparator is connected to the third terminal of the first combined output circuit;
[0018] The output terminal Vbat2 of the second battery module is connected to the VIN- terminal of the second comparator, and the VIN+ terminal of the second comparator is connected to the output voltage terminal VCC_POWER;
[0019] The output terminal Vbat2 of the second battery module is connected to the VIN-terminal of the fourth comparator, and the VIN+terminal of the fourth comparator is connected to the third terminal of the second combined output circuit.
[0020] In the above technical solution, in the first comparison circuit, the voltage Vbat1 of the first battery module is compared with the output voltage Vout of the output voltage terminal VCC_POWER, and the voltage Vbat1 of the first battery module is compared with the third terminal voltage Vgate1 of the first combined output circuit. When Vout>Vbat1, the first comparator output terminal OUT_O_1 outputs a high level signal; when Vout<Vbat1, the first comparator output terminal OUT_O_1 outputs a low level signal; when Vgate1>Vbat1, the third comparator outputs a high level signal; when Vgate1<Vbat1, the third comparator outputs a low level signal.
[0021] In the second comparison circuit, the voltage Vbat2 of the second battery module is compared with the output voltage Vout of the output voltage terminal VCC_POWER, and the voltage Vbat2 of the second battery module is compared with the third terminal voltage Vgate2 of the second combined output circuit. When Vout>Vbat2, the second comparator output terminal OUT_O_2 outputs a high level signal; when Vout<Vbat2, the second comparator output terminal OUT_O_2 outputs a low level signal; when Vgate2>Vbat2, the fourth comparator outputs a high level signal; when Vgate2<Vbat2, the fourth comparator outputs a low level signal.
[0022] In some optional implementations, the control signal logic circuit includes an AND gate module and an OR gate module;
[0023] The output end of the first comparator is connected to the first end of the AND gate module, and the output end of the second comparator is connected to the second end of the AND gate module;
[0024] The output end of the third comparator is connected to the first end of the OR gate module, and the output end of the fourth comparator is connected to the second end of the OR gate module.
[0025] In the above technical scheme, Vout>Vbat1 and Vout>Vbat2, the AND gate module outputs a high level; Vout<Vbat1 and / or Vout>Vbat2, the AND gate module outputs a low level; Vgate1>Vbat1 and / or Vgate2>Vbat2, the OR gate module outputs a high level; Vgate1<Vbat1 and Vgate2<Vbat2, the OR gate module outputs a low level.
[0026] In some optional implementations, the first combined output circuit includes a first MOS transistor, a third MOS transistor and a first ORing controller;
[0027] The GATE terminal Vgate1 of the first ORing controller is connected to the G pole of the first MOS tube and the G pole of the third MOS tube, the S pole of the first MOS tube and the S pole of the third MOS tube are connected to the output terminal Vbat1 of the first battery module, and the D pole of the first MOS tube and the D pole of the third MOS tube are connected to the output voltage terminal VCC_POWER.
[0028] In the above technical solution, the first ORing controller is connected to two MOSFETs in parallel, which improves the current carrying capacity of the circuit. The first ORing controller provides a charge pump gate drive for the external N-channel MOSFET (the first MOS tube and the third MOS tube) to turn off the first MOS tube and the third MOS tube when the current flows in the reverse direction.
[0029] In some optional implementations, the second combined output circuit includes a second MOS transistor, a fourth MOS transistor and a second ORing controller;
[0030] The GATE terminal Vgate2 of the second ORing controller is connected to the G pole of the second MOS tube and the G pole of the fourth MOS tube, the S pole of the second MOS tube and the S pole of the fourth MOS tube are connected to the output terminal Vbat2 of the second battery module, and the D pole of the second MOS tube and the D pole of the fourth MOS tube are connected to the output voltage terminal VCC_POWER.
[0031] In the above technical solution, the second ORing controller is connected to two MOSFETs in parallel, which improves the current carrying capacity of the circuit. The second ORing controller provides a charge pump gate drive for the external N-channel MOSFET (the second MOS tube and the fourth MOS tube) to turn off the second MOS tube and the fourth MOS tube when the current flows in the reverse direction.
[0032] In some optional implementations, the first reverse charging circuit includes: a fifth MOS tube, a sixth MOS tube, an eleventh MOS tube, a twelfth MOS tube, a fifteenth MOS tube and a sixteenth MOS tube;
[0033] The output terminal Vbat1 of the first battery module is connected to the D pole of the fifth MOS tube, the S pole of the fifth MOS tube is connected to the S pole of the sixth MOS tube, and the D pole of the sixth MOS tube is connected to the output voltage terminal VCC_POWER;
[0034] The G pole of the fifth MOS tube is connected to the D pole of the eleventh MOS tube, the S pole of the eleventh MOS tube is grounded, the G pole of the eleventh MOS tube is connected to the D pole of the fifteenth MOS tube, the S pole of the fifteenth MOS tube is grounded, the G pole of the fifteenth MOS tube is connected to the output end of the OR gate module, and the G pole of the eleventh MOS tube is also connected to the output end of the AND gate module;
[0035] The G pole of the sixth MOS tube is connected to the D pole of the twelfth MOS tube, the S pole of the twelfth MOS tube is grounded, the G pole of the twelfth MOS tube is connected to the D pole of the sixteenth MOS tube, the S pole of the sixteenth MOS tube is grounded, the G pole of the sixteenth MOS tube is connected to the output end of the OR gate module, and the G pole of the twelfth MOS tube is also connected to the output end of the AND gate module.
[0036] In the above technical solution, Vout<Vbat1 and / or Vout<Vbat2, the AND gate module outputs a low level, turns off the eleventh MOS tube and the twelfth MOS tube, thereby turning off the fifth MOS tube and the sixth MOS tube, and turning off the first reverse charging circuit.
[0037] Vgate1>Vbat1 and / or Vgate2>Vbat2, at least one of the first battery module and the second battery module is powered normally, the OR gate module outputs a high level, the fifteenth MOS tube and the sixteenth MOS tube are turned on, the eleventh MOS tube and the twelfth MOS tube are turned off, so that the fifth MOS tube and the sixth MOS tube are turned off, and the first reverse charging circuit is turned off.
[0038] Vgate1<Vbat1 and Vgate2<Vbat2, the first battery module and the second battery module are not powered, the OR gate module outputs a low level, and the fifteenth MOS tube and the sixteenth MOS tube are turned off. At this time, if Vout>Vbat1 and Vout>Vbat2, the AND gate module outputs a high level, and the eleventh MOS tube and the twelfth MOS tube are turned on; the output voltage terminal VCC_POWER charges the first battery module through the first reverse charging circuit.
[0039] In some optional implementations, the second reverse charging circuit includes: a seventh MOS tube, an eighth MOS tube, a ninth MOS tube, a tenth MOS tube, a thirteenth MOS tube and a fourteenth MOS tube;
[0040] The output terminal Vbat2 of the second battery module is connected to the D pole of the seventh MOS tube, the S pole of the seventh MOS tube is connected to the S pole of the eighth MOS tube, and the D pole of the eighth MOS tube is connected to the output voltage terminal VCC_POWER;
[0041] The G pole of the seventh MOS tube is connected to the D pole of the ninth MOS tube, the S pole of the ninth MOS tube is grounded, the G pole of the ninth MOS tube is connected to the D pole of the thirteenth MOS tube, the S pole of the thirteenth MOS tube is grounded, the G pole of the thirteenth MOS tube is connected to the output end of the OR gate module, and the G pole of the ninth MOS tube is also connected to the output end of the AND gate module;
[0042] The G pole of the eighth MOS tube is connected to the D pole of the tenth MOS tube, the S pole of the tenth MOS tube is grounded, the G pole of the tenth MOS tube is connected to the D pole of the fourteenth MOS tube, the S pole of the fourteenth MOS tube is grounded, the G pole of the fourteenth MOS tube is connected to the output end of the OR gate module, and the G pole of the tenth MOS tube is also connected to the output end of the AND gate module.
[0043] In the above technical solution, Vout<Vbat1 and / or Vout<Vbat2, the AND gate module outputs a low level, turns off the ninth MOS tube and the tenth MOS tube, thereby turning off the seventh MOS tube and the eighth MOS tube, and the second reverse charging circuit is turned off.
[0044] Vgate1>Vbat1 and / or Vgate2>Vbat2, at least one of the first battery module and the second battery module is powered normally, the OR gate module outputs a high level, the thirteenth MOS tube and the fourteenth MOS tube are turned on, the ninth MOS tube and the tenth MOS tube are turned off, so that the seventh MOS tube and the eighth MOS tube are turned off, and the second reverse charging circuit is turned off.
[0045] Vgate1<Vbat1 and Vgate2<Vbat2, the first battery module and the second battery module are not powered, the OR gate module outputs a low level, and the thirteenth MOS tube and the fourteenth MOS tube are turned off. At this time, if Vout>Vbat1 and Vout>Vbat2, the AND gate module outputs a high level, and the ninth MOS tube and the tenth MOS tube are turned on; the output voltage terminal VCC_POWER charges the second battery module through the second reverse charging circuit.
[0046] In some optional implementations, the control signal logic circuit further includes: a ninth comparator and a tenth comparator;
[0047] The VIN+ terminal of the ninth comparator is connected to the output terminal of the second battery module, and the VIN- terminal of the ninth comparator is connected to the output terminal of the first comparator; the VIN+ terminal of the tenth comparator is connected to the output terminal of the first battery module, and the VIN- terminal of the tenth comparator is connected to the output terminal of the second battery module.
[0048] In some optional implementations, the first reverse charging circuit includes: a fifth MOS tube, a sixth MOS tube, an eleventh MOS tube, a twelfth MOS tube, a fifteenth MOS tube and a sixteenth MOS tube;
[0049] The output end of the first battery module is connected to the D pole of the fifth MOS tube, the S pole of the fifth MOS tube is connected to the S pole of the sixth MOS tube, and the D pole of the sixth MOS tube is connected to the output voltage end;
[0050] The G pole of the fifth MOS tube is connected to the D pole of the eleventh MOS tube, the S pole of the eleventh MOS tube is grounded, the G pole of the eleventh MOS tube is connected to the D pole of the fifteenth MOS tube, and the S pole of the fifteenth MOS tube is grounded; the output end of the OR gate module is connected to the G pole of the fifteenth MOS tube through a diode, and the output end of the tenth comparator is connected to the G pole of the fifteenth MOS tube through a diode; the output end of the AND gate module is connected to the G pole of the eleventh MOS tube through a diode, and the output end of the ninth comparator is connected to the G pole of the eleventh MOS tube through a diode;
[0051] The G pole of the sixth MOS tube is connected to the D pole of the twelfth MOS tube, the S pole of the twelfth MOS tube is grounded, the G pole of the twelfth MOS tube is connected to the D pole of the sixteenth MOS tube, and the S pole of the sixteenth MOS tube is grounded; the output end of the OR gate module is connected to the G pole of the sixteenth MOS tube through a diode, and the output end of the tenth comparator is connected to the G pole of the sixteenth MOS tube through a diode; the output end of the AND gate module is connected to the G pole of the twelfth MOS tube through a diode, and the output end of the ninth comparator is connected to the G pole of the twelfth MOS tube through a diode.
[0052] In some optional implementations, the second reverse charging circuit includes: a seventh MOS tube, an eighth MOS tube, a ninth MOS tube, a tenth MOS tube, a thirteenth MOS tube and a fourteenth MOS tube;
[0053] The output end of the second battery module is connected to the D pole of the seventh MOS tube, the S pole of the seventh MOS tube is connected to the S pole of the eighth MOS tube, and the D pole of the eighth MOS tube is connected to the output voltage end;
[0054] The G pole of the seventh MOS tube is connected to the D pole of the ninth MOS tube, the S pole of the ninth MOS tube is grounded, the G pole of the ninth MOS tube is connected to the D pole of the thirteenth MOS tube, and the S pole of the thirteenth MOS tube is grounded; the output end of the OR gate module is connected to the G pole of the thirteenth MOS tube through a diode, and the output end of the ninth comparator is connected to the G pole of the thirteenth MOS tube through a diode; the output end of the AND gate module is connected to the G pole of the ninth MOS tube through a diode, and the output end of the tenth comparator is connected to the G pole of the ninth MOS tube through a diode;
[0055] The G pole of the eighth MOS tube is connected to the D pole of the tenth MOS tube, the S pole of the tenth MOS tube is grounded, the G pole of the tenth MOS tube is connected to the D pole of the fourteenth MOS tube, and the S pole of the fourteenth MOS tube is grounded; the output end of the OR gate module is connected to the G pole of the fourteenth MOS tube through a diode, and the output end of the ninth comparator is connected to the G pole of the fourteenth MOS tube through a diode; the output end of the AND gate module is connected to the G pole of the tenth MOS tube through a diode, and the output end of the tenth comparator is connected to the G pole of the tenth MOS tube through a diode.
[0056] In the above technical solution, the ninth comparator and the tenth comparator are set to open or close the first reverse charging circuit and the second reverse charging circuit: if Vout>Vbat1, Vout>Vbat2, Vbat2>Vbat1, the first battery module is charged; if Vout>Vbat1, Vout>Vbat2, Vbat1>Vbat2, the second battery module is charged. This embodiment can ensure that when absorbing reverse electromotive force energy, the low-voltage battery is charged first.
[0057] An unmanned aerial vehicle provided in an embodiment of the present application includes: at least two battery modules, a flight control system, and a back electromotive force energy recovery circuit of any of the above unmanned aerial vehicles.
[0058] The embodiment of the present application provides a method for recovering back electromotive force energy of a drone, comprising:
[0059] Using a combining output circuit, at least two battery voltages are combined to output a first battery voltage to supply power to a load; wherein the first battery voltage is the highest voltage of the at least two battery voltages;
[0060] When the drone decelerates and generates a back electromotive force voltage, a comparison circuit is used to detect the voltage of each battery. If the voltage of each battery is less than the back electromotive force voltage, the reverse charging circuit corresponding to at least one battery module is turned on, and the back electromotive force voltage charges the battery module.
[0061] In some optional implementations, opening a reverse charging circuit corresponding to at least one battery module includes:
[0062] Turn on the reverse charging circuits corresponding to all battery modules;
[0063] Or, turn on the reverse charging circuit corresponding to the battery module with the lowest battery voltage. BRIEF DESCRIPTION OF THE DRAWINGS
[0064] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0065] Figure 1 A connection diagram of a back electromotive force energy recovery circuit for a drone provided in an embodiment of the present application;
[0066] Figure 2 A structural diagram of a back electromotive force energy recovery circuit including two battery modules provided in an embodiment of the present application;
[0067] Figure 3 A structural diagram of a first combined output circuit provided in an embodiment of the present application;
[0068] Figure 4 A structural diagram of a second combined output circuit provided in an embodiment of the present application;
[0069] Figure 5 A structural diagram of a first comparison circuit provided in an embodiment of the present application;
[0070] Figure 6 A structural diagram of a second comparison circuit provided in an embodiment of the present application;
[0071] Figure 7 A control signal logic circuit structure diagram provided for an embodiment of the present application;
[0072] Figure 8 A structural diagram of a first reverse charging circuit provided in an embodiment of the present application;
[0073] Fig. 9 A structural diagram of a second reverse charging circuit provided in an embodiment of the present application;
[0074] Fig.10 A control signal logic circuit structure diagram provided for another embodiment of the present application;
[0075] Fig.11 A structural diagram of a first reverse charging circuit provided in another embodiment of the present application;
[0076] Fig.12 This is a structural diagram of a second reverse charging circuit provided in another embodiment of the present application. DETAILED DESCRIPTION
[0077] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.
[0078] Please refer to Figure 1 , Figure 1 A connection diagram of a back electromotive force energy recovery circuit for a drone provided in an embodiment of the present application includes: at least two combined output circuits, at least two comparison circuits, and at least two reverse charging circuits;
[0079] The first end of the combined output circuit is used to connect to the output end of a battery module, the first end of the combined output circuit is also connected to the first end of the comparison circuit, the second end of the combined output circuit is connected to the third end of the comparison circuit, the third end of the combined output circuit is connected to the second end of the comparison circuit, the fourth end of the comparison circuit is connected to the second end of the reverse charging circuit, the second end of the combined output circuit is also connected to the third end of the reverse charging circuit, the first end of the reverse charging circuit is used to connect to the input end of the battery module; the second end of the combined output circuit is also used to connect to the flight control system.
[0080] Among them, at least two combining output circuits are used to combine at least two battery voltages to output a first battery voltage to power the load; wherein the first battery voltage is the highest voltage of the at least two battery voltages.
[0081] At least two comparison circuits are used to detect whether the voltage of each battery is less than the back electromotive force voltage when the flight control system generates the back electromotive force voltage.
[0082] At least two reverse charging circuits are used to open the reverse charging circuit corresponding to at least one battery module when each battery voltage is less than the back electromotive force voltage, and the back electromotive force voltage charges the battery module.
[0083] In the above technical solution, multiple battery voltages are combined through a combined output circuit to supply power to the load. When there is a back electromotive force due to the deceleration of the drone, multiple battery voltages are detected through a comparison circuit. If the back electromotive force voltage is greater than each battery voltage, at least one reverse charging circuit is turned on to charge the battery. This embodiment realizes that when multiple batteries are used to power the drone, it can prevent the batteries from charging each other, and absorb the back electromotive force energy generated when the motor decelerates through the battery. It also supports the drone in standby mode, and hot-swappable batteries can be used to keep the drone powered on, reduce the time for the drone to be turned on and off and initialized due to battery replacement, and improve the operation efficiency of the drone.
[0084] It should be clear that each battery module is provided with a combined output circuit, a comparison circuit and a reverse charging circuit. There can be multiple battery modules, and correspondingly, multiple combined output circuits, comparison circuits and reverse charging circuits are also provided. In the following embodiment, the back electromotive force energy recovery circuit includes two battery modules as an example for detailed description.
[0085] Please refer to Figure 2 , Figure 2A structure diagram of a back electromotive force energy recovery circuit including two battery modules provided in an embodiment of the present application. The back electromotive force energy recovery circuit includes: a first battery module, a second battery module, a first combined output circuit, a second combined output circuit, a first comparison circuit, a second comparison circuit, a first reverse charging circuit, and a second reverse charging circuit.
[0086] In some optional embodiments, a control signal logic circuit is also included; the output end of the first comparison circuit is connected to the first end of the control signal logic circuit, the output end of the second comparison circuit is connected to the second end of the control signal logic circuit, the third end of the control signal logic circuit is connected to the second end of the first reverse charging circuit, and the third end of the control signal logic circuit is also connected to the second end of the second reverse charging circuit.
[0087] In the above technical solution, the control signal logic circuit outputs a corresponding control signal according to the comparison result of the first comparison circuit and the second comparison circuit to control the opening or closing of the first reverse charging circuit and the second reverse charging circuit.
[0088] Please refer to Figure 5 and Figure 6 , Figure 5 A first comparison circuit structure diagram provided in an embodiment of the present application, Figure 6 This is a structural diagram of a second comparison circuit provided in an embodiment of the present application.
[0089] In some optional embodiments, the first comparison circuit includes a first comparator U1 and a third comparator U3; the second comparison circuit includes a second comparator U2 and a fourth comparator U4; the output terminal Vbat1 of the first battery module is connected to the VIN-terminal of the first comparator U1, and the VIN+terminal of the first comparator U1 is connected to the output voltage terminal VCC_POWER; the output terminal Vbat1 of the first battery module is connected to the VIN-terminal of the third comparator U3, and the VIN+terminal of the third comparator U3 is connected to the third terminal of the first combined output circuit; the output terminal Vbat2 of the second battery module is connected to the VIN-terminal of the second comparator U2, and the VIN+terminal of the second comparator U2 is connected to the output voltage terminal VCC_POWER; the output terminal Vbat2 of the second battery module is connected to the VIN-terminal of the fourth comparator U4, and the VIN+terminal of the fourth comparator U4 is connected to the third terminal of the second combined output circuit.
[0090] In the above technical solution, in the first comparison circuit, the voltage Vbat1 of the first battery module is compared with the output voltage Vout of the output voltage terminal VCC_POWER, and the voltage Vbat1 of the first battery module is compared with the third terminal voltage Vgate1 of the first combined output circuit. When Vout>Vbat1, the output terminal OUT_O_1 of the first comparator U1 outputs a high level signal; when Vout<Vbat1, the output terminal OUT_O_1 of the first comparator U1 outputs a low level signal; when Vgate1>Vbat1, the third comparator U3 outputs a high level signal; when Vgate1<Vbat1, the third comparator U3 outputs a low level signal.
[0091] In the second comparison circuit, the voltage Vbat2 of the second battery module is compared with the output voltage Vout of the output voltage terminal VCC_POWER, and the voltage Vbat2 of the second battery module is compared with the third terminal voltage Vgate2 of the second combined output circuit. When Vout>Vbat2, the output terminal OUT_O_2 of the second comparator U2 outputs a high level signal; when Vout<Vbat2, the output terminal OUT_O_2 of the second comparator U2 outputs a low level signal; when Vgate2>Vbat2, the fourth comparator U4 outputs a high level signal; when Vgate2<Vbat2, the fourth comparator U4 outputs a low level signal.
[0092] Among them, the first comparator U1, the second comparator U2, the third comparator U3 and the fourth comparator U4 can adopt the rail-to-rail low-latency high-speed comparator SGM8743, which can quickly respond to voltage changes in this circuit application, thereby quickly and effectively turning on the MOS tube in the reverse charging circuit.
[0093] Please refer to Figure 7 , Figure 7 A control signal logic circuit structure diagram provided for an embodiment of the present application.
[0094] In some optional embodiments, the control signal logic circuit includes an AND gate module U7 and an OR gate module U8; the output end of the first comparator U1 is connected to the first end (pin A) of the AND gate module U7, and the output end of the second comparator U2 is connected to the second end (pin B) of the AND gate module U7; the output end of the third comparator U3 is connected to the first end (pin A) of the OR gate module U8, and the output end of the fourth comparator U4 is connected to the second end (pin B) of the OR gate module U8.
[0095] In the above technical solution, if Vout>Vbat1 and Vout>Vbat2, the AND gate module U7 outputs a high level; if Vout<Vbat1 and / or Vout>Vbat2, the AND gate module U7 outputs a low level; if Vgate1>Vbat1 and / or Vgate2>Vbat2, the OR gate module U8 outputs a high level; if Vgate1<Vbat1 and Vgate2<Vbat2, the OR gate module U8 outputs a low level. Please refer to Figure 3 , Figure 3 This is a structural diagram of the first combined output circuit provided in an embodiment of the present application.
[0096] In some optional implementations, the first combined output circuit includes a first MOS transistor Q1, a third MOS transistor Q3 and a first ORing controller U5;
[0097] The GATE terminal Vgate1 of the first ORing controller U5 is connected to the G pole of the first MOS tube Q1 and the G pole of the third MOS tube Q3, the S pole of the first MOS tube Q1 and the S pole of the third MOS tube Q3 are connected to the output terminal Vbat1 of the first battery module, and the D pole of the first MOS tube Q1 and the D pole of the third MOS tube Q3 are connected to the output voltage terminal VCC_POWER.
[0098] In the above technical solution, the first ORing controller U5 is externally connected to two MOSFETs in parallel, which improves the current carrying capacity of the circuit. The first ORing controller U5 provides a charge pump gate drive for the external N-channel MOSFET (the first MOS tube Q1 and the third MOS tube Q3) to turn off the first MOS tube Q1 and the third MOS tube Q3 when the current flows in the reverse direction.
[0099] Among them, the ORing (multiple-choice-one) controller can intelligently select the conduction path between multiple input sources while avoiding the generation of reverse current. This feature makes the ORing circuit have broad application prospects in power management and signal transmission.
[0100] Please refer to Figure 4 , Figure 4 This is a structural diagram of the second combined output circuit provided in an embodiment of the present application.
[0101] In some optional implementations, the second combined output circuit includes a second MOS transistor Q2, a fourth MOS transistor Q4 and a second ORing controller U6;
[0102] The GATE terminal Vgate2 of the second ORing controller U6 is connected to the G pole of the second MOS tube Q2 and the G pole of the fourth MOS tube Q4, the S pole of the second MOS tube Q2 and the S pole of the fourth MOS tube Q4 are connected to the output terminal Vbat2 of the second battery module, and the D pole of the second MOS tube Q2 and the D pole of the fourth MOS tube Q4 are connected to the output voltage terminal VCC_POWER.
[0103] In the above technical solution, the second ORing controller U6 is connected to two MOSFETs in parallel, which improves the current carrying capacity of the circuit. The second ORing controller U6 provides a charge pump gate drive for the external N-channel MOSFET (the second MOS transistor Q2 and the fourth MOS transistor Q4) to turn off the second MOS transistor Q2 and the fourth MOS transistor Q4 when the current flows in the reverse direction.
[0104] Among them, the first ORing controller U5 and the second ORing controller U6 can adopt the high-side ORing FET controller LM5050MK, and the LM5050MK is used as an ideal diode rectifier when connected in series with the power supply. This ORing controller enables MOSFET to replace the diode rectifier in the power distribution network, thereby reducing power loss and voltage drop. This device can be connected to a power supply of 5V to 75V and can withstand transient voltages up to 100V. The back-electromotive force energy recovery circuit of this embodiment supports hot-swapping of batteries, that is, the first battery module and the second battery module are completely separated. After removing one battery, the other battery can still make the system work normally. In this way, when a UAV sortie ends, the fully charged batteries can be replaced in sequence, so that the UAV can operate uninterruptedly and improve operating efficiency.
[0105] It should be clarified that the first combined output logic circuit and the second combined output logic circuit of this embodiment are two MOS tubes connected in parallel externally to an ORing controller. In some embodiments, the ORing controller may also be externally connected to a single MOS tube or a triode.
[0106] Please refer to Figure 8 , Figure 8 This is a structural diagram of a first reverse charging circuit provided in one embodiment of the present application.
[0107] In some optional implementations, the first reverse charging circuit includes: a fifth MOS transistor Q5, a sixth MOS transistor Q6, an eleventh MOS transistor Q11, a twelfth MOS transistor Q12, a fifteenth MOS transistor Q15 and a sixteenth MOS transistor Q16;
[0108] The output terminal Vbat1 of the first battery module is connected to the D pole of the fifth MOS transistor Q5, the S pole of the fifth MOS transistor Q5 is connected to the S pole of the sixth MOS transistor Q6, and the D pole of the sixth MOS transistor Q6 is connected to the output voltage terminal VCC_POWER;
[0109] The G pole of the fifth MOS transistor Q5 is connected to the D pole of the eleventh MOS transistor Q11, the S pole of the eleventh MOS transistor Q11 is grounded, the G pole of the eleventh MOS transistor Q11 is connected to the D pole of the fifteenth MOS transistor Q15, the S pole of the fifteenth MOS transistor Q15 is grounded, the G pole of the fifteenth MOS transistor Q15 is connected to the output terminal OUT2 of the OR gate module U8, and the G pole of the eleventh MOS transistor Q11 is also connected to the output terminal OUT1 of the AND gate module U7;
[0110] The G pole of the sixth MOS tube Q6 is connected to the D pole of the twelfth MOS tube Q12, the S pole of the twelfth MOS tube Q12 is grounded, the G pole of the twelfth MOS tube Q12 is connected to the D pole of the sixteenth MOS tube Q16, the S pole of the sixteenth MOS tube Q16 is grounded, the G pole of the sixteenth MOS tube Q16 is connected to the output end OUT2 of the OR gate module U8, and the G pole of the twelfth MOS tube Q12 is also connected to the output end OUT1 of the AND gate module U7.
[0111] In the above technical solution, Vout<Vbat1 and / or Vout<Vbat2, the AND gate module U7 outputs a low level, turns off the eleventh MOS transistor Q11 and the twelfth MOS transistor Q12, thereby turning off the fifth MOS transistor Q5 and the sixth MOS transistor Q6, and turning off the first reverse charging circuit.
[0112] Vgate1>Vbat1 and / or Vgate2>Vbat2, at least one of the first battery module and the second battery module is powered normally, the OR gate module U8 outputs a high level, the fifteenth MOS tube Q15 and the sixteenth MOS tube Q16 are turned on, the eleventh MOS tube Q11 and the twelfth MOS tube Q12 are turned off, so that the fifth MOS tube Q5 and the sixth MOS tube Q6 are turned off, and the first reverse charging circuit is turned off.
[0113] Vgate1<Vbat1 and Vgate2<Vbat2, the first battery module and the second battery module are not powered, the OR gate module U8 outputs a low level, and the fifteenth MOS tube Q15 and the sixteenth MOS tube Q16 are turned off. At this time, if Vout>Vbat1 and Vout>Vbat2, the AND gate module U7 outputs a high level, and the eleventh MOS tube Q11 and the twelfth MOS tube Q12 are turned on; the output voltage terminal VCC_POWER charges the first battery module through the first reverse charging circuit.
[0114] Please refer to Fig. 9 , Fig. 9 This is a structural diagram of a second reverse charging circuit provided in one embodiment of the present application.
[0115] In some optional implementations, the second reverse charging circuit includes: a seventh MOS tube Q7, an eighth MOS tube Q8, a ninth MOS tube Q9, a tenth MOS tube Q10, a thirteenth MOS tube Q13 and a fourteenth MOS tube Q14;
[0116] The output terminal Vbat2 of the second battery module is connected to the D pole of the seventh MOS tube Q7, the S pole of the seventh MOS tube Q7 is connected to the S pole of the eighth MOS tube Q8, and the D pole of the eighth MOS tube Q8 is connected to the output voltage terminal VCC_POWER;
[0117] The G pole of the seventh MOS tube Q7 is connected to the D pole of the ninth MOS tube Q9, the S pole of the ninth MOS tube Q9 is grounded, the G pole of the ninth MOS tube Q9 is connected to the D pole of the thirteenth MOS tube Q13, the S pole of the thirteenth MOS tube Q13 is grounded, the G pole of the thirteenth MOS tube Q13 is connected to the output terminal OUT2 of the OR gate module U8, and the G pole of the ninth MOS tube Q9 is also connected to the output terminal OUT1 of the AND gate module U7;
[0118] The G pole of the eighth MOS tube Q8 is connected to the D pole of the tenth MOS tube Q10, the S pole of the tenth MOS tube Q10 is grounded, the G pole of the tenth MOS tube Q10 is connected to the D pole of the fourteenth MOS tube Q14, the S pole of the fourteenth MOS tube Q14 is grounded, the G pole of the fourteenth MOS tube Q14 is connected to the output end OUT2 of the OR gate module U8, and the G pole of the tenth MOS tube Q10 is also connected to the output end OUT1 of the AND gate module U7.
[0119] In the above technical solution, Vout<Vbat1 and / or Vout<Vbat2, the AND gate module U7 outputs a low level, turns off the ninth MOS tube Q9 and the tenth MOS tube Q10, thereby turning off the seventh MOS tube Q7 and the eighth MOS tube Q8, and the second reverse charging circuit is turned off.
[0120] Vgate1>Vbat1 and / or Vgate2>Vbat2, at least one of the first battery module and the second battery module is powered normally, the OR gate module U8 outputs a high level, the thirteenth MOS tube Q13 and the fourteenth MOS tube Q14 are turned on, the ninth MOS tube Q9 and the tenth MOS tube Q10 are turned off, so that the seventh MOS tube Q7 and the eighth MOS tube Q8 are turned off, and the second reverse charging circuit is turned off.
[0121] Vgate1<Vbat1 and Vgate2<Vbat2, the first battery module and the second battery module are not powered, the OR gate module U8 outputs a low level, and the thirteenth MOS tube Q13 and the fourteenth MOS tube Q14 are turned off. At this time, if Vout>Vbat1 and Vout>Vbat2, the AND gate module U7 outputs a high level, and the ninth MOS tube Q9 and the tenth MOS tube Q10 are turned on; the output voltage terminal VCC_POWER charges the second battery module through the second reverse charging circuit.
[0122] Among them, the fifth MOS tube Q5 and the sixth MOS tube Q6 are P-channel MOS tubes, and the ninth MOS tube Q9, the tenth MOS tube Q10, the eleventh MOS tube Q11, the twelfth MOS tube Q12, the thirteenth MOS tube Q13, the fourteenth MOS tube Q14, the fifteenth MOS tube Q15 and the sixteenth MOS tube Q16 are N-channel MOS tubes.
[0123] It should be clarified that the first reverse charging circuit and the second reverse charging circuit of this embodiment both adopt symmetrical P-channel MOS tubes and two-stage N-channel MOS tubes. In some other embodiments, MOS tubes and two-stage MOS tubes can also be adopted, or triodes can be adopted to implement it.
[0124] In this embodiment, if Vout>Vbat1 and Vout>Vbat2, the first reverse charging circuit and the second reverse charging circuit are turned on to charge both the first battery module and the second battery module.
[0125] Please refer to Fig.10 , Fig.11 and Fig.12 , Fig.10 A control signal logic circuit structure diagram provided for another embodiment of the present application; Fig.11 A structural diagram of a first reverse charging circuit provided in another embodiment of the present application; Fig.12 This is a structural diagram of a second reverse charging circuit provided in another embodiment of the present application.
[0126] The difference between this embodiment and the above embodiments is that:
[0127] The control signal logic circuit of this embodiment further includes: a ninth comparator U9 and a tenth comparator U10;
[0128] Among them, the VIN+ end of the ninth comparator U9 is connected to the output end Vbat2 of the second battery module, and the VIN- end of the ninth comparator U9 is connected to the output end of the first comparator U1; the VIN+ end of the tenth comparator U10 is connected to the output end Vbat1 of the first battery module, and the VIN- end of the tenth comparator U10 is connected to the output end Vbat2 of the second battery module.
[0129] The first reverse charging circuit of this embodiment includes: a fifth MOS transistor Q5, a sixth MOS transistor Q6, an eleventh MOS transistor Q11, a twelfth MOS transistor Q12, a fifteenth MOS transistor Q15 and a sixteenth MOS transistor Q16;
[0130] The output terminal Vbat1 of the first battery module is connected to the D pole of the fifth MOS tube Q5, the S pole of the fifth MOS tube Q5 is connected to the S pole of the sixth MOS tube Q6, and the D pole of the sixth MOS tube Q6 is connected to the output voltage terminal VCC_POWER; the G pole of the fifth MOS tube Q5 is connected to the D pole of the eleventh MOS tube Q11, the S pole of the eleventh MOS tube Q11 is grounded, the G pole of the eleventh MOS tube Q11 is connected to the D pole of the fifteenth MOS tube Q15, and the S pole of the fifteenth MOS tube Q15 is grounded; the output terminal OUT2 of the OR gate module is connected to the G pole of the fifteenth MOS tube Q15 through the diode D8, and the output terminal OUT_BB2 of the tenth comparator U10 is connected to the G pole of the fifteenth MOS tube Q15 through the diode D8; the output terminal OUT1 of the AND gate module is connected to the G pole of the eleventh MOS tube Q11 through the diode D4. The output terminal OUT_BB1 of the ninth comparator U9 is connected to the G pole of the eleventh MOS transistor Q11 through the diode D4; the G pole of the sixth MOS transistor Q6 is connected to the D pole of the twelfth MOS transistor Q12, the S pole of the twelfth MOS transistor Q12 is grounded, the G pole of the twelfth MOS transistor Q12 is connected to the D pole of the sixteenth MOS transistor Q16, and the S pole of the sixteenth MOS transistor Q16 is grounded; the output terminal OUT2 of the OR gate module is connected to the G pole of the sixteenth MOS transistor Q16 through the diode D9, and the output terminal OUT_BB2 of the tenth comparator U10 is connected to the G pole of the sixteenth MOS transistor through the diode D9; the output terminal OUT1 of the AND gate module is connected to the G pole of the twelfth MOS transistor through the diode D5, and the output terminal OUT_BB1 of the ninth comparator U9 is connected to the G pole of the twelfth MOS transistor Q12 through the diode D5.
[0131] The second reverse charging circuit of this embodiment includes: a seventh MOS tube Q7, an eighth MOS tube Q8, a ninth MOS tube Q9, a tenth MOS tube Q10, a thirteenth MOS tube Q13 and a fourteenth MOS tube Q14;
[0132] The output terminal Vbat2 of the second battery module is connected to the D pole of the seventh MOS tube Q7, the S pole of the seventh MOS tube Q7 is connected to the S pole of the eighth MOS tube Q8, and the D pole of the eighth MOS tube Q8 is connected to the output voltage terminal VCC_POWER; the G pole of the seventh MOS tube Q7 is connected to the D pole of the ninth MOS tube Q9, the S pole of the ninth MOS tube Q9 is grounded, the G pole of the ninth MOS tube Q9 is connected to the D pole of the thirteenth MOS tube Q13, and the S pole of the thirteenth MOS tube Q13 is grounded; the output terminal OUT2 of the OR gate module is connected to the G pole of the thirteenth MOS tube through the diode D10, and the output terminal OUT_BB1 of the ninth comparator U9 is connected to the G pole of the thirteenth MOS tube Q13 through the diode D10; the output terminal OUT1 of the AND gate module is connected to the G pole of the ninth MOS tube Q9 through the diode D6, and the S pole of the tenth comparator Q13 is grounded. The output terminal OUT_BB2 of the comparator U10 is connected to the G pole of the ninth MOS transistor Q9 through the diode D6; the G pole of the eighth MOS transistor Q8 is connected to the D pole of the tenth MOS transistor Q10, the S pole of the tenth MOS transistor Q10 is grounded, the G pole of the tenth MOS transistor Q10 is connected to the D pole of the fourteenth MOS transistor Q14, and the S pole of the fourteenth MOS transistor Q14 is grounded; the output terminal OUT2 of the OR gate module is connected to the G pole of the fourteenth MOS transistor Q14 through the diode D11, and the output terminal OUT_BB1 of the ninth comparator U9 is connected to the G pole of the fourteenth MOS transistor Q14 through the diode D11; the output terminal OUT1 of the AND gate module is connected to the G pole of the tenth MOS transistor Q10 through the diode D7, and the output terminal OUT_BB2 of the tenth comparator U10 is connected to the G pole of the tenth MOS transistor Q10 through the diode D7.
[0133] In this embodiment, the ninth comparator U9 and the tenth comparator U10 are set to open or close the first reverse charging circuit and the second reverse charging circuit: if Vout>Vbat1, Vout>Vbat2, Vbat2>Vbat1, the first battery module is charged; if Vout>Vbat1, Vout>Vbat2, Vbat1>Vbat2, the second battery module is charged. This embodiment can ensure that when absorbing reverse electromotive force energy, the low-voltage battery is charged first.
[0134] An unmanned aerial vehicle provided in an embodiment of the present application includes: at least two battery modules, a flight control system, and a back electromotive force energy recovery circuit of any of the above unmanned aerial vehicles.
[0135] The embodiment of the present application provides a method for recovering back electromotive force energy of a drone, comprising:
[0136] Using a combining output circuit, multiple battery voltages are combined to output a first battery voltage to supply power to a load; wherein the first battery voltage is the highest voltage among the multiple battery voltages;
[0137] When the drone decelerates and generates a back electromotive force voltage, a comparison circuit is used to detect the voltage of each battery. If the voltage of each battery is less than the back electromotive force voltage, the reverse charging circuit corresponding to at least one battery module is turned on, and the back electromotive force voltage charges the battery module.
[0138] In some optional implementations, opening a reverse charging circuit corresponding to at least one battery module includes:
[0139] Turn on the reverse charging circuits corresponding to all battery modules;
[0140] Or, turn on the reverse charging circuit corresponding to the battery module with the lowest battery voltage.
[0141] In the embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.
[0142] In addition, the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
[0143] Furthermore, the functional modules in the various embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.
[0144] In this document, relational terms such as first and second, etc. are used merely to distinguish one entity or operation from another entity or operation, but do not necessarily require or imply any such actual relationship or order between these entities or operations.
[0145] The above description is only an embodiment of the present application and is not intended to limit the protection scope of the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A back electromotive force energy recovery circuit for an unmanned aerial vehicle, characterized in that: include: At least two combining output circuits, at least two comparing circuits, and at least two reverse charging circuits; The first end of the combiner output circuit is used to connect to the output end of a battery module, the first end of the combiner output circuit is also connected to the first end of the comparison circuit, the second end of the combiner output circuit is connected to the third end of the comparison circuit, the third end of the combiner output circuit is connected to the second end of the comparison circuit, the fourth end of the comparison circuit is connected to the second end of the reverse charging circuit, the second end of the combiner output circuit is also connected to the third end of the reverse charging circuit, the first end of the reverse charging circuit is used to connect to the input end of the battery module; the second end of the combiner output circuit is also used to connect to the flight control system; The at least two combining output circuits are used to combine at least two battery voltages to output a first battery voltage to supply power to a load; wherein the first battery voltage is the highest voltage of the at least two battery voltages; The at least two comparison circuits are used to detect whether each battery voltage is less than the back electromotive force voltage when the flight control system generates a back electromotive force voltage; The at least two reverse charging circuits are used to open the reverse charging circuit corresponding to at least one of the battery modules when each battery voltage is less than the back electromotive force voltage, so that the back electromotive force voltage charges the battery module.
2. The circuit according to claim 1, characterized in that Also included is a control signal logic circuit; The output end of the first comparison circuit is connected to the first end of the control signal logic circuit, the output end of the second comparison circuit is connected to the second end of the control signal logic circuit, the third end of the control signal logic circuit is connected to the second end of the first reverse charging circuit, and the third end of the control signal logic circuit is also connected to the second end of the second reverse charging circuit.
3. The circuit according to claim 2, characterized in that The first comparison circuit includes a first comparator and a third comparator; the second comparison circuit includes a second comparator and a fourth comparator; The output terminal of the first battery module is connected to the VIN- terminal of the first comparator, and the VIN+ terminal of the first comparator is connected to the output voltage terminal; The output end of the first battery module is connected to the VIN- end of the third comparator, and the VIN+ end of the third comparator is connected to the third end of the first combined output circuit; The output end of the second battery module is connected to the VIN- end of the second comparator, and the VIN+ end of the second comparator is connected to the output voltage end; The output end of the second battery module is connected to the VIN-end of the fourth comparator, and the VIN+end of the fourth comparator is connected to the third end of the second combiner output circuit.
4. The circuit according to claim 3, characterized in that The control signal logic circuit includes an AND gate module and an OR gate module; The output end of the first comparator is connected to the first end of the AND gate module, and the output end of the second comparator is connected to the second end of the AND gate module; The output end of the third comparator is connected to the first end of the OR gate module, and the output end of the fourth comparator is connected to the second end of the OR gate module.
5. The circuit according to claim 4, characterized in that The first combined output circuit includes a first MOS transistor, a third MOS transistor and a first ORing controller; The GATE end of the first ORing controller is connected to the G pole of the first MOS tube and the G pole of the third MOS tube, the S pole of the first MOS tube and the S pole of the third MOS tube are connected to the output end of the first battery module, and the D pole of the first MOS tube and the D pole of the third MOS tube are connected to the output voltage end.
6. The circuit according to claim 4, characterized in that The second combined output circuit includes a second MOS transistor, a fourth MOS transistor and a second ORing controller; The GATE end of the second ORing controller is connected to the G pole of the second MOS tube and the G pole of the fourth MOS tube, the S pole of the second MOS tube and the S pole of the fourth MOS tube are connected to the output end of the second battery module, and the D pole of the second MOS tube and the D pole of the fourth MOS tube are connected to the output voltage end.
7. The circuit according to claim 4, characterized in that The first reverse charging circuit includes: a fifth MOS tube, a sixth MOS tube, an eleventh MOS tube, a twelfth MOS tube, a fifteenth MOS tube and a sixteenth MOS tube; The output end of the first battery module is connected to the D pole of the fifth MOS tube, the S pole of the fifth MOS tube is connected to the S pole of the sixth MOS tube, and the D pole of the sixth MOS tube is connected to the output voltage end; The G pole of the fifth MOS tube is connected to the D pole of the eleventh MOS tube, the S pole of the eleventh MOS tube is grounded, the G pole of the eleventh MOS tube is connected to the D pole of the fifteenth MOS tube, the S pole of the fifteenth MOS tube is grounded, the G pole of the fifteenth MOS tube is connected to the output end of the OR gate module, and the G pole of the eleventh MOS tube is also connected to the output end of the AND gate module; The G pole of the sixth MOS tube is connected to the D pole of the twelfth MOS tube, the S pole of the twelfth MOS tube is grounded, the G pole of the twelfth MOS tube is connected to the D pole of the sixteenth MOS tube, the S pole of the sixteenth MOS tube is grounded, the G pole of the sixteenth MOS tube is connected to the output end of the OR gate module, and the G pole of the twelfth MOS tube is also connected to the output end of the AND gate module.
8. The circuit according to claim 4, characterized in that The second reverse charging circuit includes: a seventh MOS tube, an eighth MOS tube, a ninth MOS tube, a tenth MOS tube, a thirteenth MOS tube and a fourteenth MOS tube; The output end of the second battery module is connected to the D pole of the seventh MOS tube, the S pole of the seventh MOS tube is connected to the S pole of the eighth MOS tube, and the D pole of the eighth MOS tube is connected to the output voltage end; The G pole of the seventh MOS tube is connected to the D pole of the ninth MOS tube, the S pole of the ninth MOS tube is grounded, the G pole of the ninth MOS tube is connected to the D pole of the thirteenth MOS tube, the S pole of the thirteenth MOS tube is grounded, the G pole of the thirteenth MOS tube is connected to the output end of the OR gate module, and the G pole of the ninth MOS tube is also connected to the output end of the AND gate module; The G pole of the eighth MOS tube is connected to the D pole of the tenth MOS tube, the S pole of the tenth MOS tube is grounded, the G pole of the tenth MOS tube is connected to the D pole of the fourteenth MOS tube, the S pole of the fourteenth MOS tube is grounded, the G pole of the fourteenth MOS tube is connected to the output end of the OR gate module, and the G pole of the tenth MOS tube is also connected to the output end of the AND gate module.
9. The circuit according to claim 4, characterized in that The control signal logic circuit further includes: a ninth comparator and a tenth comparator; The VIN+ terminal of the ninth comparator is connected to the output terminal of the second battery module, and the VIN- terminal of the ninth comparator is connected to the output terminal of the first comparator; the VIN+ terminal of the tenth comparator is connected to the output terminal of the first battery module, and the VIN- terminal of the tenth comparator is connected to the output terminal of the second battery module.
10. The circuit according to claim 9, characterized in that The first reverse charging circuit includes: a fifth MOS tube, a sixth MOS tube, an eleventh MOS tube, a twelfth MOS tube, a fifteenth MOS tube and a sixteenth MOS tube; The output end of the first battery module is connected to the D pole of the fifth MOS tube, the S pole of the fifth MOS tube is connected to the S pole of the sixth MOS tube, and the D pole of the sixth MOS tube is connected to the output voltage end; The G pole of the fifth MOS tube is connected to the D pole of the eleventh MOS tube, the S pole of the eleventh MOS tube is grounded, the G pole of the eleventh MOS tube is connected to the D pole of the fifteenth MOS tube, and the S pole of the fifteenth MOS tube is grounded; the output end of the OR gate module is connected to the G pole of the fifteenth MOS tube through a diode, and the output end of the tenth comparator is connected to the G pole of the fifteenth MOS tube through a diode; the output end of the AND gate module is connected to the G pole of the eleventh MOS tube through a diode, and the output end of the ninth comparator is connected to the G pole of the eleventh MOS tube through a diode; The G pole of the sixth MOS tube is connected to the D pole of the twelfth MOS tube, the S pole of the twelfth MOS tube is grounded, the G pole of the twelfth MOS tube is connected to the D pole of the sixteenth MOS tube, and the S pole of the sixteenth MOS tube is grounded; the output end of the OR gate module is connected to the G pole of the sixteenth MOS tube through a diode, and the output end of the tenth comparator is connected to the G pole of the sixteenth MOS tube through a diode; the output end of the AND gate module is connected to the G pole of the twelfth MOS tube through a diode, and the output end of the ninth comparator is connected to the G pole of the twelfth MOS tube through a diode.
11. The circuit according to claim 9, characterized in that The second reverse charging circuit includes: a seventh MOS tube, an eighth MOS tube, a ninth MOS tube, a tenth MOS tube, a thirteenth MOS tube and a fourteenth MOS tube; The output end of the second battery module is connected to the D pole of the seventh MOS tube, the S pole of the seventh MOS tube is connected to the S pole of the eighth MOS tube, and the D pole of the eighth MOS tube is connected to the output voltage end; The G pole of the seventh MOS tube is connected to the D pole of the ninth MOS tube, the S pole of the ninth MOS tube is grounded, the G pole of the ninth MOS tube is connected to the D pole of the thirteenth MOS tube, and the S pole of the thirteenth MOS tube is grounded; the output end of the OR gate module is connected to the G pole of the thirteenth MOS tube through a diode, and the output end of the ninth comparator is connected to the G pole of the thirteenth MOS tube through a diode; the output end of the AND gate module is connected to the G pole of the ninth MOS tube through a diode, and the output end of the tenth comparator is connected to the G pole of the ninth MOS tube through a diode; The G pole of the eighth MOS tube is connected to the D pole of the tenth MOS tube, the S pole of the tenth MOS tube is grounded, the G pole of the tenth MOS tube is connected to the D pole of the fourteenth MOS tube, and the S pole of the fourteenth MOS tube is grounded; the output end of the OR gate module is connected to the G pole of the fourteenth MOS tube through a diode, and the output end of the ninth comparator is connected to the G pole of the fourteenth MOS tube through a diode; the output end of the AND gate module is connected to the G pole of the tenth MOS tube through a diode, and the output end of the tenth comparator is connected to the G pole of the tenth MOS tube through a diode.
12. A drone, characterized in that: include: At least two battery modules, a flight control system, and a back electromotive force energy recovery circuit for an unmanned aerial vehicle as described in any one of claims 1 to 11.
13. A method for recovering back electromotive force energy of an unmanned aerial vehicle, characterized in that: include: Using a combining output circuit, at least two battery voltages are combined to output a first battery voltage to supply power to a load; wherein the first battery voltage is the highest voltage of the at least two battery voltages; When the drone decelerates and generates a back electromotive force voltage, a comparison circuit is used to detect the voltage of each battery. If the voltage of each battery is less than the back electromotive force voltage, the reverse charging circuit corresponding to at least one battery module is turned on, and the back electromotive force voltage charges the battery module.
14. The method according to claim 13, characterized in that The step of opening a reverse charging circuit corresponding to at least one battery module comprises: Turn on the reverse charging circuits corresponding to all battery modules; Or, turn on the reverse charging circuit corresponding to the battery module with the lowest battery voltage.
Citation Information
Cited By
Back electromotive force electric energy recovery circuit and method for unmanned aerial vehicle, and unmanned aerial vehicle
WO2026138812A1