Bootstrap circuit, chip and electronic equipment

Abstract

The invention relates to the technical field of integrated circuits, in particular to a bootstrap circuit, a chip and electronic equipment. The circuit comprises a data signal module, an energy-saving module and a first functional module, the first functional module comprises a power consumption unit, the input end of the energy-saving module is connected with the data signal module, the output end of the energy-saving module is connected with the first functional module, and the energy-saving module comprises n D triggers which are connected in series; the energy-saving module is used for inputting a control signal to the first function module according to the logic level of the data signal output by the data signal module, and the control signal is used for controlling the power consumption unit to be turned on or turned off. Therefore, even if the first functional module generates power consumption under the condition of long-time starting, the first power tube HS can also work.

Description

Technical Field

[0001] The present application relates to the technical field of integrated circuits, and in particular to a bootstrap circuit, a chip and an electronic device. Background Art

[0002] A bootstrap circuit, also known as a boost circuit, can use electronic components such as a bootstrap boost diode and a bootstrap boost capacitor to superimpose the capacitor discharge voltage and the power supply voltage in the bootstrap circuit to the capacitor input terminal, thereby turning on the first power tube and the second power tube in the bootstrap circuit, so that the first power tube and the second power tube can work normally.

[0003] However, when the output voltage of the bootstrap circuit is at a logic high level for a long time, since there is a functional module for controlling the second power tube between the capacitor discharge voltage and the output voltage, the functional module will generate power consumption, causing the voltage between the capacitor discharge voltage and the output voltage to continue to drop. The functional module cannot provide sufficient operating voltage to the second power tube, causing the second power tube to fail to work normally. Summary of the invention

[0004] The embodiments of the present application provide a bootstrap circuit, a chip, and an electronic device for solving the problem that the first power tube HS cannot work due to power consumption generated when the first functional module is turned on for a long time.

[0005] In a first aspect, an embodiment of the present application provides a bootstrap circuit, which includes a data signal module, an energy-saving module and a first functional module, wherein the first functional module includes a power consumption unit, wherein an input end of the energy-saving module is connected to the data signal module, and an output end of the energy-saving module is connected to the first functional module, wherein the energy-saving module includes n D flip-flops connected in series; the energy-saving module is used to input a control signal to the first functional module according to the logic level of the data signal output by the data signal module, and the control signal is used to control the opening or closing of the power consumption unit.

[0006] In some optional implementations of the first aspect, the energy-saving module is used to input a first control signal to the first functional module when the duration of the logic level of the data signal output by the data signal module being high is greater than or equal to a first duration, wherein the first control signal is used to control the first functional module to turn off the power consumption unit; the energy-saving module is also used to input a second control signal to the first functional module when the logic level of the data signal output by the data signal module changes from a high level to a low level, wherein the second control signal is used to control the first functional module to turn on the power consumption unit.

[0007] In some optional implementations of the first aspect, the first duration includes 2 n-1 The length of the system clock, and in the first functional module at 2n-1 When power consumption is generated within the duration of a system clock, the energy-saving module sends a first control signal to the first functional module.

[0008] In some optional implementations of the first aspect, the connection method of n D flip-flops connected in series includes: in the 1st to (n-1)th D flip-flops, the input end of the D flip-flop is connected to the NOT gate of the D flip-flop; the output end of the (n-1)th D flip-flop is connected to the clock pin of the nth D flip-flop.

[0009] In some optional implementations of the first aspect, the nth D flip-flop includes an input terminal, and the input terminal of the nth D flip-flop is used to receive a data signal with a high logic level.

[0010] In some optional implementations of the first aspect, the circuit also includes: a first power supply module, a second power supply module, a first diode, a bootstrap capacitor and a first power tube, wherein the first power supply module is connected to the positive electrode of the first diode, and the second power supply module is connected to the drain of the first power tube; the cathode of the first diode is connected to the first end of the bootstrap capacitor and to the first functional module.

[0011] In some optional implementations of the first aspect, the circuit also includes: a second diode and a second power tube, wherein the first power supply module is connected to the positive electrode of the second diode, and the second power supply module is connected to the drain of the first power tube; the source of the first power tube and the second end of the bootstrap capacitor are both connected to the drain of the second power tube; and the source of the second power tube is grounded.

[0012] In some optional implementations of the first aspect, the circuit further includes a second functional module, wherein the second functional module is connected to the gate of the second power tube and is used to control the on and off of the second power tube.

[0013] In some optional implementations of the first aspect, the first functional module is connected to the gate of the first power tube and is used to control the on and off of the first power tube.

[0014] In some optional implementations of the first aspect, the circuit also includes a system clock signal module, and the system clock signal module is connected to the energy-saving module, wherein the system clock signal module is used to output a system clock signal, the system clock signal is a square wave with a wave ratio of 50%, and the duration from the rising edge of the logic level value changing from 0 to 1 to the adjacent rising edge of the logic level value changing from 0 to 1 in the system clock signal is one system clock duration.

[0015] In a second aspect, an embodiment of the present application provides a chip, the chip comprising a bootstrap circuit as described in any one of the above items.

[0016] In a third aspect, an electronic device according to an embodiment of the present application includes a bootstrap circuit as described above.

[0017] The embodiments of the present application have the following beneficial effects:

[0018] The embodiment of the present application provides a bootstrap circuit, a chip and an electronic device, wherein the bootstrap circuit includes a data signal module, an energy-saving module and a first functional module, wherein the first functional module includes a power consumption unit, wherein the input end of the energy-saving module is connected to the data signal module, and the output end of the energy-saving module is connected to the first functional module, wherein the energy-saving module includes n D flip-flops connected in series; the energy-saving module is used to input a control signal to the first functional module according to the logic level of the data signal output by the data signal module, and the control signal is used to control the opening or closing of the power consumption unit. In this way, even if the first functional module generates power consumption when it is turned on for a long time, the first power tube HS can still work. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 According to some embodiments of the present application, a circuit structure schematic diagram of a bootstrap circuit is shown;

[0020] Figure 2 According to some embodiments of the present application, a circuit structure schematic diagram of a bootstrap circuit is shown;

[0021] Figure 3 According to some embodiments of the present application, a schematic diagram of a system clock signal logic level is shown;

[0022] Figure 4 According to an embodiment of the present application, a structural block diagram of an energy-saving module is shown;

[0023] Figure 5 According to an embodiment of the present application, a circuit connection structure diagram of an energy-saving module is shown;

[0024] Figure 6 According to some embodiments of the present application, a logic level schematic diagram of a bootstrap circuit with an energy-saving module is shown;

[0025] Figure 7 According to some embodiments of the present application, a block diagram of a system on chip (SoC) is shown. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions provided by the embodiments of the present application will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0027] It can be understood that in some bootstrap circuits, the bootstrap circuit may include a data signal module, a functional module and a power tube, wherein the functional module may convert the data signal output by the data signal module into an available working voltage for the power tube to control the on and off of the power tube.

[0028] However, since the functional module includes a power consumption unit, when the functional module is turned on for a long time, the internal power consumption unit will continuously generate power consumption, resulting in the inability to convert the data signal output by the data signal module into an available working voltage for the power tube.

[0029] Therefore, in order to solve the above problems, the present application provides a bootstrap circuit, which adds an energy-saving module to receive the system clock signal and the data signal, and based on the system clock signal and the data signal, when it is determined that the data signal is at a logic high level for a long time, the energy-saving module sends a logic high-level energy-saving control signal to the first functional module, starts the energy-saving mode, and reduces power consumption by turning off the power consumption unit in the first functional module; and when it is detected that the data signal jumps from a logic high level to a logic low level, sends a logic low-level energy-saving control signal to the first functional module, so that the first functional module reopens the power consumption unit to ensure the normal operation of the first power tube HS.

[0030] Among them, the energy-saving control signal of a logical high level may refer to an energy-saving control signal with a logical level value of "1", and the energy-saving control signal of a logical low level may refer to an energy-saving control signal with a logical level value of "0". The energy-saving control signal may be transmitted in the form of a square wave, so that the first functional module can switch its power consumption unit according to the logical level value of the received energy-saving control signal.

[0031] The embodiments of the present application are further described in detail below in conjunction with the relevant drawings.

[0032] Figure 1 According to some embodiments of the present application, a circuit structure schematic diagram of a bootstrap circuit is shown.

[0033] refer to Figure 1 The bootstrap circuit includes an energy-saving module 301, a data signal module 302, and a first functional module 303, wherein the first functional module 303 includes a power consumption unit 031.

[0034] Continue to refer Figure 1 One end of the energy-saving module 301 is connected to the data signal module 302 , and the other end of the energy-saving module 301 is connected to the first functional module 303 .

[0035] When the duration of the logic level value of the data signal output by the data signal module 302 being 1 is greater than or equal to the first duration, the energy saving module 301 can output a first control signal. It should be understood that the first control signal is used to control the first functional module 303 to turn off the power consumption unit 031 inside it. Thus, the first functional module 303 can turn off the power consumption unit 031 when it is turned on for a long time to avoid continued power consumption.

[0036] When the logic level value of the data signal output by the data signal module 302 changes from 1 to 0, the energy saving module 031 can output a second control signal. It should be understood that the second control signal is used to control the first functional module 303 to turn on the power consumption unit 031 inside it. Thus, when the data signal jumps from the logic level value 1 to 0, the first functional module 303 can reset and turn on the power consumption unit 031, so that the first functional module 303 can operate all functions normally.

[0037] Combine the following Figure 2 right Figure 1 The specific structure of the bootstrap circuit shown as an example is further described.

[0038] Figure 2 According to some embodiments of the present application, a circuit structure schematic diagram of a bootstrap circuit is shown.

[0039] like Figure 2 As shown, the bootstrap circuit includes a first power supply module 304, a second power supply module 305, a bootstrap capacitor CAP, a first diode D1, a second diode D2, a data signal module 302, an energy saving module 301, a first functional module DRIVER1 (i.e. Figure 1 The first functional module 303 shown in the figure), the second functional module DRIVER2, the first power tube HS and the second power tube LS.

[0040] The first functional module DRIVER1303 includes a power consumption unit 031 (not shown).

[0041] The first power supply module 304 can be a low dropout linear regulator (LDO), which provides a chip internal power supply voltage GVDD for the first functional module DRIVER1 and the second functional module DRIVER2, and the low dropout linear regulator LDO, the anode of the first diode D1 and the anode of the second diode D2 are connected.

[0042] The cathode of the first diode D1, the first end of the bootstrap capacitor CAP, and the input end of the first functional module DRIVER 1 are connected. The cathode of the second diode D2 is connected to the input end of the second functional module DRIVER2.

[0043] The source S1 of the first power tube HS, the data signal module, the output end of the first functional module DRIVER1, the second end of the bootstrap capacitor CAP and the drain D2 of the second power tube LS are connected, and the source S2 of the second power tube LS is grounded.

[0044] The second power supply module 305 is connected to the drain electrode D1 of the first power transistor HS. The second power supply module 305 can provide the operating voltage PVDD for the first power transistor HS and the second power transistor LS.

[0045] The first functional module DRIVER1 is connected to the control port of the first power tube HS, and the second functional module DRIVER2 is connected to the control port of the second power tube LS. It should be understood that the control port of the power tube can be the gate of the above-mentioned power tube, such as the gate G1 of the first power tube HS and the gate G2 of the second power tube LS. Then, the first functional module DRIVER1 is used to control the on and off of the first power tube HS, and the second functional module DRIVER2 is used to control the on and off of the second power tube LS. Among them, the first power tube HS and the second power tube LS can be power tubes of a chip (not shown in the figure), such as switch tubes, which can include bipolar transistors and metal-oxide-semiconductor field effect transistors (MOSFETs), and need to be converted into working voltages through corresponding functional modules through data signals, for example, converting the power supply voltage of 0V to 180V into a square wave to form a data signal with a logic high level and a logic low level, and inputting the data signal into the corresponding functional module to convert it into a working voltage available to the power tube, so as to control the on and off of the above-mentioned first power tube HS and the second power tube LS, thereby ensuring that the corresponding chip can work normally.

[0046] One end of the energy-saving module 301 is connected to the data signal module 302, and the other end of the energy-saving module 301 is connected to the first functional module DRIVER1. The energy-saving module 301 is also connected to the system clock signal module (not shown). Among them, the system clock signal module is used to output the system clock signal, the system clock signal is a square wave with a wave ratio of 50%, and the rising edge from the logic level value of 0 to 1 in the system clock signal to the rising edge of the adjacent logic level value from 0 to 1 is a system clock duration. The energy-saving module 301 receives the system clock signal and the data signal as input, and can detect whether the data signal is placed at a logic high level for a long time based on the system clock signal and the data signal. For example, when the logic high level of the system clock signal can be preset in the energy-saving module 301 and the preset threshold number of times occurs, the data signal is always at a logic high level, then the energy-saving module 301 inputs a logic high level energy-saving control signal to the second functional module DRIVER2, and the second functional module DRIVER2 can turn off the power consumption unit that generates power consumption internally when receiving the logic high level energy-saving control signal.

[0047] When the energy-saving module 301 detects that the data signal jumps from a logic high level to a logic low level, the energy-saving module 301 can input a logic low level energy-saving control signal to the first functional module DRIVER1. When the first functional module DRIVER1 receives the logic low level energy-saving control signal, it can turn on the power consumption unit that generates power consumption internally.

[0048] In some embodiments, reference Figure 3 , the system clock signal can be a clock signal with a duty cycle of 50%, then the duration of its logic high level and logic low level is the same, and it is easy to determine the corresponding time length according to the number of logic high and low level jumps of the signal square wave of the system clock signal. The energy-saving module 301 can receive the system clock signal and the data signal at the same time, and use the system clock signal as a reference signal and the data signal as a signal to be detected. Therefore, when the number of jumps of the system clock signal during the duration of the data signal being at a logic high level meets the preset threshold, it can be regarded that the current time length of the data signal being at a logic high level meets the preset duration, and the energy-saving module 301 inputs a shutdown control signal to the first functional module DRIVER1. When the first functional module DRIVER1 receives the shutdown control signal, it can shut down the power consumption unit that generates power consumption internally.

[0049] Therefore, the energy-saving module 301 may be an edge-triggered D flip-flop, also called a sustain-block edge-triggered D flip-flop, which is integrated by a plurality of D flip-flops connected in series.

[0050] The D flip-flop is an information storage device with a memory function and two stable states. The flip-flop has two stable states, namely 0 and 1. Under the action of certain external signals, it can flip from one stable state to another stable state. For example, when the data signal is detected to be at a logic high level for a long time, the energy-saving control signal originally at a logic low level can be flipped to an energy-saving control signal at a logic high level and output to the first functional module DRIVER1 to turn off the power-consuming unit that generates power internally.

[0051] It should be noted that the triggering modes of the D flip-flop include level triggering and edge triggering. Among them, the level triggering is when the square wave signal received at the input end is 1 (i.e., logic high level), the state flipping is triggered, and the edge triggering is when the square wave signal received at the input end changes from "0" (i.e., logic low level) to "1" (i.e., logic high level), the state flipping is triggered.

[0052] The circuit connection structure and detection principle of the energy-saving module are described in detail below in conjunction with the relevant drawings.

[0053] Figure 4 According to an embodiment of the present application, a structural block diagram of an energy-saving module 301 is shown. Figure 5 According to an embodiment of the present application, a circuit connection structure diagram of an energy-saving module 301 is shown.

[0054] refer to Figure 4 , the counting of logic high level signals in the system clock signal can be controlled by connecting n D flip-flops in series.

[0055] Specifically, refer to Figure 5 , integrating n D flip-flops to construct an energy-saving module 301, the first (n-1) D flip-flops are connected in a reverse manner using a NOT gate, and the input terminal of the nth D flip-flop is a logic high level "1", so that 2 n When the data signals are all at a logic high level within the time period corresponding to the system clock signal, the nth D flip-flop output terminal Q can output a logic high level energy saving control signal to control the first functional module DRIVER1 to turn off the internal power consumption unit.

[0056] Continue to refer Figure 5 Each D flip-flop has a first pin D, a second clock pin CLK, a third reset pin RESET, a fourth pin Q and a fifth pin

[0057] The first pin D is used to obtain a data signal, that is, the input end of the D flip-flop mentioned above.

[0058] The second clock pin CLK is used to obtain a system clock signal.

[0059] The third reset pin RESET is used to reset the output of the D flip-flop based on a logic low level data signal, that is, when it is detected that the data signal jumps from a logic high level to a logic low level, the energy saving control signal of the logic high level is reset to a energy saving control signal of the logic low level.

[0060] The fourth pin Q is used to output the positive result of the AND gate, and the fifth pin Used to output the reverse result of the NOT gate.

[0061] Here, by connecting n D flip-flops in series, the D flip-flop can be delayed to flip and send a logic high level energy saving control signal, and the delay time is 2 n-1 Therefore, by adjusting n, the preset duration of the detection data signal continuing at the logic high level can be adjusted accordingly.

[0062] Figure 6 According to some embodiments of the present application, a logic level schematic diagram of a bootstrap circuit with an energy-saving module is shown.

[0063] refer to Figure 6, the system clock signal is used as the reference value of the data signal, and the energy saving module 301 detects that the data signal is 2 n-1 When the system clock signals are all at a logic high level during the time period corresponding to the system clock signals, a logic high level energy saving control signal is output until the data signal jumps from a logic high level to a logic low level, and the energy saving control signal is reset from a logic high level to a logic low level. In this process, the voltage BSP at the input terminal of the first functional module DRIVER1 will be n-1 The BSP voltage value decreases within the time length corresponding to the system clock signal, and the BSP voltage value no longer decreases when the energy-saving control signal is at a logic high level. This ensures that the difference between the input terminal voltage BSP and the output terminal voltage OUTP of the first functional module DRIVER1 will not be too small, so that the voltage required for normal operation can be provided to the first power tube HS, so that the first power tube HS can be turned on and off normally.

[0064] An embodiment of the present application provides a chip, which may include the above-mentioned bootstrap circuit.

[0065] This embodiment is a chip implementation corresponding to the above-mentioned bootstrap circuit implementation. This embodiment can be implemented in conjunction with the bootstrap circuit implementation. The relevant technical details mentioned in the bootstrap circuit implementation are still valid in this embodiment. In order to reduce repetition, they are not repeated here. Accordingly, the relevant technical details mentioned in this embodiment can also be applied in the bootstrap circuit implementation.

[0066] Figure 7 A block diagram of a system on chip (SoC) provided according to some embodiments of the present application is shown. Figure 7 In the FIG, similar components have the same reference numerals. In addition, the dashed boxes are optional features of more advanced SoCs. Figure 7 In the embodiment, SoC 700 includes: an interconnect unit 750, which is coupled to a processor 715; a system agent unit 770; a bus controller unit 780; an integrated memory controller unit 740; a group or one or more coprocessors 720, which may include integrated graphics logic, an image processor, an audio processor, and a video processor; a static random access memory (SRAM) unit 730; and a direct memory access (DMA) unit 760. In one embodiment, the coprocessor 720 includes a special-purpose processor, such as, for example, a network or communication processor, a compression engine, a GPGPU, a high-throughput MIC processor, or an embedded processor.

[0067] An embodiment of the present application provides an electronic device, which may include the above-mentioned chip.

[0068] This embodiment is a chip implementation method corresponding to the above chip implementation method, and this embodiment can be implemented in conjunction with the chip implementation method. The relevant technical details mentioned in the chip implementation method are still valid in this embodiment, and in order to reduce repetition, they are not repeated here. Accordingly, the relevant technical details mentioned in this embodiment can also be applied in the chip implementation method.

[0069] In the accompanying drawings, some structural or method features may be shown in a specific arrangement and / or order. However, it should be understood that such a specific arrangement and / or order may not be required. Instead, in some embodiments, these features may be arranged in a manner and / or order different from that shown in the illustrative drawings. In addition, the inclusion of structural or method features in a particular figure does not mean that such features are required in all embodiments, and in some embodiments, these features may not be included or may be combined with other features.

[0070] It should be noted that the units / modules mentioned in the various device embodiments of the present application are all logical units / modules. Physically, a logical unit / module can be a physical unit / module, or a part of a physical unit / module, or can be implemented as a combination of multiple physical units / modules. The physical implementation method of these logical units / modules themselves is not the most important. The combination of functions implemented by these logical units / modules is the key to solving the technical problems proposed by the present application. In addition, in order to highlight the innovative part of the present application, the above-mentioned device embodiments of the present application do not introduce units / modules that are not closely related to solving the technical problems proposed by the present application, which does not mean that there are no other units / modules in the above-mentioned device embodiments.

[0071] It should be noted that in the examples and description of this patent, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "including one" does not exclude the presence of other identical elements in the process, method, article or device including the element.

[0072] Although the present application has been illustrated and described with reference to certain embodiments thereof, it will be apparent to those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present application.

Claims

1. A bootstrap circuit, characterized in that: The circuit includes a data signal module, an energy-saving module and a first functional module, wherein the first functional module includes a power consumption unit, wherein an input end of the energy-saving module is connected to the data signal module, and an output end of the energy-saving module is connected to the first functional module, wherein the energy-saving module includes n D flip-flops connected in series; The energy-saving module is used to input a control signal to the first functional module according to the logic level of the data signal output by the data signal module, and the control signal is used to control the power consumption unit to be turned on or off.

2. The circuit according to claim 1, characterized in that The energy-saving module is used to input a first control signal to the first functional module when the duration of the logic level of the data signal output by the data signal module being at a high level is greater than or equal to a first duration, wherein the first control signal is used to control the first functional module to turn off the power consumption unit; The energy saving module is also used to input a second control signal to the first functional module when the logic level of the data signal output by the data signal module changes from a high level to a low level, wherein the second control signal is used to control the first functional module to turn on the power consumption unit.

3. The circuit according to claim 2, characterized in that The first duration includes 2 n-1 The duration of the system clock, and In the first functional module 2 n-1 When power consumption is generated within a period of one system clock, the energy-saving module sends the first control signal to the first functional module.

4. The circuit according to any one of claims 1 to 3, characterized in that The connection method of the n D flip-flops connected in series includes: In the 1st to (n-1)th D flip-flops, the input terminal of the D flip-flop is connected to the NOT gate of the D flip-flop; The output terminal of the (n-1)th D flip-flop is connected to the clock pin of the nth D flip-flop.

5. The circuit according to claim 4, characterized in that The nth D flip-flop comprises an input terminal, and, The input terminal of the nth D flip-flop is used to receive a data signal with a high logic level.

6. The circuit according to claim 1, characterized in that The circuit further includes: a first power supply module, a second power supply module, a first diode, a bootstrap capacitor and a first power tube, wherein: The first power supply module is connected to the anode of the first diode, and the second power supply module is connected to the drain of the first power tube; The cathode of the first diode is connected to the first end of the bootstrap capacitor and is connected to the first functional module.

7. The circuit according to claim 6, characterized in that The circuit further includes: a second diode and a second power tube, wherein: The first power supply module is connected to the anode of the second diode, and the second power supply module is connected to the drain of the first power tube; The source of the first power tube and the second end of the bootstrap capacitor are both connected to the drain of the second power tube; The source of the second power tube is grounded.

8. The circuit according to claim 7, characterized in that The circuit further comprises a second functional module, wherein: The second functional module is connected to the gate of the second power tube and is used to control the on and off of the second power tube.

9. The circuit according to claim 1, characterized in that The first functional module is connected to the gate of the first power tube and is used to control the on and off of the first power tube.

10. The circuit according to claim 1, characterized in that The circuit further includes a system clock signal module, and The system clock signal module is connected to the energy-saving module, wherein the system clock signal module is used to output a system clock signal, the system clock signal is a square wave with a wave ratio of 50%, and the rising edge from the logic level value changing from 0 to 1 to the adjacent logic level value changing from 0 to 1 in the system clock signal is a system clock duration.

11. A chip, characterized in that: The chip includes the bootstrap circuit according to any one of claims 1 to 10.

12. An electronic device, characterized in that: The electronic device comprises the bootstrap circuit according to any one of claims 1 to 10.

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