A method for improving burrs and copper nodules in CEM-3 boards

Abstract

The application discloses a method for improving CEM-3 plate flange and hole copper tumor, comprising the following steps: after drilling, the production plate is precisely ground and brushed to remove the flange at the hole; the production plate is high-pressure washed; the production plate is sandblasted to flush the hole; the production plate is subjected to copper deposition treatment, and the production plate does not pass through the loose section but passes through the chemical degumming section during copper deposition, so that the hole wall glass fiber is cleaned through the chemical degumming section; the production plate is subjected to full-plate electroplating, the hole copper and the plate surface copper layer thickness are thickened, and the current density during the full-plate electroplating is 1.15 ASD. The method adjusts and improves the process steps and parameters, and solves the quality problems of appearance defects and small hole diameter caused by the drilling flange and the hole copper tumor.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board manufacturing technology, specifically to a method for improving burrs and copper nodules in CEM-3 boards. Background Technology

[0002] PCB (Printed Circuit Board), also known as a printed circuit board, is an important electronic component. It serves as the support for electronic components and the carrier for their electrical connections. Because it is manufactured using electronic printing techniques, it is called a "printed" circuit board.

[0003] Among them, electroless copper plating is short for electroless copper plating, also known as plated through hole (PTH). It is a self-catalyzed redox reaction, and the PTH process is carried out after drilling is completed on two layers or production boards.

[0004] Currently, due to the inherent characteristics of the CEM-3 board material, it is prone to hole burrs during production. During drilling, fine glass fibers are pulled into the hole walls, and during copper plating, the glass fibers are deposited onto the copper, resulting in copper nodules inside the holes during subsequent electroplating. To improve quality, the drilling speed is reduced during drilling to reduce the amount of hole burrs and glass fibers inside the holes. After drilling, the board is ground once, and chemical desmearing is not performed during copper plating. VCP line production is used for electroplating.

[0005] The existing process flow is generally as follows: material cutting—baking—drilling—pre-treatment for copper plating—copper plating—electroplating—graphics—etching—AOI inspection—solder resist—characters—surface treatment—forming—testing—FQC—FQA—packaging—shipping; among which, the pre-treatment for copper plating includes, in sequence, burr polishing (polishing the board once with 800 grit sandpaper), precision polishing (polishing the board once each with 320# and 500# brushes), and high-pressure water washing (pressure 70-80 kg / cm). 2 (Wash once with water), do not exceed the expansion and chemical desmearing stages during copper immersion, and control the parameters during electroplating at 2.8ASD*50min.

[0006] Although adjustments were made to the drilling and copper plating processes mentioned above, the defect rate of slot holes, round holes with burrs, and copper nodules inside the holes after plating still exceeded 20% during actual processing. The burrs at the hole opening and the copper nodules inside the hole were larger than 50μm, resulting in poor appearance and defects inside the hole. In severe cases, the hole diameter may be too small, making it difficult for customers to insert components later. Summary of the Invention

[0007] In view of the above-mentioned technical defects, the present invention provides a method to improve the burrs and copper nodules in the holes of CEM-3 sheet metal, which solves the quality problems of poor appearance and small hole diameter caused by drilling burrs and copper nodules in the holes.

[0008] To address the aforementioned technical problems, this invention provides a method for improving burrs and copper nodules within holes of CEM-3 sheet metal, comprising the following steps:

[0009] S1. After drilling, the production board is precision brushed to remove burrs at the hole openings.

[0010] S2. High-pressure water washing of the production boards;

[0011] S3. Sandblast the production board to flush the holes;

[0012] S4. The production board is subjected to copper plating treatment. During the copper plating process, the production board passes through the chemical descaling section instead of the expansion section, so as to clean the glass fiber on the hole wall through the chemical descaling section.

[0013] S5. Perform full-board electroplating on the production board, thickening the copper layer in the holes and on the board surface. The current density during full-board electroplating is 1.15ASD.

[0014] Furthermore, in step S1, when the production board is being drilled, a phenolic mat is placed underneath it, and a coated aluminum sheet is placed on top of it.

[0015] Furthermore, in step S1, 500-grit sandpaper is used for precision brushing.

[0016] Furthermore, in step S1, the production board is precision brushed twice.

[0017] Furthermore, in step S1, the directions of the two brushing processes are perpendicular to each other.

[0018] Furthermore, in step S2, the pressure during high-pressure water washing is controlled at 70-80 kg / cm². 2 .

[0019] Furthermore, in step S4, the production board only goes through a chemical desmearing stage.

[0020] Furthermore, in step S5, the concentration of leveling agent in the electroplating solution is controlled at 15-20 ml / L and the concentration of brightener is controlled at 2-3 ml / L during full-plate electroplating.

[0021] Furthermore, in step S5, the electroplating time for the entire board is controlled at 120 minutes.

[0022] Furthermore, after step S5, the following steps are also included:

[0023] S6. On the production board, the outer layer circuitry, solder mask layer fabrication, surface treatment, and molding processes are carried out sequentially to obtain the circuit board.

[0024] Compared with the prior art, the present invention has the following beneficial effects:

[0025] This invention first uses a precision brush to grind and remove burrs from the hole opening. The precision brushing method can reduce damage to the hole opening while ensuring the removal of burrs, thus improving the problem of burrs at the hole opening. Then, the hole is flushed by sandblasting to reduce the fine glass fibers inside the hole. During copper plating, the production board passes through a chemical desmearing stage to further clean the glass fibers on the hole wall, making the hole wall smooth and improving the problem of copper nodules inside the hole. Finally, a low current is used for full-board electroplating to further improve the problem of small hole diameter. Thus, it solves the quality problems of poor appearance and small hole diameter caused by drilling burrs and copper nodules inside the hole in existing methods. Detailed Implementation

[0026] To better understand the technical content of this invention, the technical solution of this invention will be further introduced and explained below in conjunction with specific embodiments.

[0027] Example

[0028] The method for manufacturing a circuit board shown in this embodiment includes the following processing steps in sequence:

[0029] (1) Cutting: Cut the core board according to the panel size of 520mm×620mm. The thickness of the core board is 0.5mm, and the copper layer thickness on both surfaces of the core board is 0.5oz.

[0030] (2) Inner layer circuit fabrication (negative film process): Inner layer pattern transfer, photosensitive film is coated using a vertical coating machine, and the film thickness is controlled at 8μm. The inner layer circuit is exposed using a fully automatic exposure machine with 5-6 exposure rulers (21 exposure rulers). After development, the inner layer circuit pattern is formed; Inner layer etching, the inner layer circuit is etched out on the core board after exposure and development. The inner layer line width is measured to be 3mil; Inner layer AOI, and then the inner layer circuit is inspected for defects such as open circuits, short circuits, line gaps, and line pinholes. Defective products are scrapped, and defect-free products are sent to the next process.

[0031] (3) Lamination: The browning speed is based on the thickness of the bottom copper. The core board, prepreg, and outer copper foil are stacked in sequence as required. Then, according to the Tg of the board material, appropriate lamination conditions are selected to press the laminated board to form the production board.

[0032] (4) Drilling: Drilling is performed on the production board according to the design requirements based on existing drilling technology.

[0033] In the above process, a phenolic resin pad is placed underneath the production board during drilling, and a coated aluminum sheet is placed on top of it to reduce the problem of burrs during drilling.

[0034] (5) Grinding plate: The production plate is precision ground to remove the burrs at the opening. Before precision grinding, there is no burr sanding process. The sandpaper used for burr sanding is relatively rough and is prone to deformation of the grinding plate at the opening.

[0035] In the above-mentioned precision grinding process, 500-grit sandpaper is used twice. Compared with the existing method of using 320-grit and 500-grit sandpaper once each, this method can reduce damage to the hole opening while ensuring the removal of burrs. The 320-grit sandpaper used in the existing method is relatively coarse and is prone to deforming the hole opening grinding plate.

[0036] In the above, the two brushing directions are perpendicular to each other, that is, the production board is brushed once in the horizontal direction and once in the vertical direction, which means brushing once along the long side and once along the short side of the production board.

[0037] (6) Water washing: The production boards are subjected to a high-pressure water wash once, with the pressure controlled at 70-80 kg / cm². 2 .

[0038] (7) Sandblasting: The production board is sandblasted to flush the holes and reduce the amount of fine glass fibers inside.

[0039] (8) Copper plating: A thin layer of copper is deposited on the board surface and hole walls using chemical copper plating. The backlight test is level 10, and the copper plating thickness in the hole is 0.5μm.

[0040] In the above-mentioned existing processes, the process before chemical copper plating generally includes an expansion stage (treating the hole walls with an expansion agent to make them expand and soften, facilitating subsequent processing) and multiple chemical desmearing stages (using chemical agents such as potassium permanganate to remove adhesive residue from the hole walls); however, in this embodiment, the production board does not pass through the expansion stage before chemical copper plating to avoid generating more glass fibers on the hole walls due to expansion, and only passes through one chemical desmearing stage (i.e., only one chemical desmearing tank is used to soak the production board to remove adhesive) to clean the glass fibers on the hole walls, making the hole walls smooth and improving the copper nodules inside the holes.

[0041] (8) Full board electroplating: Full board electroplating is performed at a current density of 1.15ASD for 120 minutes to thicken the copper layer in the holes and on the board surface; here, a low current and long time electroplating method is used to improve the electroplating uniformity and further avoid the problem of small hole diameter.

[0042] Currently, electroplating solutions used for electroplating generally include:

[0043] Accelerators (also known as brighteners) are usually small-molecule sulfur-containing compounds. Their function is to accelerate the reduction of copper ions in blind holes and form new copper plating nuclei, making the copper layer structure more refined. The main types are SPS (sodium polydisulfide dipropane sulfonate) and MPS (sodium 3-thiopropane sulfonate).

[0044] Inhibitors (also known as carriers) are mostly polyether compounds. These substances are easily adsorbed on the active sites of grain growth, which can increase the electrochemical reaction resistance and enhance electrochemical polarization, thereby achieving the effects of refining grains and inhibiting the growth of the coating on the plate surface. Commonly used ones include polyethylene glycol, aromatic polyoxyethylene ether, and reactants of nonylphenol and ethylene oxide.

[0045] Leveling agents are typically nitrogen-containing heterocyclic compounds. They readily adsorb onto protruding areas of the board surface, i.e., high current density areas, slowing down the electroplating speed and inhibiting copper deposition in these high current density regions. However, they adsorb less in recessed areas and within micro-blind holes, leaving copper deposition unaffected and thus achieving a leveling effect.

[0046] In this embodiment, the concentration of leveling agent in the electroplating solution is controlled at 15-20 ml / L and the concentration of brightener is controlled at 2-3 ml / L during full-plate electroplating. By improving the concentration of leveling agent and brightener, the electroplating quality can be further improved.

[0047] (9) Fabrication of outer layer circuitry (positive film process): The outer layer pattern is transferred using a fully automatic exposure machine and positive film circuitry. The outer layer circuitry is exposed using an exposure ruler of 5 to 7 divisions (or 21 divisions). After development, the outer layer circuitry pattern is formed on the production board. The outer layer pattern is electroplated, and then copper and tin are plated on the production board respectively. The electroplating parameters are set according to the required copper thickness. Copper plating is performed at a current density of 1.8 ASD for 60 minutes, and tin plating is performed at a current density of 1.2 ASD for 10 minutes, with a tin thickness of 3 to 5 μm. Then, the film is removed, etched, and tin is removed in sequence to etch the outer layer circuitry on the production board. The outer layer AOI is performed using an automatic optical inspection system. By comparing with the CAM data, the outer layer circuitry is inspected for defects such as open circuits, gaps, incomplete etching, and short circuits.

[0048] (10) Solder resist and screen printing: After screen printing solder resist ink on the surface of the production board, it is then subjected to pre-curing, exposure, development and heat curing treatment in sequence to cure the solder resist ink into a solder resist layer; specifically, the solder resist ink on the TOP side and the characters on the TOP side are added with "UL mark", thereby coating a layer on the lines and substrates that do not need to be soldered to prevent bridging between lines during soldering, provide a permanent electrical environment and chemical corrosion resistance, and at the same time beautify the appearance.

[0049] (11) Surface treatment (immersion nickel and gold): The copper surface of the solder pads of the solder mask opening position is uniformly deposited with a nickel layer and a gold layer of a certain required thickness through chemical principle. The thickness of the nickel layer is 3-5μm; the thickness of the gold layer is 0.05-0.1μm.

[0050] (12) Electrical test: Test the electrical conductivity of the finished board. The test method used for this board is: flying probe test.

[0051] (13) Molding: Based on existing technology and design requirements, the circuit board is made with a shape tolerance of + / -0.05mm.

[0052] (14) FQC: Inspect the appearance of the circuit board according to the customer's acceptance standards and our company's inspection standards. If there are any defects, repair them in time to ensure excellent quality control for customers.

[0053] (15) FQA: Re-test the appearance of the circuit board, the thickness of the copper in the holes, the thickness of the dielectric layer, the thickness of the solder mask, the thickness of the inner copper layer, etc. to see if they meet the customer's requirements.

[0054] (16) Packaging: The circuit boards are sealed according to the packaging method and quantity required by the customer, and desiccant and humidity card are placed in the packaging before shipment.

[0055] The technical solutions provided by the embodiments of the present invention have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of the embodiments of the present invention. The descriptions of the embodiments above are only for helping to understand the principles of the embodiments of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the embodiments of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A method for improving the burr and hole-in-copper of a CEM-3 board, characterized in that, The method comprises the following steps: S1. After drilling, the production plate is precisely ground twice with 500-grit sandpaper, and the directions of the two times of grinding are perpendicular to each other, so as to remove burrs at the hole opening; the production plate is drilled with a phenolic pad under the production plate and a plated aluminum sheet on the production plate; S2. The production plate is subjected to high-pressure water washing; S3. The production plate is subjected to sand blasting treatment, so as to flush the hole; S4. The production plate is subjected to copper plating treatment, and the production plate passes through a chemical glue removing section but not a swelling section, so as to clean the hole wall glass fiber through the chemical glue removing section; S5. The production plate is subjected to full-plate electroplating, and the thickness of the hole copper and the plate surface copper layer is thickened; the current density during the full-plate electroplating is 1.15 ASD; the concentration of the leveler in the electroplating solution is controlled to be 15-20 ml / L, and the concentration of the brightener is controlled to be 2-3 ml / L.

2. The method of claim 1, wherein the CEM-3 board is a printed circuit board. In step S2, the pressure during the high-pressure water washing is controlled to be 70-80 kg / cm².

3. The method of claim 1, wherein the CEM-3 board is a printed circuit board. In step S5, the time during the full-plate electroplating is controlled to be 120 min.

4. The method of claim 1, wherein the CEM-3 board is a printed circuit board. After step S5, the following step is further included: S6. The production plate is sequentially subjected to outer layer circuit manufacturing, resist layer manufacturing, surface treatment and forming processes, so as to obtain a circuit board.