Electrode structure of solar cell, manufacturing method and solar cell

By adopting an electrode structure composed of multiple sub-gate in IBC solar cells, the problems of low photoelectric conversion efficiency and complex process are solved, and more efficient photoelectric conversion and the effect of reducing production costs are achieved.

CN119521844AActive Publication Date: 2025-02-25GUANGDONG AIKO SOLAR ENERGY TECH CO LTD +3
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Patent Information

Application Number
CN202311017301.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-08-11
Publication Date
2025-02-25
Estimated Expiration
2043-08-11

AI Technical Summary

Technical Problem

The photoelectric conversion efficiency of existing IBC solar cells is low and the process is complex, resulting in high production costs.

Method used

An electrode structure consisting of a plurality of sub-gate, wherein a plurality of first gate lines and second gate lines intersect in pairs to form a plurality of regular polygons. This structure optimizes the electric field distribution and improves the separation ability of photogenerated carriers.

Benefits of technology

By optimizing the electric field distribution, the separation capacity of photogenerated carriers is improved, the probability of recombination of carriers is reduced, thereby improving the photoelectric conversion efficiency of solar cells, simplifying the process flow, and reducing production costs.

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Abstract

The invention provides an electrode structure of a solar cell, a manufacturing method and the solar cell. A plurality of auxiliary grids of the electrode structure comprise a plurality of first grid lines, every two of the first grid lines intersect to form a plurality of regular polygons, each regular polygon is provided with an inner center, the vertex of each regular polygon is a first connecting point of at least two first grid lines, any two first grid lines with the same first connecting point in the regular polygons form a first included angle, and the first included angle is larger than the first included angle. The first included angle is larger than 0 degree and smaller than 180 degrees; any two second grid lines are provided with second connecting points, the projection of each second connecting point in the regular polygon is overlapped with the inner center, the first grid lines and the second grid lines are electrically insulated, the first grid lines are arranged on one side of the second grid lines, and under the condition that the first grid lines are positive grid lines, the second grid lines are negative grid lines. And when the first grid line is the negative grid line, the second grid line is the positive grid line. According to the invention, the photoelectric conversion capability of the solar cell is improved.
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Description

Technical Field

[0001] The present invention relates to the technical field of photovoltaic cells, and in particular to an electrode structure of a solar cell, a method for manufacturing the electrode structure of a solar cell, and a solar cell. Background Art

[0002] The most notable feature of IBC solar cells is that the PN junction and metal contact are both on the back of the solar cell, and the front surface is completely shielded by the metal grid electrode. Combined with the pyramid velvet structure on the front surface and the light trapping structure composed of the anti-reflection layer, it can maximize the use of incident light, reduce optical losses, and have a higher short-circuit current. At the same time, the back uses an optimized metal grid electrode to reduce the series resistance.

[0003] Although IBC cell technology has many advantages, it also faces some challenges. First of all, precisely because IBC cells are back-junction cells, in order to reduce the recombination of photogenerated carriers as little as possible before reaching the back pn junction, a higher minority carrier diffusion length is required, so the minority carrier lifetime of the substrate material is required to be higher. Secondly, IBC cells have high requirements for the passivation of the front surface, and photogenerated carriers must be able to reach the back pn junction area as much as possible, thereby improving the cell conversion efficiency. At the same time, when making the p+ and n+ regions distributed in a forked shape on the back of the IBC cell, it is necessary to use multiple masks to make them step by step, which undoubtedly increases the difficulty of the process. The process is relatively complicated, so the production cost of IBC cells is also higher than that of traditional crystalline silicon cells.

[0004] Therefore, the IBC cell is currently one of the most complex in terms of process and structural design among commercial crystalline silicon cells, and there is still room for improvement in terms of improving the conversion efficiency of the cell. Summary of the invention

[0005] The main purpose of the present invention is to provide an electrode structure of a solar cell, a method for manufacturing the electrode structure of a solar cell and a solar cell, so as to solve the problem of low photoelectric conversion efficiency in the prior art.

[0006] In order to achieve the above-mentioned purpose, according to one aspect of the present invention, there is provided an electrode structure of a solar cell, the electrode structure is composed of a plurality of auxiliary grids, the plurality of auxiliary grids comprising: a plurality of first grid lines, the plurality of first grid lines intersect in pairs to form a plurality of regular polygons, each regular polygon having an incenter, the vertices of each regular polygon being the first connection points of at least two first grid lines, and any two first grid lines having the same first connection point in the regular polygon have a first angle, the first angle being greater than 0° and less than 180°; a plurality of second grid lines, any two second grid lines having a second connection point, the projection of each second connection point in the regular polygon overlapping the incenter, the first grid lines and the second grid lines being electrically insulated, wherein the plurality of first grid lines are arranged on one side of the plurality of second grid lines, and when the first grid lines are positive grid lines, the second grid lines are negative grid lines, and when the first grid lines are negative grid lines, the second grid lines are positive grid lines.

[0007] Further, the electrode structure includes an electrically connected first part and a second part, the first part includes a plurality of first gate lines and a plurality of second gate lines, and the second part includes a plurality of first gate lines and a plurality of second gate lines, wherein when the first gate line of the first part is a positive gate line, the first gate line of the second part is a negative gate line, and when the first gate line of the first part is a negative gate line, the first gate line of the second part is a positive gate line.

[0008] Furthermore, the shapes of the plurality of regular polygons are the same.

[0009] Furthermore, the regular polygon is a regular hexagon.

[0010] Furthermore, the electrode structure further includes: an insulating dielectric layer located between the plurality of first gate lines and the plurality of second gate lines, and the insulating dielectric layer is used to electrically insulate the first gate lines from the second gate lines.

[0011] Furthermore, the electrode structure also includes: a first conductive part, the first conductive part is connected to the first connection point, and the first conductive part has a first extension direction, and the first extension direction is perpendicular to any one of the first gate lines; a second conductive part, the second conductive part is connected to the second connection point, and the second conductive part has the same extension direction as the first conductive part.

[0012] Further, the first conductive portion has a first length in the second extension direction, the second conductive portion has a second length in the second extension direction, the first length is greater than the second length, and the second extension direction is perpendicular to the first extension direction.

[0013] In order to achieve the above-mentioned purpose, according to one aspect of the present invention, a method for manufacturing an electrode structure of a solar cell is provided, wherein the electrode structure is composed of a plurality of auxiliary grids, and the method for forming the plurality of auxiliary grids comprises: providing a semiconductor substrate, wherein the semiconductor substrate has a first surface; forming a plurality of first grid lines on the first surface, wherein the plurality of first grid lines intersect with each other in pairs to form a plurality of regular polygons, wherein each regular polygon has an incenter, and the vertices of each regular polygon are first connection points of at least two first grid lines, and any two first grid lines with the same first connection point in the regular polygon have a first angle, and the first angle is greater than 0° and less than 180°; forming a plurality of second grid lines on a side of the first grid lines away from the first surface, wherein any two second grid lines have a second connection point, and the projection of each second connection point in the regular polygon overlaps with the incenter, and the first grid lines and the second grid lines are electrically insulated, wherein the plurality of first grid lines are arranged on one side of the plurality of second grid lines, and when the first grid lines are positive grid lines, the second grid lines are negative grid lines, and when the first grid lines are negative grid lines, the second grid lines are positive grid lines.

[0014] According to another aspect of the present invention, a solar cell is provided, comprising: a semiconductor substrate, the semiconductor substrate comprising a stacked substrate and a doping layer, wherein the doping type of the doping layer and the substrate are opposite to each other to form a PN junction; an electrode structure, the electrode structure is located on a side of the doping layer away from the substrate, and a first gate line in the electrode structure is arranged in contact with the substrate, and a second gate line in the electrode structure is arranged in contact with the doping layer.

[0015] Further, the silicon substrate includes a first silicon wafer and a second silicon wafer which are arranged adjacent to each other, and the doping types of the first silicon wafer and the second silicon wafer are opposite; the doping layer includes a first doping layer and a second doping layer, the first doping layer is arranged in contact with the first silicon wafer, and the second doping layer is arranged in contact with the second silicon wafer, and the doping types of the first doping layer and the first silicon wafer are opposite, and the doping types of the second doping layer and the second silicon wafer are opposite; the electrode structure includes a first part and a second part, the first part includes a plurality of first gate lines and a plurality of second gate lines, and the second part includes a plurality of first gate lines and a plurality of second gate lines, wherein, when the first gate line of the first part is a positive gate line, the first gate line of the second part is a negative gate line, and when the first gate line of the first part is a negative gate line, the first gate line of the second part is a positive gate line.

[0016] The technical solution of the present invention is applied to provide an electrode structure of a solar cell, wherein the electrode structure can be composed of a plurality of auxiliary grids, and the plurality of auxiliary grids include a plurality of first grid lines and a plurality of second grid lines, wherein the plurality of first grid lines intersect each other to form a plurality of regular polygons, the vertices of each of the regular polygons are the first connection points of at least two of the first grid lines, and any two of the first grid lines having the same first connection point in the regular polygons have a first angle, and the first angle is greater than 0° and less than 180°; any two of the plurality of second grid lines have a second connection point, and since the plurality of first grid lines intersect each other to form a plurality of regular polygons, each All regular polygons have an incenter, and by making the projection of each second connection point in the above regular polygon overlap with its incenter, the purpose of making each second connection point equal to the distance from the first grid line is achieved. Therefore, when a solar cell with this electrode structure is subjected to an electric field, the carriers collected at each second connection point can be collected by the first grid line in the shortest path. Similarly, the carriers collected at each first connection point can be collected by the second grid line in the shortest path, thereby making full use of the distribution characteristics of the electric field in space, improving the separation ability of photogenerated carrier pairs, making the probability of carrier recombination lower, and thus achieving the purpose of improving the photoelectric conversion effect of the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings constituting a part of the present invention are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the accompanying drawings:

[0018] Figure 1 A schematic diagram showing an electrode structure of a solar cell according to an embodiment of the present invention is shown;

[0019] Figure 2 A schematic diagram showing the connection between a first part and a second part of an electrode structure according to an embodiment of the present invention is shown;

[0020] Figure 3 A schematic cross-sectional structure diagram of a solar cell according to an embodiment of the present invention is shown.

[0021] The above drawings include the following reference numerals:

[0022] 10. First gate line; 20. First connection point; 30. Second gate line; 40. Second connection point; 50. Substrate; 60. Tunneling layer; 70. Doping layer; 80. Passivation film; 90. Insulating dielectric layer; 201. First conductive portion; 401. Second conductive portion; 100. First part; 200. Second part. DETAILED DESCRIPTION

[0023] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0024] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0025] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so as to describe the embodiments of the present invention described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0026] As mentioned in the background technology, since the IBC cell is a back-junction cell, in order to reduce the recombination of photogenerated carriers as little as possible before reaching the back pn junction, a higher minority carrier diffusion length is required, so the minority carrier lifetime of the substrate material is required to be high. Secondly, the IBC cell has high requirements for the passivation of the front surface, and requires that the photogenerated carriers can reach the back pn junction area as much as possible, thereby improving the cell conversion efficiency. Therefore, the current IBC cell is one of the most complex cells in the commercial crystalline silicon cell and the most difficult to design structure, and there is still a need to improve the conversion efficiency of the cell. In order to solve the problem of low photoelectric conversion efficiency of current solar cells, the inventor of this application has proposed an electrode structure of a solar cell, a method for manufacturing an electrode structure of a solar cell, and a solar cell.

[0027] According to one aspect of the present application, a solar cell electrode structure is provided, such as Figure 1As shown, the electrode structure is composed of a plurality of auxiliary grids, and the plurality of auxiliary grids include: a plurality of first grid lines 10, wherein the plurality of first grid lines 10 intersect each other to form a plurality of regular polygons, each of which has an incenter, and the vertices of each of which are first connection points 20 of at least two of the first grid lines 10, and any two of the first grid lines 10 in the regular polygons having the same first connection point 20 have a first angle, and the first angle is greater than 0° and less than 180°; a plurality of second grid lines 30, Any two of the above-mentioned second gate lines 30 have a second connection point 40, and the projection of each of the above-mentioned second connection points 40 in the above-mentioned regular polygon overlaps with the above-mentioned heart. The above-mentioned first gate lines 10 and the above-mentioned second gate lines 30 are electrically insulated, wherein the above-mentioned multiple first gate lines 10 are arranged on one side of the above-mentioned multiple second gate lines 30, and when the above-mentioned first gate lines 10 are positive gate lines, the above-mentioned second gate lines 30 are negative gate lines, and when the above-mentioned first gate lines 10 are negative gate lines, the above-mentioned second gate lines 30 are positive gate lines.

[0028] Specifically, a plurality of first grid lines 10 can intersect in pairs to form a regular polygon, so the length of each first grid line 10 in the above-mentioned electrode structure is equal, and because the regular polygon has an inscribed circle, the plurality of regular polygons surrounded by the plurality of first grid lines 10 all have an incenter, wherein the incenter is the center of the inscribed circle of the regular polygon. Exemplarily, since the fixed point of the above-mentioned regular polygon is the first connection point 20 of at least two first grid lines 10, and any two first grid lines 10 in the above-mentioned regular polygon having the same first connection point 20 have a first angle, and the first angle is greater than 0° and less than 180°, therefore, the above-mentioned regular polygon can be a regular triangle, a regular pentagon, a regular hexagon, a regular heptagon, a regular octagon, etc., and those skilled in the art can reasonably select the number of sides of the regular polygon according to actual needs.

[0029] Specifically, since there is a second connection point 40 between any two second grid lines 30, and the projection of each second connection point 40 in the regular polygon surrounded by the above-mentioned plurality of first grid lines 10 overlaps with its incenter, any two second connection points 40 that overlap with the incenters of any two adjacent regular polygons among the plurality of second connection points 40 are the two endpoints of any second grid line 30, and similarly, the plurality of second grid lines 30 intersect in pairs to form a plurality of regular polygons. It is worth noting that when any two regular polygons share a side, the above-mentioned two regular polygons can be considered as two adjacent regular polygons.

[0030] In addition, since in the case where multiple first grid lines 10 are positive grid lines (negative grid lines), multiple second grid lines 30 are negative grid lines (positive grid lines), and multiple first grid lines 10 are arranged on one side of multiple second grid lines 30, and any first grid line 10 and any second grid line 30 are electrically insulated, the electrode structure can be applied to back-junction solar cells, wherein, in the back-junction solar cell, the positive electrode and the negative electrode are both located on the back of the back-junction solar cell. It can be understood that, in the case where the above-mentioned first grid line 10 can be a positive grid line, the first grid line 10 can be used as the positive electrode of the back-junction solar cell, and the above-mentioned second grid line 30 can be used as the negative electrode of the back-junction solar cell; in the case where the above-mentioned first grid line 10 is a negative grid line, the first grid line 10 can be used as the negative electrode of the back-junction solar cell, and the above-mentioned second grid line 30 can be used as the positive electrode of the back-junction solar cell.

[0031] Through the above-mentioned embodiment, the electrode structure can be composed of a plurality of auxiliary grids, and the plurality of auxiliary grids include a plurality of first grid lines 10 and a plurality of second grid lines 30, wherein the plurality of first grid lines 10 intersect each other to form a plurality of regular polygons, the vertices of each of the regular polygons are the first connection points 20 of at least two of the first grid lines 10, and any two of the first grid lines 10 having the same first connection points 20 in the regular polygons have a first angle, and the first angle is greater than 0° and less than 180°; any two of the plurality of second grid lines 30 have a second connection point 40, and since the plurality of first grid lines 10 intersect each other to form a plurality of regular polygons, each regular polygon has a first connection point 40. The shapes all have an incenter, and by making the projection of each second connection point 40 in the regular polygon overlap with its incenter, the purpose of making each second connection point 40 equal to the distance from the first grid line 10 is achieved. Therefore, when a solar cell with this electrode structure is subjected to an electric field, the carriers collected at each second connection point 40 can be collected by the first grid line 10 in the shortest path. Similarly, the carriers collected at each first connection point 20 can be collected by the second grid line 30 in the shortest path, thereby making full use of the distribution characteristics of the electric field in space, improving the separation ability of photogenerated carrier pairs, making the probability of carrier recombination lower, and thus improving the photoelectric conversion effect of the solar cell.

[0032] In some optional embodiments, such as Figure 1As shown, the electrode structure includes an electrically connected first part 100 and a second part 200, the first part 100 includes a plurality of the first gate lines 10 and a plurality of the second gate lines 30, the second part 200 includes a plurality of the first gate lines 10 and a plurality of the second gate lines 30, wherein, in the case where the first gate lines 10 of the first part 100 are the positive gate lines, the first gate lines 10 of the second part 200 are the negative gate lines, and the first gate lines 10 of the first part 100 are electrically connected to the second gate lines 30 of the second part 200, and the second gate lines 30 of the first part 100 are electrically connected to the first gate lines 10 of the second part 200, as shown in FIG. Figure 2 As shown, in the case where the first gate line 10 of the first part 100 is the negative gate line, the first gate line 10 of the second part 200 is the positive gate line, and the first gate line 10 of the first part 100 is electrically connected to the second gate line 30 of the second part 200, and the second gate line 30 of the first part 100 is electrically connected to the first gate line 10 of the second part 200, as shown in FIG. Figure 2 shown.

[0033] Specifically, since the first second gate line 30 is provided between two second connection points 40 overlapping the incenters of two adjacent regular polygons, the number of second gate lines 30 is much less than the number of first gate lines 10. In order to make the number of first gate lines 10 and the number of second gate lines 30 almost the same, the electrode structure in this embodiment includes a first part 100 and a second part 200.

[0034] The first part 100 may include a plurality of first grid lines 10 and a plurality of second grid lines 30, and the plurality of first grid lines 10 in the first part 100 intersect with each other to form a plurality of regular polygons, each regular polygon having an incenter, the vertices of each regular polygon being first connection points 20 of at least two first grid lines 10, and any two first grid lines 10 having the same first connection point 20 in the regular polygon have a first angle, and the first angle is greater than 0° and less than 180°; the first part 100 may also include a plurality of second grid lines 10 The gate line 30, any two of the second gate lines 30 have a second connection point 40, the projection of each of the second connection points 40 in the regular polygon overlaps with the inner core, the first gate line 10 and the second gate line 30 are electrically insulated, wherein the plurality of first gate lines 10 are arranged on one side of the plurality of second gate lines 30, and when the first gate line 10 is a positive gate line, the second gate line 30 is a negative gate line, and when the first gate line 10 is a negative gate line, the second gate line 30 is a positive gate line.

[0035] The second part 200 may include a plurality of first grid lines 10 and a plurality of second grid lines 30, and the plurality of first grid lines 10 in the second part 200 intersect with each other to form a plurality of regular polygons, each regular polygon having an incenter, the vertices of each regular polygon being first connection points 20 of at least two first grid lines 10, and any two first grid lines 10 having the same first connection point 20 in the regular polygon have a first angle, and the first angle is greater than 0° and less than 180°; the second part 200 may also include a plurality of second grid lines 10 The gate line 30, any two of the second gate lines 30 have a second connection point 40, the projection of each of the second connection points 40 in the regular polygon overlaps with the inner core, the first gate line 10 and the second gate line 30 are electrically insulated, wherein the plurality of first gate lines 10 are arranged on one side of the plurality of second gate lines 30, and when the first gate line 10 is a negative gate line, the second gate line 30 is a positive gate line, and when the first gate line 10 is a positive gate line, the second gate line 30 is a negative gate line.

[0036] It should be noted that, in the case where the first gate line 10 of the first part 100 in the present embodiment is a positive gate line, the first gate line 10 of the second part 200 in the present embodiment is a negative gate line, and accordingly, the second gate line 30 of the first part 100 is a negative gate line, and the second gate line 30 of the second part 200 is a positive gate line; in the case where the first gate line 10 of the first part 100 in the present embodiment is a negative gate line, the first gate line 10 of the second part 200 in the present embodiment is a positive gate line, and accordingly, the second gate line 30 of the first part 100 is a positive gate line, and the second gate line 30 of the second part 200 is a negative gate line.

[0037] In some optional embodiments, the shapes of the plurality of regular polygons are the same.

[0038] Specifically, the plurality of first grid lines 10 intersect each other to form a plurality of regular polygons, and the plurality of regular polygons have the same shape. In the above embodiment, by setting the plurality of regular polygons to have the same shape, the lengths of any two first grid lines 10 are equal, and the lengths of any two second grid lines 30 are also equal, so that the current arrangement inside the battery is more orderly, the light absorption capacity of the battery surface can be enhanced, and the photoelectric conversion efficiency of the battery is improved.

[0039] In some optional embodiments, the regular polygon is a regular hexagon.

[0040] Specifically, the first grid lines 10 intersect each other to form a plurality of regular polygons, and each regular polygon is a regular hexagon. Since the distance between each second connection point 40 and the corresponding first connection points 20 of each regular hexagon is equal, and any two regular hexagons in the plurality of regular hexagons are arranged adjacent to each other, the collection of carriers can be made more efficient.

[0041] In some optional embodiments, the electrode structure further includes: an insulating dielectric layer located between the plurality of first gate lines 10 and the plurality of second gate lines 30 , and the insulating dielectric layer is used to electrically insulate the first gate lines 10 from the second gate lines 30 .

[0042] Among them, since the first gate line 10 is a positive gate line and the second gate line 30 is a negative gate line, in order to prevent the first gate line 10 and the second gate line 30 from being electrically connected, an insulating dielectric layer is set between the first gate line 10 and the second gate line 30, so that the insulating dielectric layer can be used to isolate the first gate line 10 and the second gate line 30, thereby avoiding electrical connection between any first gate line 10 and any second gate line 30.

[0043] In some optional embodiments, the electrode structure further includes: a first conductive portion, the first conductive portion is connected to the first connection point, and the first conductive portion has a first extension direction, and the first extension direction is perpendicular to any one of the first gate lines 10; a second conductive portion, the second conductive portion is connected to the second connection point, and the second conductive portion has the same extension direction as the first conductive portion.

[0044] In the above embodiment, in order to enable the first gate line 10 in the electrode structure to collect the first carriers and the second gate line 30 to collect the second carriers, a first conductive portion is connected at the first connection point of the first gate line 10, and the first conductive portion has a first extension direction, so that the first gate line 10 guides and collects the first carriers through the first conductive portion. Similarly, a second conductive portion is connected at the second connection point of the second gate line 30, and the second conductive portion also has a first extension direction, so that the second gate line 30 guides and collects the second carriers through the second conductive portion, wherein when the first carrier is a hole, the second carrier is an electron, and conversely, when the first carrier is an electron, the second carrier is a hole.

[0045] In some optional embodiments, since the first conductive portion usually carries a larger current, it needs to have a larger conductivity, the first conductive portion has a first length in the second extension direction, the second conductive portion has a second length in the second extension direction, the first length is greater than the second length, and the second extension direction is perpendicular to the first extension direction.

[0046] According to another aspect of the present invention, the applicant of the present application also provides a method for manufacturing an electrode structure of a solar cell, wherein the electrode structure is composed of a plurality of auxiliary grids, and the method for forming the plurality of auxiliary grids comprises: providing a semiconductor substrate, wherein the semiconductor substrate has a first surface; forming the plurality of first grid lines on the first surface, wherein the plurality of first grid lines intersect with each other to form a plurality of regular polygons, wherein each of the regular polygons has an incenter, and the vertices of each of the regular polygons are first connection points of at least two of the first grid lines, and any two of the first grid lines having the same first connection point in the regular polygons have There is a first angle, which is greater than 0° and less than 180°; the plurality of second grid lines are formed on the side of the first grid line away from the first surface, any two of the second grid lines have a second connection point, and the projection of each of the second connection points in the regular polygon overlaps with the inner core, and the first grid line and the second grid line are electrically insulated, wherein the plurality of first grid lines are arranged on one side of the plurality of second grid lines, and when the first grid line is a positive grid line, the second grid line is a negative grid line, and when the first grid line is a negative grid line, the second grid line is a positive grid line.

[0047] Specifically, a first printing plate may be arranged on the first surface of the semiconductor substrate, wherein the first printing plate has a plurality of first hollow regions, and the plurality of first hollow regions are used to form a plurality of first gate lines;

[0048] Applying a first conductive paste onto the first printing plate to form a plurality of the first grid lines in the plurality of the first hollow areas, wherein the plurality of the first grid lines intersect each other to form a plurality of regular polygons, each of the regular polygons having an incenter, the vertices of each of the regular polygons being first connection points of at least two of the first grid lines, and any two of the first grid lines having the same first connection point in the regular polygons having a first angle, the first angle being greater than 0° and less than 180°;

[0049] A second printing plate is arranged on a side of the first grid line away from the first surface, the second printing plate has a plurality of second hollow areas, and the plurality of second hollow areas are used to form a plurality of second grid lines;

[0050] A second conductive paste is applied onto the second printing plate to form a plurality of the first grid lines in the second hollow areas, wherein any two of the second grid lines have a second connection point, and the projection of each of the second connection points in the regular polygon overlaps with the inner core, and the first grid lines and the second grid lines are electrically insulated, wherein the plurality of first grid lines are arranged on one side of the plurality of second grid lines, and when the first grid lines are positive grid lines, the second grid lines are negative grid lines, and when the first grid lines are negative grid lines, the second grid lines are positive grid lines.

[0051] According to another aspect of the present invention, the applicant of the present application also provides a solar cell, such as Figure 3 As shown, the solar cell includes: a semiconductor substrate, the semiconductor substrate includes a stacked substrate 50 and a doping layer 70, wherein the doping types of the doping layer 70 and the substrate 50 are opposite to each other to form a PN junction; an electrode structure, the electrode structure is located on a side of the doping layer 70 away from the substrate 50, and the first gate line 10 in the electrode structure is in contact with the substrate 50, and the second gate line 30 in the electrode structure is in contact with the doping layer 70.

[0052] Specifically, the electrode structure of the solar cell is composed of a plurality of auxiliary grids, and the plurality of the auxiliary grids include a plurality of first grid lines 10 and a plurality of second grid lines 30, wherein the plurality of first grid lines 10 intersect each other to form a plurality of regular polygons, each of the regular polygons has an incenter, the vertices of each of the regular polygons are first connection points of at least two of the first grid lines 10, and any two of the first grid lines 10 having the same first connection point in the regular polygons have a first angle, and the first angle is greater than 0° and less than 180°; and any two of the second grid lines 30 have a second connection point, and the projection of each of the second connection points in the regular polygon overlaps with the incenter, and the first grid lines 10 and the second grid lines 30 are electrically insulated, wherein the plurality of first grid lines 10 are arranged on one side of the plurality of second grid lines 30, and when the first grid lines 10 are positive grid lines, the second grid lines 30 are negative grid lines, and when the first grid lines 10 are negative grid lines, the second grid lines 30 are positive grid lines.

[0053] In the above embodiment, the first gate line 10 in the electrode structure is arranged in contact with the substrate 50, and the second gate line 30 is arranged in contact with the doping layer 70, and because the doping types of the substrate 50 and the doping layer 70 are opposite, the first carrier can be collected through the first gate line 10, and the second carrier can be collected through the second gate line 30, wherein, when the first carrier is a hole, the second carrier is an electron; when the first carrier is an electron, the second carrier is a hole. Therefore, the solar cell can make full use of the distribution characteristics of the electric field in space, improve the separation ability of the photogenerated carrier pairs, and then reduce the recombination probability of the carriers, so as to improve the photoelectric conversion ability of the solar cell.

[0054] In some optional embodiments, the substrate 50 may include a first silicon wafer and a second silicon wafer disposed adjacent to each other, and the doping types of the first silicon wafer and the second silicon wafer are opposite; the doping layer 70 includes a first doping layer and a second doping layer, the first doping layer is disposed in contact with the first silicon wafer, the second doping layer is disposed in contact with the second silicon wafer, and the doping types of the first doping layer and the first silicon wafer are opposite, and the doping types of the second doping layer and the second silicon wafer are opposite; the electrode structure includes a first part and a second part, the first part includes a plurality of the first gate lines 10 and a plurality of the second gate lines 30, and the second part includes a plurality of the first gate lines 10 and a plurality of the second gate lines 30, wherein, when the first gate lines 10 of the first part are the positive gate lines, the first gate lines 10 of the second part are the negative gate lines, and when the first gate lines 10 of the first part are the negative gate lines, the first gate lines 10 of the second part are the positive gate lines.

[0055] Specifically, the first silicon wafer may be P-type single crystal silicon, the second silicon wafer may be N-type single crystal silicon, the first doped layer may be N-type phosphorus-doped polycrystalline silicon, the second doped layer may be P-type boron-doped polycrystalline silicon, the first portion of the electrode structure is located on a side of the N-type phosphorus-doped polycrystalline silicon away from the P-type single crystal silicon, and the second portion of the electrode structure is located on a side of the P-type boron-doped polycrystalline silicon away from the N-type single crystal silicon.

[0056] The first part includes a plurality of first grid lines 10 and a plurality of second grid lines 30, and the plurality of first grid lines 10 of the first part intersect with each other to form a plurality of regular polygons, each of the regular polygons has an incenter, the vertices of each of the regular polygons are first connection points of at least two of the first grid lines 10, and any two of the first grid lines 10 having the same first connection point in the regular polygon have a first angle, the first angle is greater than 0° and less than 180°, any two of the second grid lines 30 have a second connection point, the projection of each of the second connection points in the regular polygon overlaps with the incenter, the first grid lines 10 and the second grid lines 30 are electrically insulated, and the plurality of first grid lines 10 are arranged at the plurality of second grid lines 30. One side; the second part includes a plurality of first grid lines 10 and a plurality of second grid lines 30, and the plurality of first grid lines 10 of the second part intersect in pairs to form a plurality of regular polygons, each of the regular polygons has an incenter, the vertices of each of the regular polygons are first connection points of at least two of the first grid lines 10, and any two of the first grid lines 10 having the same first connection points in the regular polygons have a first angle, the first angle is greater than 0° and less than 180°, any two of the second grid lines 30 have a second connection point, and the projection of each of the second connection points in the regular polygon overlaps with the incenter, the first grid lines 10 and the second grid lines 30 are electrically insulated, wherein the plurality of first grid lines 10 are arranged on one side of the plurality of second grid lines 30.

[0057] Further, when the above-mentioned first gate line 10 in the first part is a positive gate line, the above-mentioned second gate line 30 in the first part is a negative gate line, when the above-mentioned first gate line 10 in the first part is a negative gate line, the above-mentioned second gate line 30 in the first part is a positive gate line, and when the first gate line 10 in the first part is a positive gate line, the first gate line 10 in the second part is a negative gate line, and when the first gate line 10 in the first part is a negative gate line, the first gate line 10 in the second part is a positive gate line.

[0058] In some optional embodiments, such as Figure 3 As shown, the solar cell may further include a tunneling layer 60, which may include a first tunneling layer and a second tunneling layer, wherein the first tunneling layer is located between the P-type single crystal silicon and the N-type phosphorus-doped polycrystalline silicon, and the second tunneling layer is located between the N-type single crystal silicon and the P-type boron-doped polycrystalline silicon. Figure 3As shown, the solar cell may further include a passivation film 80, which may include a first passivation film and a second passivation film, wherein the first passivation film is located on a side of the N-type phosphorus-doped polysilicon away from the first tunneling layer, and the second passivation film is located on a side of the P-type boron-doped polysilicon away from the second tunneling layer. The electrode structure may further include a first conductive portion 201 and a second conductive portion 401, wherein the first conductive portion 201 is connected to the first connection point, and the first conductive portion 201 located in the first portion penetrates the first passivation film, the N-type phosphorus-doped polysilicon and the first tunneling layer to the P-type monocrystalline silicon, the second conductive portion 401 located in the first portion penetrates the first passivation film to the N-type phosphorus-doped polysilicon, the first conductive portion 201 located in the second portion penetrates the second passivation film, the P-type phosphorus-doped polysilicon and the first tunneling layer to the N-type monocrystalline silicon, and the second conductive portion 401 located in the second portion penetrates the second passivation film to the P-type phosphorus-doped polysilicon.

[0059] Furthermore, the above-mentioned solar cell may also include a front passivation film, an anti-reflection film and an anti-transmission film, wherein the front passivation film is located on the side of the single crystal silicon away from the tunneling layer 60, the anti-reflection film is located on the side of the front passivation film away from the single crystal silicon, and the anti-transmission film is located on the side of the anti-reflection film away from the front passivation film. Exemplarily, the steps of forming the above-mentioned solar cell may include first cleaning the P-type single crystal silicon and the N-type single crystal silicon, and forming a first tunneling layer and a second tunneling layer so that the first tunneling layer covers one side surface of the above-mentioned P-type single crystal silicon, and the second tunneling layer covers one side surface of the above-mentioned N-type single crystal silicon, and then using chemical vapor deposition to deposit polycrystalline silicon to the side of the first tunneling layer away from the above-mentioned P-type single crystal silicon and the side of the second tunneling layer away from the N-type single crystal silicon, and then setting a first mask so that the first mask covers the polycrystalline silicon located on the N-type single crystal silicon, doping boron in the polycrystalline silicon located on the P-type single crystal silicon to form N-type boron-doped polycrystalline silicon, and setting a second mask so that the second mask covers the polycrystalline silicon located on the P-type single crystal silicon, and doping phosphorus in the polycrystalline silicon located on the N-type single crystal silicon to form P-type phosphorus-doped polycrystalline silicon.

[0060] Furthermore, a large light spot can be used to laser open the above-mentioned P-type phosphorus-doped polysilicon and N-type boron-doped polysilicon respectively, and then the other side of the above-mentioned P-type single crystal silicon and N-type single crystal silicon is etched on the front side, polished and textured, and then a front passivation film, an anti-reflection film and an anti-transmission film are formed in sequence. Optionally, a first passivation film can be formed on the side of the P-type phosphorus-doped polysilicon away from the first tunneling layer, and a second passivation film can be formed on the side of the N-type boron-doped polysilicon away from the second tunneling layer, and then sintered. Furthermore, in order to form the above-mentioned electrode structure, the above-mentioned P-type phosphorus-doped polysilicon and N-type boron-doped polysilicon are laser-opened again to form a first through hole penetrating the above-mentioned first passivation film, P-type phosphorus-doped polysilicon and the first tunneling layer to the N-type single crystal silicon, or a first through hole penetrating the above-mentioned second passivation film, N-type phosphorus-doped polysilicon and the second tunneling layer to the P-type single crystal silicon, and a second through hole penetrating the above-mentioned first passivation film to the P-type phosphorus-doped polysilicon, or a second through hole penetrating the above-mentioned second passivation film to the N-type phosphorus-doped polysilicon, and then the first gate line 10 is formed by screen printing, so that the multiple first gate lines 10 intersect with each other to form a plurality of regular polygons, each of the above-mentioned regular polygons has an incenter, and the vertices of each of the above-mentioned regular polygons are the first connection points of at least two of the above-mentioned first gate lines 10, and the above-mentioned regular polygons have the same first connection points. Any two of the first gate lines 10 have a first angle, which is greater than 0° and less than 180°. Then, in order to electrically insulate the first gate line 10 and the second gate line 30, an insulating resin is formed by screen printing to form an insulating medium layer 90, and then the second gate line 30 is formed by screen printing. Any two of the second gate lines 30 have a second connection point, and the projection of each of the second connection points in the regular polygon overlaps with the inner core. The first gate line 10 and the second gate line 30 are electrically insulated, wherein the multiple first gate lines 10 are arranged on one side of the multiple second gate lines 30, and when the first gate line 10 is a positive gate line, the second gate line 30 is a negative gate line, and when the first gate line 10 is a negative gate line, the second gate line 30 is a positive gate line.

[0061] From the above description, it can be seen that the above embodiments of the present invention achieve the following technical effects:

[0062] Since the electrode structure can be composed of a plurality of auxiliary grids, and the plurality of auxiliary grids include a plurality of first grid lines and a plurality of second grid lines, wherein the plurality of first grid lines intersect in pairs to form a plurality of regular polygons, the vertices of each of the regular polygons are the first connection points of at least two of the first grid lines, and any two of the first grid lines having the same first connection points in the regular polygons have a first angle, and the first angle is greater than 0° and less than 180°; any two of the plurality of second grid lines have a second connection point, and since the plurality of first grid lines intersect in pairs to form a plurality of regular polygons, each regular polygon has an incenter, And by making the projection of each second connection point in the above-mentioned regular polygon overlap with its inner center, the purpose of making each second connection point equal to the distance from the first grid line is achieved. Therefore, when a solar cell with this electrode structure is subjected to an electric field, the carriers collected at each second connection point can be collected by the first grid line in the shortest path. Similarly, the carriers collected at each first connection point can be collected by the second grid line in the shortest path, thereby making full use of the distribution characteristics of the electric field in space, improving the separation ability of photogenerated carrier pairs, making the probability of carrier recombination lower, and thus improving the photoelectric conversion effect of the solar cell.

[0063] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. An electrode structure of a solar cell, the electrode structure being composed of a plurality of auxiliary grids, characterized in that: The plurality of auxiliary grids include: A plurality of first grid lines, wherein the plurality of first grid lines intersect in pairs to form a plurality of regular polygons, each of the regular polygons having an incenter, a vertex of each of the regular polygons being a first connection point of at least two of the first grid lines, and any two of the first grid lines in the regular polygons having the same first connection point have a first angle, and the first angle is greater than 0° and less than 180°; A plurality of second gate lines, any two of the second gate lines have a second connection point, the projection of each of the second connection points in the regular polygon overlaps with the heart, the first gate line and the second gate line are electrically insulated, wherein the plurality of first gate lines are arranged on one side of the plurality of second gate lines, and when the first gate line is a positive gate line, the second gate line is a negative gate line, and when the first gate line is a negative gate line, the second gate line is a positive gate line.

2. The electrode structure according to claim 1, characterized in that: The electrode structure includes an electrically connected first part and a second part, the first part includes a plurality of the first gate lines and a plurality of the second gate lines, the second part includes a plurality of the first gate lines and a plurality of the second gate lines, wherein, when the first gate line of the first part is the positive gate line, the first gate line of the second part is the negative gate line, and when the first gate line of the first part is the negative gate line, the first gate line of the second part is the positive gate line.

3. The electrode structure according to claim 1, characterized in that: The shapes of the plurality of regular polygons are the same.

4. The electrode structure according to claim 1, characterized in that: The regular polygon is a regular hexagon.

5. The electrode structure according to any one of claims 1 to 4, characterized in that: The electrode structure further comprises: The insulating dielectric layer is located between the plurality of first gate lines and the plurality of second gate lines, and the insulating dielectric layer is used to electrically insulate the first gate lines from the second gate lines.

6. The electrode structure according to any one of claims 1 to 4, characterized in that: The electrode structure further comprises: A first conductive portion, the first conductive portion is connected to the first connection point, and the first conductive portion has a first extension direction, and the first extension direction is perpendicular to any one of the first gate lines; A second conductive portion, wherein the second conductive portion is connected to the second connection point, and the second conductive portion and the first conductive portion have the same extension direction.

7. The electrode structure according to claim 6, characterized in that: The first conductive portion has a first length in a second extending direction, the second conductive portion has a second length in the second extending direction, the first length is greater than the second length, and the second extending direction is perpendicular to the first extending direction.

8. A method for manufacturing an electrode structure of a solar cell according to any one of claims 1 to 7, wherein the electrode structure is composed of a plurality of auxiliary grids, characterized in that: The method of forming a plurality of auxiliary grids includes: Providing a semiconductor substrate having a first surface; The plurality of first grid lines are formed on the first surface, and the plurality of first grid lines intersect each other to form a plurality of regular polygons, each of the regular polygons has an incenter, and the vertices of each of the regular polygons are first connection points of at least two of the first grid lines, and any two of the first grid lines in the regular polygons having the same first connection point have a first angle, and the first angle is greater than 0° and less than 180°; The plurality of second gate lines are formed on a side of the first gate line away from the first surface, any two of the second gate lines have a second connection point, the projection of each of the second connection points in the regular polygon overlaps with the heart, the first gate line and the second gate line are electrically insulated, wherein the plurality of first gate lines are arranged on one side of the plurality of second gate lines, and when the first gate line is a positive gate line, the second gate line is a negative gate line, and when the first gate line is a negative gate line, the second gate line is a positive gate line.

9. A solar cell, characterized in that: include: A semiconductor substrate, the semiconductor substrate comprising a stacked substrate and a doping layer, wherein the doping type of the doping layer and the substrate are opposite to each other to form a PN junction; The electrode structure according to any one of claims 1 to 7, wherein the electrode structure is located on a side of the doped layer away from the substrate, and a first gate line in the electrode structure is arranged in contact with the substrate, and a second gate line in the electrode structure is arranged in contact with the doped layer.

10. The solar cell according to claim 9, characterized in that: The substrate comprises a first silicon wafer and a second silicon wafer which are arranged adjacent to each other, and the doping types of the first silicon wafer and the second silicon wafer are opposite; The doping layer includes a first doping layer and a second doping layer, the first doping layer is arranged in contact with the first silicon wafer, the second doping layer is arranged in contact with the second silicon wafer, and the first doping layer and the first silicon wafer have opposite doping types, and the second doping layer and the second silicon wafer have opposite doping types; The electrode structure includes a first part and a second part, the first part includes a plurality of the first gate lines and a plurality of the second gate lines, and the second part includes a plurality of the first gate lines and a plurality of the second gate lines, wherein, when the first gate line of the first part is the positive gate line, the first gate line of the second part is the negative gate line, and when the first gate line of the first part is the negative gate line, the first gate line of the second part is the positive gate line.

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