Semiconductor structure with reduced defect density and method of fabrication

Abstract

The application discloses a semiconductor structure with reduced defect density and a manufacturing method thereof, which comprises the following steps: growing a BNO buffer layer on a substrate; growing a B x Al (1－x) NO first transition layer and a Ga x Al (1－x) N second transition layer on the BNO buffer layer; when growing the first transition layer, the value of x is gradually reduced from 1 to 0, and the growth temperature is gradually increased from a first temperature to a second temperature; when growing the second transition layer, the value of x is gradually increased from 0 to 1, and the growth temperature is gradually reduced from the second temperature to a third temperature, the second temperature is greater than the first temperature and the third temperature; and growing an epitaxial layer on the second transition layer to form the semiconductor structure. The BNO buffer layer, the B x Al (1－x) NO first transition layer and the second transition layer are arranged between the substrate and the epitaxial layer, the concentration of Al in the B x Al (1－x) NO first transition layer and the Ga x Al (1－x) N second transition layer is first gradually increased and then gradually reduced to change linearly, so that the defect density is effectively reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor, and particularly to the structure and fabrication of light emitting diode. BACKGROUND

[0002] GaN materials are widely used in LED light emitting diodes, power electronic devices and other fields, which are important application directions in the field of nitride semiconductor research. With the development of science and technology and the demand of life, the pursuit of display effect in the display field is constantly rising, from LCD TV, LED backlight TV to Mini LED backlight TV, and then to Mini / Mcro LED direct display TV, which can be seen that the market is pursuing true full-color display. In order to promote the goal of Mcro LED ultimate display, in recent years, Mcro LED direct display has become the key layout direction of head enterprises of nitride semiconductor, and China, South Korea, Japan, the United States, Germany and other countries also give great support to Mcro LED display in system, fund, technology and other aspects.

[0003] The Mcro LED light emitting diode blue-green epitaxial structure includes a substrate, and a buffer layer, an undoped GaN layer, a Si-doped nGaN layer, an active layer InGaN, an electron blocking layer EBL and a Mg-doped pGaN layer successively grown on the substrate. Among them, the substrate is a sapphire substrate, a Si substrate or a SiC substrate.

[0004] In the growth of GaN epitaxial layer on sapphire substrate, although there is a buffer layer, the buffer layer is mostly AlGaN material, which can relieve the stress between the epitaxial layer and the substrate to a certain extent, but the lattice mismatch and thermal mismatch between the sapphire substrate and the GaN layer are large, and the lattice matching degree is as high as 13% or more. The lattice constant of sapphire substrate Al2O3 is a=0.4758nm (the lattice used for LED epitaxy), and the lattice constant of GaN is C=0.5185nm (the lattice used for LED epitaxy). Therefore, the GaN material grown on the sapphire substrate is subjected to a large compressive stress from the sapphire substrate, and the stress cannot be completely buffered by only one buffer layer; in addition, the Al atom pre-reaction is serious, and the diffusion barrier of Al atoms in the same position is high, so that the AlGaN layer generates a relatively large number of nucleation points during epitaxial growth. Each nucleation point is the core of the island and merges with each other, which causes a large number of defects in the material during the merging process. At the same time, the thickness of the AlGaN layer grown to buffer the stress will be thicker, and the sapphire substrate will exert a strong tensile stress on the thick AlGaN layer, which will cause the AlGaN layer to crack and generate a large number of crack defects. In summary, the GaN material is easily subjected to a large stress during epitaxial growth on the sapphire substrate, which can easily generate a large number of threading dislocations, and further cause a large defect density in the material. After the chip process is made into a Micro LED blue-green chip, low quantum efficiency, serious leakage, poor ESD resistance and other adverse photoelectric properties occur.

[0005] Therefore, there is an urgent need for a semiconductor structure and a manufacturing method for reducing defect density to solve the above problems. SUMMARY

[0006] The purpose of the present application is to provide a semiconductor structure and a manufacturing method for reducing defect density, which sets a BNO buffer layer, a B x Al (1－x) NO first transition layer and Ga x Al (1－x) N second transition layer between the substrate and the epitaxial layer, and the Al concentration of the first transition layer and the second transition layer gradually increases and then gradually decreases to linearly change, which effectively reduces the defect density.

[0007] In order to achieve the above purpose, the present application provides a manufacturing method of a semiconductor structure for reducing defect density, comprising: providing a substrate; growing a BNO buffer layer on the substrate; growing a B x Al (1－x) NO first transition layer and Ga x Al (1－x)The second transition layer is grown by gradually reducing the flow rate of the reaction material of B from a preset M concentration to 0 and gradually increasing the flow rate of the reaction material of Al from 0 to M, so that the x value gradually decreases from 1 to 0, and the concentration of B gradually decreases and the concentration of Al gradually increases from bottom to top in the first transition layer, and the first transition layer gradually transitions from a BNO material to a BAlNO material and then to an AlN material; the second transition layer is grown by gradually reducing the flow rate of the reaction material of Al from a preset M concentration to 0 and gradually increasing the flow rate of the reaction material of Ga from 0 to M, so that the x value gradually increases from 0 to 1, and the concentration of Al gradually decreases and the concentration of Ga gradually increases from bottom to top in the second transition layer, and the second transition layer gradually transitions from an AlN material to a GaAlN material and then to a GaN material; and an epitaxial layer is grown on the second transition layer to form a semiconductor structure.

[0008] Preferably, the growth temperature gradually increases from a first temperature to a second temperature during the growth of the first transition layer; and the growth temperature gradually decreases from the second temperature to a third temperature during the growth of the second transition layer, the second temperature being greater than the first temperature and the third temperature. The change of the growth temperature of different transition layers can improve the migration ability of Al atoms. The migration energy of Al atoms is high and the migration rate is low, and the diffusion length of Al atoms on the surface is smaller than that of Ga atoms. During epitaxial growth, the lateral diffusion ability of Al atoms is weak, and they tend to occupy the positions initially adsorbed by the substrate and will not move to the lattice points with the lowest energy. The linear change of the growth temperature according to the concentration of Al can improve the migration rate of Al atoms, increase the diffusion length of Al atoms on the surface, and reduce the island nucleation density formed by the parasitic reaction of Al atoms, thereby further reducing the linear defect density.

[0009] More preferably, the first temperature is equal to the third temperature. Of course, the first temperature can also be different from the third temperature, and the first temperature is preferably selected to adapt to the BNO buffer layer, and the third temperature is preferably selected to adapt to the epitaxial layer.

[0010] Specifically, the first temperature is 1000 degrees Celsius, the second temperature is 1200 degrees Celsius, and the third temperature is 1000 degrees Celsius.

[0011] Preferably, during the growth of the first transition layer, the carrier gas is nitrogen and no hydrogen is passed, and the reaction gas is NH3, and the amount of NH3 is 2 / 5 to 1 / 2 of the amount of nitrogen.

[0012] Preferably, during the growth of the second transition layer, the carrier gas is nitrogen and no hydrogen is passed, and the reaction gas is NH3, and the amount of NH3 is 1 / 2 to 3 / 5 of the amount of nitrogen.

[0013] Preferably, the BNO buffer layer is deposited on the substrate by PVD sputtering.

[0014] Specifically, the BNO buffer layer is grown at a coating temperature of 700-750°C and an oxygen flow rate of 2-3sccm.

[0015] Preferably, the total thickness of the BNO buffer layer is 30-50nm.

[0016] Preferably, the epitaxial layer comprises, from bottom to top, an undoped GaN layer, an n-type semiconductor layer, an active layer, an electron blocking layer, a p-type semiconductor layer, and a p-type contact layer, which are sequentially grown on the second transition layer.

[0017] The application also provides a semiconductor structure with reduced defect density, which is made by the method for making a semiconductor structure with reduced defect density.

[0018] The application also provides a semiconductor structure with reduced defect density, which comprises a substrate, a BNO buffer layer, a first transition layer, and a second transition layer, which are sequentially grown on the substrate. x Al (1－x) NO and gradually decreases from 1 to 0, so that the concentration of B gradually decreases and the concentration of Al gradually increases from bottom to top of the first transition layer, and the first transition layer gradually transitions from BNO material to BAlNO material and then to AlNO material. x Al (1－x) N and gradually increases from 0 to 1, so that the concentration of Al gradually decreases and the concentration of Ga gradually increases from bottom to top of the second transition layer, and the second transition layer gradually transitions from AlN material to GaAlN material and then to GaN material.

[0019] Compared with the prior art, the application sets the BNO buffer layer, the first transition layer of B x Al (1－x) NO, and the second transition layer of Ga x Al (1－x) N between the substrate and the epitaxial layer, so that the concentration of B gradually decreases and the concentration of Al gradually increases from bottom to top of the first transition layer, and the first transition layer gradually transitions from BNO material to BAlNO material and then to AlNO material, which can effectively adjust stress, reduce and interrupt dislocations along the growth direction by lattice adjustment of the BNO buffer layer, the first transition layer, and the second transition layer, reduce defect density in the material growth process, reduce leakage, and improve the quantum efficiency of the light-emitting diode. x Al (1－x) NO as the transition layer, which makes the adaptation between the first transition layer and the BNO buffer layer better and further reduces dislocations along the growth direction and defect density. Attached Figure Description

[0020] Figure 1 This is a flowchart of the method for fabricating a semiconductor structure to reduce defect density according to the present invention.

[0021] Figure 2 This is a structural diagram of the semiconductor structure for reducing defect density according to the present invention.

[0022] Figure 3 It is a flowchart of the fabrication process of epitaxial layers on a semiconductor structure.

[0023] Figure 4 This is another structural diagram of the low defect density semiconductor structure of the present invention. Detailed Implementation

[0024] To illustrate the technical content, structural features, objectives, and effects of the present invention in detail, the following description is provided in conjunction with the embodiments and accompanying drawings.

[0025] refer to Figure 1 The present invention discloses a method for fabricating a semiconductor structure with reduced defect density, comprising steps S1 to S4.

[0026] S1 provides a substrate 10.

[0027] The substrate 10 is a sapphire substrate, but other types of substrates 10 can also be used.

[0028] S2, a BNO buffer layer 20 is grown on the substrate 10.

[0029] The BNO buffer layer 20 is deposited on the substrate 10 by PVD sputtering. Specifically, during the growth of the BNO buffer layer 20, the deposition temperature is controlled between 700°C and 750°C, and the oxygen gas flow rate is controlled between 2 sccm and 3 sccm. The total thickness of the BNO buffer layer 20 is 30 nm to 50 nm.

[0030] S3, B is sequentially grown on the BNO buffer layer 20. x Al (1－x) NO's first transition layer 31 and Ga x Al (1－x) The second transition layer 32 of N.

[0031] In the growth of the first transition layer 31, the flow rate of the B reaction material gradually decreases from a preset M concentration to 0, the flow rate of the Al reaction material gradually increases from 0 to M, and the growth temperature gradually increases from a first temperature to a second temperature, that is, the concentration of B gradually decreases, the concentration of Al gradually increases, and the first transition layer 31 gradually transitions from a BNO material to a BAlNO material and then to an AlNO material; in the growth of the second transition layer 32, the flow rate of the Al reaction material gradually decreases from a preset M concentration to 0, the flow rate of the Ga reaction material gradually increases from 0 to M, and the growth temperature gradually decreases from the second temperature to a third temperature, that is, the concentration of Al gradually decreases, and the concentration of Ga gradually increases, and the second transition layer 32 gradually transitions from an AlN material to a GaAlN material and then to a GAN material, and the second temperature is greater than the first temperature and the third temperature. M is a preset flow rate.

[0032] In the growth of the first transition layer 31, the growth temperature gradually linearly increases, the flow rate of the B reaction material gradually linearly decreases, and the flow rate of the Al reaction material gradually linearly increases. In the growth of the second transition layer 32, the growth temperature gradually linearly decreases, the flow rate of the Al reaction material gradually linearly decreases, and the flow rate of the Ga reaction material gradually linearly increases.

[0033] In this embodiment, the input reaction materials for growing the first transition layer 31 are trimethylboron, trimethylaluminum, NH3, and oxygen, and the flow rates of the trimethylboron and the trimethylaluminum are gradually adjusted to change the concentrations thereof. In the growth of the second transition layer 32, the flow rates of the Al-containing reaction material and the Ga-containing reaction material are also adjusted to change the concentrations thereof.

[0034] In this embodiment, the first temperature is 1000 degrees Celsius, the second temperature is 1200 degrees Celsius, and the third temperature is 1000 degrees Celsius.

[0035] In the growth of the first transition layer 31 and the second transition layer 32, the growth temperature of different transition layers changes, which can improve the migration ability of Al atoms. Al atoms have a high migration energy and a low migration rate, and the diffusion length of Al atoms on the surface is smaller than that of Ga atoms. In the epitaxial growth process, Al atoms have weak lateral diffusion ability and tend to occupy the positions initially adsorbed by the substrate and will no longer move to the lattice points with the lowest energy. The linear change of the growth temperature according to the concentration of Al can improve the migration rate of Al atoms, increase the diffusion length of Al atoms on the surface, and reduce the island-shaped nucleation density formed by the parasitic reaction of Al atoms, thereby reducing linear defects.

[0036] Specifically, during the growth of the first transition layer 31, the carrier gas is nitrogen and no hydrogen is passed, the reaction gas is NH3, and the amount of NH3 is 2 / 5 to 1 / 2 of the nitrogen.

[0037] S4, growing an epitaxial layer 40 on the second transition layer 32 to form a semiconductor structure.

[0038] Reference Figure 3 , step S4 specifically includes: S41, growing an undoped GaN layer 41 on the transition layer 30; S42: growing an n-type semiconductor layer 42 (n-GaN) on the undoped GaN layer 41; S43, growing an active layer 43 (InGaN, MQW layer) on the n-type semiconductor layer 42; S44, growing an electron blocking layer 44 (EBL) on the active layer 43; S45, growing a p-type semiconductor layer 45 (p-GaN) on the electron blocking layer 44; S46, growing a p-type contact layer 46 (GaN contact layer) on the p-type semiconductor layer 45. Wherein, the undoped GaN layer 41 is an undoped u-GaN layer. Wherein, the specific production process and structure of the GaN epitaxial layer 40 are not limited to this.

[0039] In this embodiment, the epitaxial layer 40 includes, from bottom to top, an undoped U-GaN layer 41, an n-type semiconductor layer 42 (n-GaN), an active layer 43 (InGaN MQW layer), an electron blocking layer 44 (EBL), a p-type semiconductor layer 45 (P-GaN layer), and a P-type contact layer (GaN contact layer) grown on the second transition layer 32 in sequence.

[0040] Reference Figure 2 The application also discloses a semiconductor structure with reduced defect density 100, which is made by the above-mentioned method for manufacturing a semiconductor structure with reduced defect density.

[0041] Reference Figure 2 The semiconductor structure with reduced defect density includes a substrate 10, a BNO buffer layer 20 grown on the substrate 10, a first transition layer 31 grown on the BNO buffer layer 20, a second transition layer 32 grown on the first transition layer 31, and an epitaxial layer 40 grown on the second transition layer 32.

[0042] Reference Figure 4, the epitaxial layer 40 comprises, from bottom to top, an undoped U-GaN layer 41, an n-type semiconductor layer 42 (n-GaN), an active layer 43 (MQW layer of InGaN), an electron blocking layer 44 (EBL), a p-type semiconductor layer 45 (P-GaN layer), and a p-type contact layer (GaN contact layer) grown in sequence on the second transition layer 32.

[0043] Compared with the prior art, the application sets the BNO buffer layer 20, the first transition layer 31 and the second transition layer 32 between the substrate 10 and the epitaxial layer 40. x Al (1－x) The first transition layer 31 of BNO and the second transition layer 32 of Ga x Al (1－x) N, the x of B x Al (1－x) NO gradually increases from 0 to 1 to form the first transition layer 31, and then the x of Ga x Al (1－x) N gradually decreases from 1 to 0 to form the second transition layer 32, which can effectively adjust the stress, reduce and interrupt dislocations along the growth direction by using the lattice adjustment of the BNO buffer layer 20, the first transition layer 31 and the second transition layer 32, reduce the defect density in the material growth process, reduce the leakage current, and improve the quantum efficiency of the light-emitting diode. Furthermore, the B x Al (1－x) NO first transition layer 31 and the second transition layer 32 of Ga x Al (1－x) N, the growth temperature during growth changes linearly according to the concentration of Al, which can improve the migration rate of Al atoms, increase the diffusion length of Al atoms on the surface, reduce the island-shaped nucleation density formed by the parasitic reaction of Al atoms, and further reduce the linear defect density.

[0044] The above only discloses the preferred embodiments of the application, and of course cannot limit the scope of the application, so the equivalent changes made in the patent application scope of the application still fall within the scope of the application.

Claims

1. A method for fabricating a semiconductor structure with reduced defect density, characterized in that: include: Provide substrate; A BNO buffer layer is grown on the substrate; B is grown sequentially on the BNO buffer layer x Al (1-x) The first transition layer of NO and Ga x Al (1-x) The second transition layer of N; during the growth of the first transition layer, the flow rate of the B reactant gradually decreases from the preset concentration M to 0, and the flow rate of the Al reactant gradually increases from 0 to M, so that the x value gradually decreases from 1 to 0. The concentration of B gradually decreases from bottom to top in the first transition layer, and the concentration of Al gradually increases. The first transition layer gradually transitions from BNO material to BAlNO material and then gradually transitions to AlNO material. During the growth of the second transition layer, the flow rate of the Al reactant gradually decreases from the preset concentration M to 0, and the flow rate of the Ga reactant gradually increases from 0 to M, so that the x value gradually increases from 0 to 1. The concentration of Al gradually decreases from bottom to top in the second transition layer, and the concentration of Ga gradually increases. The second transition layer gradually transitions from AlN material to GaAlN material and then gradually transitions to GaN material. An epitaxial layer is grown on the second transition layer to form a semiconductor structure; wherein... When growing the first transition layer, the growth temperature gradually increases from the first temperature to the second temperature; when growing the second transition layer, the growth temperature gradually decreases from the second temperature to the third temperature, with the second temperature being higher than both the first and third temperatures.

2. The method for fabricating a semiconductor structure with reduced defect density as described in claim 1, characterized in that: The first temperature is equal to the third temperature.

3. The method for fabricating a semiconductor structure with reduced defect density as described in claim 2, characterized in that: The first temperature is 1000 degrees Celsius, the second temperature is 1200 degrees Celsius, and the third temperature is 1000 degrees Celsius.

4. The method for fabricating a semiconductor structure with reduced defect density as described in claim 1, characterized in that: During the growth of the first transition layer, the carrier gas is nitrogen and no hydrogen is introduced. The reactant gas is NH3, and the amount of NH3 used is 2 / 5 to 1 / 2 of that of nitrogen. During the growth of the second transition layer, the carrier gas is nitrogen and no hydrogen is introduced. The reactant gas is NH3, and the amount of NH3 used is 1 / 2 to 3 / 5 of that of nitrogen.

5. The method for fabricating a semiconductor structure with reduced defect density as described in claim 1, characterized in that: The BNO buffer layer is deposited on the substrate by PVD sputtering; during the growth of the BNO buffer layer, the deposition temperature is controlled between 700°C and 750°C, and the oxygen gas flow rate is controlled between 2 sccm and 3 sccm.

6. The method for fabricating a semiconductor structure with reduced defect density as described in claim 1, characterized in that: The total thickness of the BNO buffer layer is 30nm-50nm.

7. The method for fabricating a semiconductor structure with reduced defect density as described in claim 1, characterized in that: The epitaxial layer, from bottom to top, includes an undoped GaN layer, an n-type semiconductor layer, an active layer, an electron blocking layer, a p-type semiconductor layer, and a p-type contact layer, which are sequentially grown on the second transition layer.

8. A semiconductor structure for reducing defect density, characterized in that: It is manufactured by the method of manufacturing a semiconductor structure with reduced defect density according to any one of claims 1-7.

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