A positive feedback based TSV post-bonding detection circuit

Abstract

The application discloses a kind of TSV bonding post-detection circuits based on positive feedback, comprising: transmission gate switch array, cross-coupled pair tube, reset module, test capacitor, eliminate parasitic module, resistance array, receiving buffer.The application utilizes the positive feedback characteristics of cross-coupled pair tube, accelerates comparison process and improves detection sensitivity, the time required for detection process is greatly reduced, and the detection circuit structure is simple;Utilize resistance array to compare the cavity resistance R TSV And leakage resistance R leakage Of the TSV to be tested, realize effective detection of cavity fault and leakage fault;Through the switching of transmission gate switch array, the cross-coupled pair tube can be equivalent to a current source, and the test capacitor and receiving buffer are used to realize effective detection of bridging fault and open-circuit fault.

Description

Technical Field

[0001] The present invention belongs to the technical field of chip detection, and in particular relates to a TSV post-bonding detection circuit based on positive feedback. Background Art

[0002] In recent years, due to physical limitations, it has been difficult for traditional two-dimensional integrated circuits based on planar technology to improve chip performance through scaling technology, and Moore's Law is gradually becoming ineffective. Three-dimensional integrated circuits are considered a very promising technology route. This technology integrates more circuits in the same area by vertically connecting multiple chips, increasing chip density, improving signal transmission speed, and reducing power consumption. However, the through-silicon vias (TSVs) connecting each chip are prone to defects. Even though three-dimensional integrated circuit manufacturing technology has made great progress, the detection of TSV defects remains a major challenge facing the semiconductor industry. TSV detection can be divided into two categories: pre-bonding detection and post-bonding detection.

[0003] Through Silicon Via (TSV) technology is a key enabler for 3D integrated circuits. By vertically connecting multiple chips, this technology enables the integration of more circuits within the same area, increasing chip density, improving signal transmission speed, and reducing power consumption. However, the TSV process is currently immature and prone to various defects during manufacturing. TSV testing can be divided into pre-bonding and post-bonding testing. Whether or not pre-bonding TSV testing is performed, post-bonding TSV testing is essential.

[0004] The problems of existing post-bonding TSV detection mainly focus on the limited types of fault detection, long detection time, and complex detection circuit structure. Summary of the Invention

[0005] In order to solve the above problems existing in the prior art, the present invention provides a TSV post-bonding detection circuit based on positive feedback. The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0006] The present invention provides a TSV post-bonding detection circuit based on positive feedback, comprising:

[0007] Transmission gate switch array, cross-coupled pair tube, reset module, test capacitor, parasitic elimination module, resistor array, receiving buffer; among them,

[0008] The transmission gate switch array is used to control the switching of the transmission gate switches within the array so that the TSV post-bonding detection circuit is sequentially in the bridge fault detection stage, the open fault detection stage, the void fault detection stage, or the leakage fault detection stage, thereby performing fault detection on the TSV to be tested and determining whether the TSV to be tested has a fault;

[0009] The cross-coupling pair of transistors is used to adjust the void resistance R of the TSV to be tested in the void fault detection stage or the leakage fault detection stage. TSV Or leakage resistance R leakage and comparing with each resistor in the resistor array to obtain the corresponding void fault degree or leakage fault degree; wherein the cross-coupled transistor utilizes its own positive feedback characteristics to accelerate the comparison process; in the open circuit fault detection stage or the bridge fault detection stage, it acts as a current source to charge the test capacitor;

[0010] The reset module is used to reset the voltage of the preset node of the TSV to be tested and the voltage of the preset node of the resistor array in the bridge fault detection stage, the open circuit fault detection stage, the void fault detection stage or the leakage fault detection stage;

[0011] The parasitic elimination module is used to eliminate the influence of parasitic capacitance at the nodes of the TSV to be tested and the nodes of the resistor array;

[0012] The receiving buffer is used to monitor the voltage on the test capacitor in the open circuit fault detection stage or the bridge fault detection stage to detect the open circuit fault and the bridge fault.

[0013] In one embodiment of the present invention, a cross-coupled pair of tubes comprises:

[0014] MOS tube MP1 and MOS tube MP2; wherein,

[0015] The source of the MOS transistor MP1 is connected to the power supply voltage VDD, the gate is connected to the drain of the MOS transistor MP2, and the drain is connected to the preset node of the TSV to be tested;

[0016] The source of the MOS transistor MP2 is connected to the source of the MOS transistor MP1 , the gate is connected to the drain of the MOS transistor MP1 , and the drain is connected to a preset node of the resistor array.

[0017] In one embodiment of the present invention, a transmission gate switch array includes:

[0018] transmission gate switch SWx, transmission gate switch SWy, transmission gate switch SWz, a first combination array and a second combination array; wherein,

[0019] The first end of the transmission gate switch SWx is connected to the second end of the first combination array, and the second end is grounded;

[0020] The first end of the transmission gate switch SWy is connected to the first end of the transmission gate switch SWx, and the second end is connected to the input end of the receiving buffer;

[0021] The first end of the transmission gate switch SWz is connected to the external control signal CTRL, and the second end is connected to the first control end of the reset module;

[0022] The first combination array includes: n transmission gate switches SW1_1-SWn_1 and n transmission gate switches SW1_2-SWn_2; wherein,

[0023] For n transmission gate switches SW1_1-SWn_1, the first ends of the transmission gate switches are connected to each other, as the first end of the first combination array is connected to the preset node of the TSV to be tested, and the second ends are connected to the first end of the corresponding TSV to be tested;

[0024] For n transmission gate switches SW1_2-SWn_2, the first end of each transmission gate switch is connected to the second end of the corresponding TSV to be tested, and the second ends are connected to each other to serve as the second end of the first combination array;

[0025] The second combination array includes m transmission gate switches SW1-SWm; wherein,

[0026] For m transmission gate switches SW1-SWm, a first end of each transmission gate switch is connected to a preset node of the resistor array, and a second end is connected to a corresponding resistor in the resistor array;

[0027] Both m and n are positive integers.

[0028] In one embodiment of the present invention, a transmission gate switch array controls the switching of transmission gate switches within the array to sequentially place a TSV post-bonding detection circuit in a bridge fault detection phase, an open fault detection phase, a void fault detection phase, or a leakage fault detection phase, including:

[0029] The transmission gate switch array controls the transmission gate switches SWi_1, SW1_2-SWi-1_2, SWi+1_2-SWn_2 and SWy to be turned on, so that the TSV post-bonding detection circuit is in the bridge fault detection stage;

[0030] The transmission gate switch array controls the transmission gate switches SWi_1, SWi_2 and SWy to be turned on, thereby connecting the i-th TSV to be tested, so that the TSV post-bonding detection circuit is in the open circuit fault detection stage;

[0031] The transmission gate switch array controls transmission gate switches SWi_1, SWi_2 and SWx to be turned on, connects the i-th TSV to be tested, turns on transmission gate switches SW1-SWj in sequence, connects resistors R1-Rj in the resistor array, and puts the TSV post-bonding detection circuit into the void fault detection stage;

[0032] The transmission gate switch array controls the transmission gate switch SWi_1 to be turned on, connects the i-th TSV to be tested, turns on the transmission gate switches SW1-SWk in sequence, and connects the resistors R1-Rk in the resistor array, so that the detection circuit is in the leakage fault detection stage after TSV bonding; i∈[1,n], j∈[1,m], k∈[1,m], Rj represents the resistor in the resistors R1-Rm that meets the void fault detection condition, and Rk represents the resistor in the resistors R1-Rm that meets the leakage fault detection condition.

[0033] In one embodiment of the present invention, the reset module includes:

[0034] MOS transistor MN1 and MOS transistor MN2; wherein,

[0035] The source of the MOS transistor MN1 is grounded, the gate is connected to the second end of the transmission gate switch SWz as the first control terminal of the reset module, and the drain is connected to the preset node of the TSV to be tested;

[0036] The source of the MOS transistor MN2 is grounded, the gate is connected to the first end of the transmission gate switch SWz as the second control terminal of the reset module, and the drain is connected to a preset node of the resistor array.

[0037] In one embodiment of the present invention, the test capacitor includes a capacitor C2; a first end of the capacitor C2 is connected to the input end of the receiving buffer, and a second end of the capacitor C2 is grounded.

[0038] In one embodiment of the present invention, the parasitic elimination module includes: capacitor C1 and capacitor C3; wherein,

[0039] A first end of the capacitor C1 is connected to a preset node of the TSV to be tested, and a second end thereof is grounded;

[0040] A first end of the capacitor C3 is connected to a preset node of the resistor array, and a second end thereof is grounded;

[0041] The capacitance values ​​of the capacitor C1 and the capacitor C3 are equal.

[0042] In one embodiment of the present invention, the resistor array includes: m resistors R1-Rm; wherein the first end of each resistor is connected to the second end of the corresponding transmission gate switch SW1-SWm, and the second end of each resistor is grounded;

[0043] The resistance values ​​of the m resistors R1 -Rm are set according to a preset resistance step size.

[0044] In one embodiment of the present invention, the equivalent electrical model of the TSV to be tested includes:

[0045] Fault-free TSV equivalent electrical model, void fault TSV equivalent electrical model, open fault TSV equivalent electrical model, leakage fault TSV equivalent electrical model, bridge fault TSV equivalent electrical model; Among them,

[0046] The fault-free TSV equivalent electrical model includes a capacitor C connected to ground. TSV ;

[0047] The TSV equivalent electrical model of the void fault includes: a grounded capacitor C F , grounded capacitor C B and the void equivalent resistance R TSV Capacitor C F and capacitor C B They are connected at the normalized position x, and there is a void fault at the normalized position x, x∈[0,1], where x=0 means the void fault occurs at the top of the TSV, x=0.5 means the void fault occurs at the midpoint of the TSV, and x=1 means the void fault occurs at the bottom of the TSV. The capacitance C F The capacitance value is the capacitance C TSV x times the capacitance value, capacitance C B The capacitance value is the capacitance C TSV The capacitance value is (1-x) times, and the void equivalent resistance R TSV Located at normalized position x;

[0048] The open circuit fault TSV equivalent electrical model includes: a grounded capacitor C F1 and the grounded capacitor C B1 Capacitor C F1 and capacitor C B1 They are connected at the normalized position y, and there is an open circuit fault at the normalized position y, y∈[0,1], where y=0 means the open circuit fault occurs at the top of the TSV, y=0.5 means the open circuit fault occurs at the midpoint of the TSV, and y=1 means the open circuit fault occurs at the bottom of the TSV. The capacitance C F1 The capacitance value is y times the capacitance value of capacitor CTSV, and the capacitance C B1 The capacitance value is the capacitance C TSV (1-y) times of the capacitance value; when an open circuit fault occurs, the capacitor C F1 is the load capacitance, capacitance C B1 Not working;

[0049] The leakage fault TSV equivalent electrical model includes: a grounded resistance R leakage and the grounded capacitor C TSV1 The resistor R leakage and capacitor C TSV1 Parallel connection;

[0050] The equivalent electrical model of the TSV with bridge fault includes: the bridge resistance R between adjacent TSVs BRI and the ground capacitance C of each adjacent TSV TSV2 , C TSV3 ;

[0051] Among them, the capacitor C TSV1 、C TSV2 and C TSV3 The capacitance values ​​are the same as the capacitance C in the equivalent electrical model of the fault-free TSV. TSV The capacitance values ​​are equal.

[0052] In one embodiment of the present invention, the TSV post-bonding detection circuit performs fault detection on the TSV to be tested in the bridge fault detection stage, the open fault detection stage, the void fault detection stage, or the leakage fault detection stage to determine whether the TSV to be tested has a fault, including:

[0053] In the bridge fault detection phase, when the output signal of the receiving buffer is at a high level, a bridge fault exists in the TSV to be tested;

[0054] In the open circuit fault detection stage, when the output signal of the receiving buffer is at a low level, the TSV to be tested has an open circuit fault;

[0055] In the void fault detection phase, the void resistance R TSV Compare with each resistor in the resistor array to obtain the void resistance R TSV Resistance range, if the cavity resistance R TSV If the resistance value range is greater than the preset void reference value, the TSV to be tested has a void fault;

[0056] In the leakage fault detection phase, the leakage resistance R leakage Compare with each resistor in the resistor array to obtain the leakage resistance R leakage Resistance range, if the leakage resistance R leakage If the resistance value range of the TSV to be tested is smaller than the preset leakage reference value, then there is a leakage fault in the TSV to be tested.

[0057] Beneficial effects of the present invention:

[0058] In the solution provided by the present invention, the positive feedback characteristics of the cross-coupling pair are utilized to accelerate the comparison process and improve the detection sensitivity. The time required for the detection process is greatly reduced, and the detection circuit structure is simple. The resistor array is used to measure the void resistance R of the TSV to be tested. TSV and leakage resistor R leakageBy comparing the two, effective detection of void faults and leakage faults can be achieved. By switching the transmission gate switch array, the cross-coupled transistors can be equivalent to current sources, and the test capacitors and receiving buffers can be used to effectively detect bridge faults and open circuit faults. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] Figure 1 A schematic structural diagram of a TSV post-bonding detection circuit based on positive feedback provided by an embodiment of the present invention;

[0060] Figure 2 A schematic structural diagram of an equivalent electrical model of a TSV provided by an embodiment of the present invention;

[0061] Figure 3 A schematic diagram of a path of a TSV post-bonding detection circuit based on positive feedback in a bridge fault detection phase provided by an embodiment of the present invention;

[0062] Figure 4 A schematic diagram of a path of a TSV post-bonding detection circuit based on positive feedback in an open circuit fault detection stage provided by an embodiment of the present invention;

[0063] Figure 5 A schematic diagram of a path of a TSV post-bonding detection circuit based on positive feedback in a void fault detection stage provided by an embodiment of the present invention;

[0064] Figure 6 A schematic diagram of a path of a TSV post-bonding detection circuit based on positive feedback in a leakage fault detection stage provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0065] The present invention will be further described in detail below with reference to specific examples, but the embodiments of the present invention are not limited thereto.

[0066] In order to effectively detect bridge faults, open circuit faults, void faults and leakage faults, the embodiment of the present invention provides a TSV (Through Silicon Via) post-bonding detection circuit based on positive feedback, such as Figure 1 As shown, this may include:

[0067] Transmission gate switch array, cross-coupled pair tube, reset module, test capacitor, parasitic elimination module, resistor array, receiving buffer; among them,

[0068] The transmission gate switch array is used to control the switching of the transmission gate switches within itself so that the TSV post-bonding detection circuit is sequentially in the bridge fault detection stage, the open fault detection stage, the void fault detection stage, or the leakage fault detection stage, thereby performing fault detection on the TSV to be tested and determining whether the TSV to be tested has a fault.

[0069] The cross-coupled transistors are used to detect the void resistance R of the TSV to be tested during the void fault detection phase or the leakage fault detection phase. TSV Or leakage resistance R leakage The test capacitor is compared with each resistor in the resistor array to obtain the corresponding void fault degree or leakage fault degree. The cross-coupled transistors use their own positive feedback characteristics to accelerate the comparison process. In the open circuit fault detection stage or bridge fault detection stage, they act as a current source to charge the test capacitor.

[0070] The reset module is used to reset the voltage of the preset node of the TSV to be tested and the voltage of the preset node of the resistor array in the bridge fault detection stage, the open circuit fault detection stage, the void fault detection stage or the leakage fault detection stage;

[0071] The parasitic elimination module is used to eliminate the influence of parasitic capacitance at the nodes of the TSV to be tested and the nodes of the resistor array;

[0072] The receiving buffer is used to monitor the voltage on the test capacitor in the open circuit fault detection stage or the bridge fault detection stage to detect the open circuit fault and the bridge fault.

[0073] The embodiment of the present invention utilizes the positive feedback characteristics of the cross-coupling pair to accelerate the comparison process and improve the detection sensitivity. The time required for the detection process is greatly reduced, and the detection circuit structure is simple. The resistor array is used to measure the void resistance R of the TSV to be tested. TSV and leakage resistor R leakage By comparing the two, effective detection of void faults and leakage faults can be achieved. By switching the transmission gate switch array, the cross-coupled transistors can be equivalent to current sources, and the test capacitors and receiving buffers can be used to effectively detect bridge faults and open circuit faults.

[0074] Specifically, the equivalent electrical model of the TSV to be tested may include:

[0075] Fault-free TSV equivalent electrical model, void fault TSV equivalent electrical model, open fault TSV equivalent electrical model, leakage fault TSV equivalent electrical model, bridge fault TSV equivalent electrical model; such as Figure 2 As shown in (a) to (e),

[0076] For the equivalent electrical model of a fault-free TSV, see Figure 2(a) in the figure can include a grounded capacitor C TSV ;

[0077] For the equivalent electrical model of TSV void failure, see Figure 2 (b) in the figure may include: a grounded capacitor C F , grounded capacitor C B and the void equivalent resistance R TSV Capacitor C F and capacitor C B They are connected at the normalized position x, and there is a void fault at the normalized position x, x∈[0,1], where x=0 means the void fault occurs at the top of the TSV, x=0.5 means the void fault occurs at the midpoint of the TSV, and x=1 means the void fault occurs at the bottom of the TSV. The capacitance C F The capacitance value is the capacitance C TSV x times the capacitance value, capacitance C B The capacitance value is the capacitance C TSV The capacitance value is (1-x) times, and the void equivalent resistance R TSV Located at normalized position x;

[0078] For the equivalent electrical model of TSV with open circuit fault, see Figure 2 (c) in the figure may include: a grounded capacitor C F1 and the grounded capacitor C B1 Capacitor C F1 and capacitor C B1 They are connected at the normalized position y, and there is an open circuit fault at the normalized position y, y∈[0,1], where y=0 means the open circuit fault occurs at the top of the TSV, y=0.5 means the open circuit fault occurs at the midpoint of the TSV, and y=1 means the open circuit fault occurs at the bottom of the TSV. The capacitance C F1 The capacitance value is y times the capacitance value of capacitor CTSV, and the capacitance C B1 The capacitance value is the capacitance C TSV (1-y) times of the capacitance value; when an open circuit fault occurs, the capacitor C F1 is the load capacitance, capacitance C B1 Not working;

[0079] For the equivalent electrical model of leakage fault TSV, see Figure 2 (d) in the figure may include: grounding resistance R leakage and the grounded capacitor C TSV1 ;Resistor R leakage and capacitor C TSV1 Parallel connection;

[0080] For the equivalent electrical model of TSV bridging fault, see Figure 2(e) in the figure may include: the bridge resistance R between adjacent TSVs BR1 and the ground capacitance C of each adjacent TSV TSV2 , C TSV3 ;

[0081] Among them, the capacitor C TSV1 、C TSV2 and C TSV3 The capacitance values ​​are the same as the capacitance C in the equivalent electrical model of the fault-free TSV. TSV The capacitance values ​​are equal.

[0082] It can be understood that for the fault-free TSV equivalent circuit, since the TSV equivalent resistance is very small, the fault-free TSV is modeled as a single capacitor, see Figure 2 As shown in (a); for the equivalent electrical model of void fault TSV, see Figure 2 As shown in (b), there is a void fault at the normalized position x, and the void fault equivalent resistance R TSV Divide the TVS equivalent capacitance into two parts and divide the top capacitor C F The capacitance value is defined as x times the capacitance C TSV The capacitance value of the bottom capacitor C B The capacitance value is defined as (1-x) times the capacitance C TSV The capacitance value of the TSV is obtained by normalizing the position x, and the location of the void fault can be clearly obtained. Among them, x = 0 means that the void fault occurs at the top of the TSV, x = 0.5 means that the void fault occurs at the midpoint of the TSV, and x = 1 means that the void fault occurs at the bottom of the TSV. For the TSV equivalent electrical model of open circuit fault, when the open fault completely cuts off the TSV path, an open circuit fault occurs. Figure 2 (c) shows an open fault at the normalized position y. This open fault splits the TSV equivalent capacitance into two parts, with the top capacitance C F1 The capacitance value is defined as y times the capacitance C TSV The capacitance value of the bottom capacitor C B1 The capacitance value is defined as (1-y) times the capacitance C TSV By normalizing the position y, the location of the open circuit fault can be clearly obtained, where y = 0 means the open circuit fault occurs at the top of the TSV, y = 0.5 means the open circuit fault occurs at the midpoint of the TSV, and y = 1 means the open circuit fault occurs at the bottom of the TSV. When an open circuit fault occurs, the capacitance C B1 Isolated by an open fault, only capacitor C F1 Can work as a load; Figure 2 (d) shows a leakage fault caused by a pinhole or crack. The characteristic of the leakage fault is that there is a leakage path between the TSV and the substrate. The leakage resistance can be expressed by the resistor Rleakage It means that the size of the leakage resistance depends only on the entire leakage area and has nothing to do with the location of the leakage fault. The larger the leakage area, the more serious the leakage fault and the smaller the leakage resistance. Figure 2 (e) shows a fault caused by incorrect connection between adjacent TSVs. The bridge resistance can be represented by the resistor R BRI express.

[0083] For ease of understanding, the various modules of the TSV post-bonding detection circuit based on positive feedback proposed in the embodiment of the present invention are introduced in detail below.

[0084] Cross-coupled pairs

[0085] Cross-coupled pairs, such as Figure 1 As shown, this may include:

[0086] MOS tube MP1 and MOS tube MP2; wherein,

[0087] The source of the MOS transistor MP1 is connected to the power supply voltage VDD, the gate is connected to the drain of the MOS transistor MP2, and the drain is connected to the preset node of the TSV to be tested;

[0088] The source of the MOS transistor MP2 is connected to the source of the MOS transistor MP1 , the gate is connected to the drain of the MOS transistor MP1 , and the drain is connected to a preset node of the resistor array.

[0089] Specifically, the cross-coupled transistors will measure the void resistance R of the TSV to be tested during the void fault detection phase. TSV and compare it with each resistor in the resistor array to obtain the corresponding void fault degree; in the leakage fault detection stage, the leakage resistance R leakage The cross-coupled transistors use their own positive feedback characteristics to accelerate the comparison process; in the open circuit fault detection stage or the bridge fault detection stage, they act as a current source to charge the test capacitor.

[0090] Transmission Gate Switch Array

[0091] Transmission gate switch arrays, such as Figure 1 As shown, this may include:

[0092] transmission gate switch SWx, transmission gate switch SWy, transmission gate switch SWz, a first combination array and a second combination array; wherein,

[0093] A first end of the transmission gate switch SWx is connected to the second end of the first combination array, and a second end thereof is grounded;

[0094] A first end of the transmission gate switch SWy is connected to a first end of the transmission gate switch SWx, and a second end is connected to an input end of the receiving buffer;

[0095] The first end of the transmission gate switch SWz is connected to the external control signal CTRL, and the second end is connected to the first control end of the reset module;

[0096] The first combination array includes: n transmission gate switches SW1_1-SWn_1 and n transmission gate switches SW1_2-SWn_2; wherein,

[0097] For n transmission gate switches SW1_1-SWn_1, the first ends of the transmission gate switches are connected to each other, the first end of the first combination array is connected to the preset node of the TSV to be tested, and the second end is connected to the first end of the corresponding TSV to be tested;

[0098] For n transmission gate switches SW1_2-SWn_2, the first end of each transmission gate switch is connected to the second end of the corresponding TSV to be tested, and the second ends are connected to each other to serve as the second end of the first combination array;

[0099] The second combination array includes m transmission gate switches SW1-SWm; wherein,

[0100] For m transmission gate switches SW1-SWm, a first end of each transmission gate switch is connected to a preset node of the resistor array, and a second end is connected to a corresponding resistor in the resistor array;

[0101] Both m and n are positive integers.

[0102] The transmission gate switch array controls the switching of its internal transmission gate switches to enable the TSV post-bonding detection circuit to sequentially enter the bridge fault detection stage, open circuit fault detection stage, void fault detection stage, or leakage fault detection stage, which may include:

[0103] The transmission gate switch array controls the transmission gate switches SWi_1, SW1_2-SWi-1_2, SWi+1_2-SWn_2, and SWy to be turned on, so that the TSV post-bonding detection circuit is in the bridge fault detection stage. It can be understood that SWi_1 represents the i-th switch SWi_1 among the n transmission gate switches SW1_1-SWn_1, SW1_2-SWi-1_2 represent the n transmission gate switches SW1_2-SWi-1_2, and SWi+1_2-SWn_2 represent the n transmission gate switches SWi+1_2-SWn_2.

[0104] The transmission gate switch array connects the i-th TSV to be tested by controlling the transmission gate switches SWi_1, SWi_2 and SWy to be turned on, so that the TSV post-bonding detection circuit is in the open circuit fault detection stage; SWi_2 represents the i-th switch SWi_2 among the n transmission gate switches SW1_2-SWn_2;

[0105] The transmission gate switch array connects the i-th TSV to be tested by controlling the transmission gate switches SWi_1, SWi_2, and SWx to be turned on. The transmission gate switches SW1-SWj are turned on in sequence, and the resistors R1-Rj in the resistor array are connected, respectively, so that the TSV post-bonding detection circuit is in the void fault detection stage. SWj represents the j-th switch SWj among the n transmission gate switches SW1-SWn.

[0106] The transmission gate switch array controls the transmission gate switch SWi_1 to be turned on, connects the i-th TSV to be tested, and sequentially turns on the transmission gate switches SW1-SWk, respectively, and connects the resistors R1-Rk in the resistor array, so that the detection circuit after TSV bonding is in the leakage fault detection stage; i∈[1,n], j∈[1,m], k∈[1,m], Rj represents the resistor in the resistors R1-Rm that meets the void fault detection condition, and Rk represents the resistor in the resistors R1-Rm that meets the leakage fault detection condition. It can be understood that the resistor that meets the void fault detection condition is the voltage V of the preset node of the resistor array in the void fault detection stage. R The resistance corresponding to the high level during the comparison process; the resistance that meets the leakage fault detection condition is the voltage V of the preset node of the resistor array during the leakage fault detection phase. R The corresponding resistance when it goes high during the comparison process.

[0107] In order to facilitate the understanding of the detection process, the detection process of the TSV post-bonding detection circuit is explained by taking the fifth TSV to be tested as an example; when the fifth TSV to be tested is tested, that is, when i=5, the transmission gate switch array controls the transmission gate switches SW5_1, SW1_2-SW4_2, SW6_2-SWn_2 and SWy to be turned on, so that the TSV post-bonding detection circuit is in the bridge fault detection stage, thereby realizing the detection of the bridge fault; the transmission gate switch array controls the transmission gate switches SW5_1, SW5_2 and SWy to be turned on, connecting the fifth TSV to be tested, so that the TSV post-bonding detection circuit is in the open circuit fault detection stage, thereby realizing the detection of the open circuit fault. Detection; the transmission gate switch array controls the transmission gate switches SW5_1, SW5_2 and SWx to be turned on, connects the fifth TSV to be tested, turns on the transmission gate switches SW1-SWj in sequence, connects the resistors R1-Rj in the resistor array, and puts the TSV post-bonding detection circuit into the void fault detection stage, thereby realizing the detection of void faults; the transmission gate switch array controls the transmission gate switch SW5_1 to be turned on, connects the fifth TSV to be tested, turns on the transmission gate switches SW1-SWk in sequence, connects the resistors R1-Rk in the resistor array, and puts the TSV post-bonding detection circuit into the leakage fault detection stage, thereby realizing the detection of leakage faults.

[0108] Reset module

[0109] Reset module, such as Figure 1 As shown, this may include:

[0110] MOS transistor MN1 and MOS transistor MN2; wherein,

[0111] The source of the MOS transistor MN1 is grounded, the gate is connected to the second end of the transmission gate switch SWz as the first control terminal of the reset module, and the drain is connected to the preset node of the TSV to be tested;

[0112] The source of the MOS transistor MN2 is grounded, the gate is connected to the first end of the transmission gate switch SWz as the second control terminal of the reset module, and the drain is connected to a preset node of the resistor array.

[0113] The reset module resets the voltage of the preset node of the TSV to be tested and the voltage of the preset node of the resistor array in the bridge fault detection phase, the open fault detection phase, the void fault detection phase or the leakage fault detection phase.

[0114] Test capacitor

[0115] The test capacitor may include a capacitor C2; a first end of the capacitor C2 is connected to the input end of the receiving buffer, and a second end of the capacitor C2 is grounded.

[0116] Eliminate parasitic modules such as Figure 1 As shown, it may include: capacitor C1 and capacitor C3; wherein,

[0117] A first terminal of the capacitor C1 is connected to a preset node of the TSV to be tested, and a second terminal thereof is grounded;

[0118] A first end of the capacitor C3 is connected to a predetermined node of the resistor array, and a second end thereof is grounded;

[0119] The capacitance values ​​of capacitor C1 and capacitor C3 are equal.

[0120] The parasitic elimination module can largely eliminate the influence of parasitic capacitance at the nodes of the TSV to be tested and the nodes of the resistor array.

[0121] Resistor Array

[0122] Resistor arrays, such as Figure 1 As shown, it may include: m resistors R1-Rm; wherein the first end of each resistor is respectively connected to the second end of the corresponding transmission gate switch SW1-SWm, and the second end is grounded;

[0123] The resistance values ​​of the m resistors R1 -Rm are set according to a preset resistance step size.

[0124] The resistance array can be used to compare the resistance value of the TSV to be tested; the preset resistance step can be designed according to the user's demand, which is not limited here.

[0125] The input end of the receiving buffer is connected with the first end of the test capacitor, and the output end outputs a signal A.

[0126] The input end of the receiving buffer is connected with the first end of the test capacitor, and the output end outputs a signal A.

[0127] The receiving buffer monitors the voltage on the test capacitor in the open-circuit fault detection stage or the bridging fault detection stage, so as to detect the open-circuit fault and the bridging fault.

[0128] The TSV bonding detection circuit detects the TSV to be tested in the bridging fault detection stage, the open-circuit fault detection stage, the cavity fault detection stage or the leakage fault detection stage, and judges whether the TSV to be tested has a fault, including:

[0129] In the bridging fault detection stage, when the output signal of the receiving buffer is high, the TSV to be tested has a bridging fault;

[0130] In the open-circuit fault detection stage, when the output signal of the receiving buffer is low, the TSV to be tested has an open-circuit fault;

[0131] In the cavity fault detection stage, the cavity resistance R TSV of the TSV to be tested is compared with each resistance in the resistance array, to obtain the resistance value range of the cavity resistance R TSV , and if the resistance value range of the cavity resistance R TSV is greater than a preset cavity reference value, the TSV to be tested has a cavity fault.

[0132] In the leakage fault detection stage, the leakage resistance R leakage of the TSV to be tested is compared with each resistance in the resistance array, to obtain the resistance value range of the leakage resistance R leakage , and if the resistance value range of the leakage resistance R leakage is less than a preset leakage reference value, the TSV to be tested has a leakage fault.

[0133] For the bridging fault detection stage, the path diagram of the detection circuit in the bridging fault detection stage is shown in FIG. 1. Figure 3, SWi_1 in the transmission gate switch array connects the i-th TSV to be tested to the detection circuit; SW1_2 to SWi-1_2, SWi+1_2 to SWn_2, and SWy are turned on, connecting the second terminals of all TSVs to be tested except the i-th TSV to be tested to the test capacitor C2. SWz is turned on, allowing the external control signal CTRL to control the reset MOS transistor MN1. When the external control signal CTRL is high, the reset MOS transistors MN1 and MN2 are turned on, and the voltage V TSV and the voltage V at the preset node of the resistor array R After being pulled down to 0, SWz is disconnected. At this time, MP1 acts as a current source to charge the test capacitor C2. If the voltage on the test capacitor C2 cannot increase and the receiving buffer output signal A cannot become a high level, there is no bridging fault; if the receiving buffer output signal A becomes a high level, there is a bridging fault.

[0134] It can be understood that for the open circuit fault detection stage, the path diagram of the detection circuit in the open circuit fault detection stage can be found in Figure 4 , SWi_1 and SWi_2 in the transmission gate switch array are turned on, connecting the i-th TSV to be tested to the detection circuit; SWy is turned on, connecting the second end of the i-th TSV to be tested to the test capacitor C2. SWz is turned on, allowing the external control signal CTRL to control the reset MOS transistor MN1. When the external control signal CTRL is high, the reset MOS transistors MN1 and MN2 are turned on, and the voltage V TSV and the voltage V at the preset node of the resistor array R After being pulled down to 0, SWz is disconnected. At this time, MP1 acts as a current source to charge the test capacitor C2. If the voltage on the test capacitor C2 cannot increase and the receiving buffer output signal A cannot become a high level, an open circuit fault exists; if the receiving buffer output signal A becomes a high level, there is no open circuit fault.

[0135] For the void fault detection phase, the path diagram of the detection circuit in the void fault detection phase can be found in Figure 5 , SWi_1 and SWi_2 in the transmission gate switch array are turned on, connecting the i-th TSV to be tested to the detection circuit; SWx is turned on, connecting the second end of the i-th TSV to be tested to the ground; SWz is turned on, so that the external control signal CTRL can control the reset MOS transistor MN1. When the external control signal CTRL is high, the reset MOS transistors MN1 and MN2 will reduce the voltage V TSV and the voltage V at the preset node of the resistor array R Pull down to 0, the external control signal CTRL becomes low level. If R TSVGreater than R1 in the resistor array, due to the positive feedback process of the cross-coupling to the tube itself, the voltage V TSV rises to near VDD, the voltage at the preset node of the resistor array V R Keep the potential close to 0; at this time, the reset MOS tube is turned on, and the voltage V TSV and the voltage V at the preset node of the resistor array R Pull down to 0 and enter R TSV The comparison process with the next resistor R2 in the resistor array continues until the voltage V R During the comparison process, it becomes high level and R TSV The resistance value range, R TSV A larger resistance value range indicates a more serious voiding failure.

[0136] For the leakage fault detection phase, the detection circuit path diagram in the leakage fault detection phase can be found in Figure 6 , SWi_1 in the transmission gate switch array is turned on, connecting the i-th TSV to be tested to the detection circuit; SWz is turned on, so that the external control signal CTRL can control the reset MOS transistor MN1. When the external control signal CTRL is high, the reset MOS transistors MN1 and MN2 will reduce the voltage V TSV and the voltage V at the preset node of the resistor array R After being pulled down to 0, the external control signal CTRL becomes low level. leakage Greater than R1 in the resistor array, due to the positive feedback process of the cross-coupling to the tube itself, the voltage V TSV rises to near VDD, the voltage at the preset node of the resistor array V R Keep the potential close to 0; at this time, the reset MOS tube is turned on, and the voltage V TSV and the voltage V at the preset node of the resistor array R Pull down to 0 and enter R leakage The comparison process with the next resistor R2 in the resistor array continues until the voltage V R During the comparison process, it becomes high level and R leakage The resistance value range, R leakage The smaller the resistance value range, the more serious the leakage fault. The specific values ​​of the preset void reference value and the preset leakage reference value can be set by the user according to their own requirements and are not limited here.

[0137] The embodiment of the present invention utilizes the positive feedback characteristics of the cross-coupling pair to accelerate the comparison process and improve the detection sensitivity. The time required for the detection process is greatly reduced, and the detection circuit structure is simple. The resistor array is used to measure the void resistance R of the TSV to be tested. TSV and leakage resistor R leakage By comparing the two, effective detection of void faults and leakage faults can be achieved. By switching the transmission gate switch array, the cross-coupled transistors can be equivalent to current sources, and the test capacitors and receiving buffers can be used to effectively detect bridge faults and open circuit faults.

[0138] It should be noted that, in the description of the present invention, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "plurality" means two or more, unless otherwise specifically defined.

[0139] The above description is only a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention are included in the scope of protection of the present invention.

Claims

1. A TSV post-bonding detection circuit based on positive feedback, characterized in that: include: Transmission gate switch array, cross-coupled pair tube, reset module, test capacitor, parasitic elimination module, resistor array, receiving buffer; among them, The transmission gate switch array is used to control the switching of the transmission gate switches within the array so that the TSV post-bonding detection circuit is sequentially in the bridge fault detection stage, the open fault detection stage, the void fault detection stage, or the leakage fault detection stage, thereby performing fault detection on the TSV to be tested and determining whether the TSV to be tested has a fault; The cross-coupling pair of transistors is used to adjust the void resistance R of the TSV to be tested in the void fault detection stage or the leakage fault detection stage. TSV Or leakage resistance R leakage and comparing with each resistor in the resistor array to obtain a corresponding void fault degree or leakage fault degree; wherein the cross-coupled transistor pair utilizes its own positive feedback characteristics to accelerate the comparison process; in the open circuit fault detection stage or the bridge fault detection stage, it acts as a current source to charge the test capacitor; the cross-coupled transistor pair includes: MOS tube MP1 and MOS tube MP2; wherein, The source of the MOS transistor MP1 is connected to the power supply voltage VDD, the gate is connected to the drain of the MOS transistor MP2, and the drain is connected to the preset node of the TSV to be tested; The source of the MOS transistor MP2 is connected to the source of the MOS transistor MP1, the gate is connected to the drain of the MOS transistor MP1, and the drain is connected to a preset node of the resistor array; The reset module is used to reset the voltage of the preset node of the TSV to be tested and the voltage of the preset node of the resistor array in the bridge fault detection stage, the open circuit fault detection stage, the void fault detection stage or the leakage fault detection stage; One end of the test capacitor is connected to another preset node of the TSV to be tested through a transmission gate switch array and is connected to the input end of the receiving buffer, and the second end is grounded; The parasitic elimination module is used to eliminate the influence of parasitic capacitance at the nodes of the TSV to be tested and the nodes of the resistor array; The receiving buffer is used to monitor the voltage on the test capacitor in the open circuit fault detection stage or the bridge fault detection stage to detect the open circuit fault and the bridge fault.

2. The TSV post-bonding detection circuit based on positive feedback according to claim 1, characterized in that: The transmission gate switch array comprises: transmission gate switch SWx, transmission gate switch SWy, transmission gate switch SWz, a first combination array and a second combination array; wherein, The first end of the transmission gate switch SWx is connected to the second end of the first combination array, and the second end is grounded; The first end of the transmission gate switch SWy is connected to the first end of the transmission gate switch SWx, and the second end is connected to the input end of the receiving buffer; The first end of the transmission gate switch SWz is connected to the external control signal CTRL, and the second end is connected to the first control end of the reset module; The first combination array includes: n transmission gate switches SW1_1-SWn_1 and n transmission gate switches SW1_2-SWn_2; wherein, For n transmission gate switches SW1_1-SWn_1, the first ends of the transmission gate switches are connected to each other, as the first end of the first combination array is connected to the preset node of the TSV to be tested, and the second ends are connected to the first end of the corresponding TSV to be tested; For n transmission gate switches SW1_2-SWn_2, the first end of each transmission gate switch is connected to the second end of the corresponding TSV to be tested, and the second ends are connected to each other to serve as the second end of the first combination array; The second combination array includes m transmission gate switches SW1-SWm; wherein, For m transmission gate switches SW1-SWm, a first end of each transmission gate switch is connected to a preset node of the resistor array, and a second end is connected to a corresponding resistor in the resistor array; Both m and n are positive integers.

3. The TSV post-bonding detection circuit based on positive feedback according to claim 2, characterized in that: The transmission gate switch array controls the switching of the transmission gate switches within itself, so that the TSV post-bonding detection circuit is sequentially in the bridge fault detection stage, the open circuit fault detection stage, the void fault detection stage, or the leakage fault detection stage, including: The transmission gate switch array controls the transmission gate switches SWi_1, SW1_2-SWi-1_2, SWi+1_2-SWn_2 and SWy to be turned on, so that the TSV post-bonding detection circuit is in the bridge fault detection stage; The transmission gate switch array controls the transmission gate switches SWi_1, SWi_2 and SWy to be turned on, thereby connecting the i-th TSV to be tested, so that the TSV post-bonding detection circuit is in the open circuit fault detection stage; The transmission gate switch array controls transmission gate switches SWi_1, SWi_2 and SWx to be turned on, connects the i-th TSV to be tested, turns on transmission gate switches SW1-SWj in sequence, connects resistors R1-Rj in the resistor array, and puts the TSV post-bonding detection circuit into the void fault detection stage; The transmission gate switch array controls the transmission gate switch SWi_1 to be turned on, connects the i-th TSV to be tested, turns on the transmission gate switches SW1-SWk in sequence, connects the resistors R1-Rk in the resistor array, and puts the TSV post-bonding detection circuit into the leakage fault detection stage; , Rj represents the resistor that meets the void fault detection condition among the resistors R1-Rm, and Rk represents the resistor that meets the leakage fault detection condition among the resistors R1-Rm.

4. The TSV post-bonding detection circuit based on positive feedback according to claim 2, characterized in that: The reset module includes: MOS transistor MN1 and MOS transistor MN2; wherein, The source of the MOS transistor MN1 is grounded, the gate is connected to the second end of the transmission gate switch SWz as the first control terminal of the reset module, and the drain is connected to the preset node of the TSV to be tested; The source of the MOS transistor MN2 is grounded, the gate is connected to the first end of the transmission gate switch SWz as the second control terminal of the reset module, and the drain is connected to a preset node of the resistor array.

5. The TSV post-bonding detection circuit based on positive feedback according to claim 1, characterized in that: The test capacitor includes a capacitor C2; a first end of the capacitor C2 is connected to the input end of the receiving buffer, and a second end of the capacitor C2 is grounded.

6. The TSV post-bonding detection circuit based on positive feedback according to claim 1, characterized in that: The parasitic elimination module includes: capacitor C1 and capacitor C3; wherein, A first end of the capacitor C1 is connected to a preset node of the TSV to be tested, and a second end thereof is grounded; A first end of the capacitor C3 is connected to a preset node of the resistor array, and a second end thereof is grounded; The capacitance values ​​of the capacitor C1 and the capacitor C3 are equal.

7. The TSV post-bonding detection circuit based on positive feedback according to claim 2, characterized in that: The resistor array includes: m resistors R1-Rm; wherein the first end of each resistor is connected to the second end of the corresponding transmission gate switch SW1-SWm, and the second end is grounded; The resistance values ​​of the m resistors R1 -Rm are set according to a preset resistance step size.

8. The TSV post-bonding detection circuit based on positive feedback according to claim 1, characterized in that: The equivalent electrical model of the TSV to be tested includes: Fault-free TSV equivalent electrical model, void fault TSV equivalent electrical model, open fault TSV equivalent electrical model, leakage fault TSV equivalent electrical model, bridge fault TSV equivalent electrical model; Among them, The fault-free TSV equivalent electrical model includes a capacitor C connected to ground. TSV ; The TSV equivalent electrical model of the void fault includes: a grounded capacitor C F , grounded capacitor C B and the void equivalent resistance R TSV Capacitor C F and capacitor C B are connected at the normalized position x, and there is a hole fault at the normalized position x, , where x=0 means the void fault occurs at the top of the TSV, x=0.5 means the void fault occurs at the midpoint of the TSV, and x=1 means the void fault occurs at the bottom of the TSV. The capacitance C F The capacitance value is the capacitance C TSV x times the capacitance value, capacitance C B The capacitance value is the capacitance C TSV The capacitance value is (1-x) times, and the void equivalent resistance R TSV Located at normalized position x; The open circuit fault TSV equivalent electrical model includes: a grounded capacitor C F1 and the grounded capacitor C B1 Capacitor C F1 and capacitor C B1 are connected at the normalized position y, and there is an open circuit fault at the normalized position y, , where y=0 means the open circuit fault occurs at the top of the TSV, y=0.5 means the open circuit fault occurs at the midpoint of the TSV, and y=1 means the open circuit fault occurs at the bottom of the TSV. The capacitance C F1 The capacitance value is y times the capacitance value of capacitor CTSV, and the capacitance C B1 The capacitance value is the capacitance C TSV (1-y) times of the capacitance value; when an open circuit fault occurs, the capacitor C F1 is the load capacitance, capacitance C B1 Not working; The leakage fault TSV equivalent electrical model includes: a grounded resistance R leakage and the grounded capacitor C TSV1 The resistor R leakage and capacitor C TSV1 Parallel connection; The equivalent electrical model of the TSV with bridge fault includes: the bridge resistance R between adjacent TSVs BRI and the ground capacitance C of each adjacent TSV TSV2 , C TSV3 ; Among them, the capacitor C TSV1 、C TSV2 and C TSV3 The capacitance values ​​are the same as the capacitance C in the equivalent electrical model of the fault-free TSV. TSV The capacitance values ​​are equal.

9. The TSV post-bonding detection circuit based on positive feedback according to claim 1, characterized in that: The TSV post-bonding detection circuit performs fault detection on the TSV to be tested in the bridge fault detection stage, the open fault detection stage, the void fault detection stage, or the leakage fault detection stage to determine whether the TSV to be tested has a fault, including: In the bridge fault detection phase, when the output signal of the receiving buffer is at a high level, a bridge fault exists in the TSV to be tested; In the open circuit fault detection stage, when the output signal of the receiving buffer is at a low level, the TSV to be tested has an open circuit fault; In the void fault detection phase, the void resistance R TSV Compare with each resistor in the resistor array to obtain the void resistance R TSV Resistance range, if the cavity resistance R TSV If the resistance value range is greater than the preset void reference value, the TSV to be tested has a void fault; In the leakage fault detection phase, the leakage resistance R leakage Compare with each resistor in the resistor array to obtain the leakage resistance R leakage Resistance range, if the leakage resistance R leakage If the resistance value range of the TSV to be tested is smaller than the preset leakage reference value, then there is a leakage fault in the TSV to be tested.

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