A digitized multichannel nonlinear online correction circuit and method

Abstract

The application discloses a kind of digital multi-channel nonlinear online correction circuit and method, including signal bias conditioning module, high-speed AD conversion module, digital signal processing module;Its correction method is to obtain the energy spectrum cumulative result of input pulse signal and carries out normalization processing, then the channel address imax where the incident particle energy distribution probability maximum pemax is obtained by energy spectrum peak searching algorithm, and the pulse signal amplitude corresponding to the channel address is set as the digital quantity of direct current bias adjustment to DAC conversion circuit, then the threshold value corresponding to energy spectrum acquisition is increased imax, and the above steps are repeated until the input pulse signal energy spectrum peak value corresponding amplitude exceeds the full-scale amplitude of sampling ADC;Then correct each sampling channel address of ADC, output result.The application adjusts the direct current bias voltage of pulse signal, and the nonlinear correction parameters of each sampling channel address of ADC are obtained online, so as to improve the precision of digital multi-channel sampling measurement.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of nuclear measurement, in particular to a digital multi-channel nonlinear online correction circuit and method. BACKGROUND

[0002] Digital multi-channel is one of the most commonly used measurement devices in nuclear detection, and the nonlinear performance of multi-channel is a key factor affecting the measurement accuracy. Usually, a sliding pulse signal source and other devices can be used as the input signal of the digital multi-channel to obtain the nonlinear correction parameters of the multi-channel. However, in many applications, such as PGNAA online measurement and analysis device, the digital multi-channel is integrated as a measurement component in the device, and cannot use an external pulse signal source to provide appropriate input signals for the multi-channel to obtain nonlinear correction parameters. Therefore, it is necessary to improve the existing digital multi-channel and establish a method for online correction of nonlinear performance. SUMMARY

[0003] The purpose of the present application is to provide a digital multi-channel nonlinear online correction circuit and method, which can online calculate the nonlinear correction parameters of each sampling channel address of ADC by adjusting the DC bias voltage of the actual measurement pulse signal, thereby improving the sampling measurement accuracy of the digital multi-channel.

[0004] In order to achieve the above purpose, the technical scheme of the present application is:

[0005] A digital multi-channel nonlinear online correction circuit, comprising:

[0006] A signal bias conditioning module for adjusting the DC bias voltage of the input pulse signal;

[0007] A high-speed AD conversion module connected to the signal bias conditioning module, which continuously digitizes and samples the pulse signal adjusted by the signal bias conditioning module and outputs after digitization and sampling;

[0008] A digital signal processing module connected to the high-speed AD conversion module, which processes the digital signal output by the high-speed AD conversion module according to a preset program; and connected to the signal bias conditioning module, which outputs the DC bias adjustment digital quantity and the reference voltage selection digital quantity to the signal bias conditioning module.

[0009] As an improvement to the above technical scheme, the signal bias conditioning module comprises:

[0010] A DAC conversion circuit for converting the DC bias adjustment digital quantity output by the digital signal processing module into a corresponding analog voltage value and outputting to the selection end of the reference voltage selection circuit;

[0011] The reference voltage selection circuit has a selection end comprising an input end 1 and an input end 2, the input end 1 is connected with the output end of the DAC conversion circuit, and the input end 2 is connected with the ADC sampling reference level output end of the high-speed AD conversion module; the analog voltage value output by the DAC conversion circuit and the level VCM output by the ADC sampling reference level output end are selected, and the selected reference bias voltage is transmitted to the single-ended to differential amplification circuit;

[0012] The single-ended to differential amplification circuit converts the DC bias adjustment digital quantity output by the digital signal processing module into a corresponding analog voltage value, and outputs the analog voltage value to the selection end of the reference voltage selection circuit;

[0013] The DAC conversion circuit, the reference voltage selection circuit and the single-ended to differential amplification circuit are connected in series.

[0014] As an improvement to the above technical solution, the single-ended to differential amplification circuit comprises an operational amplifier, a load resistor R1, an isolation resistor R2, feedback resistors R3 and R5, and a balance resistor R4; the input pulse signal is connected to the non-inverting input end of the operational amplifier after passing through the isolation resistor R2, the feedback resistor R3 is connected in parallel between the non-inverting input end and the inverting output end of the operational amplifier, the balance resistor R4 is connected between the inverting input end of the operational amplifier and the ground, and the feedback resistor R5 is connected in parallel between the inverting input end and the non-inverting output end of the operational amplifier; the output common-mode voltage setting end of the operational amplifier is connected with the output end of the reference voltage selection circuit; the signal amplification multiple is adjusted by synchronously adjusting the proportion of the feedback resistor R3 and the isolation resistor R2, and the proportion of the feedback resistor R5 and the balance resistor R4, so as to convert the single-ended input pulse signal into a differential signal and output the differential signal to the high-speed AD conversion module.

[0015] As an improvement to the above technical solution, the high-speed AD conversion module comprises an ADC sampling reference level VCM output end, which is connected with the input end 2 of the reference voltage selection circuit, and the ADC sampling reference level VCM is input to the reference voltage selection circuit from the input end 2 of the reference voltage selection circuit.

[0016] As an improvement to the above technical solution, the digital signal processing module comprises a DC bias adjustment digital quantity output end and a reference voltage selection digital quantity output end, which are respectively connected with the input end of the DAC conversion circuit and the input end 2 of the reference voltage selection circuit.

[0017] As an improvement to the above technical solution, the present application provides an online correction method based on the above-mentioned digital multi-channel nonlinear online correction circuit, and the steps of the method are as follows:

[0018] Step S1: set the reference voltage selection digital quantity as the voltage output of the input end 1, and set the DC bias adjustment digital quantity output by the digital signal processing module as 0;

[0019] Step S2: Obtain the energy spectrum accumulation result of the input pulse signal, and normalize the accumulated energy spectrum according to the total count value c i is expressed as:

[0020] ;

[0021] wherein i is the channel address corresponding to the ADC conversion, tw i is the actual channel width value corresponding to each converted channel address after normalization, pe j is the distribution probability of the corresponding pulse amplitude corresponding to the incident particle energy;

[0022] Step S3: Obtain the channel address imax where the maximum pulse signal amplitude pemax of the incident particle energy distribution probability is obtained through the energy spectrum peak searching algorithm, and set the pulse signal amplitude corresponding to the channel address as the digital quantity of the direct current bias adjustment to set the DAC conversion circuit, that is, synchronously increase the sampling value after the AD conversion by imax;

[0023] Step S4: Correspondingly increase the threshold value of the energy spectrum acquisition by imax, and repeat steps S2 and S3 until the pulse signal energy spectrum peak value corresponding amplitude exceeds the full range amplitude of the sampling ADC;

[0024] Step S5: The normalized count result measured c i , wherein the channel width tw i is only related to the ADC sampling channel address i, and the amplitude distribution probability of the pulse signal energy spectrum pe j is related to the direct current bias adjustment digital quantity, so that the channel width tw i corresponding to each channel address of the ADC sampling channel i tw i can be calculated; and the correction coefficient of the ADC sampling channel address is:

[0025] ;

[0026] Step S6: Set the reference voltage selection digital quantity output by the digital signal processing module as the input end 2 voltage output; when the energy spectrum accumulation is completed, the accumulation result of each sampling channel address multiplied by the correction coefficient of the corresponding channel address is the corrected output result.

[0027] The working principle of the present application is:

[0028] The high-speed AD conversion module is used for digitizing sampling of a pulse signal output by the digital signal processing module, and outputs a digital quantity to the digital signal processing module after sampling, and outputs an ADC sampling reference level VCM to the signal bias conditioning module.

[0029] The steps of the online correction method of the circuit are as follows: step S1: setting the reference voltage selection digital quantity as the input end 1 voltage output, and setting the DC bias adjustment digital quantity output by the digital signal processing module as 0; step S2: obtaining the energy spectrum accumulation result of the input pulse signal, and performing normalization processing on the accumulated energy spectrum according to the total count value, and the normalized channel count result of each channel c i is expressed as: , wherein i is the channel address corresponding to the ADC conversion, tw i is the actual channel width value corresponding to each converted channel address after normalization, pe j is the distribution probability of the corresponding pulse amplitude corresponding to the incident particle energy; step S3: obtaining the channel address imax1 where the incident particle energy distribution probability pemax is maximum through the energy spectrum peak searching algorithm, and setting the channel amplitude as the DC bias adjustment digital quantity to the DAC conversion circuit, that is, synchronously increasing the sampling value after AD conversion by imax1; step S4: correspondingly increasing the threshold value of the energy spectrum acquisition by imax1, and repeatedly executing step S2 and step S3 until the energy spectrum of the input pulse signal traverses the full range amplitude of the ADC; step S5: the normalized count result c i , wherein the channel width tw i is only related to the ADC sampling channel address i, and the amplitude distribution probability of the pulse signal energy spectrum pe j is related to the DC bias adjustment digital quantity, so that the ADC sampling channel address i corresponding to each channel channel width tw i can be calculated; the correction coefficient of the ADC sampling channel address is: ; step S6: setting the reference voltage selection digital quantity output by the digital signal processing module as the input end 2 voltage output; when the energy spectrum accumulation is completed, the accumulation result of each sampling channel address multiplied by the correction coefficient of the corresponding channel address is the corrected output result.

[0030] Compared with the prior art, the application has the advantages and positive effects that:

[0031] This invention improves the accuracy of digital multichannel sampling measurement by adjusting the DC bias voltage of the pulse signal and calculating the nonlinear correction parameters of each sampling channel address of the ADC online. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 This is a simplified circuit diagram of the present invention;

[0034] Figure 2 This is a schematic diagram of the signal bias conditioning module of the present invention;

[0035] Figure 3 This is a schematic diagram of the high-speed AD conversion circuit of the present invention;

[0036] Figure 4 This is a schematic diagram of the DC bias adjustment process of the present invention;

[0037] Figure 5 This is a flowchart of the nonlinear online correction method of the present invention. Detailed Implementation

[0038] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, any modifications, equivalent substitutions, improvements, etc., made by those skilled in the art to all other embodiments obtained without creative effort should be included within the protection scope of the present invention.

[0039] like Figure 1 The diagram shown is a schematic of the digital multi-channel nonlinear online correction circuit of the present invention. The digital multi-channel nonlinear online correction circuit of the present invention mainly includes: a signal bias conditioning module, a high-speed AD conversion module, and a digital signal processing module.

[0040] like Figure 2The diagram shows a schematic of the signal bias conditioning module. This module consists of a cascaded DAC converter circuit, a reference voltage selection circuit, and a single-ended to differential amplifier circuit. The single-ended input pulse signal passes through resistor R2 and is input to the non-inverting input of the operational amplifier (op-amp). Together with resistors R3 (connected between the op-amp's non-inverting and inverting inputs), R5 (connected between the op-amp's inverting and non-inverting inputs), and R4 (connected between the op-amp's inverting input and ground), this forms the single-ended to differential amplifier circuit, converting the input single-ended signal into a differential signal output. Load resistor R1 acts as a matching resistor between the input pulse signal and ground to prevent the input pulse signal from being emitted. The digital signal processing module outputs a DC bias adjustment digital... The input of the high-precision DA converter is directly connected to the input of the 14-bit high-precision DA converter. The analog voltage output of the high-precision DA converter is connected to input terminal 1 of the reference voltage selection circuit. The VCM signal output of the AD conversion module is connected to input terminal 2 of the reference voltage selection circuit. The digital signal processing module outputs a digital value to control the output selection of the reference voltage selection circuit. The output of the reference voltage selection circuit is connected to the common-mode level output setting terminal of the single-ended to differential operational amplifier. The amplification factor of the circuit is adjusted by synchronously adjusting the ratio of R3 to R2 and R5 to R4.

[0041] like Figure 3 The diagram shows a schematic of a high-speed AD conversion module. This module consists of a 12-bit parallel high-speed AD converter. The differential pulse signal output from the signal bias conditioning module is connected to the AD converter via a filter circuit. In the filter circuit, resistor R6 is connected between the non-inverting output of the digital signal processing module and the positive input of the AD converter; resistor R7 is connected between the inverting output of the digital signal processing module and the negative input of the AD converter; and capacitor C1 is connected between the positive and negative inputs of the AD converter. The high-speed AD converter has a full-scale amplitude of ±1V for the input pulse signal, a sampling rate of 500MHz, and outputs 12-bit parallel differential data. The signal output of the high-speed AD converter is connected to the digital signal processing module, which then sends the data for digitization.

[0042] like Figure 4 and 5 As shown, this embodiment of the invention also provides an online correction method based on the above-described digital multi-channel nonlinear online correction circuit, which completes the online correction method of this invention.

[0043] The online correction method includes the following steps:

[0044] Step S1: Set the reference voltage selection digital value to the voltage output of input terminal 1, and set the DC bias adjustment digital value output by the digital signal processing module to 0;

[0045] Step S2: Obtain the energy spectrum accumulation result of the input pulse signal, and normalize the accumulated energy spectrum according to the total count value. The normalized count result of each channel c i is expressed as:

[0046] ;

[0047] wherein i is the channel address corresponding to the ADC conversion, i tw i is the actual channel width value corresponding to each converted channel address after normalization, pe j is the distribution probability of the corresponding pulse amplitude corresponding to the incident particle energy;

[0048] Step S3: Obtain the channel address imax where the pulse signal amplitude corresponding to the channel address imax has the maximum energy distribution probability of the incident particle by the energy spectrum peak searching algorithm, and set the pulse signal amplitude corresponding to the channel address as the digital quantity of the direct current bias adjustment to the DAC conversion circuit, that is, synchronously increase the sampling value after the AD conversion by imax;

[0049] Step S4: Correspondingly increase the threshold value of the energy spectrum acquisition by imax, and repeatedly execute steps S2 and S3 until the pulse signal energy spectrum peak value corresponding amplitude exceeds the full range amplitude of the sampling ADC.

[0050] To more clearly illustrate the principle of direct current bias adjustment, only a simple example is given below, and the remaining adjustment cases are similar, which will not be repeated here. When the direct current bias adjustment is 0, the peak channel address of the normalized distribution of the measured input pulse signal energy spectrum is 834, and the corresponding pulse signal amplitude is 204 mV. Then, the adjustment digital quantity of the direct current bias is set to 204, 408, 612, and 816, respectively, that is, the DAC output voltage is 204 mV, 408 mV, 612 mV, and 816 mV, respectively, and the input pulse signal energy spectrum is measured respectively. When the direct current bias voltage is set to 816 mV, the pulse signal amplitude corresponding to the peak value of the measured energy spectrum is 1.02 V, which exceeds the full range of 1 V of the ADC conversion, and the step is terminated by repeating the execution; the normalized count results ci1, ci2, ci3, ci4, and ci5 of each channel address are calculated from the five sets of energy spectrum accumulation results.

[0051] Step S5: The normalized count result c i wherein the channel width tw i is only related to the ADC sampling channel address i, and the amplitude distribution probability of the pulse signal energy spectrum pe j ​The digital quantity related to the direct current bias adjustment is used to calculate the address of the ADC sampling channel i The corresponding channel width tw i The distribution value; the correction coefficient of the address of the ADC sampling channel is:

[0052]

[0053] Step S6: the reference voltage selection digital quantity output by the digital signal processing module is set as the voltage output of the input end 2; when the energy spectrum accumulation is completed, the accumulation result of each sampling channel address multiplied by the correction coefficient of the corresponding channel address is the corrected output result.

[0054] In summary, the embodiment of the present application provides a kind of digital multi-channel nonlinear online correction circuit and method, compared with prior art, the method can be in the environment that external pulse signal source cannot provide suitable input signal for multi-channel, by adjusting the direct current bias voltage of actual measurement pulse signal, the nonlinear correction parameter of the address of the ADC sampling channel is calculated online, to improve the precision of digital multi-channel sampling measurement.

[0055] Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the division of the above functional modules is exemplified, and in actual application, the above functions can be completed by different functional modules according to needs, that is, the internal structure of the circuit is divided into different functional modules to complete all or part of the functions described above.​

Claims

1. A digital multi-channel nonlinear online correction circuit, characterized in that, include: The signal bias conditioning module adjusts the DC bias voltage of the input pulse signal; The high-speed AD conversion module is connected to the signal bias conditioning module, which continuously digitizes the pulse signal adjusted by the signal bias conditioning module and outputs it after digitization. The digital signal processing module is connected to the high-speed AD conversion module and processes the digital signal output by the high-speed AD conversion module according to a preset program; it is also connected to the signal bias conditioning module and outputs the DC bias adjustment digital value and the reference voltage selection digital value to the signal bias conditioning module. The signal bias conditioning module includes: The DAC conversion circuit converts the DC bias adjustment digital value output by the digital signal processing module into a corresponding analog voltage value and outputs it to the selection terminal of the reference voltage selection circuit. The reference voltage selection circuit has two selection terminals: input terminal 1 and input terminal 2. Input terminal 1 is connected to the output terminal of the DAC conversion circuit, and input terminal 2 is connected to the ADC sampling reference level output terminal of the high-speed AD conversion module. The circuit selects the analog voltage value output by the DAC conversion circuit and the level VCM output by the ADC sampling reference level output terminal, and transmits the selected reference bias voltage to the single-ended to differential amplifier circuit. A single-ended to differential amplifier circuit converts the DC bias adjustment digital value output by the digital signal processing module into a corresponding analog voltage value and outputs it to the selection terminal of the reference voltage selection circuit. The DAC conversion circuit, the reference voltage selection circuit, and the single-ended to differential amplifier circuit are cascaded together. The online correction method for digital multichannel nonlinear online correction circuits is as follows: S1: Set the reference voltage selection digital value to the voltage output of input terminal 1, and set the DC bias adjustment digital value output by the digital signal processing module to 0; S2: Obtain the cumulative energy spectrum of the input pulse signal, and normalize the accumulated energy spectrum according to the total value. The normalized count results for each channel are c. i Represented as: ； in i The channel address corresponding to the ADC conversion. tw i This represents the actual track width value corresponding to each transformed track address after normalization. PE j This represents the probability distribution of the incident particle energy corresponding to the pulse amplitude. S3: The channel address imax where the probability of the incident particle energy distribution is the highest is obtained by the energy spectrum peak finding algorithm, and the amplitude of the pulse signal corresponding to this channel address is used as the digital quantity for DC bias adjustment to set the DAC conversion circuit, that is, the sampled value after AD conversion is synchronously increased by imax; S4: Increase the threshold of energy spectrum acquisition by imax accordingly, and repeat steps S2 and S3 until the amplitude corresponding to the peak value of the input pulse signal energy spectrum exceeds the full-scale amplitude of the sampling ADC. S5: The normalized count result obtained after each change in the DC bias adjustment digital value to set the DAC conversion circuit. c i In the middle, the road is wide tw i It is only related to the ADC sampling channel address i, while the amplitude distribution probability of the pulse signal energy spectrum is... PE j The ADC sampling channel address can be calculated from the digital value related to the DC bias adjustment. i The corresponding width of each lane tw i The distribution values; the correction coefficients for each sampling address of the ADC are: ； Step S6: Set the reference voltage output of the digital signal processing module to the voltage output of input terminal 2; after the energy spectrum is accumulated, the accumulated result of each sampling address is multiplied by the correction coefficient of the corresponding address to obtain the corrected output result.

2. The digital multi-channel nonlinear online correction circuit as described in claim 1, characterized in that, The single-ended to differential amplifier circuit includes an operational amplifier, a load resistor R1, an isolation resistor R2, feedback resistors R3 and R5, and a balancing resistor R4. The input pulse signal is connected to the non-inverting input of the operational amplifier after passing through the isolation resistor R2. The feedback resistor R3 is connected in parallel between the non-inverting input and the inverting output of the operational amplifier. The balancing resistor R4 is connected between the inverting input and ground of the operational amplifier. The feedback resistor R5 is connected in parallel between the inverting input and the non-inverting output of the operational amplifier. The common-mode voltage setting terminal of the operational amplifier is connected to the output terminal of the reference voltage selection circuit. The signal amplification factor is adjusted by synchronously adjusting the ratio of the feedback resistor R3 to the isolation resistor R2, and the feedback resistor R5 to the balancing resistor R4, converting the single-ended input pulse signal into a differential signal for output to the high-speed AD conversion module.

3. The digital multi-channel nonlinear online correction circuit as described in claim 1, characterized in that, The high-speed AD conversion module includes an ADC sampling reference level VCM output terminal, which is connected to the input terminal 2 of the reference voltage selection circuit, and the ADC sampling reference level VCM is input to the reference voltage selection circuit from the input terminal 2 of the reference voltage selection circuit.

4. The digital multi-channel nonlinear online correction circuit as described in claim 1, characterized in that, The digital signal processing module includes a DC bias adjustment digital output terminal and a reference voltage selection digital output terminal, which are respectively connected to the input terminal of the DAC conversion circuit and the input terminal 2 of the reference voltage selection circuit.

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