Vehicle chip test method and device, electronic equipment and storage medium

By obtaining and analyzing the circuit design information of the target chip, and adjusting the port information based on the function to be tested, the initial test results are summarized to determine the passability of the chip, and the problem of low efficiency and accuracy of vehicle chip testing methods in the prior art is solved, and efficient and accurate chip testing is achieved.

CN119536207AActive Publication Date: 2025-02-28CHINA FAW CO LTD
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Patent Information

Application Number
CN202411471516.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-21
Publication Date
2025-02-28
Estimated Expiration
2044-10-21

AI Technical Summary

Technical Problem

The current vehicle chip testing methods are low in efficiency and accuracy, mainly due to the differences in circuit design and test point placement of chip evaluation boards of different manufacturers, which requires manual adjustment of testing equipment, which increases the test complexity and reduces the accuracy of evaluation results.

Method used

By obtaining the function to be tested and the circuit design information of the evaluation board of the target chip, the circuit design information is analyzed to obtain the port information, and the port information is adjusted based on the function to be tested for testing, and the initial test results are generated. Finally, multiple initial test results are summarized to determine whether the target chip passes the test.

Benefits of technology

The target chip is tested accurately and quickly, which improves the efficiency and accuracy of the test method, reduces manual operation and human errors, and ensures the consistency and reliability of the test results.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a vehicle chip test method and device, electronic equipment and a storage medium. The method comprises the steps of obtaining a to-be-tested function of a target chip and circuit design information of a target evaluation board; analyzing the circuit design information to obtain port information of the target chip; adjusting the port information based on the to-be-tested function to perform a test, and generating an initial test result; and summarizing the plurality of initial test results to obtain a target test result which is used for determining whether the target chip passes the test or not. According to the invention, the technical problem of low efficiency and accuracy of a vehicle chip test method in the prior art is solved.
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Description

Technical Field

[0001] The present invention relates to the field of vehicle technology, and in particular to a vehicle chip testing method, device, electronic equipment and storage medium. Background Art

[0002] In the current test system of automotive Controller Area Network (CAN) transceiver chips, due to differences in circuit principle design, printed circuit board (PCB) design, and test point placement of chip evaluation boards from different manufacturers, it is necessary to manually adjust the connectors, probes or probes, test inputs and other equipment information when testing different functions of the chip under test. This not only increases the complexity of the test, but also makes the test results susceptible to errors introduced by manual adjustments. In addition, the existing test process still relies mainly on manual operation to complete the evaluation of a certain indicator according to specific steps. This test method lacks standardization and uniformity, which reduces the accuracy of the evaluation results.

[0003] To address the above-mentioned problems, no effective solution has been proposed yet. Summary of the invention

[0004] The embodiments of the present invention provide a vehicle chip testing method, device, electronic device and storage medium to at least solve the technical problem of low efficiency and accuracy of vehicle chip testing methods in related technologies.

[0005] According to one embodiment of the present invention, a vehicle chip testing method is provided, including: obtaining a function to be tested of a target chip and circuit design information of a target evaluation board; parsing the circuit design information to obtain port information of the target chip; adjusting the port information based on the function to be tested for testing to generate an initial test result; aggregating multiple initial test results to obtain a target test result, wherein the target test result is used to determine whether the target chip passes the test.

[0006] Optionally, based on the function to be tested, port information is adjusted for testing, and generating initial test results includes: in response to the function to be tested being the current output function of the target chip, adjusting the first port and the second port of the target chip to be grounded, and connecting the third port to a first voltage source, wherein the first port is used to send data of the target chip, the second port is used to control the working mode of the target chip, and the third port is used to connect to the high voltage line of the target chip; in response to the first voltage source providing voltage according to a preset rule, obtaining current information of the third port; and generating initial test results based on the current information.

[0007] Optionally, based on the function to be tested, port information is adjusted for testing, and generating initial test results includes: in response to the function to be tested being a bus bias function of the target chip, adjusting the first port of the target chip to be suspended, the second port to be grounded, the third port to be connected to a first voltage source, and the fourth port to be connected to a second voltage source, wherein the fourth port is used to connect to a low voltage line of the target chip, and the voltage provided by the second voltage source is higher than the voltage provided by the first voltage source; controlling the second voltage source to increase to a preset voltage threshold with a first preset voltage step size to obtain output status information of the target chip; and generating initial test results based on the output status information.

[0008] Optionally, the port information is adjusted based on the function to be tested for testing, and generating initial test results includes: in response to the function to be tested being the undervoltage function of the target chip, adjusting the second port of the target chip to be grounded and connecting a target resistance between the third port and the fourth port; determining the power supply voltage information of the target chip based on the common mode voltage of the target chip; and generating initial test results based on the power supply voltage information.

[0009] Optionally, adjusting port information for testing based on the function to be tested, generating initial test results includes: in response to the function to be tested being a voltage function of the target chip, adjusting the second port of the target chip to ground, and connecting a target resistor between the third port and the fourth port; adjusting the voltage of the first port of the target chip; determining an input voltage threshold of the target chip based on the voltage of the first port; and generating initial test results based on the input voltage threshold.

[0010] Optionally, based on the function to be tested, port information is adjusted for testing, and generating initial test results includes: in response to the function to be tested being an over-temperature protection function of the target chip, adjusting the first port of the target chip to be suspended, the second port to be grounded, and the target resistance to be connected between the third port and the fourth port; controlling the temperature increase of the target chip based on a preset temperature step; in response to the difference between the first level and the second level reaching a preset threshold, obtaining current temperature information, wherein the first level is used to represent the output level of the third port, and the second level is used to represent the output level of the fourth port; and generating initial test results based on the current temperature information.

[0011] Optionally, the vehicle chip testing method further includes: controlling the target chip to be in a preset environmental condition, and controlling the power supply voltage of the target chip to be a preset voltage.

[0012] Optionally, aggregating multiple initial test results to obtain a target test result includes: aggregating multiple initial test results to obtain a summary result; in response to the summary result indicating that the functions to be tested corresponding to the multiple initial test results have all passed the test, determining the target test result to be that the target chip has passed the test.

[0013] According to one embodiment of the present invention, a vehicle chip testing device is also provided, including: an acquisition module, used to acquire the function to be tested of the target chip and the circuit design information of the target evaluation board; a parsing module, used to parse the circuit design information to obtain the port information of the target chip; a testing module, used to adjust the port information based on the function to be tested for testing, and generate an initial test result; a determination module, used to summarize multiple initial test results to obtain a target test result, wherein the target test result is used to determine whether the target chip passes the test.

[0014] Optionally, the test module is also used to adjust the first port and the second port of the target chip to be grounded and the third port to be connected to the first voltage source in response to the function to be tested being the current output function of the target chip, wherein the first port is used to send data of the target chip, the second port is used to control the working mode of the target chip, and the third port is used to connect the high voltage line of the target chip; the acquisition module is also used to obtain current information of the third port in response to the first voltage source providing voltage according to preset rules; the vehicle chip testing device also includes a generation module for generating initial test results based on current information.

[0015] Optionally, the test module is also used to: in response to the function to be tested being a bus bias function of the target chip, adjust the first port of the target chip to be suspended, the second port to be grounded, the third port to be connected to the first voltage source, and the fourth port to be connected to the second voltage source, wherein the fourth port is used to connect to the low voltage line of the target chip, and the voltage provided by the second voltage source is higher than the voltage provided by the first voltage source; control the second voltage source to increase to a preset voltage threshold with a first preset voltage step size to obtain output status information of the target chip; the generation module is also used to generate initial test results based on the output status information.

[0016] Optionally, the test module is also used to adjust the target resistance connected between the second port of the target chip and the third port and the fourth port in response to the function to be tested being the undervoltage function of the target chip; the determination module is also used to determine the power supply voltage information of the target chip based on the common mode voltage of the target chip; the generation module is also used to generate initial test results based on the power supply voltage information.

[0017] Optionally, the test module is also used to: in response to the function to be tested being a voltage function of the target chip, adjust the second port of the target chip to ground, and connect a target resistance between the third port and the fourth port; adjust the voltage of the first port of the target chip; the determination module is also used to determine the input voltage threshold of the target chip based on the voltage of the first port; the generation module is also used to generate an initial test result based on the input voltage threshold.

[0018] Optionally, the test module is also used to: in response to the function to be tested being the over-temperature protection function of the target chip, adjust the first port of the target chip to be suspended, the second port to be grounded, and the target resistance to be connected between the third port and the fourth port; control the temperature increase of the target chip based on a preset temperature step; the acquisition module is also used to obtain current temperature information in response to the difference between the first level and the second level reaching a preset threshold, wherein the first level is used to represent the output level of the third port, and the second level is used to represent the output level of the fourth port; the generation module is also used to generate initial test results based on the current temperature information.

[0019] Optionally, the test module is further used to: control the target chip to be in a preset environmental condition, and control the power supply voltage of the target chip to be a preset voltage.

[0020] Optionally, the determination module is further used to: summarize multiple initial test results to obtain a summary result; in response to the summary result indicating that the to-be-tested functions corresponding to the multiple initial test results have all passed the test, determine the target test result to be that the target chip has passed the test.

[0021] According to one embodiment of the present invention, there is also provided an electronic device, comprising: a memory storing an executable program; and a processor for running the program, wherein the above-mentioned vehicle chip testing method is executed when the program is running.

[0022] According to one embodiment of the present invention, a non-volatile storage medium is further provided, in which a computer program is stored, wherein the computer program is configured to execute the above-mentioned vehicle chip testing method when running.

[0023] According to one embodiment of the present invention, a computer program product is also provided, including a computer program, and the computer program implements the above-mentioned vehicle chip testing method when executed by a processor.

[0024] In an embodiment of the present invention, a method of obtaining the function to be tested of the target chip and the circuit design information of the target evaluation board is adopted, and the port information of the target chip is obtained by parsing the circuit design information, and the port information is adjusted based on the function to be tested for testing, and an initial test result is generated. Finally, multiple initial test results are summarized to obtain a target test result, thereby achieving the purpose of accurately and quickly testing the target chip, thereby realizing the technical effect of improving the efficiency and accuracy of the target chip testing method, and further solving the technical problem of low efficiency and accuracy of the vehicle chip testing method in the related art. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of this application. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0026] Figure 1 is a flow chart of a vehicle chip testing method according to one embodiment of the present invention;

[0027] Figure 2 is a flow chart of another vehicle chip testing method according to one embodiment of the present invention;

[0028] Figure 3 is a schematic diagram of a vehicle chip testing method according to one embodiment of the present invention;

[0029] Figure 4 It is a structural block diagram of a vehicle chip testing device according to one embodiment of the present invention. DETAILED DESCRIPTION

[0030] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0031] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0032] According to an embodiment of the present invention, a method embodiment of a vehicle chip testing method is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0033] The method embodiment can be executed in an electronic device or a similar computing device including a memory and a processor. Taking running on a vehicle terminal as an example, the vehicle terminal may include one or more processors (the processor may include but is not limited to a central processing unit (CPU), a graphics processing unit (GPU), a digital signal processing (DSP) chip, a microcontroller unit (MCU), a programmable logic device (Field Programmable Gate Array, FPGA), a neural network processor (Neural-network Processor Unit, NPU), a tensor processor (Tensor Processing Unit, TPU), an artificial intelligence (Artificial Intelligence, AI) type processor, etc.) and a memory for storing data. Optionally, the above-mentioned vehicle terminal may also include a transmission device, an input and output device, and a display device for communication functions. It can be understood by those skilled in the art that the above-mentioned structural description is only for illustration and does not limit the structure of the above-mentioned vehicle terminal. For example, the vehicle terminal may also include more or fewer components than the above-mentioned structural description, or have a configuration different from the above-mentioned structural description.

[0034] The memory can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the vehicle chip testing method in the embodiment of the present invention. The processor executes various functional applications and data processing by running the computer program stored in the memory, that is, the above-mentioned vehicle chip testing method is realized. The memory may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory may further include a memory remotely arranged relative to the processor, and these remote memories can be connected to the mobile terminal via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0035] The transmission device is used to receive or send data via a network. The specific example of the above network may include a wireless network provided by a communication provider of the mobile terminal. In one example, the transmission device includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device can be a radio frequency (Radio Frequency, referred to as RF) module, which is used to communicate with the Internet wirelessly.

[0036] The display device may be, for example, a touch screen type liquid crystal display (LCD) and a touch display (also referred to as a "touch screen" or "touch display screen"). The liquid crystal display may enable the user to interact with the user interface of the mobile terminal. In some embodiments, the mobile terminal has a graphical user interface (GUI), and the user may interact with the GUI by finger contacts and / or gestures on the touch-sensitive surface. The human-computer interaction functions here may optionally include the following interactions: creating web pages, drawing, word processing, making electronic documents, games, video conferencing, instant messaging, sending and receiving emails, call interfaces, playing digital videos, playing digital music and / or web browsing, etc. The executable instructions for executing the above human-computer interaction functions are configured / stored in a computer program product or readable storage medium executable by one or more processors.

[0037] Figure 1 is a flow chart of a vehicle chip testing method according to one embodiment of the present invention. Figure 1 As shown, the method comprises the following steps:

[0038] Step S10, obtaining the function to be tested of the target chip and the circuit design information of the target evaluation board;

[0039] In step S10, the target chip is used to characterize the vehicle CAN transceiver chip to be tested.

[0040] The above circuit design information is used to characterize the PCB design file of the target chip evaluation board. The PCB design file contains all the test points of the target chip, device bit numbers and other key data that can identify the test points of the target chip.

[0041] Step S12, parsing the circuit design information to obtain the port information of the target chip;

[0042] Specifically, the PCB design file of the target chip is imported into the evaluation board analysis instrument. After the PCB design file is successfully imported, the evaluation board analysis instrument analyzes it to obtain the port information of the target chip.

[0043] Step S14, adjusting the port information based on the function to be tested for testing, and generating an initial test result;

[0044] In step S14, the above-mentioned functions to be tested are used to include but are not limited to: the absolute output current of the CAN_H port of the target chip, the absolute output current of the CAN_L port of the target chip, the static receiving input characteristics of the target chip, the undervoltage threshold of the VCC port of the target chip, the undervoltage threshold of the VIO port of the target chip, the input voltage threshold of the TXD port including the VIO port, the input voltage threshold of the TXD port without the VIO port, the input voltage threshold of the STB port including the VIO pin, the input voltage threshold of the STB port without the VIO pin, the over-temperature protection function of the target chip, the high-level output current of the RXD port, the low-level output current of the RXD port, the test transmission explicit timeout, etc.

[0045] Specifically, the evaluation board analysis instrument inputs the parsed port information into the adaptive fixture and adjustable probe group to adjust the connector selection, connection position and direction, and the test point and depth of the probe in advance. After the adaptive fixture and adjustable probe group are adjusted, the CAN transceiver functional performance instrument adjusts the port information according to the function to be tested to test the target chip and generate initial test results. In addition, the initial test results are synchronized to the result analyzer to generate an analysis report.

[0046] Step S16, summarizing the multiple initial test results to obtain a target test result, wherein the target test result is used to determine whether the target chip passes the test.

[0047] Specifically, the initial test results of each function to be tested are summarized to obtain a target test result; and whether the target chip passes the test is determined based on the target test result.

[0048] Based on the above steps S10 to S16, the circuit design information and the function to be tested of the target chip are obtained, the port information of the target chip is obtained by parsing the circuit design information, and the port information is adjusted based on the function to be tested for testing, and initial test results are generated. Finally, multiple initial test results are summarized to obtain target test results, thereby achieving the purpose of accurately and quickly testing the target chip, thereby realizing the technical effect of improving the efficiency and accuracy of the target chip testing method, and further solving the technical problem of low efficiency and accuracy of vehicle chip testing methods in related technologies.

[0049] Optionally, in step S14, adjusting the port information based on the function to be tested for testing, and generating an initial test result includes:

[0050] Step S1411: in response to the function to be tested being the current output function of the target chip, adjusting the first port and the second port of the target chip to be grounded, and the third port to be connected to the first voltage source, wherein the first port is used to send data of the target chip, the second port is used to control the working mode of the target chip, and the third port is used to connect to the high voltage line of the target chip;

[0051] In step S1411, the first port is used to represent the TXD port of the target chip, which is a transmitter data input terminal responsible for transmitting data from the CAN controller to the CAN physical layer driver, and then sending it to the CAN bus.

[0052] The second port is used to represent the STB port of the target chip. When the port is in a pulled-up or suspended state, the target chip is in a standby mode.

[0053] The third port is used to represent the CAN_H port of the target chip, which is a physical layer interface of the CAN bus and is used to receive and send high-level signals on the CAN network.

[0054] Step S1412, in response to the first voltage source providing a voltage according to a preset rule, obtaining current information of the third port;

[0055] In step S1412, the first voltage source is used as an external voltage source of a CAN transceiver functional performance meter.

[0056] Step S1413: generating an initial test result based on the current information.

[0057] Specifically, when the function to be tested is to test the absolute output current of the CAN_H port of the target chip, the adaptive fixture adjusts the power supply input to 5V, adjusts the TXD and STB ports of the evaluation board to connect to GND, and connects the CAN_H port to the external voltage source of the CAN transceiver function performance instrument. When the first voltage source provides voltage according to the preset rule, the current information passing through the CAN_H port is measured; the maximum absolute output current passing through the CAN_H port is determined according to the current information passing through the CAN_H port; the maximum absolute output current of the CAN_H port actually measured is compared to see whether it is greater than or equal to the expected maximum absolute output current of the CAN_H port; if the maximum absolute output current of the CAN_H port actually measured is greater than or equal to the expected maximum absolute output current of the CAN_H port, the initial test result indicates that the function to be tested passes the test; if the maximum absolute output current of the CAN_H port actually measured is less than the expected maximum absolute output current of the CAN_H port, the initial test result indicates that the function to be tested fails the test. For example, the control voltage source starts from -3V, increases to 18V in 1V steps, and measures the maximum absolute output current through CAN_H.

[0058] Specifically, when the function to be tested is to test the absolute output current of the CAN_L port of the target chip, the adaptive fixture adjusts the power input to 5V, adjusts the TXD and STB ports of the evaluation board to connect to GND, and connects the CAN_L port to the external voltage source of the CAN transceiver function performance instrument. When the first voltage source provides voltage according to the preset rule, the current information passing through the CAN_L port is measured; the maximum absolute output current passing through the CAN_L port is determined according to the current information passing through the CAN_L port; the maximum absolute output current of the CAN_L port actually measured is compared to see whether it is greater than or equal to the expected maximum absolute output current of the CAN_L port; if the maximum absolute output current of the CAN_L port actually measured is greater than or equal to the expected maximum absolute output current of the CAN_L port, the initial test result indicates that the function to be tested passes the test; if the maximum absolute output current of the CAN_L port actually measured is less than the expected maximum absolute output current of the CAN_L port, the initial test result indicates that the function to be tested fails the test. For example, the control voltage source starts from -3V, increases to 18V in 1V steps, and measures the maximum absolute output current through CAN_L.

[0059] Based on the above steps S1411 to S1413, in response to the function to be tested being the current output function of the target chip, the first port and the second port of the target chip are adjusted to be grounded, and the third port is connected to the first voltage source; in response to the first voltage source providing voltage according to a preset rule, the current information of the third port is obtained; initial test results are generated based on the current information, and manual operations are reduced and the test process is accelerated by automatically adjusting the ports and measuring the current. In addition, automated testing reduces human errors and ensures the consistency and reliability of the test results.

[0060] Optionally, in step S14, adjusting the port information based on the function to be tested for testing, and generating an initial test result includes:

[0061] Step S1421, in response to the function to be tested being a bus bias function of the target chip, adjusting the first port of the target chip to be suspended, the second port to be grounded, the third port to be connected to the first voltage source, and the fourth port to be connected to the second voltage source, wherein the fourth port is used to connect to the low voltage line of the target chip, and the voltage provided by the second voltage source is higher than the voltage provided by the first voltage source;

[0062] In step S1421, the fourth port is used to represent the CAN_L port of the target chip, which is a physical layer interface of the CAN bus and is used to receive and send low-level signals on the CAN network.

[0063] Step S1422, controlling the second voltage source to increase to a preset voltage threshold with a first preset voltage step length, and obtaining output state information of the target chip;

[0064] Specifically, the second voltage source is controlled to increase to a preset voltage threshold with a first preset voltage step length, and the output state information of the target chip is obtained by monitoring the output state of the RXD port, wherein the main function of the RXD port is to receive data from other CAN nodes. The RXD port works together with the TXD (Transmit Data) port to realize data communication on the CAN bus. For example, the RXD port receives data sent by sensors, actuators or other control units, which may include information such as vehicle speed, engine status, temperature, etc.

[0065] Step S1423: Generate initial test results based on the output status information.

[0066] Specifically, when the function to be tested is to test the static receiving input characteristics of the target chip and whether the bus bias is valid, the adaptive fixture adjusts the power input to 5V, adjusts the TXD and STB ports of the evaluation board to connect to GND, the TXD port is left floating, and the CAN_H port and the CAN_L port are respectively connected to the external voltage source V1 and the voltage source V2, wherein V2 is set higher than V1. Control V2 to increase to the preset voltage threshold with a first preset voltage step, and monitor the output state of the RXD port during this process; generate an initial test result according to the output state of the RXD port; if the output state of the RXD port during the actual test process meets the expected output state of the RXD port, the initial test result indicates that the function to be tested passes the test; if the output state of the RXD port during the actual test process does not meet the expected output state of the RXD port, the initial test result indicates that the function to be tested fails the test.

[0067] For example, set V2=-12V, V1=V2-3V=-15V, increase it to V2+0.5V in steps of 0.1V, and monitor the output status of the RXD port. First, increase V1 by 0.1V to -14.9V and observe the output status of the RXD port. If the RXD port outputs a high level, it means that the voltage at this time is within the valid range. Continue to gradually increase the voltage of V1, increasing it by 0.1V each time, until V2+0.5V (i.e. -11.5V). In this process, it is necessary to record the voltage value of V1 and the corresponding output status of the RXD port in order to analyze the static receiving input characteristics of the CAN bus, including the valid voltage range, the level range of logic 0 and logic 1, etc.

[0068] Based on the above steps S1421 to S1423, in response to the bus bias function of the target chip being the function to be tested, the first port of the target chip is adjusted to be suspended, the second port is grounded, the third port is connected to the first voltage source, and the fourth port is connected to the second voltage source; the second voltage source is controlled to increase to a preset voltage threshold with a first preset voltage step to obtain output status information of the target chip; initial test results are generated based on the output status information, and manual intervention is reduced and the test speed is accelerated through automated voltage control and status monitoring. The voltage step is precisely controlled and the status of the RXD port is monitored, so that the static receive input characteristics of the CAN bus can be more accurately evaluated, and the adaptive fixture can adjust the port configuration according to the requirements of the function to be tested, thereby increasing the flexibility of the test.

[0069] Optionally, in step S14, adjusting the port information based on the function to be tested for testing, and generating an initial test result includes:

[0070] Step S1431, in response to the function to be tested being the undervoltage function of the target chip, adjusting the second port of the target chip to be grounded and the target resistance to be connected between the third port and the fourth port;

[0071] Step S1432, determining the supply voltage information of the target chip based on the common mode voltage of the target chip;

[0072] Step S1433: Generate an initial test result based on the supply voltage information.

[0073] Specifically, when the function to be tested is to test the undervoltage threshold of the VCC port of the target chip, the adaptive fixture adjusts the power input to 5V, adjusts the STB port of the evaluation board to connect to GND, adjusts the external 60Ω resistor between the CAN_H and CAN_L ports, sets the power input to reduce the voltage at 10mV / s from 5V, monitors the common-mode voltage output of the CAN bus, and then reduces the common-mode voltage of the CAN bus from half the power supply voltage to 0V, capturing the power supply voltage of the VCC port of the target chip at this time. If the captured power supply voltage of the target chip meets the expected power supply voltage of the target chip, the initial test result indicates that the function to be tested passes the test; if the captured power supply voltage of the target chip does not meet the expected power supply voltage of the target chip, the initial test result indicates that the function to be tested fails the test.

[0074] Specifically, when the function to be tested is to test the undervoltage threshold of the VIO port of the target chip, the adaptive fixture adjusts the power input to 5V, adjusts the STB port of the evaluation board to connect to GND, adjusts the external 60Ω resistor between the CAN_H and CAN_L ports, sets the power input to reduce the voltage at 10mV / s from 5V, monitors the common-mode voltage output of the CAN bus, and then adjusts the common-mode voltage of the CAN bus from half the power supply voltage to a suspended state, capturing the power supply voltage of the VIO port at this time. If the captured power supply voltage of the VIO port meets the expected power supply voltage of the VIO port, the initial test result indicates that the function to be tested passes the test; if the captured power supply voltage of the VIO port does not meet the expected power supply voltage of the VIO port, the initial test result indicates that the function to be tested fails the test.

[0075] Based on the above steps S1431 to S1433, in response to the undervoltage function of the target chip being tested, the second port of the target chip is grounded, and the target resistance is connected between the third port and the fourth port; the power supply voltage information of the target chip is determined based on the common mode voltage of the target chip; and the initial test results are generated based on the power supply voltage information. The automated test process reduces the possibility of human operation errors, and at the same time ensures the accuracy of the test results by precisely controlling the test parameters. This method is applicable to a variety of different test scenarios and has good versatility and scalability.

[0076] Optionally, in step S14, adjusting the port information based on the function to be tested for testing, and generating an initial test result includes:

[0077] Step S1441, in response to the function to be tested being a voltage function of the target chip, adjusting the second port of the target chip to be grounded and the third port and the fourth port to be connected to a target resistor;

[0078] Step S1442, adjusting the voltage of the first port of the target chip;

[0079] Step S1443, determining an input voltage threshold of the target chip based on the voltage of the first port;

[0080] Step S1444: generating an initial test result based on the input voltage threshold.

[0081] Specifically, when the function to be tested is the input voltage threshold of the TXD port containing the VIO port, the adaptive fixture adjusts the power input to 5V, adjusts the STB port of the evaluation board to connect to GND, adjusts the external 60Ω resistor between the CAN_H and CAN_L ports, and performs high-level input voltage threshold test, low-level input voltage threshold test and pull-up resistor test in turn. The high-level input voltage threshold test is: input different voltage values ​​to the TXD port, and record the lowest voltage threshold for considering the level of the TXD port as a high level. The low-level input voltage threshold test is: input different voltage values ​​to the TXD port, and record the highest voltage threshold for considering the level of the TXD port as a low level. The pull-up resistor test is: disconnect the original 60Ω resistor and connect a known pull-up resistor instead. Test the highest and lowest voltage thresholds of the TXD port again to see if there are any changes. This is to evaluate the impact of the pull-up resistor on the TXD input voltage threshold. All initial test results are recorded. If the highest voltage threshold and the lowest voltage threshold of the TXD port in each test meet the expected highest voltage threshold and the lowest voltage threshold of the TXD port, the initial test result indicates that the function to be tested has passed the test; if the highest voltage threshold and the lowest voltage threshold of the TXD port in each test do not meet the expected highest voltage threshold and the lowest voltage threshold of the TXD port, the initial test result indicates that the function to be tested has failed the test.

[0082] Specifically, when the function to be tested is the input voltage threshold of the TXD port without the VIO port, the adaptive fixture adjusts the power input to 5V, adjusts the STB port of the evaluation board to connect to GND, the TXD port to connect to the external voltage source, adjusts the external 60Ω resistor between the CAN_H and CAN_L ports, and performs high-level input voltage threshold test, low-level input voltage threshold test and pull-up resistor test in turn. The high-level input voltage threshold test is: adjust the external voltage source and gradually increase the voltage of the TXD port until the high-level threshold specified by the CAN protocol is reached. Use an oscilloscope or logic analyzer to observe the output of the CAN transceiver to ensure that the transceiver can correctly identify it as a high level when it is above the threshold. Perform a low-level input voltage threshold test: gradually reduce the voltage of the TXD port until the low-level threshold is reached. Similarly, use an oscilloscope or logic analyzer to observe the output of the CAN transceiver to ensure that the transceiver can correctly identify it as a low level when it is below the threshold. Perform a pull-up resistor test: disconnect the external voltage source and connect the TXD port to the 5V power supply through the internal pull-up resistor. Observe the output of the CAN transceiver to ensure that the TXD port can be stable at a high level without an external voltage source, and record the voltage threshold of the TXD port at this time. Record the voltage value of each test and the response of the CAN transceiver in detail. If the test results of the high-level input voltage threshold test, low-level input voltage threshold test, and pull-up resistor test of the TXD port meet the expected high-level input voltage threshold, low-level input voltage threshold, and voltage threshold of the pull-up resistor test of the TXD port, the initial test result indicates that the function to be tested has passed the test; if the test results of the high-level input voltage threshold test, low-level input voltage threshold test, and pull-up resistor test of the TXD port do not meet the expected high-level input voltage threshold, low-level input voltage threshold, and voltage threshold of the pull-up resistor test of the TXD port, the initial test result indicates that the function to be tested has not passed the test.

[0083] Specifically, when the function to be tested is the input voltage threshold of the STB port containing the VIO pin, the adaptive fixture adjusts the power input to 5V, adjusts the STB port of the evaluation board to connect to the external voltage source, adjusts the TXD port to connect to GND, adjusts the external 60Ω resistor between the CAN_H port and the CAN_L port, and performs high-level input voltage threshold test, low-level input voltage threshold test and pull-up resistor test in turn. The high-level input voltage threshold test is: input different voltage values ​​to the STB port, and record the lowest voltage threshold for treating the level of the STB port as a high level. The low-level input voltage threshold test is: input different voltage values ​​to the STB port, and record the highest voltage threshold for treating the level of the STB port as a low level. The pull-up resistor test is: disconnect the original 60Ω resistor and connect a known pull-up resistor instead. Test the highest and lowest voltage thresholds of the STB port again to see if there are any changes. This is to evaluate the impact of the pull-up resistor on the STB input voltage threshold. Record all initial test results. If the highest voltage threshold and the lowest voltage threshold of the STB port in each test meet the expected highest voltage threshold and the lowest voltage threshold of the STB port, the initial test result indicates that the function to be tested has passed the test; if the highest voltage threshold and the lowest voltage threshold of the STB port in each test do not meet the expected highest voltage threshold and the lowest voltage threshold of the STB port, the initial test result indicates that the function to be tested has failed the test.

[0084] Specifically, when the function to be tested is the input voltage threshold of the STB port without the VIO pin, the adaptive fixture adjusts the power input to 5V, adjusts the STB port of the evaluation board to be connected to the external voltage source, adjusts the TXD port to be suspended, adjusts the external 60Ω resistor between the CAN_H port and the CAN_L port, and performs high-level input voltage threshold test, low-level input voltage threshold test and pull-up resistor test in turn. The high-level input voltage threshold test is: adjust the external voltage source and gradually increase the voltage of the STB port until the high-level threshold specified by the CAN protocol is reached. Use an oscilloscope or logic analyzer to observe the output of the CAN transceiver to ensure that the transceiver can correctly identify it as a high level when it is above the threshold. Perform a low-level input voltage threshold test: gradually reduce the voltage of the STB port until the low-level threshold is reached. Similarly, use an oscilloscope or logic analyzer to observe the output of the CAN transceiver to ensure that the transceiver can correctly identify it as a low level when it is below the threshold. Perform a pull-up resistor test: disconnect the external voltage source and connect the STB port to the 5V power supply through the internal pull-up resistor. Observe the output of the CAN transceiver to ensure that the STB port can be stable at a high level without an external voltage source, and record the voltage threshold of the STB port at this time. Record the voltage value of each test and the response of the CAN transceiver in detail. If the test results of the high-level input voltage threshold test, low-level input voltage threshold test, and pull-up resistor test of the STB port meet the expected high-level input voltage threshold, low-level input voltage threshold, and voltage threshold of the pull-up resistor test of the STB port, the initial test result indicates that the function to be tested has passed the test; if the test results of the high-level input voltage threshold test, low-level input voltage threshold test, and pull-up resistor test of the STB port do not meet the expected high-level input voltage threshold, low-level input voltage threshold, and voltage threshold of the pull-up resistor test of the STB port, the initial test result indicates that the function to be tested has not passed the test.

[0085] Based on the above steps S1441 to S1444, in response to the function to be tested being the voltage function of the target chip, the second port of the target chip is adjusted to be grounded, and the target resistance is connected between the third port and the fourth port; the voltage of the first port of the target chip is adjusted; the input voltage threshold of the target chip is determined based on the voltage of the first port; and initial test results are generated based on the input voltage threshold, which standardizes the overall test process of the target chip and enables automated and full coverage testing of various indicator parameters of the chip, thereby avoiding the problem of insufficient test result coverage caused by targeted manual testing at this stage.

[0086] Optionally, in step S14, adjusting the port information based on the function to be tested for testing, and generating an initial test result includes:

[0087] Step S1451, in response to the function to be tested being the over-temperature protection function of the target chip, adjusting the first port of the target chip to be suspended, the second port to be grounded, and the target resistance to be connected between the third port and the fourth port;

[0088] Step S1452, controlling the temperature increase of the target chip based on a preset temperature step;

[0089] Step S1453, in response to the difference between the first level and the second level reaching a preset threshold, obtaining current temperature information, wherein the first level is used to represent the output level of the third port, and the second level is used to represent the output level of the fourth port;

[0090] Step S1454, generating initial test results based on current temperature information.

[0091] Specifically, when the function to be tested is the over-temperature protection function of the target chip, the temperature and humidity in the CAN transceiver functional performance comprehensive tester are adjusted to 23℃±5℃ and 30~60% respectively. The adaptive fixture adjusts the power supply input to 5V and monitors the link current, adjusts the TXD port of the evaluation board to be suspended, the STB port to be connected to GND, and the CAN_H and CAN_L ports to be connected with an external 60Ω resistor. Increase the test environment temperature in steps of 1℃ / min. During this process, it is necessary to monitor the level change of the CAN bus. When the voltage difference between the CAN_H port and the CAN_L port reaches the preset threshold, the temperature information of the circuit in the process is obtained. For example, when the voltage difference between the CAN_H port and the CAN_L port increases from 0V to 2.5V, the temperature information of the circuit in the process is obtained. If the temperature information of the circuit in the process meets the temperature information of the expected circuit, the initial test result indicates that the function to be tested passes the test; if the temperature information of the circuit in the process does not meet the temperature information of the expected circuit, the initial test result indicates that the function to be tested fails the test.

[0092] Based on the above steps S1451 to S1453, in response to the function to be tested being the over-temperature protection function of the target chip, the first port of the target chip is adjusted to be suspended, the second port is grounded, and the target resistance is connected between the third port and the fourth port; the temperature increase of the target chip is controlled based on a preset temperature step; in response to the difference between the first level and the second level reaching a preset threshold, the current temperature information is obtained, wherein the first level is used to represent the output level of the third port, and the second level is used to represent the output level of the fourth port; initial test results are generated based on the current temperature information, and a test module that can perform adaptive adjustments according to differences in evaluation boards of different chip manufacturers, differences in PCB design, differences in connector selection, and different test point placement, can avoid test result errors caused by human factors and environmental factors to the greatest extent and improve test efficiency.

[0093] Optionally, the vehicle chip testing method further includes:

[0094] Step S17, controlling the target chip to be in a preset environmental condition, and,

[0095] Step S18, controlling the power supply voltage of the target chip to be a preset voltage.

[0096] Specifically, adjust the temperature and humidity values ​​in the CAN transceiver functional performance comprehensive tester to control the target chip to be in the preset conditions. For example, the temperature is 23℃±5℃ and the humidity is 30~60%. In addition, the adaptive fixture adjusts the power input to 5V.

[0097] Based on the above steps S17 to S18, the target chip is controlled to be in a preset environmental condition, and the power supply voltage of the target chip is controlled to be a preset voltage, and the overall chip test process is standardized, thereby improving the accuracy of the target chip test.

[0098] Optionally, in step S16, a plurality of initial test results are summarized to obtain a target test result including:

[0099] Step S161, summarizing multiple initial test results to obtain a summary result;

[0100] Step S162 , in response to the summary result indicating that the to-be-tested functions corresponding to the plurality of initial test results all pass the test, determining the target test result as the target chip passing the test.

[0101] Specifically, the initial test results corresponding to each to-be-tested function are summarized to obtain a summary result. When the summary result indicates that the to-be-tested functions corresponding to the multiple initial test results all pass the test, the target test result is determined to be that the target chip passes the test.

[0102] Based on the above steps S161 to S162, multiple initial test results are summarized to obtain a summary result; in response to the summary result indicating that the functions to be tested corresponding to the multiple initial test results have all passed the test, the target test result is determined to be that the target chip has passed the test, the initial test results are automatically analyzed, a standardized test report is generated, and an evaluation result is attached, so that chip evaluation can be carried out efficiently and better cope with the numerous brands and product batch testing in the future.

[0103] Specifically, when the function to be tested is the high-level output current of the RXD port, the adaptive fixture adjusts the power supply input to 5V, adjusts the STB port of the evaluation board to connect to GND, adjusts the TXD port to be suspended, adjusts the external 60Ω resistor between the CAN_H port and the CAN_L port, adjusts the RXD port of the evaluation board to connect to the external voltage source and be able to monitor the link current, sets the voltage value of the external voltage source of the RXD port to be lower than the power supply voltage, and obtains the output current of the STB port. For example, the voltage value of the external voltage source of the RXD port is set to the power supply voltage -0.4V, and the output current of the STB port is obtained. If the output current of the STB port in the process meets the expected output current of the STB port, the initial test result indicates that the function to be tested passes the test; if the output current of the STB port in the process does not meet the expected output current of the STB port, the initial test result indicates that the function to be tested fails the test.

[0104] Specifically, when the function to be tested is the low-level output current of the RXD port, the adaptive fixture adjusts the power input to 5V, adjusts the STB port of the evaluation board to connect to GND, adjusts the TXD port to be suspended, adjusts the CAN_H port to connect to the power supply voltage, adjusts the RXD port of the evaluation board to connect to the external voltage source and can monitor the link current, sets the voltage value of the external voltage source of the RXD port to a preset voltage value, and obtains the output current of the STB port. For example, the voltage value of the external voltage source of the RXD port is set to 0.4V, and the output current of the STB port is obtained. If the output current of the STB port in the process meets the expected output current of the STB port, the initial test result indicates that the function to be tested passes the test; if the output current of the STB port in the process does not meet the expected output current of the STB port, the initial test result indicates that the function to be tested fails the test.

[0105] Specifically, when the function to be tested is to test the transmission dominant timeout, the adaptive fixture adjusts the power input to 5V, adjusts the STB port of the evaluation board to connect to GND, the TXD port to connect to the signal generator, and the CAN_L port to connect to the internal and external voltage source of the instrument, and adjusts the external 60Ω resistor between the CAN_H and CAN_L ports, which helps to simulate the characteristic impedance of the CAN bus. The signal generator is controlled to input a square wave with an amplitude of 5V and a period of 20ms to the TXD port to capture the dominant timeout tdom. In the square wave sent by the signal generator, observe whether the evaluation board can correctly detect the dominant level and continue to send signals within the tdom time. If the evaluation board can correctly handle the dominant timeout, it will be able to continue to send the remaining data or remote frames after the tdom time.

[0106] Figure 2 is a flow chart of another vehicle chip testing method according to one embodiment of the present invention. Figure 2As shown, the method comprises the following steps:

[0107] Step S201, obtaining circuit design information and functions to be tested of a target chip;

[0108] Step S202, parsing the circuit design information to obtain the port information of the target chip;

[0109] Step S203, adjusting the port information based on the function to be tested to perform the test and generating an initial test result;

[0110] Step S204, summarizing multiple initial test results to obtain a summary result;

[0111] Step S205 , in response to the summary result indicating that the to-be-tested functions corresponding to the plurality of initial test results all pass the test, determining the target test result as the target chip passing the test.

[0112] Based on the above steps S201 to S205, the circuit design information and the function to be tested of the target chip are obtained, the port information of the target chip is obtained by parsing the circuit design information, and the port information is adjusted based on the function to be tested for testing, and initial test results are generated. Finally, multiple initial test results are summarized to obtain target test results, thereby achieving the purpose of accurately and quickly testing the target chip, thereby realizing the technical effect of improving the efficiency and accuracy of the target chip testing method, and further solving the technical problem of low efficiency and accuracy of vehicle chip testing methods in related technologies.

[0113] Figure 3 is a schematic diagram of a vehicle chip testing method according to one embodiment of the present invention, such as Figure 3 As shown, the CAN transceiver chip test system consists of the following parts: an evaluation board for the chip to be tested is imported into an analyzer, an adaptive fixture, an adjustable probe set, a CAN transceiver functional performance comprehensive tester, and a test result analyzer. The vehicle chip test method is applied to the system, and the method includes:

[0114] 1. Import the PCB design file of the CAN chip evaluation board to be tested into the evaluation board analysis instrument. The PCB design file must contain all test points, device bit numbers and other key data for identifying and locating the test points, and the PCB file must be parseable and recognized by the instrument;

[0115] 2. After the evaluation board PCB file is successfully imported, the analyzer performs analysis and inputs the results into the adaptive fixture and adjustable probe set to adjust the connector selection, connection position and direction, and the test point and depth of the probe in advance;

[0116] 3. Set the evaluation board working conditions and use the CAN transceiver function performance comprehensive tester to perform the CAN transceiver chip function and performance comprehensive test process:

[0117] (1) Adjust the temperature and humidity in the instrument to 23℃±5℃ and 30~60% respectively;

[0118] (2) Test the absolute output current of the CAN_H port;

[0119] (3) Test the absolute output current of the CAN_L port;

[0120] (4) Test transmission explicit timeout;

[0121] (5) Test the static receiving input characteristics, and the bus bias is valid;

[0122] (6) Testing static receiving input characteristics and bus bias is invalid;

[0123] (7) Test the undervoltage threshold of the VCC port;

[0124] (8) Test the undervoltage threshold of the VIO port;

[0125] (9) Test the input voltage threshold of the TXD port when the VIO port is included;

[0126] (10) Test the input voltage threshold of the TXD port when the VIO port is not included;

[0127] (11) Test the input voltage threshold of the STB port when including the VIO port;

[0128] (12) Test the input voltage threshold of the STB port when the VIO port is not included;

[0129] (13) Test the high level output current of the RXD port;

[0130] (4) Test the low-level output current of the RXD port;

[0131] (15) Increase the test environment temperature at 1°C / min to test the over-temperature protection function and threshold;

[0132] (16) Restore the test environment temperature to room temperature and complete the parameter index test.

[0133] 4. Synchronize the test results to the result analyzer to complete the analysis report generation.

[0134] Based on the above steps, the test module can be adaptively adjusted according to the differences in evaluation boards of different chip manufacturers, PCB design differences, connector selection differences, and test point placement differences, so as to avoid test result errors caused by human factors and environmental factors to the greatest extent and improve test efficiency; standardize the overall chip test process so that all chip parameters can be automatically and fully tested, avoiding the problem of insufficient test result coverage caused by targeted manual testing at this stage; automatically analyze the initial test results, generate standardized test reports, and attach evaluation results, so that chip evaluation can be carried out efficiently and better cope with the numerous brands and product batch testing in the future.

[0135] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for enabling a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present invention.

[0136] In an embodiment of the present invention, a vehicle chip testing device is also provided, which is used to implement the above-mentioned embodiments and preferred implementation modes, and will not be repeated hereafter. As used below, the term "module" can implement a combination of software and / or hardware for a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0137] Figure 4 FIG. 1 is a structural block diagram of a vehicle chip testing device according to one embodiment of the present invention. Figure 4 As shown, the device comprises:

[0138] An acquisition module 401 is used to acquire circuit design information and a function to be tested of a target chip, wherein the target chip is used to represent a chip to be tested;

[0139] The parsing module 402 is used to parse the circuit design information to obtain the port information of the target chip;

[0140] A test module 403, configured to adjust port information based on the function to be tested for testing and generate an initial test result;

[0141] The determination module 404 is used to summarize the multiple initial test results to obtain a target test result, wherein the target test result is used to determine whether the target chip passes the test.

[0142] Optionally, the test module 403 is also used to adjust the first port and the second port of the target chip to be grounded and the third port to be connected to the first voltage source in response to the function to be tested being the current output function of the target chip, wherein the first port is used to send data of the target chip, the second port is used to control the working mode of the target chip, and the third port is used to connect the high voltage line of the target chip; the acquisition module 401 is also used to obtain current information of the third port in response to the first voltage source providing voltage according to preset rules; the vehicle chip testing device also includes a generation module 405, which is used to generate initial test results based on current information.

[0143] Optionally, the test module 403 is also used to: in response to the function to be tested being a bus bias function of the target chip, adjust the first port of the target chip to be suspended, the second port to be grounded, the third port to be connected to the first voltage source, and the fourth port to be connected to the second voltage source, wherein the fourth port is used to connect to the low voltage line of the target chip, and the voltage provided by the second voltage source is higher than the voltage provided by the first voltage source; control the second voltage source to increase to a preset voltage threshold with a first preset voltage step size to obtain output status information of the target chip; the generation module 405 is also used to generate initial test results based on the output status information.

[0144] Optionally, the test module 403 is also used to adjust the target resistance connected between the second port of the target chip and the third port and the fourth port in response to the function to be tested being the undervoltage function of the target chip; the determination module 404 is also used to determine the power supply voltage information of the target chip based on the common mode voltage of the target chip; the generation module 405 is also used to generate initial test results based on the power supply voltage information.

[0145] Optionally, the test module 403 is also used to: in response to the function to be tested being a voltage function of the target chip, adjust the second port of the target chip to ground, and connect the target resistance between the third port and the fourth port; adjust the voltage of the first port of the target chip; the determination module 404 is also used to determine the input voltage threshold of the target chip based on the voltage of the third port; the generation module 405 is also used to generate an initial test result based on the input voltage threshold.

[0146] Optionally, the test module 403 is also used to: in response to the function to be tested being the over-temperature protection function of the target chip, adjust the first port of the target chip to be suspended, the second port to be grounded, and the target resistance to be connected between the third port and the fourth port; control the temperature increase of the target chip based on a preset temperature step; the acquisition module 401 is also used to obtain current temperature information in response to the difference between the first level and the second level reaching a preset threshold, wherein the first level is used to represent the output level of the third port, and the second level is used to represent the output level of the fourth port; the generation module 405 is also used to generate initial test results based on the current temperature information.

[0147] Optionally, the test module 403 is further used to: control the target chip to be in a preset environmental condition, and control the power supply voltage of the target chip to be a preset voltage.

[0148] Optionally, the determination module 404 is further used to: summarize the multiple initial test results to obtain a summary result; in response to the summary result indicating that the to-be-tested functions corresponding to the multiple initial test results have all passed the test, determine the target test result to be that the target chip has passed the test.

[0149] It should be noted that the above modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0150] According to one embodiment of the present invention, there is also provided an electronic device, comprising: a memory storing an executable program; and a processor for running the program, wherein the above-mentioned vehicle chip testing method is executed when the program is running.

[0151] Optionally, in this embodiment, the processor may be configured to perform the following steps through a computer program:

[0152] Step S1, obtaining circuit design information and functions to be tested of the target chip;

[0153] Step S2, parsing the circuit design information to obtain the port information of the target chip;

[0154] Step S3, adjusting the port information based on the function to be tested for testing, and generating an initial test result;

[0155] Step S4, summarizing the multiple initial test results to obtain a target test result, wherein the target test result is used to determine whether the target chip passes the test.

[0156] According to one embodiment of the present invention, a non-volatile storage medium is further provided, in which a computer program is stored, wherein the computer program is configured to execute the above-mentioned vehicle chip testing method when running.

[0157] Optionally, in this embodiment, the storage medium may be configured to store a computer program for performing the following steps:

[0158] Step S1, obtaining circuit design information and functions to be tested of the target chip;

[0159] Step S2, parsing the circuit design information to obtain the port information of the target chip;

[0160] Step S3, adjusting the port information based on the function to be tested for testing, and generating an initial test result;

[0161] Step S4, summarizing the multiple initial test results to obtain a target test result, wherein the target test result is used to determine whether the target chip passes the test.

[0162] Optionally, in this embodiment, the above-mentioned storage medium may include but is not limited to: a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and other media that can store computer programs.

[0163] According to one embodiment of the present invention, a computer program product is also provided, including a computer program, and the computer program implements the above-mentioned vehicle chip testing method when executed by a processor.

[0164] Optionally, in this embodiment, the computer program product may be configured as a computer program for executing the following steps:

[0165] Step S1, obtaining circuit design information and functions to be tested of the target chip;

[0166] Step S2, parsing the circuit design information to obtain the port information of the target chip;

[0167] Step S3, adjusting the port information based on the function to be tested for testing, and generating an initial test result;

[0168] Step S4, summarizing the multiple initial test results to obtain a target test result, wherein the target test result is used to determine whether the target chip passes the test.

[0169] Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiments and optional implementation modes, and this embodiment will not be described in detail here.

[0170] The serial numbers of the above embodiments of the present invention are only for description and do not represent the advantages or disadvantages of the embodiments.

[0171] In the above embodiments of the present invention, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0172] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. Among them, the device embodiments described above are only schematic. For example, the division of the units can be a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of units or modules, which can be electrical or other forms.

[0173] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0174] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0175] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, server or network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, disk or optical disk, etc. Various media that can store program codes.

[0176] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A vehicle chip testing method, characterized in that: include: Obtain the functions to be tested of the target chip and the circuit design information of the target evaluation board; Parsing the circuit design information to obtain port information of the target chip; Adjust the port information based on the function to be tested to perform the test and generate an initial test result; The multiple initial test results are aggregated to obtain a target test result, wherein the target test result is used to determine whether the target chip passes the test.

2. The vehicle chip testing method according to claim 1, characterized in that: Adjusting the port information based on the function to be tested to perform the test, and generating an initial test result includes: In response to the function to be tested being the current output function of the target chip, adjusting the first port and the second port of the target chip to be grounded, and connecting the third port to a first voltage source, wherein the first port is used to send data of the target chip, the second port is used to control the working mode of the target chip, and the third port is used to connect to a high voltage line of the target chip; In response to the first voltage source providing a voltage according to a preset rule, acquiring current information of the third port; The initial test result is generated based on the current information.

3. The vehicle chip testing method according to claim 1, characterized in that: Adjusting the port information based on the function to be tested to perform the test, and generating an initial test result includes: In response to the function to be tested being a bus bias function of the target chip, adjusting the first port of the target chip to be suspended, the second port to be grounded, the third port to be connected to a first voltage source, and the fourth port to be connected to a second voltage source, wherein the fourth port is used to connect a low voltage line of the target chip, and the voltage provided by the second voltage source is higher than the voltage provided by the first voltage source; Controlling the second voltage source to increase the voltage to a preset voltage threshold with a first preset voltage step length to obtain output state information of the target chip; The initial test result is generated based on the output status information.

4. The vehicle chip testing method according to claim 1, characterized in that: Adjusting the port information based on the function to be tested to perform the test, and generating an initial test result includes: In response to the function to be tested being the undervoltage function of the target chip, adjusting the second port of the target chip to be grounded and the target resistance to be connected between the third port and the fourth port; Determining supply voltage information of the target chip based on the common mode voltage of the target chip; The initial test result is generated based on the supply voltage information.

5. The vehicle chip testing method according to claim 1, characterized in that: Adjusting the port information based on the function to be tested to perform the test, and generating an initial test result includes: In response to the function to be tested being a voltage function of the target chip, adjusting the second port of the target chip to be grounded and the target resistance to be connected between the third port and the fourth port; Adjusting the voltage of the first port of the target chip; Determine an input voltage threshold of the target chip based on the voltage of the first port; The initial test result is generated based on the input voltage threshold.

6. The vehicle chip testing method according to claim 1, characterized in that: Adjusting the port information based on the function to be tested to perform the test, generating an initial test result includes: In response to the function to be tested being an over-temperature protection function of the target chip, adjusting the first port of the target chip to be suspended, the second port to be grounded, and the target resistance to be connected between the third port and the fourth port; controlling the temperature increase of the target chip based on a preset temperature step; In response to a difference between a first level and a second level reaching a preset threshold, obtaining current temperature information, wherein the first level is used to represent an output level of the third port, and the second level is used to represent an output level of the fourth port; The initial test result is generated based on the current temperature information.

7. The vehicle chip testing method according to claim 1, characterized in that: The method further comprises: controlling the target chip to be in a preset environmental condition, and, The power supply voltage of the target chip is controlled to be a preset voltage.

8. The vehicle chip testing method according to claim 1, characterized in that: Summarizing the multiple initial test results to obtain the target test results includes: Aggregating the multiple initial test results to obtain an aggregated result; In response to the summary result indicating that the to-be-tested functions corresponding to the plurality of initial test results all pass the test, it is determined that the target test result is that the target chip passes the test.

9. A vehicle chip testing device, characterized in that: include: An acquisition module is used to acquire the function to be tested of the target chip and the circuit design information of the target evaluation board; A parsing module, used for parsing the circuit design information to obtain the port information of the target chip; A testing module, configured to adjust the port information based on the function to be tested to perform a test and generate an initial test result; The determination module is used to summarize the multiple initial test results to obtain a target test result, wherein the target test result is used to determine whether the target chip passes the test.

10. An electronic device, characterized in that: include: A memory storing an executable program; A processor is used to run the program, wherein the vehicle chip testing method described in any one of claims 1 to 8 is executed when the program is run.

11. A non-volatile storage medium, characterized in that: The storage medium stores a computer program, wherein the computer program is configured to execute the vehicle chip testing method described in any one of claims 1 to 8 when run.

12. A computer program product, characterized in that It comprises a computer program, which implements the vehicle chip testing method according to any one of claims 1 to 8 when being executed by a processor.

Citation Information

Patent Citations

  • Method and device for detecting functional performance of integrated chip based on model identification

    CN103308846A

  • Automatic switching circuit and device thereof

    CN114978138A

  • Chip structure and chip testing method

    CN115148707A

  • Chip packaging defect detection method and device, electronic equipment and storage medium

    CN117238359A

  • Chip testing method, electronic equipment and storage medium

    CN117289055A