eMMC Testing Method, System, Storage Medium and Device Based on Overvoltage and Overcurrent Protection

Abstract

The present invention discloses an eMMC testing method, system, storage medium and device based on overvoltage and overcurrent protection, including: controlling a voltage converter to sequentially output preset current values and voltage values to perform idle voltage and current tests on a device under test; determining whether the idle voltage and current tests are completed, and if so, performing read / write process performance, voltage and current tests on the device under test; during the idle voltage and current tests and the read / write process performance, voltage and current tests, controlling a voltage and current monitoring module to monitor the test current value and test voltage value of the device under test, and if the test current value is greater than the overcurrent threshold or the test voltage value is greater than the overvoltage threshold, generating an interrupt signal; controlling a load switch to receive the interrupt signal, cut off the power supply to the device under test, and activate a retry mechanism. It can cover the influence of other influencing factors in the production process on the device under test, and detect the voltage and current of the device under test during the test, so as to achieve overvoltage and overcurrent protection for the device under test.

Description

Technical Field

[0001] The present invention relates to the technical field of memory R & D and testing, and particularly to an eMMC testing method, system, storage medium and device based on overvoltage and overcurrent protection. Background Art

[0002] eMMC (Embedded Multi Media Card) is widely used in various electronic products such as smart phones, tablet computers, and Internet of Things devices as an important storage solution. With the continuous progress of technology and the increasing market demand, manufacturers have put forward higher requirements for the performance, reliability and cost control of eMMC. Among them, yield testing is an important means to evaluate the manufacturing process and product quality. By conducting yield testing, potential problems can be discovered, thereby improving the reliability of the product.

[0003] However, firstly, the existing tests for eMMC generally only include related performance tests such as reading and writing, without considering other influencing factors in the production process, resulting in the electrical parameters of eMMC not meeting expectations and unable to effectively test the problematic eMMC. Secondly, during the eMMC testing process, due to equipment damage or misoperation, error detection will occur, misjudging normal eMMC as defective products and causing damage to eMMC. Therefore, it is also necessary to discover and eliminate the influence of equipment and protect eMMC devices. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide an eMMC testing method, system, storage medium and device based on overvoltage and overcurrent protection to ensure the comprehensiveness and safety of testing.

[0005] To solve the above technical problem, the technical solution adopted by the present invention is as follows:

[0006] An eMMC testing method based on overvoltage and overcurrent protection includes:

[0007] Controlling a voltage converter to sequentially output preset current values and voltage values to perform idle voltage and current tests on a device under test;

[0008] Judging whether the idle voltage and current tests are completed. If so, performing read / write process performance, voltage and current tests on the device under test;

[0009] During the idle voltage and current tests and the read / write process performance, voltage and current tests, controlling a voltage and current monitoring module to monitor the test current value and test voltage value of the device under test. If the test current value is greater than an overcurrent threshold or the test voltage value is greater than an overvoltage threshold, generating an interrupt signal;

[0010] The control load switch receives the interruption signal, cuts off the power supply to the device under test, and activates the retry mechanism.

[0011] To solve the above technical problems, another technical solution adopted by the present invention is:

[0012] An eMMC test system based on overvoltage and overcurrent protection, the system is used to implement the eMMC test method based on overvoltage and overcurrent protection as described above, the system includes a main control device, a power supply device, and a test device; the main control device is connected to at least one of the power supply devices; the power supply device is connected to at least one of the test devices;

[0013] The test device includes a central controller, a voltage converter, a voltage and current monitoring module, a load switch, and a power management system chip; the central controller is respectively connected to the voltage converter, the voltage and current monitoring module, the load switch, and the power management system chip; the power management system chip is connected to the voltage converter; the voltage converter is connected to the device under test through the load switch; the voltage and current monitoring module is used to monitor the voltage and current of the device under test;

[0014] The power supply device includes a controller, and at least one power supply switch connected to the controller; the other end of the power supply switch is connected to a selector, and the other end of the selector is connected to the power supply input end of the test device.

[0015] To solve the above technical problems, another technical solution adopted by the present invention is:

[0016] A computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, it implements each step in the above-mentioned eMMC test method based on overvoltage and overcurrent protection.

[0017] To solve the above technical problems, another technical solution adopted by the present invention is:

[0018] An electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor, and when the processor executes the computer program, it implements each step in the above-mentioned eMMC test method based on overvoltage and overcurrent protection.

[0019] The beneficial effects of the present invention are as follows: By controlling the voltage converter, voltage and current monitoring module, and load switch respectively through the central controller, the execution of idle voltage and current tests and performance voltage and current tests during the reading and writing process on the device under test can be completed, covering the influence of other influencing factors in the production process on the device under test; moreover, during the test process, the voltage and current of the device under test are also detected. When the voltage or current exceeds the overvoltage or overcurrent threshold, the power supply to the device under test is interrupted to achieve overvoltage and overcurrent protection for the device under test; at the same time, after overvoltage and overcurrent occur, the retry mechanism is enabled to eliminate false detections caused by device damage or misoperation, such as misjudging a normal eMMC as a defective product; the customized eMMC reading and writing method ensures the reliability of the test. Description of the Drawings

[0020] Figure 1 It is a flowchart of the steps of the eMMC test method based on overvoltage and overcurrent protection in the embodiment of the present invention;

[0021] Figure 2 It is a block diagram of the test system of the eMMC test system based on overvoltage and overcurrent protection in the embodiment of the present invention;

[0022] Figure 3 It is a block diagram of the power supply device of the eMMC test system based on overvoltage and overcurrent protection in the embodiment of the present invention;

[0023] Figure 4 It is a block diagram of the test device of the eMMC test system based on overvoltage and overcurrent protection in the embodiment of the present invention;

[0024] Figure 5 It is a schematic structural diagram of the electronic device in the embodiment of the present invention;

[0025] Label Description:

[0026] 1. Master control device;

[0027] 2. Power supply device; 21. Controller; 22. Power supply switch; 23. Selector; 24. Power supply module; 25. Storage module; 26. Network module;

[0028] 3. Test device; 31. Central controller; 32. Voltage converter; 33. Voltage and current monitoring module; 34. Load switch; 35. Power management system chip; 36. USF storage device; 37. USB device; 38. Serial port device; 39. MSDC controller. Detailed Embodiment

[0029] To describe the technical content, achieved objectives, and effects of the present invention in detail, the following is described in conjunction with the embodiments and accompanied by the drawings.

[0030] During the production of eMMC, it may be affected by various factors, such as material quality, production process, equipment status, etc. These factors may all lead to the production of defective products. However, the existing eMMC testing process does not consider the influence of the above factors on eMMC, resulting in the electrical parameters of eMMC not meeting the expectations. At the same time, during the eMMC testing process, due to equipment damage or incorrect operation, error detection will occur, misjudging normal eMMC as defective products and causing damage to eMMC.

[0031] In view of the above problems, the present invention provides an eMMC testing method, system, storage medium and device based on overvoltage and overcurrent protection. Specifically:

[0032] An eMMC testing method based on overvoltage and overcurrent protection includes:

[0033] Controlling the voltage converter to sequentially output preset current values and voltage values to perform idle voltage and current tests on the device under test;

[0034] Judging whether the idle voltage and current tests are completed. If so, perform read / write process performance, voltage, and current tests on the device under test;

[0035] During the idle voltage and current tests and the read / write process performance, voltage, and current tests, controlling the voltage and current monitoring module to monitor the test current value and test voltage value of the device under test. If the test current value is greater than the overcurrent threshold or the test voltage value is greater than the overvoltage threshold, generate an interrupt signal;

[0036] Controlling the load switch to receive the interrupt signal, cut off the power supply to the device under test, and activate the retry mechanism.

[0037] As can be seen from the above description, the beneficial effects of the present invention are as follows: By controlling the voltage converter, voltage and current monitoring module, and load switch respectively through the central controller, the idle voltage, current tests and the read / write process performance, voltage, and current tests on the device under test are completed, which can cover the influence of other factors in the production process on the device under test; moreover, during the testing process, the voltage and current of the device under test are also detected. When the voltage or current exceeds the overvoltage or overcurrent threshold, the power supply to the device under test is interrupted to achieve overvoltage and overcurrent protection for the device under test; at the same time, the retry mechanism is activated after overvoltage and overcurrent occur to eliminate the misjudgment of normal eMMC as defective products due to equipment damage or incorrect operation; the customized eMMC read / write method ensures the reliability of the test.

[0038] Further, the step of controlling the voltage converter to sequentially output preset current values and voltage values to perform idle voltage and current tests on the device under test includes:

[0039] Power the voltage converter through a power supply device;

[0040] The power supply device includes a power supply module, a network module, a controller, a power supply switch, and a selector;

[0041] The power supply module is respectively connected to the network module, the controller, the power supply switch, and the selector for power supply;

[0042] The network module is used to receive a power supply instruction and send it to the controller;

[0043] The controller controls the power supply switch to switch between an on state and an off state according to the power supply instruction;

[0044] The input end of the selector is respectively connected to the power supply module and the power supply switch, and based on the power supply instruction, it outputs a fixed voltage based on the power supply module, or an adjustable voltage based on the power supply switch;

[0045] The output end of the selector is used to power the voltage converter.

[0046] It can be seen from the above description that in the power supply device, after receiving the power supply instruction through the network module, it is sent to the controller, and the controller controls the opening or closing of the power supply switch according to the power supply instruction to achieve adjustable voltage output; at the same time, the selector is respectively connected to the power supply module and the power supply switch, so as to supply power by switching the power supply module or the power supply switch, realizing fixed voltage output or adjustable voltage output.

[0047] Furthermore, it further includes:

[0048] Control the voltage converter through a test device;

[0049] The test device includes a central controller, a voltage converter, a voltage and current monitoring module, a load switch, and an MSDC controller;

[0050] The central controller is used to receive a test instruction to perform idle voltage and current tests on the device under test, or read and write process performance, voltage, and current tests;

[0051] The central controller controls the voltage converter to output a preset current value and voltage value according to the test instruction; and the central controller performs read and write process performance tests on the device under test through the MSDC controller, and obtains the voltage value and current value of the device under test;

[0052] The input end of the load switch is connected to the output end of the voltage converter, and the output end of the load switch provides voltage for the device under test;

[0053] The output voltage of the voltage converter is used as the input of the voltage and current monitoring module;

[0054] The central controller controls the voltage and current monitoring module to monitor voltage and current, and reads the current voltage value and current value through the voltage and current monitoring module.

[0055] As can be seen from the above description, in the test device, after the central controller receives the test instruction, it controls the voltage converter to output a preset current value and voltage value to the load switch, and then the load switch supplies voltage to the device under test. At the same time, the MSDC controller performs read and write process performance tests on the device under test, and obtains the voltage value and current value of the device under test, so as to realize the test of the device under test and record the corresponding voltage value and current value.

[0056] Further, the test device further includes a power management system chip, and includes two voltage converters, two load switches, and two voltage and current monitoring modules. Each voltage converter is respectively connected to a load switch and a voltage and current monitoring module in a corresponding manner;

[0057] The central controller controls the power management system chip to output a first preset voltage and a second preset voltage to supply power to different voltage converters respectively; and controls one voltage converter to perform voltage adjustment based on the first preset voltage, and controls the other voltage converter to perform voltage adjustment based on the second preset voltage;

[0058] The central controller respectively controls the two voltage and current monitoring modules to read the current voltage value and current value.

[0059] As can be seen from the above description, by setting two voltage converters, two load switches, and two voltage and current monitoring modules, and the central controller controls the power management system chip to supply power to the voltage converters, and controls different voltage converters to perform voltage adjustment based on different preset voltages, the test can be carried out in different voltage ranges.

[0060] Further, the idle voltage and current test includes:

[0061] Control the central controller to run the idle voltage and current test;

[0062] Control the voltage and current monitoring module to record the test current value and test voltage value corresponding to each target current value and target voltage value, and judge whether the preset waiting time is reached. If so, control the voltage converter to sequentially adjust the preset current value and voltage value.

[0063] As described above, after ensuring that the device under test enters the idle state, the idle voltage and current of the device under test are tested by controlling the voltage converter to sequentially adjust the current value and the voltage value, which can effectively detect the response of the device under test to different input voltages and currents in the idle state, thereby reflecting the changes in the electrical parameters of the device under test during the production process and covering the influence of other influencing factors on the device under test during the production process.

[0064] Further, the read / write process performance, voltage, and current tests include:

[0065] Execute a test loop for a first preset number of times. When executing each test loop, sequentially execute a second preset number of sequential reads, sequential writes, random reads, and random writes, and obtain average test data based on the second preset number and the test data after executing the second preset number of times.

[0066] Determine whether the number of loops reaches the first preset number. If so, obtain all the average test data, and obtain comprehensive average test data based on the first preset number and the test data after executing the second preset number of times.

[0067] As described above, in each loop test, sequentially execute a second preset number of sequential reads, sequential writes, random reads, and random writes to obtain the average test data corresponding to sequential reads, sequential writes, random reads, and random writes. Then, based on the results of the first preset number of loop tests, obtain the comprehensive average test data corresponding to sequential reads, sequential writes, random reads, and random writes, thereby effectively reflecting the performance status of the device under test in different read / write modes.

[0068] Further, executing random reads and random writes includes:

[0069] The test addresses for executing random reads and random writes are obtained using the following steps:

[0070] Obtain the number of operations based on the preset data volume and the data volume per operation;

[0071] Determine the offset based on the preset data volume and the current number of operations;

[0072] Execute a random calculation formula to calculate random logical block addresses, obtaining the corresponding number of random logical block addresses for the number of operations;

[0073] The random calculation formula includes: random_lba[i] = (random(0, 512M / 4KB / 8 / 4) * 8 * 4 + random(0, 4) * 4 + random(0, 8)) * 8 + offset;

[0074] Among them, random(x, y) represents obtaining a random number from x to y - 1 using linear congruence. The formula for obtaining a random number using the linear congruence algorithm is: Xn+1=(a*Xn + c) mod m; Xn is the current random number, a is the multiplier, c is the increment, and m is the modulus; m is the largest power of 2 less than 512M / 4KB / 8 / 4; a is (seed%m*4 + 1)%m; when seed is even, c is (seed - 1)%m; when seed is odd, c is seed%m; Xn is seed%m; offset is the offset.

[0075] As can be seen from the above description, randomly obtaining the logical block address to be tested in the above manner can ensure that the logical block addresses used for testing fall on different planes, improving concurrency, and thus ensuring the reliability of testing random read and random write performance.

[0076] Further, after cutting off the power supply to the device under test, the following steps are also included:

[0077] Record the number of overvoltage and overcurrent occurrences of the device under test in the memory, and determine whether the number of overvoltage and overcurrent occurrences is greater than the number threshold. If so, record the overvoltage and overcurrent information in the memory and report the overvoltage and overcurrent information;

[0078] If not, after waiting for a preset time, control the load switch to turn on the power supply to the device under test and re - execute the idle voltage, current test, and read - write process performance, voltage, and current tests.

[0079] As can be seen from the above description, by recording the number of overvoltage and overcurrent occurrences of the device under test and restoring the device under test after overvoltage and overcurrent to perform tests again; at the same time, when the number of overvoltage and overcurrent occurrences of the device under test exceeds the number threshold, it is considered that the device under test cannot be restored, and the overvoltage and overcurrent information is reported.

[0080] Another embodiment of the present invention provides an eMMC test system based on overvoltage and overcurrent protection. The system is used to implement an eMMC test method based on overvoltage and overcurrent protection as described above. The system includes a main control device, a power supply device, and a test device; the main control device is connected to at least one of the power supply devices; the power supply device is connected to at least one of the test devices;

[0081] The test device includes a central controller, a voltage converter, a voltage and current monitoring module, a load switch, and a power management system chip; the central controller is respectively connected to the voltage converter, the voltage and current monitoring module, the load switch, and the power management system chip; the power management system chip is connected to the voltage converter; the voltage converter is connected to the device under test through the load switch; the voltage and current monitoring module is used to monitor the voltage and current of the device under test;

[0082] The power supply device includes a controller and at least one power supply switch connected to the controller; the other end of the power supply switch is connected to a selector, and the other end of the selector is connected to the power supply input end of the test device.

[0083] Another embodiment of the present invention provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, each step in the above-mentioned eMMC test method based on overvoltage and overcurrent protection is implemented.

[0084] Another embodiment of the present invention provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, each step in the above-mentioned eMMC test method based on overvoltage and overcurrent protection is implemented.

[0085] The eMMC test method, system, storage medium, and device based on overvoltage and overcurrent protection provided by the present invention can perform performance testing on storage devices, such as testing eMMC. The following is described through specific embodiments:

[0086] Embodiment 1

[0087] Please refer to Figure 1 , an eMMC test method based on overvoltage and overcurrent protection, including:

[0088] S0. Establish the connection relationship among the master device 1 (PC), the power supply device 2, and the test device 3 in the test system;

[0089] S01. Connect the PC to at least two power supply devices 2, connect the master device 1 and all power supply devices 2 to the same switch using network cables, and assign an IP to each power supply device 2 so that the IP of the power supply device 2 and the IP of the master device 1 are in the same network segment. Then turn on the power supply device 2 and send a connection command to the master device 1 through the network port scoket protocol.

[0090] S02. Conduct test authorization. The tester sends the MAC address to the administrator to obtain a license, and places the license in the license directory under the path of the PC-side test program. Among them, the license is calculated from the MAC address through the HMACSHA-256 algorithm.

[0091] S03. The PC runs the PC-side test program, scans the power supply device 2 and establishes a connection.

[0092] S04. The PC sends a command to the power supply device 2 through the network port scoket in step S01, so that the power supply device 2 turns on the power supply to the test device, that is, powers on the test device 3.

[0093] S04. Detect whether the test device 3 is powered on, and run the test program after the test device 3 is powered on. Specifically: after the PC sends the power-on command, wait for a preset time, for example, wait for 5 minutes, then send the GET_DEVICES command through the USB, wait for the test device ID to be returned, and judge whether the test device 3 is powered on through the test device ID to ensure that the test device 3 is powered on.

[0094] S05. After the test device 3 is powered on, turn on the overvoltage and overcurrent protection. That is, monitor the current value and voltage value of the test device 3 in the subsequent process, and when the monitored current value and voltage value are greater than the protection threshold, perform overvoltage and overcurrent protection.

[0095] S06. The PC sends the test application program to the test device 3 through the USB, and the test device 3 runs the application program to perform eMMC testing.

[0096] S1. Perform idle voltage and current tests: Control the voltage converter 32 to output preset current values and voltage values in sequence to perform idle voltage and current tests on the device under test. Among them, the voltage converter 32 is powered by the power management system chip 35; the central controller 31 controls the power management system chip 35 to output a preset power supply voltage to power the voltage converter 32. And the power management system chip 35 in the test device 3 is powered by the power supply device 2; after the controller 21 in the power supply device 2 receives the power control instruction issued by the master control device 1, the controller 21 controls the on-off state of the power supply switch 22 according to the power control instruction. If the power control instruction is to turn off, the power supply switch 22 stops supplying power to the test device 3; if the power control instruction is to turn on, the selector 23 is controlled to output an adjustable voltage or a fixed voltage according to the power control instruction to supply power to the test device 3.

[0097] The specific test steps are as follows:

[0098] S11. Control the central controller 31 to run idle voltage and current tests.

[0099] S12. The control voltage converter 32 sequentially adjusts the preset current value and voltage value, and determines whether the preset waiting time is reached. If so, execute S13; for example, after waiting for 30 s to ensure that the test device 3 enters the Idle state, perform the test.

[0100] S13. The control voltage and current monitoring module 33 records the test current value and test voltage value corresponding to each target current value and target voltage value; among them, in the idle mode, the normal current of VCC is [0.00006 A, 0.000115 A]; the normal current of VCCQ is [0.000025 A, 0.0001 A]; the normal voltage of VCC is [3.2 V, 3.4 V]; the normal voltage of VCCQ is [1.7 V, 1.9 V].

[0101] S2. Determine whether the idle voltage and current tests are completed. If so, perform the read / write process performance, voltage, and current tests on the device under test, that is, the test process includes the read / write process performance, voltage, and current tests. The specific test process is as follows:

[0102] S21. To ensure the reliability of the read performance test, the data of the eMMC device is erased before the read / write test, and wait for the preset time, for example, wait for 1 minute to ensure that the eMMC has erased the data; then pre-fill the data. For example, in an optional embodiment, the data is filled in the range of 0 to 512 M, the size of each write is 512 K, and the write addresses are incremented in sequence; in other optional embodiments, the filling range and the size of the written data can be adjusted according to actual requirements.

[0103] S22. Execute the test loop for the first preset number of times. The test loop includes: sequentially execute the sequential read, sequential write, random read, and random write for the second preset number of times, and obtain the average test data according to the second preset number of times; for example, in a specific embodiment, perform the following steps:

[0104] S221. Execute the sequential read test: that is, sequentially read the data written in step S21. The data reading method corresponds to the data filling method, that is, based on the data filling method in step S21, the data reading method is: the read range is the written data from 0 to 512 M, the size of each read is 512 K, the read addresses are incremented in sequence, and the time Tn (n is 1 - 10) spent on each read of 512 K is recorded, and the voltage and current values are obtained;

[0105] S222. Repeat step S221 three times to obtain the average voltage, average current, and average rate corresponding to the sequential read;

[0106] S223. Perform sequential write test: Among them, the data writing method corresponds to the data reading method, that is, based on the data reading method in step S22, the data writing method is: write data with a range of 0 to 512M, the size of each write is 512K, the write addresses increase sequentially, and record the time Tn (n is 1 - 10) spent on each write of 512K, and obtain the voltage and current values;

[0107] S224. Repeat step S223 three times to obtain the average voltage, average current, and average rate corresponding to sequential write;

[0108] S225. Perform random read test: The read address range is 0 to 512M that has been written. Set the amount of data to be read and the size of each read. For example, set the amount of data to be read to 64M and the size of each read to 4K. The read addresses are obtained using the following steps:

[0109] a. Calculate the number of read tasks taskcnt, taskcnt = 64M / 4KB = 65535;

[0110] b. The current number is i (i is an integer from 0 to taskcnt);

[0111] c. Calculate the offset. For example, define the offset offset = (i % 8) * 64 * 1024 * 2;

[0112] d. Calculate the random logical block address: Let the random logical block address be random_lba[i] = (random(0, 512M / 4KB / 8 / 4) * 8 * 4 + random(0, 4) * 4 + random(0, 8)) * 8 + offset; Among them, random(x, y) represents obtaining a random number from x to y - 1 using linear congruence. The formula for obtaining a random number using the linear congruence algorithm is: Xn+1=(a*Xn + c) mod m, where Xn is the current random number, a is the multiplier, c is the increment, and m is the modulus; better performance can be obtained when m is a power of 2 because calculating the modulo operation is more efficient; a larger prime number can also be selected, which helps to improve the distribution of random numbers, and m is the largest power of 2 less than 512M / 4KB / 8 / 4; a is (seed % m * 4 + 1) % m; when seed is even, c is (seed - 1) % m; when seed is odd, c is seed % m; Xn is seed % m; where seed is selected as 30;

[0113] e. Repeat steps a - d to obtain taskcnt random logical block addresses (Logical Block Address, LBA);

[0114] S226. Repeat step S225 three times to obtain the average voltage, average current, and average rate corresponding to random reads;

[0115] S227. Conduct a random write test: The write address range is from 0 to 512M, the amount of data written and read is 64M, the size of each read is 4K, and the method of obtaining the write address is the same as that in step S225, which will not be elaborated here;

[0116] S228. Repeat step S227 three times to obtain the average voltage, average current, and average rate corresponding to random writes.

[0117] S23. Determine whether the number of loop iterations has reached the first preset number. If so, obtain all average test data and calculate the comprehensive average test data based on the first preset number; for example, if the first preset number is five, then after repeating steps S221 - S228 five times, calculate the rate, average voltage, and average current of the sequential reads five times; the rate, average voltage, and average current of the sequential writes; the rate, average voltage, and average current of the random reads; the rate, average voltage, and average current of the random writes;

[0118] Verify the above test data:

[0119] Among them, in the sequential read mode, the rate requirement is greater than 295MBps, the normal current of VCC is [0.09A, 0.121A]; the normal current of VCCQ is [0.1A, 0.138A]; the normal voltage of VCC is [3.2V, 3.4V], and the normal voltage of VCCQ is [1.7V, 1.9V].

[0120] In the sequential write mode, the rate requirement is greater than 130MBps, the normal current of VCC is [0.055A, 0.074A]; the normal current of VCCQ is [0.055A, 0.084A]; the normal voltage of VCC is [3.2V, 3.4V], and the normal voltage of VCCQ is [1.7V, 1.9V].

[0121] In the random read mode, the rate requirement is greater than 10MBps, the normal current of VCC is [0.09A, 0.121A]; the normal current of VCCQ is [0.1A, 0.138A]; the normal voltage of VCC is [3.2V, 3.4V], and the normal voltage of VCCQ is [1.7V, 1.9V].

[0122] In the random write mode, the rate requirement is greater than 5MBps, the normal current of VCC is [0.055A, 0.074A]; the normal current of VCCQ is [0.055A, 0.084A]; the normal voltage of VCC is [3.2V, 3.4V], and the normal voltage of VCCQ is [1.7V, 1.9V].

[0123] During data verification testing, eMMC data is read, and the read range is 0 - 512M data; after the test, the test device 3 reports the test data through USB, and the PC displays the test data after receiving it.

[0124] Among them, the test results are represented by 12 bits: 0 bit represents not powered on, program exception or power supply device 2 exception; 1 bit represents idle voltage exception, 2 bit represents idle current exception; 3 bit represents eMMC read voltage exception, 4 bit represents eMMC read current exception, 5 bit represents eMMC read rate exception, 6 bit represents eMMC write voltage exception, 7 bit represents eMMC write current exception, 8 bit represents eMMC write rate exception, 9 bit represents data verification exception, 10 bit represents overvoltage exception, 11 bit represents overcurrent exception.

[0125] S3. During the idle voltage and current tests and the performance, voltage, and current tests during the read and write processes, control the voltage and current monitoring module 33 to monitor the test current value and test voltage value of the device under test. If the test current value is greater than the overcurrent threshold or the test voltage value is greater than the overvoltage threshold, generate an interrupt signal.

[0126] S4. Control the load switch 34 to receive the interrupt signal, cut off the power supply to the device under test, and start the retry mechanism; then record the overvoltage and overcurrent times of the current device under test through the memory, and determine whether the overvoltage and overcurrent times are greater than the times threshold. If so, record the overvoltage and overcurrent information in the memory and report the overvoltage and overcurrent information; if not, after waiting for the preset time, control the load switch 34 to turn on the power supply to the device under test and re - execute the idle voltage and current tests and the performance, voltage, and current tests during the read and write processes.

[0127] For example: set the VCC overvoltage voltage to 3.6V, the VCCQ overvoltage voltage to 1.98V, and the current overcurrent threshold to 300mA; if overvoltage or overcurrent occurs, the voltage and current monitoring module 33 generates an overcurrent and overvoltage interrupt signal and notifies the central controller 31, and the central controller 31 further controls the load switch 34 to turn off the power supply of the eMMC device and start the retry mechanism.

[0128] Execute the retry mechanism: for example, if the preset time is 10 seconds, then wait for 10s and control the load switch 34 to turn on the power supply of the eMMC device, restart the eMMC test process, and wait for the next overvoltage or overcurrent to occur; set the retry times threshold to 5 times, that is, when 5 overvoltages or overcurrents occur, it is considered that recovery is not possible, and read the voltage, current, and overvoltage and overcurrent status, record the overvoltage and overcurrent information in the UFS storage device 36, and report the overvoltage and overcurrent information.

[0129] Embodiment 2

[0130] Please refer to Figure 2 , an eMMC test system based on overvoltage and overcurrent protection, which is used to implement an eMMC test method based on overvoltage and overcurrent protection described in Embodiment 1; the system includes a main control device 1, a power supply device 2, and a test device 3; the main control device 1 is connected to at least one power supply device 2; the power supply device 2 is connected to at least one test device 3; the main control device 1 (PC) is connected to the power supply device 2 through a network interface, responsible for issuing instructions and controlling the power supply device 2 to turn on the power supply to the test device 3; the PC and the test device 3 are connected through a USB interface, which is used for displaying the test process and results, and warning the staff by displaying the diagnostic results; each power supply device 2 can provide 4-way power supply control to supply power to the test device 3 respectively.

[0131] Please refer to Figure 3 , the power supply device 2 includes a controller 21 and at least one power supply switch 22 connected to the controller 21; the other end of the power supply switch 22 is connected to a selector 23, and the other end of the selector 23 is connected to the power supply input end of the test device 3; the power supply device 2 also includes a power supply module 24, a storage module 25, and a network module 26; among them, the power supply module 24 is a 5V DC power supply, which is connected to other modules to provide working voltage and input voltage; the storage module 25 is connected to the controller 21 and is responsible for running the program of the power supply device 2; the controller 21 is connected to the network module 26. After the power supply device 2 is powered on and runs the program, the controller 21 controls the network module 26 to receive instructions issued by the PC and controls the opening and closing of the corresponding power supply switch 22; the power supply switch 22 is connected to the controller 21. After the controller 21 receives an opening or closing command, it controls the corresponding power supply switch 22 to open or close; the selector 23 realizes adjustable or fixed input voltage. The input of the selector 23 is the output of the power supply module 24 and the power supply switch 22. It can select the output voltage as the input voltage of the adjustable power supply switch 22 or the fixed voltage input by the power supply module 24; the output voltage of the selector 23 is used as the power supply input of the test device 3 to supply power to the test device 3; that is, the controller 21 executes the control of the power supply part for the test device 3 in step S1 of Embodiment 1. Based on the control of the controller 21 over the power supply switch 22 and the selector 23, the corresponding power supply control is realized.

[0132] Please refer to Figure 4, the test device 3 includes a central controller 31, a voltage converter 32, a voltage and current monitoring module 33, a load switch 34, and a power management system chip 35. It also includes a USF storage device 36, a USB device 37, a serial port device 38, and an MSDC (Master System Display Console) controller 21. Among them, the voltage converter 32, the voltage and current monitoring module 33, and the load switch 34 each include two groups. The voltage converter 32 uses a DC-DC converter. Among them, the power supply input is the 5V voltage output by the power supply device 2. The power supply input is connected to the voltage management system chip, the central controller 31, and the UFS memory to provide power for the entire test device 3. The UFS memory is connected to the central controller 31 and is responsible for running the system test program. After the power supply device 2 powers on the test device 3, the program starts to run. The USB device 37 is connected to the central controller 31 and receives test commands to perform eMMC tests, that is, the central controller 31 executes the test-related parts in steps S1-S4 of Embodiment 1, including S11-S13, S2-S4. Based on the central controller 31 controlling the voltage converter 32, the voltage and current monitoring module 33, the load switch 34, and the power management system chip 35, the corresponding steps in the test are completed. The test results are uploaded via USB after the test. The power management system chip 35 is connected to the central controller 31. After the test device 3 is powered on, the central controller 31 controls the power management system chip 35 to output a first preset voltage and a second preset voltage. For example, the first preset voltage is 3.3V and the second preset voltage is 1.8V. The output first preset voltage of 3.3V is used as the input of the first DC-DC converter, and the output second preset voltage of 1.8V is used as the input of the second DC-DC converter. The central controller 31 is connected to the DC-DC converter through an I2C interface to control the first DC-DC converter to output a voltage of 2.4V-5.5V and control the second DC-DC converter to output a voltage of 1.2V-2.8V. The central controller 31 is connected to the load switch 34 to control the load switch 34 to output the VCC voltage and the VCCQ voltage for the eMMC device.

[0133] The output voltage of the DC-DC converter is used as the input of the voltage and current monitoring module 33. The central controller 31 is connected to the voltage and current monitoring module 33. The central controller 31 controls the voltage and current monitoring module 33 to perform VCC voltage and current monitoring and VCCQ voltage and current monitoring, and can also read the voltage and current of VCC and the voltage and current of VCCQ through the voltage and current monitoring module 33 at any time.

[0134] The central controller 31 is connected to the MSDC controller 39 to run a test program. The central controller 31 performs read and write tests on the eMMC device through the eMMC interface of the MSDC controller 39 and obtains the voltage and current values of the eMMC.

[0135] In an optional embodiment, the DC-DC converter uses a power conversion chip, and the required voltage is input through the power supply pin. For example, for the VCC power supply circuit, the power input voltage is 3.3V; for the VCCQ power supply circuit, the power input voltage is 1.8V; the output of the power management system chip 35 is the voltage output of the converter, and the central controller 31 sets the converter to output 3.3V power supply for VCC or 1.8V power supply for VCCQ through the I2C interface.

[0136] The voltage and current monitoring module 33 uses a monitoring chip. The monitoring chip includes a communication interface for obtaining the current and voltage of the current VCC / VCCQ, setting the overcurrent and overvoltage values, and reading the overvoltage and overcurrent status; it includes an overvoltage and overcurrent interrupt signal pin for generating an interrupt signal to the central controller 31 when overvoltage and overcurrent occur; in addition, it also includes an analog input pin for converting the current of VCC into voltage to realize the acquisition of current. For example, the set reference voltage and current are: the VCC overvoltage threshold is 3.6V, and the overcurrent threshold is 300mA; the VCCQ overvoltage threshold is 1.95V, and the overcurrent threshold is 300mA; when the input voltage and current exceed the set reference voltage and current, an overvoltage and overcurrent signal will be generated. The latch module records the instantaneous value of overcurrent and overvoltage and turns on the timer to close the reception of the overvoltage and overcurrent signal. The timer is set to the first preset time, for example, 250ms. After the 250ms timing time arrives, the reception of the overvoltage and overcurrent signal is turned on. If there is still overvoltage and overcurrent information, it is considered a valid overvoltage and overcurrent to avoid false detection caused by voltage and current jitter. Finally, the overvoltage and overcurrent information is written into the storage module 25 through the UFS controller 21, and then the power supply of the eMMC device is cut off through the voltage control module.

[0137] The load switch 34 uses a switching MOS chip. When overvoltage and overcurrent occur, it turns on the internal MOSFET to cut off the eMMC VCC / VCCQ power supply. That is, if overvoltage and overcurrent occur, the voltage and current monitoring module 33 generates an overcurrent and overvoltage interrupt to notify the central control module, and the central controller 31 controls the MOSFET in the load switch 34 to turn on to cut off the power supply to the eMMC device.

[0138] In summary, the overvoltage and overcurrent protection eMMC testing method, system, storage medium, and device provided by the present invention control each device in the test system based on the testing method. Specifically: the central controller controls the voltage converter, voltage and current monitoring module, and load switch respectively to complete the idle voltage and current test and read / write performance voltage and current test on the device under test, which can cover the influence of other factors in the production process on the device under test; moreover, during the testing process, the voltage and current of the device under test are also detected. When the voltage and current exceed the overvoltage / overcurrent threshold, the power supply to the device under test is interrupted to achieve overvoltage and overcurrent protection for the device under test; when overvoltage or overcurrent occurs, the retry mechanism is enabled to eliminate false detections caused by device damage or incorrect operations, and misjudge normal eMMCs as defective products; the customized eMMC read / write method ensures the reliability of the test.

[0139] In the above embodiments provided by the present application, it should be understood that the disclosed method, system, computer-readable storage medium, and electronic device can be implemented in other ways. For example, the system embodiments described above are merely illustrative. For example, the division of the modules is only a logical function division. In actual implementation, there may be other division methods. For example, multiple components or modules can be combined or integrated into another system or device, or some features can be ignored or not executed. Another point is that the displayed or discussed mutual coupling, direct coupling, or communication connection can be through some interfaces, indirect coupling, or communication connection of devices or components or modules, which can be electrical, mechanical, or other forms.

[0140] The components described as separate components may or may not be physically separated. The components shown as components may or may not be physical modules, that is, they can be located in one place or distributed to multiple network modules. Some or all of the components can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0141] In addition, in each embodiment of the present invention, the functional modules can be integrated into one processing module, or each component can exist physically alone, or two or more modules can be integrated into one module. The above integrated modules can be implemented in the form of hardware or in the form of software functional modules.

[0142] When the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs.

[0143] It should be noted that for the foregoing method embodiments, for the sake of simple description, they are all expressed as a series of action combinations. However, those skilled in the art should know that the present invention is not limited by the described action sequence, because according to the present invention, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily all essential to the present invention.

[0144] In the above embodiments, the descriptions of the various embodiments have their own emphases. For the parts not detailed in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0145] The above are only the embodiments of the present invention, and do not limit the patent scope of the present invention. Any equivalent transformation made by using the content of the specification and drawings of the present invention, or directly or indirectly applied in the relevant technical fields, shall be equally included in the patent protection scope of the present invention.

Claims

1. An eMMC testing method based on overvoltage and overcurrent protection, characterized in that: include: Control the voltage converter to output preset current values ​​and voltage values ​​in sequence, and perform idle voltage and current tests on the device under test; Determine whether the idle voltage and current test is completed, and if so, perform read and write process performance, voltage, and current tests on the device under test; During the idle voltage and current test and the read and write process performance, voltage and current test, the voltage and current monitoring module is controlled to monitor the test current value and the test voltage value of the device under test, and if the test current value is greater than the overcurrent threshold or the test voltage value is greater than the overvoltage threshold, an interrupt signal is generated; Controlling the load switch to receive the interrupt signal, cut off the power supply to the device under test, and start the retry mechanism; Controlling the central controller to run the idle voltage and current test; Control the voltage converter to adjust the preset current value and voltage value in sequence, determine whether the preset waiting time is reached, and if so, control the voltage and current monitoring module to record the test current value and test voltage value corresponding to each target current value and target voltage value; The control voltage converter sequentially outputs preset current values ​​and voltage values ​​to perform idle voltage and current tests on the device under test, including: supplying power to the voltage converter through a power supply device; The power supply equipment includes a power supply module, a network module, a controller, a power supply switch and a selector; The power supply module is respectively connected to the network module, the controller, the power switch and the selector for power supply; The network module is used to receive a power supply instruction and send it to the controller; The controller controls the power switch to switch between an on state and an off state according to the power supply instruction; The input end of the selector is connected to the power supply module and the power supply switch respectively, and outputs a fixed voltage based on the power supply module or outputs an adjustable voltage based on the power supply switch according to the power supply instruction; The output terminal of the selector is used to supply power to the voltage converter.

2. The eMMC testing method based on overvoltage and overcurrent protection according to claim 1, characterized in that: Also includes: Controlling the voltage converter by means of a test device; The test equipment includes a central controller, a voltage converter, a voltage and current monitoring module, a load switch and an MSDC controller; The central controller is used to receive test instructions to perform idle voltage and current tests on the device under test, or read and write process performance, voltage, and current tests; The central controller controls the voltage converter to output a preset current value and voltage value according to the test instruction; The central controller performs a read and write process performance test on the device under test through the MSDC controller, and obtains the voltage value and current value of the device under test; The input end of the load switch is connected to the output end of the voltage converter, and the output end of the load switch provides voltage for the device under test; The output voltage of the voltage converter is used as the input of the voltage and current monitoring module; The central controller controls the voltage and current monitoring module to perform voltage and current monitoring, and reads the current voltage value and current value through the voltage and current monitoring module.

3. The eMMC testing method based on overvoltage and overcurrent protection according to claim 2, characterized in that: The test device also includes a power management system chip, and includes two voltage converters, two load switches and two voltage and current monitoring modules, each of the voltage converters is respectively connected to one of the load switches and one of the voltage and current monitoring modules; The central controller controls the power management system chip to output a first preset voltage and a second preset voltage to respectively supply power to different voltage converters; and controlling one of the voltage converters to adjust the voltage based on the first preset voltage, and controlling another of the voltage converters to adjust the voltage based on the second preset voltage; The central controller controls the two voltage and current monitoring modules to read the current voltage value and current value respectively.

4. The eMMC testing method based on overvoltage and overcurrent protection according to claim 1, characterized in that: The read and write process performance, voltage, and current tests include: Execute a first preset number of test cycles, and when executing each test cycle, sequential read, sequential write, random read, and random write are sequentially executed for a second preset number of times, and average test data is obtained according to the second preset number of times and the test data after executing the second preset number of times; It is determined whether the number of cycles reaches the first preset number. If so, all the average test data are obtained, and comprehensive average test data is obtained according to the first preset number and the test data after the first preset number is executed.

5. The eMMC testing method based on overvoltage and overcurrent protection according to claim 4, characterized in that: Performing random reads and random writes includes: The test addresses for performing random reads and random writes are obtained using the following steps: Obtain the number of operations according to the preset data volume and the data volume of one operation; Determine the offset based on the preset data volume and the current number of operations; Execute a random calculation formula to calculate a random logic block address, and obtain a number of the random logic block addresses corresponding to the number of operations; The random calculation formula includes: random_lba[i]=(random(0,512M / 4KB / 8 / 4)*8*4+random(0,4)*4+random(0,8))*8+offset; Among them, random (x, y) represents the use of linear congruential algorithm to obtain random numbers from x to y-1. The formula for obtaining random numbers using the linear congruential algorithm is: n+1 =(a*X n +c) mod m;X n is the current random number, a is the multiplier, c is the increment, and m is the modulus; m is the largest power of 2 less than 512M / 4KB / 8 / 4; a is (seed%m*4+1)%m; if seed is an even number, c is (seed-1)%m; if seed is an odd number, c is seed%m; X n It is seed%m; offset is the offset.

6. The eMMC testing method based on overvoltage and overcurrent protection according to claim 1, characterized in that: After cutting off the power supply to the device under test, the method further includes: Recording the number of overvoltage and overcurrent of the current device under test through a memory, and determining whether the number of overvoltage and overcurrent is greater than a number threshold, and if so, recording the overvoltage and overcurrent information to the memory, and reporting the overvoltage and overcurrent information; If not, after waiting for a preset time, the load switch is controlled to start powering the device under test, and the idle voltage and current test and the read / write process performance, voltage, and current test are re-executed.

7. An eMMC test system based on overvoltage and overcurrent protection, characterized in that: The system is used to implement an eMMC test method based on overvoltage and overcurrent protection as described in any one of claims 1 to 6, and the system includes a main control device, a power supply device and a test device; the main control device is connected to at least one of the power supply devices; the power supply device is connected to at least one of the test devices; The test equipment includes a central controller, a voltage converter, a voltage and current monitoring module, a load switch and a power management system chip; The central controller is respectively connected to the voltage converter, the voltage and current monitoring module, the load switch and the power management system chip; The power management system chip is connected to the voltage converter; the voltage converter is connected to the device under test through the load switch; the voltage and current monitoring module is used to monitor the voltage and current of the device under test; The power supply device includes a controller and at least one power switch connected to the controller; The other end of the power switch is connected to the selector, and the other end of the selector is connected to the power supply input end of the test device; Control the central controller to run idle voltage and current tests; Control the voltage converter to adjust the preset current value and voltage value in sequence, determine whether the preset waiting time is reached, and if so, control the voltage and current monitoring module to record the test current value and test voltage value corresponding to each target current value and target voltage value; The control voltage converter sequentially outputs preset current values ​​and voltage values ​​to perform idle voltage and current tests on the device under test, including: supplying power to the voltage converter through a power supply device; The power supply equipment includes a power supply module, a network module, a controller, a power supply switch and a selector; The power supply module is respectively connected to the network module, the controller, the power switch and the selector for power supply; The network module is used to receive a power supply instruction and send it to the controller; The controller controls the power switch to switch between an on state and an off state according to the power supply instruction; The input end of the selector is connected to the power supply module and the power supply switch respectively, and outputs a fixed voltage based on the power supply module or outputs an adjustable voltage based on the power supply switch according to the power supply instruction; The output terminal of the selector is used to supply power to the voltage converter.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by the processor, each step of the eMMC testing method based on overvoltage and overcurrent protection as described in any one of claims 1 to 6 is implemented.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, each step of the eMMC testing method based on overvoltage and overcurrent protection as described in any one of claims 1 to 6 is implemented.

Images