Memory storage read and write test method, device and storage medium

Abstract

The embodiment of the present application provides a read-write test method, device and storage medium of a memory storage device, belonging to the field of memory technology; the method includes obtaining the number of data blocks of the data blocks of the target memory storage device to be tested and the number of rows of each data block; determining the number of threads of the test thread to be created according to the number of data blocks, the number of rows and the read-write type; creating the number of test threads, and determining the read-write starting position of each test thread from the row area of ​​each data block; synchronously calling each of the created test threads, outputting the test results, so as to synchronously perform read-write tests through each test thread starting from the corresponding read-write starting position. The embodiment of the present application can improve the test efficiency.

Description

Technical Field

[0001] The present application relates to the field of memory technology, and in particular to a read and write test method, device and storage medium for a memory storage device. Background Art

[0002] As a common memory, memory storage (such as DDR) often needs to perform coverage test on each bit of data in the memory storage when performing read and write tests on it. However, as the storage scale of the memory storage increases, the test time for each memory storage will increase. As the number of memory storages increases, the total test time will further increase. Therefore, in the related art, a read and write test method for memory storage is urgently needed to achieve the test time of the memory storage. Summary of the invention

[0003] The main purpose of the embodiments of the present application is to provide a read and write test method, device and storage medium for a memory storage device, which can improve the test efficiency.

[0004] To achieve the above-mentioned purpose, a first aspect of an embodiment of the present application provides a read and write test method for a memory storage device, the method comprising:

[0005] Obtaining the number of data blocks of the target memory storage to be tested and the number of rows of each of the data blocks;

[0006] Determine the number of test threads to be created according to the number of data blocks, the number of rows, and the read / write type;

[0007] Creating the number of test threads, and determining the reading and writing start positions of the test threads from the row areas of the data blocks;

[0008] Each of the created test threads is synchronously called and the test results are output, so as to synchronously perform the read and write test starting from the corresponding read and write start position through each of the test threads.

[0009] To achieve the above-mentioned purpose, the second aspect of an embodiment of the present application proposes an electronic device, which includes a memory and a processor, the memory stores a computer program, and when the processor executes the computer program, it implements the read and write test method of the memory storage as described in any one of the first aspects above.

[0010] To achieve the above-mentioned purpose, the third aspect of an embodiment of the present application proposes a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, it implements the read and write test method of the memory storage device described in any one of the first aspects.

[0011] The read-write test method, device and storage medium of the memory storage proposed in the present application configure multiple test threads for a memory storage, and each test thread can test the row area of ​​at least one row, so that when multiple test threads are synchronously called to test the same memory storage, the feedback of the test results of a single memory storage at different storage locations can be accelerated, so that the probability of discovering the fault point of the memory storage in advance is higher, thereby improving the test efficiency. At this time, since the test efficiency of a single memory storage is improved, when testing multiple memory storages, the overall test efficiency will be improved. And compared with the method in which multiple memory storages provide a test environment, the test cost is lower, so the test efficiency of the embodiment of the present application is higher and the test cost is lower. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 It is a flowchart of the read and write test method of the memory storage provided by the present application;

[0013] Figure 2 It is a schematic diagram of the structure of a memory storage device of an embodiment of a read-write test method of a memory storage device provided by the present application;

[0014] Figure 3 This is a schematic diagram of test thread allocation of a memory storage in one embodiment of a read-write test method of a memory storage provided by the present application;

[0015] Figure 4 It is a schematic diagram of allocation of test threads of a memory storage device in another embodiment of the read-write test method of the memory storage device provided by the present application;

[0016] Figure 5 It is a schematic diagram of allocation of test threads of a memory storage device in another embodiment of the read-write test method of the memory storage device provided by the present application;

[0017] Figure 6 It is a structural diagram of the hardware structure corresponding to the read and write test method of the memory storage provided in this application. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0019] It should be noted that, although the functional modules are divided in the device schematic diagram and the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart. The terms "first", "second", etc. in the specification, claims and the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0021] First, some nouns involved in this application are analyzed:

[0022] DDR, which is double data rate Synchronous Dynamic Random Access Memory, is DDR SDRAM.

[0023] As a common memory, memory storage (such as DDR) often needs to perform coverage test on the data of each bit in the memory storage when performing read and write test on it. However, as the storage scale of the memory storage increases, the number of data blocks contained in each memory storage and the capacity of each data block will increase accordingly. At this time, in order to ensure the coverage of each bit in each data block, the test time of a single memory storage will increase. And as the number of memory storages increases, the total test time for testing all memory storages will further increase. Therefore, in the related art, there is an urgent need for a read and write test method for a memory storage to achieve the test time of the memory storage. Based on this, the embodiments of the present application provide a read and write test method, device and storage medium for a memory storage, which can improve the test efficiency.

[0024] The read and write test method, device and storage medium of the memory storage provided in the embodiments of the present application are specifically described through the following embodiments. First, the read and write test method of the memory storage in the embodiments of the present application is described.

[0025] The read and write test method of the memory storage of the present application can be used in many general or special computer system environments or configurations. For example: personal computers, server computers, handheld devices or portable devices, tablet devices, multi-processor systems, etc. The present application can be described in the general context of computer executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. The present application can also be practiced in distributed computing environments, in which tasks are performed by remote processing devices connected through a communication network. In a distributed computing environment, program modules can be located in local and remote computer storage media including storage devices.

[0026] Understandably, referring to Figure 1 As shown, according to an embodiment of the present application, a read and write test method for a memory storage device is provided, the method comprising:

[0027] Step S100, obtaining the number of data blocks and the number of rows of each data block of the data block of the target memory storage to be tested;

[0028] Step S200, determining the number of test threads to be created according to the number of data blocks, the number of rows, and the read / write type;

[0029] Step S300, creating test threads of the same number as threads, and determining the read and write start position of each test thread from the row area of ​​each data block;

[0030] Step S400, synchronously call each created test thread and output the test result, so as to synchronously perform the read and write test starting from the corresponding read and write start position through each test thread.

[0031] Therefore, by configuring multiple test threads for a memory storage device, each test thread can test the row area of ​​at least one row, so that when multiple test threads are synchronously called to test the same memory storage device, the feedback of the test results of a single memory storage device at different storage locations can be accelerated, thereby making the probability of discovering the fault point of the memory storage device in advance higher, thereby improving the test efficiency. At this time, since the test efficiency of a single memory storage device is improved, when multiple memory storage devices are tested, the overall test efficiency will be improved. And compared with the method in which multiple memory storage devices provide a test environment, the test cost is lower, therefore, the test efficiency of the embodiment of the present application is higher and the test cost is lower.

[0032] The read and write test method of the memory storage of the present application is applied to the test platform, and those skilled in the art can select a device that can support multiple test threads for testing according to actual test requirements. For example, the test platform is connected to the memory storage through the SOC interface, and the test platform creates 9 test threads, and each of the 9 test threads synchronously calls the SOC interface to initiate a read and write test on different addresses of the target memory storage.

[0033] It is understandable that, for the target memory storage, each target memory storage can be divided into a plurality of data blocks of the same size, and each data block is divided into a plurality of row regions. Each row region has the same number of bits and can store the same amount of data. For example, Figure 2 In the DDR shown in the figure, the DDR is divided into N data blocks, namely data block 1 to data block N; each data block is divided into K row areas, namely row 1 to row K. Each row area consists of M bits. Each bit corresponds to a storage address for storing a bit of data.

[0034] The read-write type represents the way the CPU reads and writes data blocks to the memory storage in actual applications. The read-write type includes two methods: reading and writing data blocks one by one and reading and writing multiple data blocks simultaneously. Different read-write types determine the mapping relationship between the test thread and the data block and the row area in the data block, as well as the execution order of each data block and each row area. For example, taking the data block-by-data block reading and writing method as an example, each data block is executed one by one, and the test thread is mapped to the row area of ​​the data block being tested. For the synchronous reading and writing method of multiple data blocks, the execution order is based on the row area number, and the data block of the tested row area is mapped to the test thread. One or more of the above can be selected for read-write testing according to actual needs, and technicians in this field can selectively set it according to actual needs.

[0035] The read / write start position indicates the storage address where each test thread starts to perform a read or write operation. In the actual test process, the read / write start position can be randomly set or fixed according to the requirements of test data coverage continuity to ensure that when multiple threads write at the same time, starting from the start read / write position, after the data block where the start read / write position is located is continuously written with data, the coverage rate of each address of the memory storage meets the requirements. Those skilled in the art can selectively set the read / write start position according to actual needs, and construct test data according to the read / write start position to meet the above test requirements.

[0036] The read-write test includes at least one of a read test and a write test, and those skilled in the art may selectively set the test according to actual needs.

[0037] The embodiments of the present application do not limit how the test results are presented, and those skilled in the art can selectively set them according to needs.

[0038] The present application does not limit how to obtain the number of data blocks and the number of rows in step S100, and those skilled in the art can selectively set it according to actual needs. For example, by setting a visualization view, the tester selects the memory type of the target memory storage to be tested in the visualization view, and then based on the mapping relationship table between each memory type and the number of data blocks and the number of rows in the pre-configuration file, the number of data blocks and the number of rows of the target memory storage is determined by looking up the table.

[0039] The number of threads is a positive integer greater than 1. The embodiment of the present application does not limit how to determine and set the number of threads, and those skilled in the art can selectively set it according to actual needs.

[0040] It is understandable that there are multiple read / write types, including data block-by-data block read / write and multi-data block read / write; according to the number of data blocks, the number of rows and the read / write type, the number of test threads to be created is determined, including:

[0041] Determine the number of first threads corresponding to the reading and writing of each data block according to the number of rows, wherein each test thread corresponds to a row area of ​​at least one row;

[0042] Determine the number of second threads corresponding to the reading and writing of multiple data blocks according to the number of data blocks;

[0043] The number of threads is determined according to the first number of threads and the second number of threads.

[0044] Reading and writing by data blocks means that in the process of writing data to the memory storage device, it is necessary to write data to a data block with a free area when a data block cannot be written and there is still data to be written. Reading and writing multiple data blocks means that the data blocks that can be written can be arbitrarily selected according to the size of the written data, and the data to be written can be dispersed into the selected multiple data blocks and written synchronously. And there is no limit on the number of data blocks written. For example, if the total amount of data to be written needs to be written in the capacity of multiple data blocks, then under the read and write type by data block, after selecting a data block, first write the data to the data block until it can no longer be written, then reselect a data block with a free area, and write the unwritten data to the blank data block. Under the read and write type of multiple data blocks, multiple data blocks can be selected at the same time, and write operations can be performed on multiple data blocks at the same time.

[0045] Determining the number of threads for block-by-block reading and writing and multi-block reading and writing respectively can improve the test efficiency when testing use cases in two different read and write type scenarios.

[0046] It is understandable that the largest number of threads between the first number of threads and the second number of threads can be created as the initial number of threads created. In other embodiments, a smaller number of threads can be created first, and after the test is completed, if the test still needs to be continued, the number of threads can be increased to meet the test requirements under the scenario type to be tested.

[0047] The embodiment of the present application does not limit how to determine the number of first threads according to the number of rows. Each row may correspond to one test thread, or multiple row regions may correspond to one test thread. There is no limit on how to determine the number of second threads according to the number of data blocks.

[0048] It is understandable that the number of test threads and the read and write start positions determine the area in the target memory storage that each test thread can read and write, that is, when determining the number of threads, the thread mapping relationship between each test thread and the data block and row area can also be synchronously determined. The thread mapping relationship is different for different read and write types. At the same time, the test data of each test thread can also be constructed based on the thread mapping relationship, so that when each test thread created is synchronously called, the target memory storage can be automatically tested.

[0049] It is understandable that determining the number of second threads corresponding to the reading and writing of multiple data blocks according to the number of data blocks includes:

[0050] Get the maximum number of write threads that can be created;

[0051] When the maximum number of write threads is greater than or equal to the number of data blocks, the maximum number of write threads and the number of data blocks are divided, and the result of the division is rounded down to determine the first thread multiple;

[0052] Determining the number of data block writing threads for a single data block according to the first thread multiple;

[0053] Determine the target number of write threads based on the number of data block write threads and the number of data blocks;

[0054] The number of second threads corresponding to the reading and writing of multiple data blocks is determined according to the target number of writing threads.

[0055] The maximum number of write threads represents the threads that are allowed to be created for write testing. In some embodiments, threads are divided into three independent threads: read, write, and compare according to their functions to implement testing of the target memory storage. In this case, the maximum number of write threads is the maximum number of threads supported by the test platform / 3. If the maximum number of threads supported by the test platform is 9, the maximum number of write threads is 3. It is understandable that in some embodiments, each thread is defined as having the functions of reading, writing, and comparing at the same time. In this case, the maximum number of write threads is the maximum number of threads supported by the test platform.

[0056] When the maximum number of write threads is greater than or equal to the number of data blocks, a test thread can be configured for each data block. The number of threads for each data block can be selectively set according to actual needs. Figure 4 As shown, the target memory storage is provided with N data blocks, and accordingly, the number of target write threads is N. When the test thread has read, write and compare functions at the same time, the number of threads is equal to the number of target write threads. When the test thread is divided according to the read, write and compare functions, the number of threads is the number of target write threads * 3. In other embodiments, such as Figure 5 As shown, each data block can also be configured with multiple test threads, such as Figure 5 As shown, each data block is configured with j test threads, namely thread 1 to thread j.

[0057] At this time, by configuring multiple test threads, it is possible to determine in advance whether there are abnormalities in writing to different storage addresses, and then the fault point of the target memory storage can be found as soon as possible.

[0058] For example, if the maximum number of write threads is set to 10, the number of data blocks is set to 3, and the number of rows in the row area of ​​each data block is set to 7, then the first thread multiple can be determined to be 3. That is, a data block can be configured with a maximum of 3 test threads. The embodiment of the present application does not limit how to determine the number of data block write threads for a single data block according to the first thread multiple, and those skilled in the art can selectively set it according to actual needs. For example, a configuration view can be provided and determined by the user, or it can be set according to the test feedback efficiency.

[0059] It is understandable that determining the number of second threads corresponding to the reading and writing of multiple data blocks according to the number of data blocks also includes:

[0060] When the maximum number of write threads is less than the number of data blocks, the number of data blocks and the maximum number of write threads are divided, and the result of the division is rounded up to determine the second thread multiple;

[0061] The number of second threads corresponding to the reading and writing of multiple data blocks is determined according to the second thread multiple.

[0062] For example, assuming that the number of data blocks is 7 and the maximum number of write threads is 3, 7 / 3 is rounded up to get the second thread multiple of 3, that is, starting from the first data block, a test thread is configured every 3 data blocks. Data blocks 1 to 3 correspond to one test thread, data blocks 4 to 6 correspond to one test thread, and data block 7 corresponds to one test thread.

[0063] It is understandable that the read and write start positions of each test thread are determined from the row area of ​​each data block, including:

[0064] Obtaining a second thread mapping relationship corresponding to the number of second threads in reading and writing multiple data blocks;

[0065] Determine, according to the second thread mapping relationship, the starting data blocks corresponding to each test thread for reading and writing the multiple data blocks;

[0066] Randomly generate the second starting row number of each starting data block;

[0067] For each second starting row number, a read / write start position is randomly generated from the corresponding row area.

[0068] By randomly generating the second starting row number, the test can be performed at a random position in the same data block, thereby further ensuring the accuracy of the test.

[0069] The second thread mapping relationship represents the data block range and row area range that each test thread can read and write. The starting data block can be determined randomly or selected sequentially, such as recording the data block number of the last test, and when testing the same target memory storage, the data block corresponding to the next data block number can be tested.

[0070] The embodiment of the present application does not limit how to randomly determine the second starting row number, and those skilled in the art can refer to the mechanism of the random function for setting. In some embodiments, the range of the second starting row number randomly selected can be determined based on the second thread mapping relationship, so as to ensure that when data is written based on the randomly generated second starting row number, the second starting row numbers of each test thread of different data blocks are different.

[0071] The address range generated by the read / write start position in the row area can be further limited based on the second thread mapping relationship, thereby ensuring that the length of data written based on the read / write start position meets the preset minimum length requirement.

[0072] It is understandable that determining the number of first threads corresponding to reading and writing each data block according to the number of rows includes:

[0073] Get the maximum number of write threads that can be created;

[0074] Divide the number of rows and the maximum number of write threads, and round up the result to determine the third thread multiple;

[0075] The number of first threads corresponding to the reading and writing of each data block is determined according to the third thread multiple.

[0076] Through the third thread multiple, the row area of ​​each row of each data block is covered by the test.

[0077] Exemplarily, assuming that the number of rows of a single data block is j and the maximum number of writing threads is u, the third thread multiple is the result of rounding up j / u. At this time, each test thread is mapped to a row area of ​​at least one row.

[0078] For example, refer to Figure 3 As shown, if the maximum number of writing threads is less than the number of rows in the data block (that is, the third thread multiple is an integer greater than 1), then multiple row regions correspond to one test thread. In other embodiments, the third multiple is an integer equal to 1, then each row region may correspond to one test thread.

[0079] It is understandable that the read and write start positions of each test thread are determined from the row area of ​​each data block, including:

[0080] Determine a target data block from each data block;

[0081] Obtain a first thread mapping relationship corresponding to the first thread quantity;

[0082] Determine, according to the first thread mapping relationship, a second starting row number of each test thread corresponding to the data block-by-data block reading and writing in the target data block;

[0083] The read and write start positions of the row areas where the second start row numbers corresponding to the test threads are located are randomly generated.

[0084] The target data block may be randomly generated, or a data block satisfying the length of the written test data may be selected based on the length of the test data.

[0085] The first thread mapping relationship can be determined when the number of first threads is determined, and is used to record the mapping relationship between the test thread for reading and writing data blocks one by one, and the data blocks and the row areas.

[0086] The second starting row number is the row number of the row area where the corresponding test thread starts writing test data. In some embodiments, when the number of test threads is greater than the number of rows, the test threads correspond one-to-one to the row areas of a single data block, and the second starting row number is the row number of the row area corresponding to each test thread. In some embodiments, when the number of test threads is less than the number of rows, one test thread corresponds to multiple row areas. At this time, the position where each test thread starts writing can be the row number of any row in the corresponding row area. The embodiment of the present application does not limit how to determine the second starting row number in the case of multiple rows, and those skilled in the art can selectively set it according to actual conditions.

[0087] It can be understood that the test thread includes a read thread, a write thread and a comparison thread: the read thread, the write thread and the comparison thread are set one by one, and each created test thread is synchronously called to output the test results, including:

[0088] Call each writing thread to start writing from the corresponding reading and writing starting position;

[0089] After the data at each read / write start position is written, each read thread is called to start the read operation from the read / write start position;

[0090] The comparison thread is called to compare the operation data of the corresponding writing thread and reading thread, and the comparison result is output.

[0091] By dividing the test threads into three categories, a comparison can be performed synchronously after each bit of data is written, so that the location of the fault can be discovered in time, thereby improving the test efficiency.

[0092] It is understandable that after the test thread and the target memory's respective read and write start positions are determined, those skilled in the art can construct test data of the same length according to actual conditions. At this time, the result verification can be performed based on the test data and the data read from the target memory.

[0093] Since the embodiment of the present application performs read, write and comparison operations on a single bit through a thread, write anomalies during the write process or the read and write process can be further discovered.

[0094] For example, refer to Figures 2 to 5 The following are the specific steps of the read and write test method of the memory storage device in the embodiment of the present application:

[0095] S1. In response to a request to start a test, a test view is displayed; the test view displays a test type drop-down box of a memory storage device, a read / write type selection box, and a thread type;

[0096] S2. In response to the interaction request, determine a target test type, a target read / write type, and a target thread type from the interaction request.

[0097] S3. Determine the number of data blocks and rows of the target memory storage according to the target test type.

[0098] S4. Determine the number of threads based on the number of data blocks, number of rows, thread type, and target read / write type, as follows:

[0099] The thread type indicates that the same test thread has read, write and compare functions at the same time:

[0100] The maximum number of threads supported by the test platform is used as the maximum number of write threads;

[0101] When the target read / write type is set to one and is read / write by data block, the number of first threads and the first thread mapping relationship are determined by referring to the above method of determining the number of threads by data block;

[0102] When the target read / write type is set to one and is multi-data block read / write, the number of second threads and the second thread mapping relationship are determined by referring to the method of determining the number of threads for multi-data block read / write;

[0103] When there are multiple target read / write types, which are block-by-block read / write and multi-block read / write, respectively, the number of first threads and the first thread mapping relationship in block-by-block read / write and the number of second threads and the second thread mapping relationship in multi-block read / write are determined respectively.

[0104] The thread type indicates that a test thread has only one of the following functions: read, write, and compare:

[0105] The maximum number of threads supported by the test platform is divided by 3 as the maximum number of write threads;

[0106] When the target read / write type is set to one and is read / write by data block, the number of first threads and the first thread mapping relationship are determined by referring to the above method of determining the number of threads by data block;

[0107] When the target read / write type is set to one and is multi-data block read / write, the number of second threads and the second thread mapping relationship are determined by referring to the method of determining the number of threads for multi-data block read / write;

[0108] When there are multiple target read / write types, which are block-by-block read / write and multi-block read / write, respectively, the number of threads and thread mapping relationship for block-by-block read / write and the number of threads and thread mapping relationship for multi-block read / write are determined respectively. At this time, the number of threads of the test thread to be created can be set to the largest one between the first number of threads and the second number of threads.

[0109] S4. Create test threads according to the number of threads; and determine the read and write start positions of each test thread from the row area of ​​each data block according to the thread mapping relationship.

[0110] S5. According to each read and write start position, construct the test data of the target test case and display it;

[0111] S6. Synchronously call each test thread created, output the test results, compare the test results with the test data, determine whether each target test case is executed successfully, and if it fails, display the failed memory address.

[0112] The embodiment of the present application also provides an electronic device, the electronic device includes a memory and a processor, the memory stores a computer program, and the processor implements the above-mentioned memory storage read and write test method when executing the computer program. The electronic device can be any smart terminal including a tablet computer, a car computer, etc.

[0113] See also Figure 6 , Figure 6 The hardware structure of an electronic device of another embodiment is illustrated, and the electronic device includes:

[0114] The processor 601 may be implemented by a general-purpose CPU (Central Processing Unit), a microprocessor, an application-specific integrated circuit (Application Specific Integrated Circuit, ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of the present application;

[0115] The memory 602 may be a NAND flash, and the relevant program code is stored in the memory 602, and the processor 601 calls and executes the read and write test method of the memory storage of the embodiment of the present application;

[0116] Input / output interface 603, used to implement information input and output;

[0117] Communication interface 604, used to realize communication interaction between the device and other devices, which can be realized through wired mode (such as USB, network cable, etc.) or wireless mode (such as mobile network, WIFI, Bluetooth, etc.);

[0118] A bus 605 that transmits information between various components of the device (e.g., processor 601, memory 602, input / output interface 603, and communication interface 604);

[0119] The processor 601 , the memory 602 , the input / output interface 603 and the communication interface 604 are connected to each other in communication within the device via a bus 605 .

[0120] An embodiment of the present application also provides a computer-readable storage medium, which is a computer-readable storage medium that stores a computer program. When the computer program is executed by a processor, it implements the read and write test method of the above-mentioned memory storage.

[0121] The memory, as a non-transient computer-readable storage medium, can be used to store non-transient software programs and non-transient computer executable programs. In addition, the memory may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some embodiments, the memory may optionally include a memory remotely disposed relative to the processor, and these remote memories may be connected to the processor via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0122] The embodiments described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. Those skilled in the art will appreciate that with the evolution of technology and the emergence of new application scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0123] Those skilled in the art will appreciate that the technical solutions shown in the figures do not constitute a limitation on the embodiments of the present application, and may include more or fewer steps than shown in the figures, or a combination of certain steps, or different steps.

[0124] The device embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separated, that is, they may be located in one place or distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0125] Those skilled in the art will appreciate that all or some of the steps in the methods disclosed above, and the functional modules / units in the systems and devices may be implemented as software, firmware, hardware, or a suitable combination thereof.

[0126] The terms "first", "second", "third", "fourth", etc. (if any) in the specification of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0127] It should be understood that in the present application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0128] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the above units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0129] The units described above as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0130] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0131] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including multiple instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of various embodiments of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, referred to as ROM), random access memory (Random Access Memory, referred to as RAM), disk or optical disk and other media that can store programs.

[0132] The preferred embodiments of the present invention are described above with reference to the accompanying drawings, but the scope of the rights of the present invention is not limited thereto. Any modification, equivalent substitution and improvement made by a person skilled in the art without departing from the scope and essence of the present invention should be within the scope of the rights of the present invention.

Claims

1. A read and write test method for a memory storage device, characterized in that: The method comprises: Obtaining the number of data blocks of the target memory storage to be tested and the number of rows of each of the data blocks; Determine the number of test threads to be created according to the number of data blocks, the number of rows, and the read / write type; Creating the number of test threads, and determining the reading and writing start positions of the test threads from the row areas of the data blocks; Synchronously calling each of the created test threads and outputting the test results, so as to synchronously perform the read and write test starting from the corresponding read and write start position through each of the test threads; The test thread includes a read thread, a write thread and a comparison thread: the read thread, the write thread and the comparison thread are set in one-to-one correspondence; there are multiple read and write types, and the multiple read and write types include data block reading and writing and multi-data block reading and writing; the number of test threads to be created is determined according to the number of data blocks, the number of rows and the read and write types, including: Determine the number of first threads corresponding to the data block-by-data block reading and writing according to the number of rows, wherein each test thread corresponds to a row area of ​​at least one row; Get the maximum number of write threads that can be created; the maximum number of write threads is the maximum number of threads supported / 3; In a case where the maximum number of write threads is greater than or equal to the number of data blocks, dividing the maximum number of write threads and the number of data blocks, and rounding down the result of the division to determine a first thread multiple; Determining the number of data block writing threads for a single data block according to the first thread multiple; Determining a target number of write threads according to the number of data block write threads and the number of data blocks; Determining the number of second threads corresponding to the reading and writing of multiple data blocks according to the target number of writing threads; Determine the number of threads according to the first number of threads and the second number of threads; Wherein, each of the test threads created by the synchronous call outputs the test results, including: Calling each of the writing threads to start writing from the corresponding reading and writing starting position; After the data at each of the read / write start positions are written, calling each of the read threads to start a read operation from the read / write start position; The comparison thread is called to compare the operation data of the corresponding writing thread and reading thread, and the comparison result is output.

2. The read-write test method of the memory storage device according to claim 1, characterized in that: The method further comprises: In the case where the maximum number of write threads is less than the number of data blocks, dividing the number of data blocks and the maximum number of write threads, and rounding up the result of the division to determine a second thread multiple; The number of second threads corresponding to the reading and writing of multiple data blocks is determined according to the second thread multiple.

3. The read-write test method of the memory storage device according to claim 1, characterized in that: The step of respectively determining the read and write start positions of the test threads from the row regions of the data blocks includes: Obtaining a second thread mapping relationship corresponding to the number of the second threads in the reading and writing of the multiple data blocks; Determine, according to the second thread mapping relationship, the starting data block corresponding to each of the test threads for reading and writing the multiple data blocks; Randomly generate a second starting row number for each starting data block; For each of the second starting row numbers, a read / write start position is randomly generated from the corresponding row area.

4. The read-write test method of the memory storage device according to claim 1, characterized in that: The determining, according to the number of rows, the number of first threads corresponding to the data block-by-data block reading and writing comprises: Get the maximum number of write threads that can be created; Dividing the number of rows by the maximum number of write threads, and rounding up the result of the division to determine a third thread multiple; The number of first threads corresponding to the data block-by-data block reading and writing is determined according to the third thread multiple.

5. The read-write test method of the memory storage device according to claim 4, characterized in that: The step of respectively determining the read and write start positions of the test threads from the row regions of the data blocks includes: Determine a target data block from each of the data blocks; Obtaining a first thread mapping relationship corresponding to the first thread quantity; Determine, according to the first thread mapping relationship, a second starting row number of each test thread in the target data block corresponding to the data block-by-data block reading and writing; The read and write start positions of the row areas where the second start row numbers corresponding to the test threads are located are randomly generated.

6. An electronic device, characterized in that: The electronic device includes a memory and a processor, the memory stores a computer program, and the processor implements the read and write test method of the memory storage as described in any one of claims 1 to 5 when executing the computer program.

7. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the read and write test method of the memory storage device according to any one of claims 1 to 5 is implemented.

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