A zero line disconnection detection circuit for acquisition terminal

Abstract

The present invention relates to the technical field of electric energy meter data testing, and in particular to a zero-line break detection circuit for a data acquisition terminal. The detection circuit comprises an AC sampling module MK1, four current transformers CT1-CT4, a relay K1, a resistor R1-R4, a diode D1, an NPN transistor Q1, and a processor N1. The circuit collects three-phase voltages and the zero-line voltage and current through MK1, preliminarily determines whether the zero-line current is greater than a preset threshold value I0, further calculates the absolute value of the three-phase voltage vector sum and compares it with the threshold value U0, and re-judges after changing the circuit load state through the relay K1 to accurately determine whether the zero line is broken. The method comprises initialization sampling, preliminary judgment of the current, preliminary judgment of the voltage vector sum, relay action and re-judgment preparation, voltage vector sum re-judgment, and detection termination and response steps. The present invention can accurately detect zero-line break faults, avoid misjudgment, and improve the accuracy and reliability of detection.

Description

Technical Field

[0001] The present invention relates to the technical field of electric energy meter data testing, and in particular to a zero line break detection circuit for an acquisition terminal. Background Art

[0002] With the increasing variety of data acquisition terminals for electricity meters and the increasing requirements for data collection and processing, on-site meter reading environments are becoming increasingly complex. Traditional testing methods struggle to simulate complex on-site meter environments, such as carrier meter networking failures and abnormal data item responses. These environments are difficult to establish and remain static, making them unable to meet the testing requirements for a large number of diverse meter types and the need to simulate a variety of abnormal conditions.

[0003] In existing testing methods, if a small number of simple electricity meters are used for testing, although the testing of the electricity meter data acquisition terminal can be barely achieved manually, the efficiency is low. When simulating the field environment and conducting stress tests, the testing requirements are complex and require a lot of human resources and time. In addition, the test cases cannot be converted into automation, resulting in testers having to perform a lot of repetitive work. Existing testing methods cannot flexibly configure test scenarios, such as changing meter types, meter response data values, and abnormal responses. These testing requirements are difficult to implement in real environments and cannot be completed with simple testing tools or methods, which limits the effectiveness and reliability of the tests. In addition, due to the complexity and variability of the field environment, existing automated testing methods are greatly limited in practical application. Automated testing tools are often unable to adapt to complex field environments, resulting in inaccurate test results or failure to complete the test tasks.

[0004] In response to the above problems, a neutral line break detection circuit for the acquisition terminal is designed to solve the above problems. It simulates the on-site meter reading environment in a virtualized way, realizes flexible configuration of test scenarios, improves test efficiency, reduces repetitive work, and promotes the application of automated testing in the testing of electricity meter data acquisition terminals, which has important practical significance. Summary of the Invention

[0005] In order to solve the problems existing in the background technology, the present invention provides a neutral line disconnection detection circuit for an acquisition terminal, which includes:

[0006] AC sampling module MK1, current transformer CT1, current transformer CT2, current transformer CT3, current transformer CT4, relay K1, resistor R1, resistor R2, diode D1, NPN transistor Q1, processor N1, resistor R3, resistor R4;

[0007] MK1 has a first voltage input terminal, a second voltage input terminal, a third voltage input terminal, a fourth voltage input terminal, a first current input terminal, a second current input terminal, a third current input terminal, a fourth current input terminal, and an output terminal;

[0008] The first voltage input terminal is connected to the A line of the three-phase voltage, the second voltage input terminal is connected to the B line of the three-phase voltage, the third voltage input terminal is connected to the C line of the three-phase voltage, the fourth voltage input terminal is connected to the N line of the three-phase voltage, the first current input terminal is connected to the secondary side of CT1, the second current input terminal is connected to the secondary side of CT2, the third current input terminal is connected to the secondary side of CT3, the fourth current input terminal is connected to the secondary side of CT4, and the output terminal is connected to N1;

[0009] The primary side of CT1 is line A, and the secondary side is connected to the first current input port of MK1;

[0010] The primary side of CT2 is line B, and the secondary side is connected to the second current input port of MK1;

[0011] The primary side of CT3 is C line, and the secondary side is connected to the third current input port of MK1;

[0012] The primary side of CT4 is the N line, and the secondary side is connected to the fourth current input port of MK1;

[0013] Relay K1 has a first port, a second port, a third port NC, a fourth port COM, and a fifth port NO. The first port is connected to the power supply VCC, the second port is connected to the collector of Q1, NC is connected to R1, COM is connected to R2, and NO is left floating.

[0014] One end of R1 is connected to the third port NC of K1, and the other end is connected to phase C of the three-phase voltage;

[0015] One end of R2 is connected to the fourth port COM of K1, and the other end is connected to the neutral line of the three-phase voltage;

[0016] D1 anode is connected to Q1 collector, and cathode is connected to power supply VCC;

[0017] The collector of Q1 is connected to the anode of D1 and the second port of K1, the base is connected to R3, and the emitter is grounded;

[0018] N1 has an input port and an output port, the input port is connected to the output port of MK1, and the output port is connected to R3 and R4;

[0019] One end of R3 is connected to the output port of N1, and the other end is connected to the base of Q1;

[0020] One end of R4 is connected to the output port of N1, and the other end is grounded.

[0021] In the preferred solution, the resistance of R1 is 150kΩ, the resistance of R2 is 150kΩ, the resistance of R3 is 10kΩ, and the resistance of R4 is 10kΩ;

[0022] Preferably, when Q1 is turned on, NC and COM of K1 are in a disconnected state, and NO and COM are in a connected state; when Q1 is turned off, NC and COM of K1 are in a connected state, and NO and COM are in a cut-off state; when the output terminal of N1 outputs a logic high level, Q1 is in a saturated state, and the collector and emitter are turned on; when N1 outputs a logic low level or no output, Q1 is in a cut-off state, and the collector and emitter are turned off.

[0023] A detection method based on a neutral line disconnection detection circuit for an acquisition terminal comprises the following steps:

[0024] S1, initialization sampling: start AC sampling module MK1, start collecting three-phase voltage A phase, phase B phase, phase C and neutral line voltage, while current transformers CT1, CT2, CT3, CT4 measure the current of phase A phase, phase B phase, phase C phase and neutral line respectively; obtain real-time voltage and current data;

[0025] S2, preliminary current judgment: Processor N1N1 receives the three-phase voltage and four-wire current values reported by MK1; judges whether the neutral current IN is greater than the preset threshold I0; the judgment logic is:

[0026] If IN > I0, the neutral line connection is determined to be normal and the detection process ends;

[0027] If IN ≤ I0, then proceed to the next step of voltage vector sum judgment;

[0028] S3, preliminary judgment of voltage vector sum: When the neutral line current is lower than the threshold, processor N1N1 calculates the absolute value of the three-phase voltage vector sum; sets a voltage vector sum threshold U0; the judgment logic is:

[0029] If the absolute value of the three-phase voltage vector sum is less than U0, it is determined that the neutral line connection is normal and the detection process ends;

[0030] If the absolute value of the three-phase voltage vector sum is greater than or equal to U0, the next step is relay action and re-judgment;

[0031] S4, relay action and re-judgment preparation: Processor N1N1 outputs a logic high signal; NPN transistor Q1 turns on after receiving the high signal, forming a circuit between the collector and emitter; the NC terminal of relay K1 is connected to the COM port, while the NO terminal is disconnected from the COM port. At this time, the load system composed of R1, R2, and K1 is connected to the circuit; by changing the circuit load state, observe the voltage change;

[0032] S5, voltage vector sum re-judgment: After the load system is connected, processor N1N1 again calculates the absolute value of the three-phase voltage vector sum; the judgment logic is:

[0033] If the absolute value of the three-phase voltage vector sum is still greater than or equal to U0 at this time, it is determined that a neutral line break fault has occurred;

[0034] If the absolute value of the three-phase voltage vector sum is less than U0, return to step 2 and perform a preliminary current judgment again to avoid misjudgment;

[0035] S6. Detection End and Response: Based on the final judgment result, if it is determined that the neutral line is disconnected, processor N1N1 will output a corresponding fault signal or perform other fault handling operations; if it is determined that the neutral line connection is normal, the current state will be maintained or the detection process will be terminated.

[0036] Preferably, I0=7.5mA.

[0037] Preferably, U0=80V.

[0038] The beneficial effects achieved by the present invention are:

[0039] The present invention is designed to initially determine whether the neutral line is disconnected by determining whether the neutral line current is greater than a preset threshold value, I0. When the neutral line current is below the threshold, further determination is made by calculating the absolute value of the three-phase voltage vector sum and comparing it with the preset threshold value, U0. If the initial determination indicates a possible neutral line disconnection, the circuit load state is altered by relay operation, and the three-phase voltage vector sum is recalculated for re-determination to avoid misjudgments. By connecting a controlled, normally small load between the phase lines, the present invention observes voltage changes by changing the circuit load state when the neutral line is suspected of being disconnected, thereby more accurately determining whether the neutral line is disconnected.

[0040] Through the above-mentioned multi-level judgment mechanism, combined with the preliminary judgment of current, voltage vector and preliminary judgment, as well as relay action and re-judgment, the present invention can more accurately judge whether the neutral wire is broken, effectively avoiding false alarms or missed alarms that may be caused by a single judgment method.

[0041] The detection circuit and method of the present invention are applicable not only to loaded conditions but also to no-load or low-load conditions. They can cope with complex and changing field environments, improving detection reliability and applicability. By integrating a virtualized test platform, the present invention can simulate on-site meter reading environments, reducing the need for actual electricity meters and lowering testing costs. Furthermore, the application of automated testing improves testing efficiency and reduces repetitive tasks.

[0042] The detection circuit of the present invention has extremely low power consumption, minimal impact on grid load, and can perform detection without power outages, reducing the impact on grid operation. This invention provides new ideas and methods for testing electricity meter data acquisition terminals, promoting the application of automated testing in this field and helping to improve the testing level and efficiency of the entire industry. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] FIG1 is a schematic diagram of a neutral line break detection circuit according to the present invention.

[0044] FIG2 is a flow chart of a method for detecting a broken neutral line according to the present invention. DETAILED DESCRIPTION

[0045] The technical solutions of the present invention will be described clearly and completely below in conjunction with the drawings in the present invention. In addition, the forms of the various structures described in the following embodiments are merely examples. The present invention is not limited to the various structures described in the following embodiments. All other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0046] Reference Figure 1 - Figure 2 A zero line break detection circuit for a data acquisition terminal includes an AC sampling module MK1, a current transformer CT1, a current transformer CT2, a current transformer CT3, a current transformer CT4, a relay K1, a resistor R1, a resistor R2, a diode D1, an NPN transistor Q1, a processor N1, a resistor R3, and a resistor R4;

[0047] The MK1 comprises a first voltage input terminal, a second voltage input terminal, a third voltage input terminal, a fourth voltage input terminal, a first current input terminal, a second current input terminal, a third current input terminal, a fourth current input terminal, and an output terminal, wherein the first voltage input terminal is connected to phase A of a three-phase voltage, the second voltage input terminal is connected to phase B of the three-phase voltage, the third voltage input terminal is connected to phase C of the three-phase voltage, the fourth voltage input terminal is connected to the N line of the three-phase voltage, the first current input terminal is connected to the secondary side of CT1, the second current input terminal is connected to the secondary side of CT2, the third current input terminal is connected to the secondary side of CT3, the fourth current input terminal is connected to the secondary side of CT4, and the output terminal is connected to N1;

[0048] The primary side of CT1 is line A, and the secondary side is connected to the first current input port of MK1;

[0049] The primary side of CT2 is line B, and the secondary side is connected to the second current input port of MK1;

[0050] The primary side of CT3 is C line, and the secondary side is connected to the third current input port of MK1;

[0051] The primary side of CT4 is the N line, and the secondary side is connected to the fourth current input port of MK1;

[0052] The relay K1 has a first port, a second port, a third port NC, a fourth port COM, and a fifth port NO. The first port is connected to the power supply VCC, the second port is connected to the collector of Q1, NC is connected to R1, COM is connected to R2, and NO is left floating.

[0053] One end of R1 is connected to the third port NC of K1, and the other end is connected to the C phase of the three-phase voltage;

[0054] One end of R2 is connected to the fourth port COM of K1, and the other end is connected to the neutral line of the three-phase voltage;

[0055] The anode of D1 is connected to the collector of Q1, and the cathode is connected to the power supply VCC;

[0056] The collector of Q1 is connected to the anode of D1 and the second port of K1, the base is connected to R3, and the emitter is grounded;

[0057] N1 has an input port and an output port, the input port is connected to the output port of MK1, and the output port is connected to R3 and R4;

[0058] One end of R3 is connected to the output port of N1, and the other end is connected to the base of Q1;

[0059] One end of R4 is connected to the output port of N1, and the other end is grounded.

[0060] When Q1 is turned on, NC and COM of K1 are in the disconnected state, and NO and COM are in the connected state. When Q1 is turned off, NC and COM of K1 are in the connected state, and NO and COM are in the cut-off state.

[0061] When the output terminal of N1 outputs a logic high level, Q1 is in a saturated state, and the collector and emitter are turned on. When N1 outputs a logic low level or no output, Q1 is in a cut-off state, and the collector and emitter are turned off.

[0062] MK1 can sample and calculate the input three-phase voltage values and the currents on the four lines A, B, C, and N, and send the calculation results to N1 for analysis. It can be replaced by other modules or discrete devices with similar functions.

[0063] The resistor R1 can also be connected to the A phase or the B phase of the three-phase voltage.

[0064] The present invention provides a neutral line disconnection detection method for a data acquisition terminal. MK1 collects three-phase voltage and four-wire current values and reports them to N1. N1 determines whether current exists on the N line. When the N line current is higher than the set threshold I0, the neutral line connection is determined to be normal. When the N line current is lower than the set threshold I0, the load system composed of R1, R2, and K1 plays a major role in balancing the three-phase voltage. N1 calculates the three-phase voltage vector sum. If the absolute value of the vector sum is less than the set threshold V0, the neutral line connection is determined to be normal. If the absolute value of the three-phase voltage vector sum is greater than the set threshold V0, N1 outputs a logic high, Q1 turns on, and K1's NC and COM are disconnected. At this time, N1 calculates the three-phase voltage vector sum again. If the absolute value of the vector sum is less than V0, a neutral line disconnection fault is determined. The specific steps are as follows:

[0065] S1. Initialize sampling

[0066] The AC sampling module MK1 is started to collect the three-phase voltages of phases A, B, and C, as well as the neutral line voltage. At the same time, current transformers CT1, CT2, CT3, and CT4 measure the currents of phases A, B, and C, and the neutral line, respectively.

[0067] Obtain real-time voltage and current data to provide basic data for subsequent judgment.

[0068] S2. Preliminary judgment of current

[0069] Processor N1 receives the three-phase voltage and four-wire current values reported by MK1.

[0070] Judgment logic: Determine whether the neutral current IN is greater than the preset threshold I0 (for example, I0=7.5mA).

[0071] If IN > I0, the neutral line connection is determined to be normal and the detection process ends.

[0072] If IN ≤ I0, proceed to the next step of voltage vector sum judgment.

[0073] S3. Voltage vector and preliminary judgment

[0074] When the neutral current is lower than the threshold, the processor N1 calculates the absolute value of the three-phase voltage vector sum.

[0075] Judgment logic: Set a voltage vector sum threshold U0 (for example, U0=80V).

[0076] If the absolute value of the three-phase voltage vector sum is less than U0, it is determined that the neutral line connection is normal and the detection process ends.

[0077] If the absolute value of the three-phase voltage vector sum is greater than or equal to U0, the next step is relay action and re-judgment.

[0078] S4. Relay action and re-judgment preparation

[0079] The processor N1 outputs a logic high level signal.

[0080] Circuit Change: After receiving a high-level signal, NPN transistor Q1 turns on, forming a path between its collector and emitter. The NC terminal of relay K1 is connected to the COM port, while the NO terminal is disconnected from the COM port. The load system consisting of R1, R2, and K1 is now connected to the circuit.

[0081] By changing the circuit load state, observe the voltage changes.

[0082] S5. Voltage vector sum re-judgment

[0083] After the load system is connected, the processor N1 calculates the absolute value of the three-phase voltage vector sum again.

[0084] Judgment logic:

[0085] If the absolute value of the three-phase voltage vector sum is still greater than or equal to U0 at this time, it is determined that a neutral line break fault has occurred.

[0086] If the absolute value of the three-phase voltage vector sum is less than U0, the process returns to step S2 and performs a preliminary current judgment again to avoid misjudgment.

[0087] S6. Detection Completion and Response

[0088] According to the final judgment result, the processor N1 will perform corresponding operations.

[0089] Judgment logic:

[0090] If it is determined to be a neutral line disconnection fault, the processor N1 will output a corresponding fault signal or perform other fault processing operations.

[0091] If it is determined that the neutral line connection is normal, the current state is maintained or the detection process is ended.

[0092] Through the above steps, the present invention can accurately detect the neutral line disconnection fault, while avoiding the misjudgment that may be caused by a single judgment method, thereby improving the accuracy and reliability of the detection.

[0093] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A zero line disconnection detection circuit for a data acquisition terminal, characterized in that: It includes: AC sampling module MK1, current transformer CT1, current transformer CT2, current transformer CT3, current transformer CT4, relay K1, resistor R1, resistor R2, diode D1, NPN transistor Q1, processor N1, resistor R3, resistor R4; MK1 has a first voltage input terminal, a second voltage input terminal, a third voltage input terminal, a fourth voltage input terminal, a first current input terminal, a second current input terminal, a third current input terminal, a fourth current input terminal, and an output terminal; The first voltage input terminal is connected to the A line of the three-phase voltage, the second voltage input terminal is connected to the B line of the three-phase voltage, the third voltage input terminal is connected to the C line of the three-phase voltage, the fourth voltage input terminal is connected to the N line of the three-phase voltage, the first current input terminal is connected to the secondary side of CT1, the second current input terminal is connected to the secondary side of CT2, the third current input terminal is connected to the secondary side of CT3, the fourth current input terminal is connected to the secondary side of CT4, and the output terminal is connected to N1; The primary side of CT1 is line A, and the secondary side is connected to the first current input port of MK1; The primary side of CT2 is line B, and the secondary side is connected to the second current input port of MK1; The primary side of CT3 is C line, and the secondary side is connected to the third current input port of MK1; The primary side of CT4 is the N line, and the secondary side is connected to the fourth current input port of MK1; Relay K1 has a first port, a second port, a third port NC, a fourth port COM, and a fifth port NO. The first port is connected to the power supply VCC, the second port is connected to the collector of Q1, NC is connected to R1, COM is connected to R2, and NO is left floating. One end of R1 is connected to the third port NC of K1, and the other end is connected to phase C of the three-phase voltage; One end of R2 is connected to the fourth port COM of K1, and the other end is connected to the neutral line of the three-phase voltage; D1 anode is connected to Q1 collector, and cathode is connected to power supply VCC; The collector of Q1 is connected to the anode of D1 and the second port of K1, the base is connected to R3, and the emitter is grounded; N1 has an input port and an output port, the input port is connected to the output port of MK1, and the output port is connected to R3 and R4; One end of R3 is connected to the output port of N1, and the other end is connected to the base of Q1; One end of R4 is connected to the output port of N1, and the other end is grounded.

2. A zero line disconnection detection circuit for a data acquisition terminal according to claim 1, characterized in that: The resistance of R1 is 150kΩ, the resistance of R2 is 150kΩ, the resistance of R3 is 10kΩ, and the resistance of R4 is 10kΩ.

3. The zero line disconnection detection circuit for a data acquisition terminal according to claim 1, characterized in that: When Q1 is turned on, NC and COM of K1 are in the disconnected state, and NO and COM are in the connected state. When Q1 is turned off, NC and COM of K1 are in the connected state, and NO and COM are in the cut-off state. When the output terminal of N1 outputs a logic high level, Q1 is in a saturated state, and the collector and emitter are turned on. When N1 outputs a logic low level or no output, Q1 is in a cut-off state, and the collector and emitter are turned off.

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