System and method for identifying arc discharge in electrical wiring

Abstract

The embodiment of the invention relates to a system and a method for identifying arc discharge in electrical wiring. A wiring device includes an interruption device, a fault detection device, and a controller. The interrupting device is configured to place the wiring device in a tripped state in which power flow between the one or more line terminals and the one or more load terminals is interrupted. The fault detection circuit is configured to detect a fault condition and generate a fault detection signal in response to detecting the fault condition, the fault detection signal being provided to the interrupting device to cause the interrupting device to be in a tripped state. The controller is configured to monitor current of one or more line terminals, identify presence of an inrush state or a steady-state state, and prevent output of the fault detection signal when the inrush state or the steady-state state is identified.

Description

[0001] Information about divisional applications

[0002] This application is a divisional application of the Chinese invention patent application with the application date of July 24, 2019, application number "201980052037.X", and invention name "System and method for identifying arc discharge in electrical wiring".

[0003] Related Applications

[0004] This application claims priority to U.S. Provisional Patent Application No. 62 / 703,127, filed on July 25, 2018, the entire contents of which are incorporated herein by reference. Technical Field

[0005] Embodiments relate to switching electrical devices. Background Art

[0006] When one or more conditions are detected, a switching electrical device, such as but not limited to a circuit interrupting device (e.g., a ground fault circuit interrupter (GFCI) and / or an arc fault circuit interrupter (AFCI)) is configured to switch from a "reset" or locked state to a "tripped" or unlocked state. In some cases, arc discharge may be manifested in the form of a pulsed state and / or a fluctuating state. In such cases, tripping may be used. In other cases, a normally operating load may simulate an arc discharge when first energized, and the arc discharge may be erroneously detected as a result of an inrush condition. In other cases, a normally operating load in a steady state condition may also simulate an arc discharge. Therefore, in such cases, tripping is unnecessary. Summary of the invention

[0007] One embodiment provides a wiring device, which includes an interruption device, a fault detection device, and a controller. The interruption device is configured to place the wiring device in a tripped state, in which the power flow between one or more line terminals and one or more load terminals is interrupted. The fault detection circuit is configured to detect the fault state and generate a fault detection signal in response to detecting the fault state, the fault detection signal being provided to the interruption device to place the interruption device in the tripped state. The controller is configured to monitor the current of the one or more line terminals, identify the presence of at least one selected from the group consisting of an inrush state and a steady state, and prevent the output of the fault detection signal when at least one selected from the group consisting of an inrush state and a steady state is identified.

[0008] Another embodiment provides a wiring device, which includes an interruption device, a fault detection device, and a controller. The interruption device is configured to place the wiring device in a tripped state, in which the power flow between one or more line terminals and one or more load terminals is interrupted. The fault detection circuit is configured to detect the fault state and generate a fault detection signal in response to detecting the fault state, and the fault detection signal is provided to the interruption device to place the interruption device in the tripped state. The controller is configured to monitor the current of one or more line terminals, identify the presence of at least one selected from the group consisting of a pulse state and a fluctuating state, and output the fault detection signal when at least one selected from the group consisting of a pulse state and a fluctuating state is identified.

[0009] Another embodiment provides a method of controlling a wiring device having one or more line terminals and one or more load terminals. The method includes: sensing current of the one or more line terminals via a sensor, and identifying the presence of an inrush state via a controller. The method also includes: preventing power interruption between the one or more line terminals and the one or more load terminals via the controller when at least one selected from the group consisting of the inrush state and the steady state is identified to occur.

[0010] Another embodiment provides a method of controlling a wiring device having one or more line terminals and one or more load terminals. The method includes: sensing current of the one or more line terminals via a sensor, and identifying the presence of at least one selected from the group consisting of a pulse state and a fluctuating state via a controller. The method also includes: interrupting power between the one or more line terminals and the one or more load terminals when at least one selected from the group consisting of a pulse state and a fluctuating state is identified.

[0011] Yet another embodiment provides a wiring device, which includes an interruption device, a fault detection device, and a controller. The interruption device is configured to place the wiring device in a tripped state, in which the power flow between one or more line terminals and one or more load terminals is interrupted. The fault detection circuit is configured to detect the fault state and generate a fault detection signal in response to detecting the fault state, and the fault detection signal is provided to the interruption device to place the interruption device in the tripped state. The controller is configured to monitor the current of the one or more line terminals, identify the presence of at least one selected from the group consisting of a pulse state, a fluctuating state, an inrush state, and a steady state, and control the fault detection circuit based on the identification of at least one selected from the group consisting of a pulse state, a fluctuating state, an inrush state, and a steady state.

[0012] Other aspects of the embodiments described in detail below will become apparent by consideration of the detailed description and accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a perspective cutaway view of a socket 1000 according to some embodiments.

[0014] Figure 2A and Figure 2B According to some embodiments Figure 1 A perspective view of a core assembly of a circuit interrupting device.

[0015] Figure 3 According to some embodiments Figure 1 A perspective view of a coil of a circuit interrupting device.

[0016] Figure 4 According to some embodiments Figure 1 Block diagram of the socket control system.

[0017] Figure 5A and Figure 5B is a diagram showing a method according to some embodiments Figure 1 A diagram of exemplary pulse states for a socket.

[0018] Figure 6 is a diagram showing a method according to some embodiments Figure 1 Flowchart of the socket process.

[0019] Figure 7 is a diagram showing a method according to some embodiments Figure 1 A diagram of an exemplary fluctuation state of a socket.

[0020] Figure 8 is a diagram showing a method according to some embodiments Figure 1 Flowchart of the socket process.

[0021] Fig. 9 is a diagram showing detection according to some embodiments Figure 1 A diagram of an exemplary acceptable window of fluctuating conditions for a socket.

[0022] Fig. 10A and Fig. 10B is a diagram showing a method according to some embodiments Figure 1 A diagram of an exemplary influx state for a socket.

[0023] Fig.11 is a diagram showing a method according to some embodiments Figure 1 Flowchart of the socket process.

[0024] Fig.12 is a diagram showing a method according to some embodiments Figure 1 A diagram of an exemplary steady-state condition of a socket.

[0025] Fig.13 is a diagram showing a method according to some embodiments Figure 1Flowchart of the socket process.

[0026] Fig.14 is a diagram showing a method for detecting a Figure 1 Graph of an exemplary acceptable window of steady-state conditions for a socket.

[0027] Fig.15 is a diagram showing a method according to some embodiments Figure 1 Flowchart of the socket process. DETAILED DESCRIPTION

[0028] Before explaining any embodiment in detail, it should be understood that the present application is not limited in its application to the details of construction and arrangement of components set forth in the following description or illustrated in the following drawings. In addition to the embodiments described below, other embodiments can be practiced or implemented in various ways.

[0029] Figure 1 is a perspective cutaway view of an outlet 1000 including a circuit interruption device according to some embodiments. Outlet 1000 includes a housing 105 having a front cover 110 and a rear cover 115. Housing 105 may be formed of plastic or a similar material.

[0030] The front cover 110 may include a dual-socket panel 120 having a phase hole 125, a neutral hole 130, and a ground hole 135. The panel 120 may also include a hole 140 for accommodating a reset button 145. Although not shown, in some embodiments, the panel 120 may include additional holes for accommodating additional buttons (e.g., a test button), as well as additional holes for accommodating various indicators (e.g., light-emitting diodes, buzzers, etc.). The rear cover 115 is fixed to the front cover 110 and may include one or more terminal screws 150. In some embodiments, the terminal screws 150 include line terminal screws, neutral terminal screws, and / or ground terminal screws. Contained within the front cover 110 and the rear cover 115 is a manifold 155. The manifold 155 provides support for a yoke / bridge assembly 165, which is configured to secure the device 100 to an electrical box.

[0031] Figure 2A and Figure 2B 1 shows a perspective view of a core assembly 200 according to some embodiments. The core assembly 200 is configured to support a printed circuit board 205, which supports most of the working components of the device 100, including Figure 4 The control system 400 is shown. The core assembly 200 also supports a line conductor 210 and a neutral conductor 215. The line conductor 210 and the neutral conductor 215 are electrically connected to the line terminal and the neutral terminal, respectively, and are configured to supply power to the device 100.

[0032] The core assembly 200 may also support a first coil 220 and a second coil 225. As shown, the first coil 220 and the second coil 225 may include a first opening 230 and a second opening 235, respectively. In some embodiments, the first opening 230 is configured to accommodate the line conductor 210, and the second opening 235 is configured to accommodate the neutral conductor 215. In some embodiments, the first coil 220 and the second coil 225 may be embedded in a first printed circuit board 240 and a second printed circuit board 245, respectively. In other embodiments, the first coil 220 and the second coil 225 may be embedded in a single printed circuit board.

[0033] The core assembly 200 can additionally support a third coil 250 having a third aperture 255. In some embodiments, the third aperture 255 is configured to accommodate both the line conductor 210 and the neutral conductor 215.

[0034] Figure 3 An embodiment of the first coil 220 is shown, wherein the printed circuit board is removed for illustrative purposes. As shown, the first coil 220 can be a Luo type coil having an input 305 and an output 310. As shown, the coil 220 also includes an upper portion 315, a lower portion 320, an inner portion 325, an outer portion 330, a plurality of spiral conductors 335, and a plurality of nodes 340 connecting the input 305 to the output 310. As shown, the spiral conductor 335 forms the coil 220 together with the nodes 340. For example, the plurality of conductors 335 form a part of the coil 220 between the inner portion 325 and the outer portion 330, and the plurality of nodes 340 form the coil 220 between the upper portion 315 and the lower portion 320.

[0035] In some embodiments, the second coil 225 is also a Rogowski coil, similar to the coil 220. Although not shown, in some embodiments, the third coil 250 may also be a Rogowski coil embedded on a printed circuit board (e.g., a third printed circuit board or a single printed circuit board including the first coil 220, the second coil 225, and the third coil 250).

[0036] Figure 4 is a block diagram of a control system 200 of an outlet 100 according to some embodiments. The control system 200 includes a controller 205. The controller 205 is electrically and / or communicatively connected to various modules or components of the outlet 100. For example, the controller 205 is connected to the line terminal 210, the load terminal 215, the interrupt device 220, the rectifier 225, and the sensor 230.

[0037] In some embodiments, controller 205 includes a plurality of electrical and electronic components that provide power, operational control, and protection to components and modules within controller 205 and / or outlet 100. For example, controller 205 includes, among other things, an electronic processor 235 (e.g., a microprocessor or another suitable programmable device) and memory 240.

[0038] The memory 240 includes, for example, a program storage area and a data storage area. The program storage area and the data storage area may include a combination of different types of memory, such as a read-only memory (ROM), a random access memory (RAM). Various non-transitory computer-readable media may be used, such as magnetic, optical, physical or electronic memory. The electronic processor 235 is communicatively coupled to the memory 240 and executes software instructions stored in the memory 240 or stored on another non-transitory computer-readable medium (such as another memory or an optical disk). The software may include one or more applications, program data, filters, rules, one or more program modules, and other executable instructions.

[0039] The line terminal 210 is configured to receive line power. The line terminal 210 is selectively electrically connected to the load terminal 215 via the interruption device 220. The load terminal 215 is configured to output the line power to the external load 245 electrically connected to the socket 250.

[0040] The interruption device 220 is configured to interrupt the flow of line power from the line terminal 210 to the load terminal 215. In some embodiments, the interruption device 220 may include components of the core assembly 80, such as the line contact arms 94, 96, the transformers 425, 430, the contacts 102, 104, the load contact arms 98, 100, and the contacts 101, 103.

[0041] Although illustrated as a single line terminal 210, a single load terminal 215, and a single interrupt device 220, in other embodiments, the outlet 100 may include two or more independently functioning line terminals 210, load terminals 215, and interrupt devices 220. For example, a first line terminal, a first load terminal, and a first interrupt device may correspond to a first socket of the outlet 100, while a second line terminal, a second load terminal, and a second interrupt device may correspond to a second socket of the outlet 100.

[0042] The sensor 230 is configured to sense one or more characteristics of the line terminal 210 and / or the load terminal 215. For example, the sensor 230 can sense voltage, current, power and / or temperature. Although shown as being located on the load terminal 215 side, in other embodiments, the sensor 230 can be located on the line terminal 210 side.

[0043] In one embodiment of operation, the controller 205 receives a sensed characteristic (e.g., current) of the line terminal 210 and / or the load terminal 215. The controller 205 analyzes the sensed characteristic (e.g., one or more cycles of the current) and determines whether arcing is occurring. The controller 205 may also determine whether one or more conditions exist. For example, the controller 205 may determine whether a pulse condition exists, whether a surge condition exists, and / or whether an inrush condition exists.

[0044] Figure 5A and Figure 5B A pulse state of current according to some embodiments is shown. The pulse may indicate an arc discharge state that occurs in a short period of time (eg, a single cycle). Figure 5A shows the discontinuity of parallel arc generation, while Figure 5B The discontinuity produced by the series arc is shown.

[0045] Figure 6 300 is a flow chart of a process 300 according to some embodiments. It should be understood that the order of the steps disclosed in process 300 can be varied. In addition, additional steps can be added to the sequence, but not all steps are required. In some embodiments, process 300 is performed by control system 200 and / or controller 205. At box 305, one or more cycles of current (e.g., load current and / or line current) are sensed. Calculate the root mean square (RMS) value of one or more cycles of the current (box 310). In some embodiments, the RMS value of one or more cycles of the current is calculated by controller 205. Compare the RMS value with a threshold value (box 315). In some embodiments, the threshold value is about 2Arms to about 16Arms (e.g., about 3Arms and / or about 15Arms).

[0046] When the RMS value is below the threshold, a pulse condition does not occur and the process 300 loops back to block 305. When the RMS value is above the threshold, a determination is made as to whether a change in the RMS value between a first of the one or more cycles and a second of the one or more cycles is positive (block 320). When the change is negative, a pulse condition does not occur and the process 300 loops back to block 305.

[0047] When the change is positive, the magnitude of the change in the RMS value is determined (block 325). The magnitude of the change in the RMS value is compared to a threshold value (block 330). When the magnitude of the change in the RMS value is below the threshold value, a pulse state does not occur, and the process 300 loops back to block 305. When the magnitude of the change in the RMS value is above the threshold value, it is determined whether the change between the second cycle and the third cycle is negative, and whether the magnitude of the change in the RMS value between the second cycle and the third cycle is within a range (block 335). In some embodiments, the range is a predetermined percentage range of the change in the RMS value between the first cycle and the second cycle. For example, when the change in the RMS value between the first cycle and the second cycle is 5 Arms, the change in the RMS value between the second cycle and the third cycle must be within 10% of 5 Arms (e.g., a range of about 4.5 Arms to about 5.5 Arms). When the change in the RMS value between the second cycle and the third cycle is not within the range, a pulse state does not occur, and the process 300 loops back to block 305. When the change in the RMS value between the second cycle and the third cycle is within the range, the controller 205 determines that arcing is the result of a pulse state (block 340). In some embodiments, when the pulse condition exists, the flow of line power is interrupted.

[0048] Figure 7 The fluctuating state of the current according to some embodiments is shown. The fluctuating state may indicate the presence of arcing. The fluctuating state may exist when a minimum number of changes that fall outside the acceptance envelope or acceptable variation envelope occur in both the positive (increasing) and negative (decreasing) directions.

[0049] Figure 8 4 is a flow chart of a process 400 according to some embodiments. It should be understood that the order of the steps disclosed in process 400 can vary. In addition, additional steps can be added to the sequence, but not all steps are required. In some embodiments, process 400 is performed by control system 200 and / or controller 205. At box 405, one or more cycles of a current (e.g., a load current and / or a line current) are sensed. In some embodiments, the RMS value of one or more cycles of the sensed current is determined. One or more cycles are compared to a range (box 410). In some embodiments, the range is an acceptance range. In some embodiments, the acceptance range is determined based on the current of the previous one or more cycles. In such an embodiment, the acceptance range can be determined based on a change in the RMS value of the current of the previous one or more cycles.

[0050] Fig. 9 An acceptance range 450 is shown including an upper acceptance limit 455 and a lower acceptance limit 460. As shown, the upper acceptance limit 455 and the lower acceptance limit 460 can vary based on the value of the current in one or more previous cycles. Fig. 9As shown in the example of , starting from approximately cycle number 33, the upper limit 455 increases and the lower limit 460 decreases, which is a result of the RMS values ​​of cycle number 33 and the 7 cycles before it.

[0051] Back to Figure 8 , when one or more cycles are within the range, a fluctuating condition does not occur, and the process 400 loops back to block 405. When one or more cycles are outside the range, it is determined whether N (e.g., three or more) cycles are outside the range (block 415). In some embodiments, block 415 determines whether the amount of subsequent cycles is outside the variable range based on one or more previous cycles. When N cycles are not outside the range, a fluctuating condition does not occur, and the process 400 loops back to block 405. When N cycles are outside the range, the controller 205 determines that the arc discharge is the result of a fluctuating condition (block 420). In some embodiments, when a fluctuating condition exists, the flow of line power is interrupted.

[0052] Fig. 10A and Fig. 10B 1 shows an inrush condition of current according to some embodiments. An inrush condition may indicate the presence of a properly functioning load. An inrush condition may exist when the current undergoes a relatively large change from an initial non-conductive state followed by an exponential decrease in current over a number of cycles. For example, Fig. 10A As shown, during time period 500a, the current is relatively stable (or non-conductive). Starting from time period 505a, the current changes relatively greatly (for example, the change amplitude of the current is about 80A), and then the current decreases exponentially in multiple cycles (for example, cycles 3 to 10).

[0053] like Fig. 10B As shown, during time period 500b, the current (e.g., the current of the resistive load) is relatively stable (or non-conductive). Starting from time period 505b, the current undergoes a relatively large change (e.g., the magnitude of the current changes to about 15A). Fig. 10A and Fig. 10B ) may be a normal operating function of the outlet 100, so interrupting line power may not be necessary.

[0054] Fig.115 is a flow chart of process 550 according to some embodiments. It should be understood that the order of the steps disclosed in process 550 can be changed. In addition, additional steps can be added to the sequence, but not all steps are required. In some embodiments, process 550 is performed by control system 200 and / or controller 205. In some embodiments, process 550 is initiated when an arc discharge (or arc fault state) is sensed (e.g., via controller 205). At box 555, one or more cycles of current (e.g., load current and / or line current) are sensed. In some embodiments, the RMS value of one or more cycles of the sensed current is determined. One or more cycles (e.g., the RMS value of one or more cycles) are analyzed to determine whether the current has a large (e.g., 20A or greater) change from a first cycle (n) to a second cycle (n+1) (box 560). In some embodiments, the RMS value of the current is used to measure the current change. If there is no change, process 550 loops back to box 555.

[0055] If there is a relatively large change in current, it is determined whether the change between the second cycle (n+1) and the third cycle (n+2) complies with the decay order (block 565) (e.g., Fig. 10A In some embodiments, the attenuation level is based on the current value of the immediately preceding cycle. For example, to comply with the attenuation level, the amplitude of a cycle (e.g., the third cycle) may be within a percentage range (e.g., a range of about 80% to about 90%) of the amplitude of the preceding cycle (e.g., the second cycle).

[0056] If the change does not conform to the decay order, then there is no inrush condition and the process 550 returns to block 555. If the change conforms to the decay order, the controller 205 determines whether the decay order has been conformed for N cycles (block 575). In some embodiments, N cycles is greater than one.

[0057] If the decay progression is not met within N cycles, then there is no inrush condition and the process 550 returns to block 555. In some embodiments, if arcing is detected by other means (e.g., by detecting correlation, pulses, and / or fluctuations), the power flow may be interrupted. If the decay progression has been met for N cycles, the controller 205 determines that there is an inrush condition (block 580). In some embodiments, interruption of line power flow is prohibited when an inrush condition exists.

[0058] In some embodiments, rather than monitoring the decay level, a relatively large change in current (e.g., Fig. 10BIn some embodiments, an inrush condition may be determined based on an RMS current that stays within one or more predetermined amplitude boundaries (or decay progression envelopes). In some embodiments, the decay progression envelope defines a set of upper and lower limit pairs (expressed in ratio form) that are specific to the position of each cycle in the sequence that occurs after an initial cycle following a relatively large change in current. An RMS value may conform to the decay progression envelope by falling between an upper and lower limit pair at a cycle-specific position in the sequence, which is multiplied by the RMS value of the previous cycle of the cycle. If substantially all cycles in the sequence conform to the decay progression envelope, an inrush condition may be identified, and any arc faults that may have been erroneously identified during the sequence may be ignored.

[0059] Fig.12 A steady state condition of current according to some embodiments is shown. A steady state condition may indicate the presence of a properly operating load. A steady state condition may exist when the current changes over a plurality of cycles (e.g., fifteen) are relatively small (e.g., changes within + / - 0.5 Arms) and / or the relative changes in the correlation coefficients calculated between adjacent cycles fall within the acceptance envelope of each of the plurality of cycles (e.g., fifteen).

[0060] Fig.13 6 is a flow chart of a process 600 according to some embodiments. It should be understood that the order of the steps disclosed in process 600 can be varied. In addition, additional steps can be added to the sequence, but not all steps are required. In some embodiments, process 600 is performed by control system 200 and / or controller 205. At box 605, one or more cycles of current (e.g., load current and / or line current) are sensed. In some embodiments, the RMS value of one or more cycles of the current is determined. One or more cycles (e.g., the RMS value of one or more cycles) (box 610) are analyzed to determine whether the current change (box 615) from the first cycle (n) to the second cycle (n+1) is within the change limit or range (e.g., 0.5Arms). Similarly, in some embodiments, the correlation (e.g., correlation coefficient) between adjacent members of the set of one or more cycles of the current is determined (box 620). One or more cycles (e.g., correlation coefficients of adjacent cycles) are analyzed to determine whether the change in the correlation coefficient value between the first cycle (n) relative to the second cycle (n+1) and the second cycle (n+1) relative to the third cycle (n+2) is within the range (box 625). In some embodiments, the range is an acceptance range. In some embodiments, the acceptance range may be determined based on a change in the correlation coefficient value over one or more previous cycles of the current.

[0061] Fig.14An acceptance range 630 including an upper acceptance limit 635 and a lower acceptance limit 640 is shown. As shown, the upper acceptance limit 635 and the lower acceptance limit 640 can vary based on the difference in correlation between adjacent members of the set of one or more previous cycles. Fig.14 As shown in the example of , starting from approximately cycle number 225, upper limit 635 increases and lower limit 640 decreases, which is a result of the correlation of cycle number 225 relative to cycle 224 and the correlation coefficients of the 14 pairs of adjacent cycles before cycle 225.

[0062] Back to Fig.13 , when the change in the RMS value is outside the allowed range of variation, a steady state condition does not occur, and the process 600 loops back to block 605. Likewise, when the change in the correlation coefficient value is outside the accepted range, a steady state condition does not occur, and the process 600 loops back to block 605. When one or more cycles demonstrate that the change in the RMS value is within the allowed range of variation, and the change in the correlation coefficient value is within the accepted range, a determination is made as to whether N (e.g., fifteen) cycles meet both sets of range requirements (block 645). When fewer than N cycles meet, a steady state condition does not exist, and the process 600 loops back to block 605. When N cycles meet both sets of range requirements, the controller 205 determines that a steady state condition exists, and ignores any arc faults that were erroneously identified while the steady state condition persists (block 650).

[0063] Fig.15 700 is a flow chart of a process 700 according to some embodiments. It should be understood that the order of the steps disclosed in process 700 can be varied. In addition, additional steps can be added to the sequence, but not all steps are required. In some embodiments, process 700 is performed by control system 200 and / or controller 205. At block 705, one or more cycles of current (e.g., load current and / or line current) are sensed. Controller 205 determines whether an inrush state is detected (block 710). If an inrush state is detected, power interruption is prevented (block 715). If an inrush state is not detected, controller 205 determines whether a steady state state exists (block 720). If a steady state state exists, power interruption is prevented (block 715).

[0064] If an inrush condition is not detected and a steady state condition does not exist, the controller 205 determines whether a pulse condition exists (block 725). If a pulse condition exists, the power flow is interrupted (block 730). If a pulse condition does not exist, the controller 205 determines whether a fluctuating condition exists (block 735). If a fluctuating condition exists, the power flow is interrupted (block 730). If a fluctuating condition does not exist, the controller 205 determines whether a correlation condition exists (block 740). If a correlation condition exists, the power flow is interrupted (block 730). If a correlation condition does not exist, the process 700 loops back to block 705.

[0065] Thus, the above embodiments specifically provide a system and method for preventing unnecessary tripping in a receptacle (e.g., a GFCI and / or AFCI receptacle) and tripping the receptacle in response to the presence of one or more arc conditions. Various features and advantages of the present application are set forth in the following claims.

Claims

1. A wiring device, comprising: an interrupting device configured to be placed in a tripped state; and A controller having an electronic processor and a memory, the controller being configured to identifying the presence of an influx state that complies with the decay progression envelope when the decay progression envelope falls between upper and lower limits at a cycle-specific position in the sequence, and When the inrush condition is detected, the trip condition is prevented.

2. The wiring device according to claim 1, wherein: When the inrush condition is identified, the trip condition is prevented for a predetermined period of time.

3. A wiring device, comprising: an interrupting device configured to be placed in a tripped state; and A controller having an electronic processor and a memory, the controller being configured to The presence of a steady state condition is identified when one or more cycles of the current meet the allowed variation range and acceptable variation envelope of the correlation coefficient value, and When the steady-state condition is identified, the trip state is prevented.

4. The wiring device according to claim 3, wherein: When the steady-state condition is identified, the trip condition is prevented for a predetermined period of time.

5. A wiring device, comprising: an interrupting device configured to be placed in a tripped state; and A controller having an electronic processor and a memory, the controller being configured to identifying the presence of a pulse state by determining a current value of at least one cycle of the current, determining when a change in the current value between a first cycle of the current and a second cycle of the current is positive and greater than a threshold, wherein when the change is negative, determining that a pulse state does not occur, and When the pulse state is detected, the interrupting device is placed in the tripped state. 6 . The wiring device according to claim 5 , wherein the pulse state is further identified by determining that a current value of at least one cycle of the current is greater than a second threshold value. The wiring device according to claim 5 , wherein the current value is a root mean square (RMS) current value.

8. A wiring device, comprising: an interrupting device configured to be placed in a tripped state; and A controller having an electronic processor and a memory, the controller being configured to identifying the presence of a fluctuation state by determining a magnitude of a change in current value between a first cycle of the current and a second cycle of the current, determining whether the magnitude falls outside an acceptance range, wherein the acceptance range is based on the second cycle of the current, and When the fluctuation state is identified, the interrupting device is placed in the tripped state. 9 . The wiring device according to claim 8 , wherein the fluctuation state is further identified by determining when a current value of at least one cycle of the current is greater than a second threshold value.

10. The wiring device according to claim 8, wherein the current value is a root mean square (RMS) current value.

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