Test method and test circuit of power device
By designing a test circuit that includes avalanche stress application branch and on-resistance testing branch, the problem that the prior art cannot accurately evaluate the dynamic on-resistance degradation of power devices after avalanche stress is solved, and accurate measurement and performance analysis of dynamic on-resistance is achieved.
Patent Information
- Application Number
- CN202411733266.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-29
- Publication Date
- 2025-03-07
Smart Images

Figure CN119575115A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present invention relate to the technical field of electrical performance testing, and in particular to a testing method and a testing circuit for a power device. Background Art
[0002] As the core of power conversion and processing, the robustness and reliability assessment and parameter degradation test of power devices are important bases for evaluating the reliability and efficiency of circuit systems.
[0003] The dynamic on-resistance of a power device refers to the equivalent resistance exhibited when the device is in the on state and there is a current change. It reflects the obstruction characteristics of the power device to current conduction when the current changes rapidly during actual operation. At present, a station-to-station test method is usually used to test the change in the dynamic on-resistance of power devices before and after avalanche stress. However, the station switching time is long, which will cause the power device to gradually recover from the avalanche stress state. The existing technology cannot accurately characterize the degradation of the dynamic on-resistance of the power device, cannot effectively evaluate the defect energy level and trap energy level, and thus cannot accurately characterize the true state of the power device. Summary of the invention
[0004] The embodiments of the present invention provide a power device testing method and a testing circuit to improve the testing accuracy of the dynamic on-resistance of the power device and accurately characterize the degradation of the dynamic on-resistance of the power device after being subjected to avalanche stress.
[0005] According to one aspect of the present invention, a power device testing method is provided, which is applied to a power device testing circuit, wherein the testing circuit includes an avalanche stress applying branch, a driving branch, a current sampling branch, a voltage sampling branch, and a voltage output branch;
[0006] The power device testing method comprises an avalanche stress application stage of applying avalanche stress to the power device to be tested, and at least two on-resistance test stages before and after the power device to be tested is subjected to the avalanche stress;
[0007] In the on-resistance test phase, the power device to be tested is controlled to be turned on through the driving branch, a test voltage is provided to the power device to be tested through the voltage output branch, current data collected by the current sampling branch and voltage data collected by the voltage sampling branch are respectively obtained, and the on-resistance of the power device to be tested is calculated according to the current data and the voltage data;
[0008] In the avalanche stress application phase, avalanche stress is applied to the power device to be tested through the avalanche stress application branch in combination with the driving timing output by the driving branch.
[0009] Optionally, the avalanche stress applying branch and the voltage output branch are turned on in a time-sharing manner.
[0010] Optionally, the power device testing method includes a first on-resistance testing stage and a second on-resistance testing stage; the avalanche stress application stage is between the first on-resistance testing stage and the second on-resistance testing stage;
[0011] In the first on-resistance test phase, obtaining a first on-resistance of the power device to be tested before being subjected to the avalanche stress;
[0012] At the end of the avalanche stress application stage, the avalanche stress application branch is controlled to be quickly turned off to enter the second on-resistance test stage. In the second on-resistance test stage, a second on-resistance of the power device to be tested after being subjected to the avalanche stress is obtained;
[0013] The dynamic resistance degradation of the power device to be tested is determined according to the first on-resistance and the second on-resistance.
[0014] Optionally, the power device testing method includes multiple consecutive avalanche stress application stages; or, the power device testing method includes multiple avalanche stress application stages and the second on-resistance testing stages, and the avalanche stress application stages and the second on-resistance testing stages are alternately arranged in sequence.
[0015] Optionally, the avalanche stress applying branch includes a first voltage source, an energy storage capacitor, an energy storage inductor and a first switch, wherein a first end of the first voltage source is connected to a first end of the energy storage inductor, a second end of the energy storage inductor is connected to a first end of the first switch, a second end of the first switch is connected to a first electrode of the power device to be tested, and a control end of the first switch is connected to a first signal source;
[0016] In the avalanche stress application stage, the power device testing method includes:
[0017] Controlling the first switch to be turned on in response to a first control signal output by the first signal source, and controlling the power device under test to be turned on in response to a driving timing output by the driving branch, so that the power device under test generates a conduction current;
[0018] When the on-current of the power device to be tested reaches a preset current value, the power device to be tested is controlled to be turned off in response to the driving timing output by the driving branch, so as to apply avalanche stress to the power device to be tested through the energy storage inductor until the voltage drop between the first pole and the second pole of the power device to be tested reaches a preset voltage value, and the first switch is controlled to be quickly turned off in response to the first control signal.
[0019] Optionally, before the first switch is turned on in response to the first control signal, the power device testing method further includes:
[0020] The energy storage capacitor is charged by the first voltage source.
[0021] According to another aspect of the present invention, there is provided a test circuit for a power device, comprising an avalanche stress applying branch, a driving branch, a current sampling branch, a voltage sampling branch and a voltage output branch;
[0022] The first end of the avalanche stress applying branch is connected to the first pole of the power device to be tested, the second pole of the power device to be tested is connected to the first end of the current sampling branch, the second end of the avalanche stress applying branch is connected to the second end of the current sampling branch, the avalanche stress applying branch is used to provide avalanche stress to the power device to be tested during the avalanche stress applying stage, and the current sampling branch is used to collect current data of the power device to be tested;
[0023] The driving branch is connected to the control electrode of the power device to be tested;
[0024] The first end of the voltage output branch is connected to the first electrode of the power device to be tested, the second end of the voltage output branch is connected to the second end of the current sampling branch, and the voltage output branch is used to provide a test voltage for the power device to be tested in the on-resistance test phase;
[0025] The first end of the voltage sampling branch is connected to the first pole of the power device to be tested, the second end of the voltage sampling branch is connected to the second pole of the power device to be tested, and the voltage sampling branch is used to collect voltage data of the power device to be tested.
[0026] Optionally, the avalanche stress application branch includes a first voltage source, an energy storage capacitor, an energy storage inductor and a first switch, wherein the first end of the first voltage source is connected to the first end of the energy storage inductor, the second end of the energy storage inductor is connected to the first end of the first switch, the second end of the first switch is connected to the first pole of the power device to be tested, the control end of the first switch is connected to a first signal source, and the energy storage capacitor is connected in parallel with the first voltage source;
[0027] The voltage output branch includes a second voltage source and a second switch, the first end of the second voltage source is connected to the first end of the second switch, the second end of the second switch is connected to the first pole of the power device to be measured, the control end of the second switch is connected to a second signal source, and the second end of the second voltage source is connected to the second end of the current sampling branch.
[0028] Optionally, the first switch is a fast switch.
[0029] Optionally, the current sampling branch includes a sampling resistor and a first sampling device, the first end of the sampling resistor serves as the first end of the current sampling branch, the second end of the sampling resistor serves as the second end of the current sampling branch, and the first sampling device is connected in parallel with the sampling resistor;
[0030] The voltage sampling device comprises a clamping circuit and a second sampling device, wherein the clamping circuit is connected in series with the second sampling device and then connected in parallel with the power device to be tested;
[0031] The driving branch includes a driver connected to a control electrode of the power device to be tested.
[0032] The technical solution provided by the embodiment of the present invention can realize the test of the dynamic on-resistance of the power device to be tested before and after being subjected to avalanche stress through a set of test circuits without changing stations. Therefore, the unrecovered power device to be tested can be tested within a short time after the power device to be tested is subjected to avalanche stress, so that the influence on the dynamic on-resistance of the power device to be tested after being subjected to avalanche stress can be tested more realistically, and then the degradation of the dynamic on-resistance of the power device to be tested after being subjected to avalanche stress can be characterized, which is beneficial to provide a real basis for performance analysis of power devices and optimization of device parameters.
[0033] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0035] Figure 1 A schematic diagram of the structure of a power device test circuit provided by an embodiment of the present invention;
[0036] Figure 2 A flow chart of a method for testing a power device provided by an embodiment of the present invention;
[0037] Figure 3 A schematic structural diagram of another power device test circuit provided by an embodiment of the present invention;
[0038] Figure 4 A flowchart of another power device testing method provided by an embodiment of the present invention;
[0039] Figure 5 A schematic diagram of a sampling waveform corresponding to a power device to be tested provided by an embodiment of the present invention;
[0040] Figure 6 A schematic diagram of a sampling waveform corresponding to another power device to be tested provided by an embodiment of the present invention;
[0041] Figure 7 A schematic diagram of a sampling waveform corresponding to another power device to be tested provided by an embodiment of the present invention;
[0042] Figure 8 A schematic structural diagram of another power device test circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0043] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.
[0044] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0045] In switching circuits, UIS (Unclamped Inductive Switching), also known as avalanche stress, is generally considered to be the most extreme stress condition that power devices are subjected to in power electronics applications. When a power device is subjected to avalanche stress, performance degradation may occur. For example, high-energy carriers generated during avalanche stress will form defects and traps inside the semiconductor material of the power device. These defects and traps will capture carriers, thereby reducing the number of effective carriers involved in conduction, thereby affecting the dynamic on-resistance. Therefore, accurately characterizing the change in on-resistance of a power device after being subjected to avalanche stress is crucial to evaluating the stability and reliability of the power device.
[0046] At present, a station-to-station test method is usually used to test the change of dynamic on-resistance of power devices before and after avalanche stress. However, the delay time of switching stations is in the ms or even s level. The long test switching process will cause the power devices to gradually recover from the avalanche stress state, and it is impossible to accurately characterize the change of the dynamic on-resistance of the power devices. It is also impossible to accurately characterize the degradation of the dynamic on-resistance of the power devices, and it is impossible to effectively evaluate the defect energy level and trap energy level, so it is impossible to accurately characterize the true state of the power devices.
[0047] This embodiment provides a method for testing a power device, which eliminates the station switching operation and can achieve rapid stress switching through only one set of circuits, thereby eliminating the long delay caused by station switching and achieving dynamic on-resistance testing of the power device within a short time after avalanche stress is applied. Figure 1 The present invention provides a schematic diagram of a power device test circuit according to an embodiment of the present invention. The test circuit includes an avalanche stress application branch 11, a drive branch 12, a current sampling branch 13, a voltage sampling branch 14 and a voltage output branch 15. The avalanche stress application branch 11 is used to provide avalanche stress to the power device Q1 to be tested. The test method provided by the embodiment of the present invention can be applied to Figure 1 The test circuit of the power device is shown.
[0048] Specifically, the test method includes an avalanche stress application stage of applying avalanche stress to the power device Q1 to be tested. In the avalanche stress application stage, avalanche stress is applied to the power device Q1 to be tested through the avalanche stress application branch 11, and the avalanche stress application branch 11 is quickly turned off after the avalanche stress application is completed, so that the avalanche stress application branch 11 is disconnected from the power device Q1 to be tested.
[0049] The test method also includes at least two on-resistance test stages before and after the power device Q1 to be tested is subjected to avalanche stress, that is, the power device Q1 to be tested has at least one on-resistance test stage before being subjected to avalanche stress, and has at least one on-resistance test stage after being subjected to avalanche stress. In the on-resistance test stage, the power device Q1 to be tested is controlled to be turned on by the driving branch 12, and the test voltage is provided to the power device Q1 to be tested by the voltage output branch 15, and the current data collected by the current sampling branch 13 and the voltage data collected by the voltage sampling branch 14 are respectively obtained, and the on-resistance of the power device Q1 to be tested is calculated based on the current data and the voltage data. Among them, the voltage data and the current data of the power device Q1 to be tested are collected respectively before and after the avalanche stress application stage, and the dynamic on-resistance of the power device Q1 to be tested before and after the avalanche stress can be obtained.
[0050] The technical solution provided by the embodiment of the present invention can realize the test of the dynamic on-resistance of the power device Q1 to be tested before and after being subjected to avalanche stress through a set of test circuits without changing stations. Therefore, the unrecovered power device Q1 to be tested can be tested within a short time after the power device Q1 to be tested is subjected to avalanche stress, so that the influence on the dynamic on-resistance of the power device Q1 to be tested after being subjected to avalanche stress can be tested more realistically, and then the degradation of the dynamic on-resistance of the power device Q1 to be tested after being subjected to avalanche stress can be characterized, which is beneficial to provide a real basis for performance analysis of power devices and optimization of device parameters.
[0051] Figure 2 A flow chart of a power device testing method provided by an embodiment of the present invention, which can be applied to Figure 1 The test circuit of the power device shown. The test method provided by the embodiment of the present invention includes at least two on-resistance test stages of the power device Q1 to be tested before and after being subjected to avalanche stress, that is, the power device Q1 to be tested has at least one first on-resistance test stage before being subjected to avalanche stress, and has at least one second on-resistance test stage after being subjected to avalanche stress.
[0052] Combination Figure 1 and Figure 2 , the power device testing method provided in this embodiment includes:
[0053] S110. In the first on-resistance test stage, the power device to be tested is controlled to be turned on through the driving branch, and the test voltage is provided to the power device to be tested through the voltage output branch. The first current data collected by the current sampling branch and the first voltage data collected by the voltage sampling branch at the same time are obtained, and the on-resistance of the power device to be tested before being subjected to avalanche stress is calculated based on the first current data and the first voltage data.
[0054] Specifically, the voltage output branch 15 and the power device to be tested Q1 form an on-resistance test loop, the current sampling branch 13 is connected in series in the on-resistance test loop, and the voltage sampling branch 14 is connected in parallel with the power device to be tested Q1. In the first on-resistance test phase, the avalanche stress application branch 11 is controlled to be turned off, the voltage output branch 15 is turned on, the voltage output branch 15 provides a test voltage to the power device to be tested Q1, and the power device to be tested Q1 is controlled to be turned on through the driving branch 12, and a current is generated in the on-resistance test loop, and the current (drain current IDS) is collected through the current sampling branch 13, and the voltage (source-drain voltage VDS) at both ends of the power device to be tested Q1 is collected through the voltage sampling branch 14. Among them, the current size in the on-resistance test loop can be adjusted by the voltage output branch 15 to achieve the setting of different currents in the on-resistance test loop.
[0055] After the current and voltage sampling is completed, the current and voltage sampled at the same time are used as reference data to calculate the dynamic on-resistance of the power device Q1 to be tested before being subjected to avalanche stress.
[0056] S120 . In the avalanche stress application phase, avalanche stress is applied to the power device to be tested through the avalanche stress application branch in combination with the driving timing output by the driving branch.
[0057] Specifically, the avalanche stress application branch 11 and the power device to be tested Q1 together form an avalanche stress application loop. After the first on-resistance test phase is completed, the avalanche stress application phase is entered. In the avalanche stress application phase, the power device to be tested Q1 is turned on or off in combination with the drive timing output by the drive branch 12, and the voltage output branch 15 is controlled to be turned off, and the avalanche stress application branch 11 is turned on, and avalanche stress is provided to the power device to be tested Q1 through the avalanche stress application branch 11.
[0058] Optionally, in this embodiment, the avalanche stress application branch 11 and the voltage output branch 15 are turned on in a time-sharing manner. When the avalanche stress application branch 11 is turned on, the voltage output branch 15 is turned off; when the voltage output branch 15 is turned on, the avalanche stress application branch 11 is turned off. By quickly turning off the avalanche stress application branch 11, the dynamic on-resistance test of the power device Q1 to be tested can be achieved in a short time after being subjected to avalanche stress, which is beneficial to reducing the recovery time of the power device Q1 to be tested, so as to accurately characterize the degradation of the dynamic on-resistance of the power device Q1 to be tested after avalanche stress, and accurately characterize the true state of the power device Q1 to be tested.
[0059] S130. In the second on-resistance test phase, the power device to be tested is controlled to be turned on through the driving branch, and the test voltage is provided to the power device to be tested through the voltage output branch. The second current data collected by the current sampling branch and the second voltage data collected by the voltage sampling branch at the same time are obtained, and the on-resistance of the power device to be tested after being subjected to avalanche stress is calculated based on the second current data and the second voltage data.
[0060] Among them, at the end of the avalanche stress application stage, the avalanche stress application branch 11 is controlled to be quickly turned off, and the second on-resistance test stage is entered. In the second on-resistance test stage, the on-resistance of the power device Q1 to be tested after being subjected to avalanche stress is obtained. The working process of the second on-resistance test stage is the same as that of the first on-resistance test stage, but in the second on-resistance test stage, the dynamic on-resistance obtained is the on-resistance of the power device Q1 to be tested after being subjected to avalanche stress, and the specific working process is not repeated.
[0061] S140 , judging the dynamic resistance degradation of the power device to be tested according to the on-resistance of the power device to be tested before and after it is subjected to avalanche stress.
[0062] Specifically, after the last second on-resistance test phase is completed, the dynamic on-resistance of the power device Q1 to be tested before and after being subjected to avalanche stress is obtained, and by comparing the dynamic on-resistance of the power device Q1 to be tested before being subjected to avalanche stress with the dynamic on-resistance after being subjected to avalanche stress, the degradation of the dynamic on-resistance of the power device Q1 to be tested can be obtained. According to the test method provided in the embodiment of the present invention, some devices with defects in the process or problems in the manufacturing process can be screened out, and a reference basis can be provided for device stability analysis.
[0063] Figure 3 A schematic diagram of another power device test circuit provided by an embodiment of the present invention, referring to Figure 3On the basis of the above embodiment, optionally, the avalanche stress applying branch 11 includes a first voltage source U1, an energy storage capacitor C1, an energy storage inductor L1 and a first switch L1, the first end of the first voltage source U1 is connected to the first end of the energy storage inductor L1, the second end of the energy storage inductor L1 is connected to the first end of the first switch K1, the second end of the first switch K1 is connected to the first pole of the power device Q1 to be tested, the control end of the first switch K1 is connected to the first signal source 21, in response to the first control signal output by the first signal source 21, the second pole of the power device Q1 to be tested is grounded via the current sampling branch 13, the second end of the first voltage source U1 is grounded, and the energy storage capacitor C1 is connected in parallel with the first voltage source U1. The voltage output branch 15 may include a second voltage source U2 and a second switch K2, the first end of the second voltage source U2 is connected to the first end of the second switch K2, the second end of the second switch is connected to the first pole of the power device Q1 to be tested, the control end of the second switch K2 is connected to the second signal source 22, in response to the second control signal output by the second signal source 22, and the second end of the second voltage source U2 is grounded.
[0064] Optionally, taking the power device Q1 to be tested as a MOSFET as an example, the control electrode of the power device Q1 to be tested may be a gate G, the first electrode may be a drain D, and the second electrode may be a source S.
[0065] Figure 4 A flowchart of another power device testing method provided by an embodiment of the present invention, referring to Figure 3 and Figure 4 Based on the above embodiment, optionally, the testing method provided by the embodiment of the present invention includes:
[0066] S110. In the first on-resistance test stage, the power device to be tested is controlled to be turned on through the driving branch, and the test voltage is provided to the power device to be tested through the voltage output branch. The first current data collected by the current sampling branch and the first voltage data collected by the voltage sampling branch at the same time are obtained, and the on-resistance of the power device before being subjected to avalanche stress is calculated based on the first current data and the first voltage data.
[0067] S1201. During the avalanche stress application phase, the first switch is controlled to be turned on in response to a first control signal output by a first signal source, and the power device under test is controlled to be turned on in response to a driving timing output by a driving branch, so that the power device under test generates a conduction current.
[0068] S1202. When the on-current of the power device under test reaches a preset current value, the power device under test is controlled to shut down in response to the driving timing output by the driving branch, so as to apply avalanche stress to the power device under test through the energy storage inductor until the voltage drop between the first pole and the second pole of the power device under test reaches a preset voltage value, and the first switch is controlled to shut down quickly in response to the first control signal.
[0069] S130. In the second on-resistance test phase, the power device to be tested is controlled to be turned on through the driving branch, and the test voltage is provided to the power device to be tested through the voltage output branch. The second current data collected by the current sampling branch and the second voltage data collected by the voltage sampling branch at the same time are obtained, and the on-resistance of the power device after being subjected to avalanche stress is calculated based on the second current data and the second voltage data.
[0070] S1401. Determine the dynamic resistance degradation of the power device under test according to the comparison value of the on-resistance of the power device under test before and after the power device under test is subjected to avalanche stress.
[0071] Figure 5 A schematic diagram of a sampling waveform corresponding to a power device to be tested provided by an embodiment of the present invention, combined with Figure 3-Figure 5 The specific working process of the power device testing method provided in this embodiment is as follows:
[0072] Before time t0, the energy storage capacitor C1 is pre-charged by the first voltage source U1, and enters the first on-resistance test phase after being fully charged.
[0073] In the first on-resistance test phase (t0-t1 time period), the first switch K1 is turned off in response to the first control signal, the second switch K2 is turned on in response to the second control signal, the second voltage source U2 provides a test voltage for the power device Q1 to be tested, and a driving timing is applied to the control electrode of the power device Q1 to be tested through the driving branch 12. The gate-source voltage VGS of the power device Q1 to be tested is greater than the threshold voltage, and the power device Q1 to be tested is turned on. The source-drain voltage VDS of the power device Q1 to be tested is collected through the voltage sampling branch 14, and the drain current IDS at the same time is collected through the current sampling branch 13. The same time here means that the source-drain voltage VDS and the drain current IDS of the power device Q1 to be tested are sampled values at the same time. The on-resistance of the power device Q1 to be tested before being subjected to avalanche stress is calculated based on the ratio of the collected source-drain voltage VDS and the drain current IDS.
[0074] Optionally, the current in the on-resistance test loop can be adjusted by adjusting the output voltage of the second voltage source U2, or an adjustable resistor can be connected in series in the on-resistance test loop, and the current in the on-resistance test loop can be changed by adjusting the resistance value of the adjustable resistor, so as to achieve the setting of different currents in the on-resistance test loop.
[0075] In the avalanche stress application stage (time period t2-t4), at time t2, the first switch K1 is turned on in response to the first control signal, the second switch K2 is turned off in response to the second control signal, and the power device Q1 to be tested is turned on in response to the driving timing output by the driving branch 12. Since the energy storage capacitor C1 has been fully charged, the energy storage capacitor C1 can provide instantaneous high voltage for the power device Q1 to be tested, which can avoid the slow rise of the voltage across the power device Q1 to be tested, resulting in inaccurate measurement results. The drain current IDS of the power device Q1 to be tested gradually increases, and in this process, all the energy output by the first voltage source U1 is stored in the energy storage inductor L1.
[0076] At time t3, the drain current IDS rises to a preset current value, and the power device Q1 to be tested responds to the driving timing output by the driving branch 12 and is turned off. All the energy stored in the energy storage inductor L1 is transferred to the power device Q1 to be tested, and the power device Q1 to be tested is subjected to avalanche stress. At this time, the source-drain voltage VDS of the power device Q1 to be tested is an avalanche voltage BVDSS. At time t4, when the source-drain voltage VDS of the power device Q1 to be tested collected by the voltage sampling branch 14 drops to a preset voltage value (e.g., 0V), the first switch K1 is quickly turned off to cut off the avalanche stress application circuit, thereby completing the application of avalanche stress to the power device Q1 to be tested. Among them, the overall time in the time period t2-t4 is the single avalanche stress application time T-UIS.
[0077] In the second on-resistance test phase (t5-t6 time period), the first switch K1 is turned off in response to the first control signal, the second switch K2 is turned on in response to the second control signal, the second voltage source U2 provides a test voltage for the power device Q1 to be tested, and a driving timing is applied to the gate G of the power device Q1 to be tested through the driving branch 12. The gate-source voltage VGS of the power device Q1 to be tested is greater than the threshold voltage, and the power device Q1 to be tested is turned on. The source-drain voltage VDS of the power device Q1 to be tested is collected through the voltage sampling branch 14, and the drain current IDS at the same time is collected through the current sampling branch 13. The on-resistance of the power device Q1 to be tested after being subjected to avalanche stress is calculated based on the ratio of the collected source-drain voltage VDS and the drain current IDS. At time t6, the power device Q1 to be tested is controlled to be turned off through the driving branch 12.
[0078] By analyzing the comparison values of the on-resistance of the power device Q1 to be tested before and after being subjected to avalanche stress (the comparison value can be a difference or a ratio), the change in the dynamic on-resistance of the power device Q1 to be tested before and after being subjected to avalanche stress can be determined, thereby characterizing the degradation of the power device Q1 to be tested.
[0079] In this embodiment, both the first switch K1 and the second switch K2 are fast switches, and at least the first switch K1 has low switching loss, high switching speed and high voltage blocking capability, and the switching speed of the first switch K1 can reach ns level. Through the fast disconnection of the first switch K1, the delay time between the avalanche stress application stage and the second on-resistance test stage can be made us level, that is, the delay time of the t4-t5 time period is us level, so as to ensure that the on-resistance test of the unrecovered power device Q1 to be tested can be performed within us level time after being subjected to avalanche stress, so as to be able to more realistically test the influence of the dynamic on-resistance of the power device Q1 to be tested after being subjected to avalanche stress, which can play an important role in the performance analysis and optimization of device parameters of power devices, and is of great significance for improving the efficiency, reliability and control performance of the switching circuit.
[0080] Figure 6 A schematic diagram of a sampling waveform corresponding to another power device to be tested provided by an embodiment of the present invention, referring to Figure 6 On the basis of the above embodiment, optionally, the power device testing method may include multiple consecutive avalanche stress application stages, that is, after one avalanche stress application stage is completed, the next avalanche stress application stage is entered again, such as, after the t2-t4 time period is completed, the t2'-t4' time period is entered (considering the delay time of the switch on and off, the whole process is repeated continuously). Figure 5 During the working process of the time period t2-t5 in the middle), avalanche stress is applied to the power device Q1 under test again, so as to test the dynamic on-resistance of the power device Q1 under test after being subjected to avalanche stress for multiple times in succession, that is, after being subjected to avalanche stress for multiple times and for the last time, entering the second on-resistance test stage.
[0081] Figure 7 A schematic diagram of a sampling waveform corresponding to another power device to be tested provided by an embodiment of the present invention, referring to Figure 7 On the basis of the above embodiment, optionally, the power device test method may include multiple avalanche stress application stages and second on-resistance test stages, and the avalanche stress application stages and the second on-resistance test stages are alternately arranged in sequence. That is, after the avalanche stress application stage is completed, the second on-resistance test stage is entered, and then the avalanche stress application stage and the second on-resistance test stage are entered again, so as to realize the continuous test of the dynamic on-resistance of the power device Q1 to be tested after multiple avalanche stresses, that is, after each avalanche stress, the corresponding dynamic on-resistance is tested once. Among them, the working process of the test circuit at each moment between t2'-t6' corresponds one-to-one to the working process at the moment between t2-t6.
[0082] It should be noted that in Figure 6 and Figure 7In the timing sequence, the process from t2' to t4' or the process from t2' to t6 can be repeated multiple times, and the specific frequency can be set according to actual needs. In a single test process, the delay between the turn-off moment of the first switch K1 and the turn-on moment of the second switch K2 is less than or equal to 1us, so as to ensure that the switching characteristics of the unrecovered power device Q1 under test can be tested within the us level time after being subjected to avalanche stress.
[0083] in, Figure 6 and Figure 7 The working process of the test circuit corresponding to the timing can be referred to the relevant description in the above embodiment, which will not be repeated here.
[0084] Optionally, an embodiment of the present invention further provides a test circuit for a power device, and the test circuit can test the on-resistance of the power device Q1 to be tested by the test method provided by any embodiment of the present invention. Figure 1 The test circuit includes an avalanche stress applying branch 11, a driving branch 12, a current sampling branch 13, a voltage sampling branch 14 and a voltage output branch 15. The first end of the avalanche stress applying branch 11 is connected to the first pole of the power device Q1 to be tested, the second pole of the power device Q1 to be tested is connected to the first end of the current sampling branch 13, the second end of the current sampling branch 13 is grounded, the second end of the avalanche stress applying branch 11 is connected to the second end of the current sampling branch 13, the avalanche stress applying branch 11 is used to provide avalanche stress to the power device Q1 to be tested during the avalanche stress applying stage, and the current sampling branch 13 is used to collect current data of the power device Q1 to be tested; the driving branch 12 is connected to the control pole and the second pole of the power device Q1 to be tested.
[0085] The first end of the voltage output branch 15 is connected to the first electrode of the power device Q1 to be tested, and the second end of the voltage output branch 15 is connected to the second end of the current sampling branch 13. The voltage output branch 15 is used to provide a test voltage for the power device Q1 to be tested during the on-resistance test phase;
[0086] A first end of the voltage sampling branch 14 is connected to a first pole of the power device Q1 to be tested, and a second end of the voltage sampling branch 14 is connected to a second pole of the power device Q1 to be tested. The voltage sampling branch 14 is used to collect voltage data of the power device Q1 to be tested.
[0087] The test circuit provided in the embodiment of the present invention can realize the test of the dynamic on-resistance of the power device Q1 to be tested before and after being subjected to avalanche stress through a set of test circuits, without the need to change stations. Therefore, the unrecovered power device Q1 to be tested can be tested within a short time after the power device Q1 to be tested is subjected to avalanche stress, so that the influence on the dynamic on-resistance of the power device Q1 to be tested after being subjected to avalanche stress can be tested more realistically, and then the degradation of the dynamic on-resistance of the power device Q1 to be tested after being subjected to avalanche stress can be characterized, which is beneficial to provide a real basis for performance analysis of power devices and optimization of device parameters.
[0088] Figure 8 A schematic diagram of another power device test circuit provided by an embodiment of the present invention, referring to Figure 8 On the basis of the above embodiment, optionally, the avalanche stress applying branch 11 includes a first voltage source U1, an energy storage capacitor C1, an energy storage inductor L1 and a first switch K1, the first end of the first voltage source U1 is connected to the first end of the energy storage inductor L1, the second end of the energy storage inductor L1 is connected to the first end of the first switch K1, the second end of the first switch K1 is connected to the first pole D of the power device Q1 to be tested, the control end of the first switch K1 is connected to the first signal source 21, the second pole of the power device Q1 to be tested is grounded via the current sampling branch 13, the second end of the first voltage source U1 is grounded, and the energy storage capacitor C1 is connected in parallel with the first voltage source U1; wherein the first switch K1 is a fast switch. The voltage output branch 15 includes a second voltage source U2 and a second switch K2, the first end of the second voltage source U2 is connected to the first end of the second switch K2, the second end of the second switch K2 is connected to the first pole of the power device Q1 to be tested, the control end of the second switch K2 is connected to the second signal source 22, and the second end of the second voltage source U2 is connected to the second end of the current sampling branch 13.
[0089] Optionally, continue to refer to Figure 8 The driving branch 12 includes a driver 121 and a current limiting circuit 122. The driver 121 is connected to the control electrode of the power device Q1 to be tested via the current limiting circuit 122. The driver 121 is used to output a high-speed driving signal under the action of the control signal to control the power device Q1 to be tested to be turned on or off. The driver 121 can realize constant voltage control, constant current control or multiple mixed mode control of the gate drive of the power device Q1 to be tested.
[0090] Of course, in other embodiments, the driving branch 12 may not include the current limiting circuit 122 , and the driver 121 is connected to the control electrode of the power device Q1 to be tested, which can be specifically configured according to actual needs.
[0091] The current sampling branch 13 includes a sampling resistor R0 and a first sampling device SA1, wherein the first end of the sampling resistor R0 serves as the first end of the current sampling branch 13, the second end of the sampling resistor R0 serves as the second end of the current sampling branch 13, and the first sampling device SA1 is connected in parallel with the sampling resistor R0. The first sampling device SA1 may be a high-precision voltmeter, and the first sampling device SA1 may collect the voltage across the sampling resistor R0 in real time, and the current (i.e., the drain current IDS) flowing through the power device Q1 to be tested may be calculated based on the voltage across the sampling resistor R0.
[0092] The voltage sampling device 14 includes a clamping circuit ATT and a second sampling device SA2. The clamping circuit ATT is connected in series with the second sampling device SA2 and then connected in parallel with the power device Q1 to be tested. The clamping circuit ATT can be implemented by an attenuator, which can be used to play a role of high-voltage clamping protection. When the power device Q1 to be tested is turned off, the voltage of the first pole D is clamped to protect the second sampling device SA2 from being damaged. The second sampling device SA2 can be a high-precision voltmeter, and the second sampling device SA2 is used to collect the voltage across the power device Q1 to be tested (i.e., the source-drain voltage VDS) in real time. According to the voltage data and current data collected at the same time, the on-resistance of the power device Q1 to be tested can be calculated.
[0093] Optionally, in this embodiment, the test circuit may further include a synchronous program control circuit, which provides synchronous control signals to the first switch K1, the second switch K2, the driver 121, the voltage sampling branch 14 and the current sampling branch 13, respectively, to ensure stable operation of the test circuit.
[0094] Figure 8 The specific working principle of the test circuit shown can refer to the relevant description in any of the above embodiments, which will not be repeated here.
[0095] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.
[0096] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims
1. A method for testing a power device, characterized in that: A test circuit applied to a power device, the test circuit comprising an avalanche stress application branch, a driving branch, a current sampling branch, a voltage sampling branch and a voltage output branch; The power device testing method comprises an avalanche stress application stage of applying avalanche stress to the power device to be tested, and at least two on-resistance test stages before and after the power device to be tested is subjected to the avalanche stress; In the on-resistance test phase, the power device to be tested is controlled to be turned on through the driving branch, a test voltage is provided to the power device to be tested through the voltage output branch, current data collected by the current sampling branch and voltage data collected by the voltage sampling branch are respectively obtained, and the on-resistance of the power device to be tested is calculated according to the current data and the voltage data; In the avalanche stress application phase, avalanche stress is applied to the power device to be tested through the avalanche stress application branch in combination with the driving timing output by the driving branch.
2. The power device testing method according to claim 1, characterized in that: The avalanche stress applying branch and the voltage output branch are turned on in a time-sharing manner.
3. The power device testing method according to claim 1, characterized in that: The power device testing method comprises a first on-resistance testing phase and a second on-resistance testing phase; The avalanche stress application stage is between the first on-resistance test stage and the second on-resistance test stage; In the first on-resistance test phase, obtaining the on-resistance of the power device to be tested before being subjected to the avalanche stress; At the end of the avalanche stress application stage, the avalanche stress application branch is controlled to be quickly turned off, and the second on-resistance test stage is entered. In the second on-resistance test stage, the on-resistance of the power device to be tested after being subjected to the avalanche stress is obtained; The dynamic resistance degradation of the power device to be tested is determined according to the on-resistance of the power device to be tested before and after it is subjected to the avalanche stress.
4. The method for testing a power device according to claim 3, characterized in that: The power device testing method comprises a plurality of consecutive avalanche stress application stages; or, The power device testing method includes a plurality of avalanche stress applying stages and the second on-resistance testing stages, and the avalanche stress applying stages and the second on-resistance testing stages are alternately arranged in sequence.
5. The power device testing method according to claim 3, characterized in that: The avalanche stress application branch comprises a first voltage source, an energy storage capacitor, an energy storage inductor and a first switch, wherein a first end of the first voltage source is connected to a first end of the energy storage inductor, a second end of the energy storage inductor is connected to a first end of the first switch, a second end of the first switch is connected to a first electrode of the power device to be tested, a control end of the first switch is connected to a first signal source, and the energy storage capacitor is connected in parallel with the first voltage source; In the avalanche stress application stage, the power device testing method includes: Controlling the first switch to be turned on in response to a first control signal output by the first signal source, and controlling the power device under test to be turned on in response to a driving timing output by the driving branch, so that the power device under test generates a conduction current; When the on-current of the power device to be tested reaches a preset current value, the power device to be tested is controlled to be turned off in response to the driving timing output by the driving branch, so as to apply avalanche stress to the power device to be tested through the energy storage inductor until the voltage drop between the first pole and the second pole of the power device to be tested reaches a preset voltage value, and the first switch is controlled to be quickly turned off in response to the first control signal.
6. The power device testing method according to claim 5, characterized in that: Before the first switch is turned on in response to the first control signal, the power device testing method further includes: The energy storage capacitor is charged by the first voltage source.
7. A test circuit for a power device, characterized in that: It includes an avalanche stress applying branch, a driving branch, a current sampling branch, a voltage sampling branch and a voltage output branch; The first end of the avalanche stress applying branch is connected to the first pole of the power device to be tested, the second pole of the power device to be tested is connected to the first end of the current sampling branch, the second end of the avalanche stress applying branch is connected to the second end of the current sampling branch, the avalanche stress applying branch is used to provide avalanche stress to the power device to be tested during the avalanche stress applying stage, and the current sampling branch is used to collect current data of the power device to be tested; The driving branch is connected to the control electrode of the power device to be tested; The first end of the voltage output branch is connected to the first electrode of the power device to be tested, the second end of the voltage output branch is connected to the second end of the current sampling branch, and the voltage output branch is used to provide a test voltage for the power device to be tested in the on-resistance test phase; The first end of the voltage sampling branch is connected to the first pole of the power device to be tested, the second end of the voltage sampling branch is connected to the second pole of the power device to be tested, and the voltage sampling branch is used to collect voltage data of the power device to be tested.
8. The power device test circuit according to claim 7, characterized in that: The avalanche stress application branch comprises a first voltage source, an energy storage capacitor, an energy storage inductor and a first switch, wherein a first end of the first voltage source is connected to a first end of the energy storage inductor, a second end of the energy storage inductor is connected to a first end of the first switch, a second end of the first switch is connected to a first electrode of the power device to be tested, a control end of the first switch is connected to a first signal source, and the energy storage capacitor is connected in parallel with the first voltage source; The voltage output branch includes a second voltage source and a second switch, the first end of the second voltage source is connected to the first end of the second switch, the second end of the second switch is connected to the first pole of the power device to be measured, the control end of the second switch is connected to a second signal source, and the second end of the second voltage source is connected to the second end of the current sampling branch.
9. The power device test circuit according to claim 8, characterized in that: The first switch is a fast switch.
10. The power device test circuit according to claim 8, characterized in that: The current sampling branch includes a sampling resistor and a first sampling device, the first end of the sampling resistor serves as the first end of the current sampling branch, the second end of the sampling resistor serves as the second end of the current sampling branch, and the first sampling device is connected in parallel with the sampling resistor; The voltage sampling device comprises a clamping circuit and a second sampling device, wherein the clamping circuit is connected in series with the second sampling device and then connected in parallel with the power device to be tested; The driving branch includes a driver connected to a control electrode of the power device to be tested.