An FPGA-oriented single event effect software simulation method and system
By simulating single-event effects on FPGAs using software, the problems of long simulation time and limited coverage in existing technologies are solved, achieving efficient and accurate single-event effect simulation, simplifying the design process and reducing costs.
Patent Information
- Application Number
- CN202411920673.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-25
- Publication Date
- 2026-03-03
- Estimated Expiration
- 2044-12-25
AI Technical Summary
Existing methods for simulating single-event effects on FPGAs require recompiling the entire hardware system, resulting in a complex and time-consuming design process that makes it difficult to efficiently cover single-event effects at different locations and times.
A software simulation method is used to determine the list of signals that may experience single-event effects in the FPGA, set the injection location and time, generate test cases, load and analyze the impact of single-event effects in the FPGA simulation, generate traceable waveforms, and complete the testing of the list of signals one by one.
It enables efficient simulation of the position and time of single-event effects in a software environment, covering all signals inside the FPGA, shortening simulation time, simplifying the process and reducing costs.
Smart Images

Figure CN119578321B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of integrated circuit technology, specifically relating to a software simulation method and system for single-event effects for FPGA. Background Technology
[0002] With the development of integrated circuit technology, the application of FPGAs in the aerospace field has placed higher demands on reliability. Therefore, reliability has gradually become an important issue that needs to be considered as much as performance in FPGA design. Especially in the space environment, FPGAs are highly susceptible to single-event effects (SEE), which can cause the contents of logic cells to flip and lock, leading to FPGA failure. Before designing fault-tolerant FPGAs, in-depth SEE sensitivity analysis is required, especially the behavioral characteristics of FPGAs under SEE conditions. SEE simulation is a crucial technique for FPGA reliability assessment; therefore, the research and design of SEE simulation tools are of great significance. Traditional SEE simulation methods are based on hardware modules, incorporating fault behavior modules into the design.
[0003] The main drawbacks of the existing methods are: corresponding fault behavior modules need to be designed for different single-event effect locations and times. Furthermore, each simulation of a single-event effect requires recompiling the entire FPGA hardware system, resulting in a cumbersome design process and lengthy simulation time. Summary of the Invention
[0004] To overcome the shortcomings of existing technologies, this invention provides a software simulation method and system for single-event effects (SEE) on FPGAs, comprising: determining a list of signals that may cause SEE on the FPGA; setting the injection location and time of SEE by a single-event simulation module; generating test cases simulating SEE injection based on the injection location and time; loading the test cases into the FPGA and running the FPGA simulation by a single-event effect simulation controller; observing the corresponding FPGA signal at the injection time of the SEE by a result analysis module; analyzing the simulation results of the SEE injection and generating a traceable waveform; after completing the test case, the single-event effect simulation controller controls the single-event simulation module to generate the next test case, until all test cases for all signals in the signal list are completed. This invention can simulate the impact and propagation of SEE in FPGAs using software, and can simulate different injection locations and times of SEE. It only requires loading the corresponding test cases, eliminating the need to resynthesize and load the entire FPGA hardware system, significantly reducing the SEE simulation time, effectively improving the efficiency of SEE simulation, and expanding the coverage of SEE simulation.
[0005] The technical solution adopted by this invention to solve its technical problem is as follows:
[0006] Step 1: Determine a list of signals that may cause single-event effects for the FPGA;
[0007] Step 2: The single-particle simulation module sets the single-particle injection position and time for the signal list;
[0008] Step 3: Generate test cases simulating single-particle injection based on the single-particle injection location and time;
[0009] Step 4: Load the test cases into the FPGA using the single-event effect simulation controller and run the FPGA simulation;
[0010] Step 5: The result analysis module observes the corresponding FPGA signal at the single-event injection moment;
[0011] Step 6: The results analysis module analyzes the single-event effect injection simulation results and generates traceable waveforms;
[0012] Step 7: After completing a test case, the single-event effect simulation controller controls the single-event simulation module to generate the next test case. Repeat steps 2 to 6 until all test cases for all signals in the signal list are completed.
[0013] Preferably, the list of signals that may cause single-event effects in step 1 includes register and memory signals in all modules of the FPGA, as well as the input and output signals of the modules.
[0014] Preferably, in step 2, the single-particle injection location and time are set, including the injection location and time for single-particle flip-flop faults, single-particle latch-up faults, and single-particle transient faults.
[0015] Preferably, the traceable waveform in step 6 is composed of all signal information during the FPGA operation.
[0016] A single-event effect software simulation system for FPGA includes: a single-event effect simulation process controller, a single-event simulation module, and a result analysis module;
[0017] The single-event effect simulation process controller controls the single-event simulation module to generate single-event effect simulation test cases, loads the single-event effect simulation test cases into the FPGA, and controls the result analysis module to monitor the injection signal, completing the single-event injection simulation of all signals in the signal list.
[0018] The single-event simulation module sets the position and time of single-event injection for the signals in the FPGA and generates single-event effect simulation test cases.
[0019] The result analysis module monitors the single-particle injection signal, analyzes the single-particle effect injection simulation results, and generates traceable waveforms.
[0020] The beneficial effects of this invention are as follows:
[0021] (1) The present invention is based on software simulation of single-event effect, which can cover all signals inside the FPGA. Compared with hardware simulation, it is more in line with the occurrence of single-event effect in actual application scenarios. At the same time, it can accurately simulate the location and time of single-event effect occurrence.
[0022] (2) The present invention is based on software simulation of single-event effects, which does not require recompiling the hardware platform and greatly shortens the simulation time of single-event effects.
[0023] (3) The FPGA system of the present invention can complete the injection of single-event effect by loading the test cases generated by the single-event simulation module, which simplifies the simulation process and reduces the simulation cost. Attached Figure Description
[0024] Figure 1 This is a flowchart of the method of the present invention;
[0025] Figure 2 This is a schematic diagram of the system of the present invention. Detailed Implementation
[0026] The present invention will be further described below with reference to the accompanying drawings and embodiments.
[0027] The technical problem solved by this invention is to overcome the limitations of hardware simulation of single-event effects (SEE), effectively reduce the simulation time, and optimize the design process by providing a software simulation method and system for SEE in FPGAs. This method can simulate the location and time of SEE occurrence during software simulation, while simultaneously monitoring changes in the corresponding signals and recording the impact of the SEE, thus completing the simulation of SEE in FPGAs.
[0028] like Figure 1 As shown, to address the problems of cumbersome design processes and long simulation times in existing technologies, this invention proposes a software simulation method for single-event effects on FPGAs, comprising the following steps:
[0029] (1) Determine a list of signals that may cause single-event effects for the FPGA, including register and memory signals in all modules of the FPGA as well as input and output signals of the modules;
[0030] (2) The single-particle simulation module sets the single-particle injection position and time for the signal list, including the injection position and time for single-particle flip fault, single-particle latch-up fault and single-particle transient fault.
[0031] (3) Generate test cases simulating single-particle injection based on the single-particle injection location and time;
[0032] (4) The test cases are loaded into the FPGA and the FPGA simulation is run by a single-event effect simulation controller;
[0033] (5) The FPGA signal at the single-event injection moment is observed by the result analysis module;
[0034] (6) The result analysis module analyzes the simulation results of single-event effect injection and generates a traceable waveform, which is composed of all signal information during the FPGA operation.
[0035] (7) After completing the test case, the single-event effect simulation controller controls the single-event simulation module to generate the next test case, and repeats steps (2) to (6) until all test cases of signals in the signal list are completed.
[0036] This invention also proposes a single-event effect software simulation system for FPGAs, comprising: a single-event effect simulation process controller, a single-event simulation module, and a result analysis module; the specific implementation is as follows: Figure 2 As shown, the single-event effect simulation process controller controls the single-event simulation module to generate single-event effect simulation test cases, loads the single-event effect simulation test cases into the FPGA, and controls the result analysis module to monitor the injection signal, completing the single-event injection simulation of all signals in the signal list; the single-event simulation module sets the position and time of single-event injection for the signals in the FPGA and generates single-event effect simulation test cases; the result analysis module monitors the single-event injection signal, analyzes the single-event effect injection simulation results, and generates traceable waveforms.
[0037] Example:
[0038] (1) Determine a list of signals that may cause single-event effects for the FPGA loading program, including dci, ici, and rfi;
[0039] (2) The single-event simulation module sets the single-event latch-up fault injection position for the signal list, and the injection time is 10us.
[0040] (3) Generate test cases simulating single-particle injection based on the single-particle injection location and time;
[0041] (4) The test cases are loaded into the FPGA and the FPGA simulation is run by a single-event effect simulation controller;
[0042] (5) The FPGA signal at the single-event injection moment is observed by the result analysis module;
[0043] (6) The result analysis module analyzes the simulation results of single-event effect injection and generates a traceable waveform, which is composed of all signal information during the FPGA operation.
[0044] (7) After completing the test case, the single-event effect simulation controller controls the single-event simulation module to generate the next test case, and repeats steps (2) to (6) until the test cases of dci, ici, and rfi in the signal list are completed.
[0045] The technical solution of this invention is based on software simulation of single-event effects, which can cover all signals inside the FPGA. Compared with hardware simulation, it is more consistent with the occurrence of single-event effects in actual application scenarios. At the same time, it can accurately simulate the location and time of single-event effect occurrence. There is no need to recompile the hardware platform, which greatly shortens the single-event effect simulation time. The FPGA system can complete the injection of single-event effects by loading the test cases generated by the single-event simulation module, which simplifies the simulation process and reduces the simulation cost.
Claims
1. A method for FPGA-oriented software simulation of single event effects, characterized in that, The method comprises the following steps: Step 1: determining a signal list in which single event effects are likely to occur for the FPGA; the signal list in which single event effects are likely to occur includes register and memory signals in all modules in the FPGA and input and output signals of the modules; Step 2: setting single event injection positions and times for the signal list by a single event simulation module; Step 3: generating a test case for simulating single event injection according to the single event injection positions and times; Step 4: loading the test case into the FPGA and running FPGA simulation by a single event effect simulation process controller; Step 5: observing corresponding FPGA signals at the single event effect injection moment by a result analysis module; Step 6: analyzing single event effect injection simulation results and generating traceable waveforms by the result analysis module; Step 7: after completing a test case, the single event effect simulation process controller controls the single event simulation module to generate a next test case, and steps 2 to 6 are repeated until test cases for all signals in the signal list are completed.
2. The FPGA-oriented single event effect software simulation method according to claim 1, characterized in that, The single event injection positions and times in step 2 include injection positions and times of single event upset faults, single event latchup faults and single event transient faults.
3. The FPGA-oriented single event effect software simulation method according to claim 2, characterized in that, The traceable waveforms in step 6 are composed of all signal information during FPGA running.
4. A single event effect software simulation system using the single event effect software simulation method according to claim 1, characterized by, The method comprises: a single event effect simulation process controller, a single event simulation module and a result analysis module; the single event effect simulation process controller controls the single event simulation module to generate single event effect simulation test cases, loads the single event effect simulation test cases into the FPGA, and controls the result analysis module to monitor injection signals, thereby completing single event injection simulation for all signals in the signal list; the single event simulation module sets single event injection positions and times for signals in the FPGA, and generates single event effect simulation test cases; the result analysis module monitors single event injection signals, analyzes single event effect injection simulation results and generates traceable waveforms.
Citation Information
Patent Citations
Test method and system based on SPARC (Scalable Processor ARChitecture) processor single event upset fault injection
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