Pixel circuit, pixel circuit driving method, display panel and display device

Abstract

This application relates to the field of display technology, specifically providing a pixel circuit, a pixel circuit driving method, a display panel, and a display device, aiming to solve the problem of leakage current in existing driving transistors, which easily produces black screen bright spots. To this end, the pixel circuit of this application includes: a data writing circuit, a driving circuit, and a light-emitting device, with the driving circuit and the light-emitting device connected in parallel; the data writing circuit is used to write data signals to the control electrode of the driving circuit; the driving circuit is used to turn on in response to the working level of the data signal, so that the branch containing the light-emitting device is short-circuited, and the light-emitting device is turned off, thereby effectively avoiding the situation where the driving circuit has large leakage current in the grayscale state, resulting in black screen bright spots.

Description

Technical Field

[0001] This application relates to the field of display technology, specifically providing a pixel circuit, a pixel circuit driving method, a display panel, and a display device. Background Technology

[0002] With the continuous development of display technology, people have increasingly higher requirements for the performance of display panels. Display panels include pixel circuits, which contain driving transistors used to drive light-emitting devices for illumination. Aging of these driving transistors can cause uneven light emission from the display panel. To solve this problem, an aging process can be performed on the pixel circuits.

[0003] However, in the conventional design of pixel circuits, the driving transistor is often located in the center of the circuit. During the aging process, insufficient voltage writing can easily occur, resulting in a large leakage current in the driving transistor in the grayscale state, which can produce black screen bright spots. Summary of the Invention

[0004] This application aims to solve the aforementioned technical problem, namely, to address the issue that existing driving transistors have leakage current, which easily leads to black screens and bright spots.

[0005] In a first aspect, this application provides a pixel circuit, which includes a data writing circuit, a driving circuit, and a light-emitting device, wherein the driving circuit and the light-emitting device are connected in parallel;

[0006] The data writing circuit is used to write a data signal Data to the control electrode of the driving circuit;

[0007] The driving circuit is turned on in response to the working level of the data signal Data, so that the branch where the light-emitting device is located is short-circuited and the light-emitting device is turned off.

[0008] In some embodiments, the first pole of the data writing circuit is used to receive the data signal Data, the second pole of the data writing circuit is connected to the control pole of the driving circuit, or connected to the first pole of the driving circuit through the first node N1, and the control pole of the data writing circuit is used to receive the first control signal G1, and in response to the first control signal G1, writes the data signal Data to the control pole or the first pole of the driving circuit during the data writing stage.

[0009] The driving circuit is disposed on the connection line between the first power supply voltage terminal VDD and the second power supply voltage terminal VSS, and the first pole of the driving circuit is connected to the first node N1.

[0010] The light-emitting device is disposed on the connection line between the first node N1 and the second power supply voltage terminal VSS, and the cathode of the light-emitting device is connected to the second power supply voltage terminal VSS.

[0011] In some embodiments, the pixel circuit further includes:

[0012] A first light-emitting control circuit is connected in series with the light-emitting device. The first electrode of the first light-emitting control circuit is connected to the first node N1, and the second electrode of the first light-emitting control circuit is connected to the anode of the light-emitting device through the second node N2. The control electrode of the first light-emitting control circuit is used to receive a light-emitting control signal EM. The first light-emitting control circuit is used to conduct during the light-emitting phase in response to the light-emitting control signal EM, so that the light-emitting device emits light.

[0013] In some embodiments, when the second pole of the data writing circuit is connected to the first pole of the driving circuit through the first node N1, the pixel circuit further includes a compensation circuit, a second light-emitting control circuit, a third light-emitting control circuit, and an energy storage circuit.

[0014] The first pole of the compensation circuit is connected to the second pole of the driving circuit through the third node N3, and the second pole of the compensation circuit is connected to the control pole of the driving circuit through the fourth node N4. The control pole of the compensation circuit is used to receive the second control signal G2. The compensation circuit is used to respond to the second control signal G2 and turn on during the data writing stage to write the data signal Data and the threshold voltage to the control pole of the driving circuit.

[0015] The first terminal of the second light-emitting control circuit is connected to the first power supply voltage terminal VDD, and the second terminal of the second light-emitting control circuit is connected to the first node N1.

[0016] The first electrode of the third light-emitting control circuit is connected to the third node N3, and the second electrode of the third light-emitting control circuit is connected to the second power supply voltage terminal VSS. The control electrodes of both the third light-emitting control circuit and the second light-emitting control circuit are used to receive the light-emitting control signal EM.

[0017] One end of the energy storage circuit is connected to the first power supply voltage terminal VDD, and the other end of the energy storage circuit is connected to the fourth node N4.

[0018] In some embodiments, the pixel circuit further includes a first initialization circuit, a first pole of the first initialization circuit being used to receive a first initialization signal V1, a second pole of the first initialization circuit being connected to the second node N2, a control pole of the first initialization circuit being used to receive a first reset signal R1, and the first initialization circuit being used to write the first initialization signal V1 into the second node N2 in response to the first reset signal R1.

[0019] In some embodiments, the pixel circuit further includes a second initialization circuit, the first pole of the second initialization circuit being used to receive a second initialization signal V2, the second pole of the second initialization circuit being connected to the fourth node N4, the control pole of the second initialization circuit being used to receive a second reset signal R2, and the second initialization circuit being used to write the second initialization signal V2 into the fourth node N4 in response to the second reset signal R2 during the initialization phase.

[0020] In some embodiments,

[0021] The second initialization circuit includes a first transistor T1, the first terminal of the first transistor T1 is used to receive the second initialization signal V2, the second terminal of the first transistor T1 is connected to the fourth node N4, and the control terminal of the first transistor T1 is used to receive the second reset signal R2.

[0022] The compensation circuit includes a second transistor T2, the first terminal of the second transistor T2 is connected to the third node N3, the second terminal of the second transistor T2 is connected to the fourth node N4, and the control terminal of the second transistor T2 is used to receive the second control signal G2.

[0023] The driving circuit includes a third transistor T3, the first terminal of the third transistor T3 is connected to the first node N1, the second terminal of the third transistor T3 is connected to the third node N3, and the control terminal of the third transistor T3 is connected to the fourth node N4.

[0024] The data writing circuit includes a fourth transistor T4, the first terminal of the fourth transistor T4 is used to receive the data signal Data, the second terminal of the fourth transistor T4 is connected to the first node N1, and the control terminal of the fourth transistor T4 is used to receive the first control signal G1.

[0025] The second light-emitting control circuit includes a fifth transistor T5, the first terminal of the fifth transistor T5 is connected to the first power supply voltage terminal VDD, and the second terminal of the fifth transistor T5 is connected to the first node N1;

[0026] The third light-emitting control circuit includes a sixth transistor T6. The first terminal of the sixth transistor T6 is connected to the third node N3, and the second terminal of the sixth transistor T6 is connected to the second power supply voltage terminal VSS. The control terminals of the sixth transistor T6 and the fifth transistor T5 are both used to receive the light-emitting control signal EM.

[0027] The first initialization circuit includes a seventh transistor T7, the first terminal of the seventh transistor T7 is used to receive the first initialization signal V1, the second terminal of the seventh transistor T7 is connected to the second node N2, and the control terminal of the seventh transistor T7 is connected to the first reset signal R1.

[0028] The first light-emitting control circuit includes an eighth transistor T8, the first terminal of the eighth transistor T8 is connected to the first node N1, the second terminal of the eighth transistor T8 is connected to the second node N2, and the control terminal of the eighth transistor T8 is used to receive the light-emitting control signal EM.

[0029] The energy storage circuit includes a capacitor Cst, one end of which is connected to the first power supply voltage terminal VDD, and the other end of which is connected to the fourth node N4.

[0030] The first control signal G1, the second control signal G2, and the first reset signal R1 are all provided by the current level scan signal GateN.

[0031] In some embodiments, the pixel circuit further includes a third initialization circuit, wherein the first pole of the third initialization circuit is used to receive a third initialization signal V3, the second pole of the third initialization circuit is connected to the third node N3, and the control pole of the third initialization circuit is used to receive a third reset signal R3, and is used to write the third initialization signal V3 into the third node N3 in response to the third reset signal R3 during the initialization phase.

[0032] In some embodiments, the pixel circuit further includes a fourth initialization circuit, wherein a first pole of the fourth initialization circuit is used to receive a reference signal Vref, a second pole of the fourth initialization circuit is connected to the first node N1, a control pole of the fourth initialization circuit is used to receive a fourth reset signal R4, and the fourth initialization circuit is used to write the reference signal Vref into the first node N1 in response to the fourth reset signal R4 during the bias phase.

[0033] In some embodiments,

[0034] The third initialization circuit includes a ninth transistor T9. The first terminal of the ninth transistor T9 is used to receive the third initialization signal V3. The second terminal of the ninth transistor T9 is connected to the third node N3. The control terminal of the ninth transistor T9 is used to receive the third reset signal R3.

[0035] The compensation circuit includes a tenth transistor T10, the first terminal of which is connected to the third node N3, the second terminal of which is connected to the fourth node N4, and the control terminal of which is used to receive the second control signal G2.

[0036] The driving circuit includes an eleventh transistor T11, the first terminal of the eleventh transistor T11 is connected to the first node N1, the second terminal of the eleventh transistor T11 is connected to the third node N3, and the control terminal of the eleventh transistor T11 is connected to the fourth node N4.

[0037] The data writing circuit includes a twelfth transistor T12. The first terminal of the twelfth transistor T12 is used to receive the data signal Data. The second terminal of the twelfth transistor T12 is connected to the first node N1. The control terminal of the twelfth transistor T12 is used to receive the first control signal G1.

[0038] The second light-emitting control circuit includes a thirteenth transistor T13, the first terminal of which is connected to the first power supply voltage terminal VDD, and the second terminal of which is connected to the first node N1;

[0039] The third light-emitting control circuit includes a fourteenth transistor T14. The first terminal of the fourteenth transistor T14 is connected to the third node N3, and the second terminal of the fourteenth transistor T14 is connected to the second power supply voltage terminal VSS. The control terminals of the fourteenth transistor T14 and the thirteenth transistor T13 are both used to receive the light-emitting control signal EM.

[0040] The first initialization circuit includes a fifteenth transistor T15. The first terminal of the fifteenth transistor T15 is used to receive the first initialization signal V1. The second terminal of the fifteenth transistor T15 is connected to the second node N2. The control terminal of the fifteenth transistor T15 is connected to the first reset signal R1.

[0041] The fourth initialization circuit includes a sixteenth transistor T16. The first terminal of the sixteenth transistor T16 is used to receive the reference signal Vref. The second terminal of the sixteenth transistor T16 is connected to the first node N1. The control terminal of the sixteenth transistor T16 is used to receive the fourth reset signal R4.

[0042] The first light-emitting control circuit includes a seventeenth transistor T17, the first terminal of the seventeenth transistor T17 is connected to the first node N1, the second terminal of the seventeenth transistor T17 is connected to the second node N2, and the control terminal of the seventeenth transistor T17 is used to receive the light-emitting control signal EM;

[0043] The energy storage circuit includes a capacitor Cst, one end of which is connected to the first power supply voltage terminal VDD, and the other end of which is connected to the fourth node N4.

[0044] Wherein, the first control signal G1 is provided by the P-type gate scan signal P_Gate, the second control signal G2 is provided by the N-type gate scan signal N_Gate, and the first reset signal R1 and the fourth reset signal R4 are both provided by the bias reset signal P_ResetH.

[0045] In a second aspect, this application provides a pixel circuit driving method, wherein the pixel circuit includes a data writing circuit, a driving circuit, and a light-emitting device, the driving circuit and the light-emitting device being connected in parallel, and the method includes:

[0046] During the data writing phase, the data writing circuit writes the data signal Data to the control electrode of the drive circuit;

[0047] During the non-light-emitting phase, the driving circuit is turned on in response to the working level of the data signal Data, so that the branch where the light-emitting device is located is short-circuited and the light-emitting device is turned off.

[0048] In a third aspect, this application provides a display panel that includes the pixel circuitry described in any of the preceding claims.

[0049] In a fourth aspect, this application provides a display device that includes the display panel described above.

[0050] By employing the above technical solution, this application enables the driving circuit and the light-emitting device to be connected in parallel; the data writing circuit is used to write a data signal Data to the control electrode of the driving circuit; the driving circuit is used to turn on in response to the working level of the data signal Data, so that the branch where the light-emitting device is located is short-circuited, and the light-emitting device is turned off. This effectively avoids the situation where the driving circuit has a large leakage current in the grayscale state, resulting in black screen bright spots. Attached Figure Description

[0051] The preferred embodiments of this application are described below with reference to the accompanying drawings, in which:

[0052] Figure 1 This is a schematic diagram of a pixel circuit structure provided in an embodiment of this application;

[0053] Figure 2 This is an equivalent circuit diagram of the pixel circuit provided in the embodiments of this application;

[0054] Figure 3A This is a schematic diagram of a pixel circuit structure provided in an embodiment of this application. Figure 3B This is a schematic diagram of a pixel circuit structure provided in another embodiment of this application;

[0055] Figure 4A The embodiments provided in this application are based on Figure 3A A schematic diagram of the pixel circuit structure after setting the first light-emitting control circuit. Figure 4B The embodiments provided in this application are based on Figure 3B A schematic diagram of the pixel circuit structure after the first light-emitting control circuit is set;

[0056] Figure 5 This is a schematic diagram of a pixel circuit structure provided in another embodiment of this application;

[0057] Figure 6 This is a schematic diagram of a pixel circuit structure provided in another embodiment of this application;

[0058] Figure 7A The embodiments provided in this application are related to Figure 6 The corresponding specific pixel circuit diagram; Figure 7B yes Figure 7A The timing diagram corresponding to the pixel circuit driving process is shown.

[0059] Figure 8 This is a schematic diagram of a pixel circuit structure provided in another embodiment of this application;

[0060] Figure 9A The embodiments provided in this application are related to Figure 8 The corresponding specific pixel circuit diagram; Figure 9B yes Figure 9A The timing diagram corresponding to the pixel circuit driving process is shown. Detailed Implementation

[0061] Some embodiments of this application are described below with reference to the accompanying drawings. Those skilled in the art should understand that these embodiments are merely illustrative of the technical principles of this application and are not intended to limit the scope of protection of this application.

[0062] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that an element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as “connection” are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect.

[0063] It should be noted that the transistors used in the embodiments of this application can be thin-film transistors, field-effect transistors, or other devices with the same characteristics. Since the source and drain of the transistors used are symmetrical, there is no distinction between them. In the embodiments of this application, to distinguish the source and drain of the transistor, one of them is called the first terminal, the other is called the second terminal, and the gate is called the control terminal. In addition, according to the characteristics of transistors, they can be divided into N-type and P-type. The pixel circuit can contain only N-type transistors or P-type transistors, or it can use both N-type transistors and P-type transistors at the same time. When using P-type transistors, the first terminal is the source of the P-type transistor, the second terminal is the drain of the P-type transistor, and when the gate input is low, the source and drain are turned on. The low level is the working level, and the high level is the non-working level; the N-type transistor is the opposite.

[0064] See Figure 1 As shown, Figure 1 This is a schematic diagram of a pixel circuit structure provided in an embodiment of this application, which may include a data writing circuit, a driving circuit, and a light-emitting device, wherein the driving circuit and the light-emitting device are connected in parallel;

[0065] The data writing circuit is used to write the data signal Data to the control electrode of the drive circuit;

[0066] The driving circuit is used to turn on in response to the working level of the data signal Data, so as to short-circuit the branch where the light-emitting device is located and turn off the light-emitting device; and to turn off in response to the non-working level of the data signal Data, so as to make the light-emitting device emit light.

[0067] In this embodiment, the driving circuit can adjust the driving current on the branch where the driving circuit is located in response to the data signal Data, thereby adjusting the brightness of the light-emitting device. In some embodiments, the driving circuit can be turned off in response to the non-operating level of the data signal Data, causing the light-emitting device to emit light at a higher brightness.

[0068] The driving circuit can be implemented based on a driving transistor. The data signal Data controls the opening and closing degree of the driving transistor channel, that is, it adjusts the resistance of the driving circuit, thereby controlling whether the driving circuit is turned on or off, and controlling the magnitude of the driving current flowing through the driving circuit when it is turned on. Therefore, the driving circuit can be equivalent to a variable resistor, such as... Figure 2 As shown, Figure 2 This is an equivalent circuit diagram of the pixel circuit provided in the embodiments of this application. The light-emitting device can be an OLED (Organic Light-Emitting Diode), the current flowing through the variable resistor is denoted as I1, and the current flowing through the OLED is denoted as I2.

[0069] When the data signal Data is at a non-working level, the driving circuit is cut off, which is equivalent to the branch where the variable resistor is located being open-circuited. I2 >> I1, and the OLED can emit light with higher brightness.

[0070] When the data signal Data is at the working level, the driving circuit is turned on, I1>>I2, which can short-circuit the branch where the light-emitting device is located, and the OLED is turned off;

[0071] By controlling the voltage of the data signal Data written to the control electrode of the drive circuit, it is equivalent to adjusting the resistance value of the variable resistor, controlling the distribution of I1 and I2, thereby achieving the adjustment of OLED brightness.

[0072] against Figure 1 The driving method of the pixel circuit shown may include:

[0073] During the data writing phase, the data writing circuit writes the data signal Data to the control electrode of the drive circuit;

[0074] During the non-light-emitting phase, the driving circuit turns on in response to the operating voltage level of the data signal Data, short-circuiting the branch containing the light-emitting device and turning it off.

[0075] The driving process of the pixel circuit can include at least an initialization phase, a data writing phase, and a light emission phase. The non-light emission phase can include the initialization phase and the data writing phase within one driving cycle.

[0076] In this embodiment of the application, the driving method may further include:

[0077] During the light-emitting phase, the driving circuit is cut off in response to the non-operating level of the data signal Data, and the light-emitting device emits light.

[0078] In other embodiments, the driving circuit can also be used to respond to the data signal Data being turned on, and adjust the current allocated to the branch where the light-emitting device is located by adjusting the data voltage provided by the data signal Data, thereby adjusting the brightness of the light-emitting device.

[0079] The pixel circuit provided in this application controls the luminous intensity of the light-emitting device by connecting the driving circuit and the light-emitting device in parallel and controlling the resistance state of the driving circuit through a data writing circuit. In grayscale mode, the driving circuit can turn on in response to the working level of the data signal (Data), causing the light-emitting device to turn off. This effectively avoids large leakage current in the driving circuit during grayscale mode, which could result in black screens or bright spots.

[0080] In some embodiments, the data writing circuit, the driving circuit, and the light-emitting device can be adopted as follows: Figure 3A or Figure 3B Set it as shown. Figure 3A This is a schematic diagram of a pixel circuit structure provided in an embodiment of this application. Figure 3B This is a schematic diagram of a pixel circuit structure provided in another embodiment of this application.

[0081] The first terminal of the data writing circuit is used to receive the data signal Data, and the second terminal of the data writing circuit is connected to the control terminal of the drive circuit (see [link]). Figure 3A (as shown), or connected to the first terminal of the drive circuit via the first node N1 (see...). Figure 3B As shown), the control terminal of the data writing circuit is used to receive the first control signal G1, and in response to the first control signal G1, writes the data signal Data to the control terminal of the drive circuit during the data writing phase (see...). Figure 3A (as shown) or the first terminal first pole (see...) Figure 3B (as shown);

[0082] The driving circuit is set on the connection line between the first power supply voltage terminal VDD and the second power supply voltage terminal VSS, and the first terminal of the driving circuit is connected to the first node N1.

[0083] The light-emitting device is disposed on the line between the first node N1 and the second power supply voltage terminal VSS, and the cathode of the light-emitting device is connected to the second power supply voltage terminal VSS.

[0084] In some embodiments, to provide more flexible control over the state of the light-emitting device, a first light-emitting control circuit can also be provided on the branch where the light-emitting device is located, see [reference]. Figure 4A and 4B As shown, Figure 4A The embodiments provided in this application are based on Figure 3AA schematic diagram of the pixel circuit structure after setting the first light-emitting control circuit. Figure 4B The embodiments provided in this application are based on Figure 3B A schematic diagram of the pixel circuit structure after the first light-emitting control circuit is set.

[0085] The first light-emitting control circuit is connected in series with the light-emitting device. The first terminal of the first light-emitting control circuit is connected to the first node N1. The second terminal of the first light-emitting control circuit is connected to the anode of the light-emitting device through the second node N2. The control terminal of the first light-emitting control circuit is used to receive the light-emitting control signal EM. The first light-emitting control circuit is used to turn on in response to the light-emitting control signal EM during the light-emitting stage so that the light-emitting device emits light.

[0086] against Figure 4A Or the pixel circuit shown in 4B, the driving method may further include:

[0087] During the light-emitting stage, when the driving circuit is cut off in response to the non-working level of the data signal Data, the first light-emitting control circuit is turned on in response to the light-emitting control signal EM, and the light-emitting device emits light.

[0088] By setting up a first light-emitting control circuit, it is possible to flexibly control the light-emitting device to light up or turn off.

[0089] It should be noted that in the pixel circuits of related technologies, the driving circuit and the light-emitting device are usually connected in series on the connection line between the first power supply voltage terminal VDD and the second power supply voltage terminal VSS, such as 2T1C pixel circuit, 7T1C pixel circuit and 8T1C pixel circuit. The pixel circuit provided in this application can be realized by adjusting any pixel circuit in the related technologies.

[0090] The 2T1C pixel circuit refers to a pixel circuit that includes two transistors and one capacitor; the 7T1C and 8T1C pixel circuits are similar. When implemented based on a 2T1C pixel circuit, its two transistors can be a drive transistor and a data write transistor. The second terminal of the data write transistor can be directly connected to the control terminal of the drive transistor. Figure 3A The connection method between the data writing circuit and the driving circuit is the same. When implemented based on a 7T1C pixel circuit or an 8T1C pixel circuit, the connection method between the driving circuit and the data writing circuit can be the same. Figure 3B The connection method between the data writing circuit and the driving circuit is the same, and will be used as a basis in the following text. Figure 3A The connection method between the data writing circuit and the driving circuit is described using an example.

[0091] In some embodiments, see Figure 5 As shown, Figure 5This is a schematic diagram of a pixel circuit structure provided in another embodiment of this application. When the second pole of the data writing circuit is connected to the first pole of the driving circuit through the first node N1, the pixel circuit also includes a compensation circuit, a second light-emitting control circuit, a third light-emitting control circuit, and an energy storage circuit.

[0092] The first pole of the compensation circuit is connected to the second pole of the driving circuit through the third node N3. The second pole of the compensation circuit is connected to the control pole of the driving circuit through the fourth node N4. The control pole of the compensation circuit is used to receive the second control signal G2. The compensation circuit is used to respond to the second control signal G2 and turn on during the data writing stage to write the data signal Data and the threshold voltage to the control pole of the driving circuit.

[0093] The first terminal of the second light-emitting control circuit is connected to the first power supply voltage terminal VDD, and the second terminal of the second light-emitting control circuit is connected to the first node N1.

[0094] The first electrode of the third light-emitting control circuit is connected to the third node N3, the second electrode of the third light-emitting control circuit is connected to the second power supply voltage terminal VSS, and the control electrodes of the third light-emitting control circuit and the second light-emitting control circuit are both used to receive the light-emitting control signal EM.

[0095] One end of the energy storage circuit is connected to the first power supply voltage terminal VDD, and the other end of the energy storage circuit is connected to the fourth node N4.

[0096] In some embodiments, see Figure 6 As shown, Figure 6 This is a schematic diagram of a pixel circuit structure provided in another embodiment of this application.

[0097] The pixel circuit also includes a first initialization circuit. The first pole of the first initialization circuit is used to receive the first initialization signal V1. The second pole of the first initialization circuit is connected to the second node N2. The control pole of the first initialization circuit is used to receive the first reset signal R1. The first initialization circuit is used to write the first initialization signal V1 into the second node N2 in response to the first reset signal R1.

[0098] The pixel circuit also includes a second initialization circuit. The first pole of the second initialization circuit is used to receive the second initialization signal V2. The second pole of the second initialization circuit is connected to the fourth node N4. The control pole of the second initialization circuit is used to receive the second reset signal R2. The second initialization circuit is used to write the second initialization signal V2 into the fourth node N4 in response to the second reset signal R2 during the initialization phase.

[0099] against Figure 6 The driving method of the pixel circuit shown may include:

[0100] During the initialization phase, the second initialization circuit responds to the second reset signal R2 being turned on and writes the second initialization signal V2 into the fourth node N4;

[0101] During the data writing phase, the first initialization circuit responds to the first reset signal R1 and writes the first initialization signal V1 into the second node N2; the data writing circuit responds to the first control signal G1 and turns on, the compensation circuit responds to the second control signal G2 and turns on, the drive circuit turns on, and the data signal Data and the threshold voltage are written into the control electrode of the drive circuit.

[0102] During the light-emitting stage, the first light-emitting control circuit, the second light-emitting control circuit, and the third light-emitting control circuit all respond to the light-emitting control signal EM and are turned on. The driving circuit controls the opening and closing degree of the driving circuit based on the voltage written to its control electrode during the data writing stage, thereby adjusting the driving current flowing through the branch where the driving circuit is located, and thus adjusting the light-emitting intensity of the light-emitting device.

[0103] Specifically, adjusting the voltage of the data signal (Data) adjusts the resistance of the driving circuit, thereby controlling the current distribution between the driving circuit branch and the branch containing the light-emitting device. This allows for adjustment of the light intensity of the light-emitting device. For example, when using an OLED, the light intensity can be adjusted within the range of L0 to L255. Here, L0 represents the lowest screen brightness level, which is completely off or almost invisible, while L255 represents the highest screen brightness level, the maximum brightness the screen can emit.

[0104] When a non-operating level data signal Data is written to the control terminal of the drive circuit, the drive circuit is turned off, and the light-emitting device emits light with a relatively strong brightness, which can be referred to as the L255 state; when an operating level data signal Data is written to the control terminal of the drive circuit, the drive circuit is turned on, the branch where the light-emitting device is located is short-circuited, and the light-emitting device is turned off, which can be referred to as the L0 state, or grayscale state.

[0105] It should be noted that in this embodiment, the first reset signal R1, the first control signal G1, and the second control signal G2 can correspond to the same waveform. To save layout space, in some embodiments, the first reset signal R1, the first control signal G1, and the second control signal G2 can all be provided by the current-level scan signal GateN. Each row of pixel circuits can correspond one-to-one with each level of scan signal, and the current-level scan signal GateN is the scan signal corresponding to the row where the pixel circuit is located.

[0106] In some embodiments, the driving circuit may be manufactured using LTPS (Low-Temperature Poly-Silicon) or LTPO (Low Temperature Poly-Oxide) processes.

[0107] See Figure 7A As shown, it is provided in the embodiments of this application and Figure 6 The corresponding specific pixel circuit diagram, in which the light-emitting device can be an OLED.

[0108] The second initialization circuit includes a first transistor T1. The first terminal of the first transistor T1 is used to receive the second initialization signal V2. The second terminal of the first transistor T1 is connected to the fourth node N4. The control terminal of the first transistor T1 is used to receive the second reset signal R2.

[0109] The compensation circuit includes a second transistor T2, the first terminal of the second transistor T2 is connected to the third node N3, the second terminal of the second transistor T2 is connected to the fourth node N4, and the control terminal of the second transistor T2 is used to receive the second control signal G2.

[0110] The driving circuit includes a third transistor T3, the first terminal of the third transistor T3 is connected to the first node N1, the second terminal of the third transistor T3 is connected to the third node N3, and the control terminal of the third transistor T3 is connected to the fourth node N4.

[0111] The data writing circuit includes a fourth transistor T4. The first terminal of the fourth transistor T4 is used to receive the data signal Data. The second terminal of the fourth transistor T4 is connected to the first node N1. The control terminal of the fourth transistor T4 is used to receive the first control signal G1.

[0112] The second light-emitting control circuit includes a fifth transistor T5. The first terminal of the fifth transistor T5 is connected to the first power supply voltage terminal VDD, and the second terminal of the fifth transistor T5 is connected to the first node N1.

[0113] The third light-emitting control circuit includes a sixth transistor T6. The first terminal of the sixth transistor T6 is connected to the third node N3, and the second terminal of the sixth transistor T6 is connected to the second power supply voltage terminal VSS. The control terminals of the sixth transistor T6 and the fifth transistor T5 are both used to receive the light-emitting control signal EM.

[0114] The first initialization circuit includes a seventh transistor T7. The first terminal of the seventh transistor T7 is used to receive the first initialization signal V1. The second terminal of the seventh transistor T7 is connected to the second node N2. The control terminal of the seventh transistor T7 is used to receive the first reset signal R1.

[0115] The first light-emitting control circuit includes an eighth transistor T8. The first terminal of the eighth transistor T8 is connected to the first node N1, the second terminal of the eighth transistor T8 is connected to the second node N2, and the control terminal of the eighth transistor T8 is used to receive the light-emitting control signal EM.

[0116] The energy storage circuit includes a capacitor Cst, one end of which is connected to the first power supply voltage terminal VDD, and the other end of which is connected to the fourth node N4.

[0117] Among them, the first control signal G1, the second control signal G2 and the first reset signal R1 are all provided by the current level scan signal GateN.

[0118] Each transistor can be either a P-type transistor or an N-type transistor. Here, we will use P-type transistors as an example. The corresponding operating level is low level, and the non-operating level is high level.

[0119] against Figure 7A The pixel circuit shown is described in the image. Figure 7B As shown, the driving method for this pixel circuit may include:

[0120] During the initialization phase, the first transistor T1 turns on in response to the second reset signal R2 and writes the second initialization signal V2 into the fourth node N4;

[0121] During the data writing phase, the seventh transistor T7 responds to the current stage scan signal GateN and turns on, writing the first initialization signal V1 into the second node N2 to initialize the OLED anode; the second transistor T2 and the fourth transistor T4 both respond to the current stage scan signal GateN and turn on, the third transistor T3 turns on, and the data signal Data and the threshold voltage are written into the control electrode of the driving circuit.

[0122] During the light-emitting stage, the fifth transistor T5, the sixth transistor T6, and the eighth transistor T8 are all turned on in response to the light-emitting control signal EM. The third transistor T3 controls the opening and closing of its channel based on the voltage written to its control electrode during the data writing stage, thereby regulating the driving current flowing through the branch where the third transistor T3 is located, and thus regulating the light-emitting intensity of the light-emitting device.

[0123] Specifically, when a high-level data signal Data is written to the control electrode of the third transistor T3, the third transistor T3 is turned off, and the light-emitting device emits light with a strong brightness, which can correspond to the L255 state; when a low-level data signal Data is written to the control electrode of the third transistor T3, the third transistor T3 is turned on, the branch where the light-emitting device is located is short-circuited, and the light-emitting device is turned off, which can correspond to the L0 state.

[0124] In some embodiments, see Figure 8 As shown, Figure 8 This is a schematic diagram of a pixel circuit structure provided in another embodiment of this application, which may further include:

[0125] The third initialization circuit has a first pole for receiving the third initialization signal V3, a second pole for connecting to the third node N3, and a control pole for receiving the third reset signal R3. In response to the third reset signal R3, the third initialization signal V3 is written to the third node N3 during the initialization phase.

[0126] The fourth initialization circuit has a first terminal for receiving the reference signal Vref, a second terminal for connecting to the first node N1, a control terminal for receiving the fourth reset signal R4, and a fourth initialization circuit for writing the reference signal Vref to the first node N1 in response to the fourth reset signal R4 during the bias phase.

[0127] against Figure 8 The pixel circuit shown can be implemented by combining N-type and P-type transistors, wherein the transistor type used in the compensation circuit can be different from the transistor type used in the rest of the pixel circuit. Correspondingly, for... Figure 8 The driving method for the pixel circuit shown may include:

[0128] During the first bias phase, the first initialization circuit responds to the first reset signal R1 and writes the first reset signal R1 into the second node N2 to initialize the anode of the light-emitting device; the fourth initialization circuit responds to the fourth reset signal R4 and writes the reference signal Vref into the first node N1; the compensation circuit responds to the second control signal G2 and is turned on.

[0129] During the initialization phase, the third initialization circuit is turned on in response to the third reset signal R3, the compensation circuit remains on in the previous phase, and the third initialization signal V3 is written into the control terminal of the drive circuit through the third initialization circuit, the third node N3, the compensation circuit and the fourth node N4 to initialize the control terminal of the drive circuit.

[0130] During the data writing phase, the data writing circuit responds to the first control signal G1 and turns on. Both the driving circuit and the compensation circuit are turned on. The data signal Data is written to the control electrode of the driving circuit through the data writing circuit, the first node N1, the driving circuit, the third node N3, the compensation circuit and the fourth node N4, until the potential of the control electrode of the driving circuit is Vdata+Vth. Here, Vdata represents the voltage of the data signal Data and Vth represents the threshold voltage.

[0131] During the second bias phase, the fourth initialization circuit responds to the fourth reset signal R4 by turning on and writes the reference signal Vref into the first node N1; the first initialization circuit responds to the first reset signal R1 by turning on and writes the first initialization signal V1 into the second node N2.

[0132] During the light-emitting stage, the first light-emitting control circuit, the second light-emitting control circuit, and the third light-emitting control circuit all respond to the light-emitting control signal EM and are turned on. The driving circuit controls the opening and closing degree of the driving circuit based on the voltage written to its control electrode during the data writing stage, thereby adjusting the driving current flowing through the branch where the driving circuit is located, and thus adjusting the light-emitting intensity of the light-emitting device.

[0133] In some embodiments, the driving circuit is manufactured using LTPS technology, the compensation circuit can use N-type transistors, and the remaining circuits in the pixel circuit can use P-type transistors. Correspondingly, the first control signal G1 is provided by the P-type gate scan signal P_Gate, and the second control signal G2 is provided by the N-type gate scan signal N_Gate. In some embodiments, the first reset signal R1 and the fourth reset signal R4 can use the same waveform, both provided by the bias reset signal P_ResetH. See the description in the following embodiments for details.

[0134] See Figure 9A As shown, Figure 9A The embodiments provided in this application are related to Figure 8 The corresponding specific pixel circuit diagram.

[0135] The third initialization circuit includes a ninth transistor T9. The first terminal of the ninth transistor T9 is used to receive the third initialization signal V3. The second terminal of the ninth transistor T9 is connected to the third node N3. The control terminal of the ninth transistor T9 is used to receive the third reset signal R3.

[0136] The compensation circuit includes a tenth transistor T10. The first terminal of the tenth transistor T10 is connected to the third node N3, the second terminal of the tenth transistor T10 is connected to the fourth node N4, and the control terminal of the tenth transistor T10 is used to receive the second control signal G2.

[0137] The driving circuit includes an eleventh transistor T11. The first terminal of the eleventh transistor T11 is connected to the first node N1, the second terminal of the eleventh transistor T11 is connected to the third node N3, and the control terminal of the eleventh transistor T11 is connected to the fourth node N4.

[0138] The data writing circuit includes a twelfth transistor T12. The first terminal of the twelfth transistor T12 is used to receive the data signal Data, the second terminal of the twelfth transistor T12 is connected to the first node N1, and the control terminal of the twelfth transistor T12 is used to receive the first control signal G1.

[0139] The second light-emitting control circuit includes a thirteenth transistor T13. The first terminal of the thirteenth transistor T13 is connected to the first power supply voltage terminal VDD, and the second terminal of the thirteenth transistor T13 is connected to the first node N1.

[0140] The third light-emitting control circuit includes a fourteenth transistor T14. The first terminal of the fourteenth transistor T14 is connected to the third node N3, and the second terminal of the fourteenth transistor T14 is connected to the second power supply voltage terminal VSS. The control terminals of the fourteenth transistor T14 and the thirteenth transistor T13 are both used to receive the light-emitting control signal EM.

[0141] The first initialization circuit includes a fifteenth transistor T15. The first terminal of the fifteenth transistor T15 is used to receive the first initialization signal V1. The second terminal of the fifteenth transistor T15 is connected to the second node N2. The control terminal of the fifteenth transistor T15 is used to receive the first reset signal R1.

[0142] The fourth initialization circuit includes a sixteenth transistor T16. The first terminal of the sixteenth transistor T16 is used to receive the reference signal Vref. The second terminal of the sixteenth transistor T16 is connected to the first node N1. The control terminal of the sixteenth transistor T16 is used to receive the fourth reset signal R4.

[0143] The first light-emitting control circuit includes a seventeenth transistor T17. The first terminal of the seventeenth transistor T17 is connected to the first node N1, the second terminal of the seventeenth transistor T17 is connected to the second node N2, and the control terminal of the seventeenth transistor T17 is used to receive the light-emitting control signal EM.

[0144] The energy storage circuit includes a capacitor Cst, one end of which is connected to the first power supply voltage terminal VDD, and the other end of which is connected to the fourth node N4.

[0145] The first control signal G1 is provided by the P-type gate scan signal P_Gate, the second control signal G2 is provided by the N-type gate scan signal N_Gate, and the first reset signal R1 and the fourth reset signal R4 are both provided by the bias reset signal P_ResetH.

[0146] Among them, the tenth transistor T10 can be an N-type transistor, and the ninth transistor T9 and the eleventh transistors T11 to the seventeenth transistors T17 can be P-type transistors.

[0147] against Figure 9A The pixel circuit shown is described in the image. Figure 9B As shown, its driving method may include:

[0148] During the first biasing phase, the fifteenth transistor T15 turns on in response to the bias reset signal P_ResetH, writes the first initialization signal V1 into the second node N2, and initializes the anode of the light-emitting device; the sixteenth transistor T16 turns on in response to the bias reset signal P_ResetH, writes the reference signal Vref into the first node N1; and the tenth transistor T10 turns on in response to the N-type gate scan signal N_Gate.

[0149] During the initialization phase, the ninth transistor T9 turns on in response to the third reset signal R3, the tenth transistor T10 remains on in the previous phase, and the third initialization signal V3 is written to the control electrode of the eleventh transistor T11 through the ninth transistor T9, the third node N3, the tenth transistor T10 and the fourth node N4 to initialize the control electrode of the eleventh transistor T11.

[0150] During the data writing phase, the twelfth transistor T12 turns on in response to the P-type gate scan signal P_Gate, and the eleventh transistor T11 and the tenth transistor T10 are also turned on. The data signal Data is written to the control electrode of the eleventh transistor T11 through the twelfth transistor T12, the first node N1, the eleventh transistor T11, the third node N3, the tenth transistor T10, and the fourth node N4, until the potential of the control electrode of the eleventh transistor T11 reaches Vdata+Vth.

[0151] During the second biasing phase, the sixteenth transistor T16 turns on in response to the bias reset signal P_ResetH and writes the reference signal Vref into the first node N1; the fifteenth transistor T15 turns on in response to the bias reset signal P_ResetH and writes the first initialization signal V1 into the second node N2.

[0152] During the light-emitting stage, the seventeenth transistor T17, the thirteenth transistor T13, and the fourteenth transistor T14 are all turned on in response to the light-emitting control signal EM. The eleventh transistor T11 controls the opening and closing degree of the drive circuit based on the voltage written to its control electrode during the data writing stage, thereby regulating the drive current flowing through the branch where the eleventh transistor T11 is located, and thus regulating the light-emitting intensity of the light-emitting device.

[0153] In another aspect of this application, a display panel is provided that may include the pixel circuit described in any of the above embodiments and achieve the same beneficial effects.

[0154] In another aspect of this application, a display device is also provided, which may include the display panel of any of the above embodiments and achieve the same beneficial effects as the display panel embodiments.

[0155] In some embodiments, the display device may be an electronic device with display function, such as a mobile phone, tablet computer, or television, which will not be listed here.

[0156] The technical solutions of this application have been described above with reference to the preferred embodiments shown in the accompanying drawings. However, it will be readily understood by those skilled in the art that the scope of protection of this application is obviously not limited to these specific embodiments. Without departing from the principles of this application, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will all fall within the scope of protection of this application.

Claims

1. A pixel circuit, characterized by comprising: The pixel circuit comprises a data writing circuit, a driving circuit and a light emitting device, the driving circuit and the light emitting device are connected in parallel; The data writing circuit is configured to write a data signal (Data) to a control electrode of the driving circuit; The driving circuit is configured to be turned on in response to a working level of the data signal (Data), so that a branch in which the light emitting device is located is short-circuited, and the light emitting device is turned off; wherein a first electrode of the data writing circuit is configured to receive the data signal (Data), a second electrode of the data writing circuit is connected to a first electrode of the driving circuit through a first node (N1), and a control electrode of the data writing circuit is configured to receive a first control signal (G1) and write the data signal (Data) to the first electrode of the driving circuit in a data writing stage in response to the first control signal (G1); The driving circuit is arranged on a connection line between a first power supply voltage terminal (VDD) and a second power supply voltage terminal (VSS), and the first electrode of the driving circuit is connected to the first node (N1); The light emitting device is arranged on a connection line between the first node (N1) and the second power supply voltage terminal (VSS), and a cathode of the light emitting device is connected to the second power supply voltage terminal (VSS); and the pixel circuit further comprises: a first light emitting control circuit, the first light emitting control circuit is connected in series with the light emitting device, a first electrode of the first light emitting control circuit is connected to the first node (N1), a second electrode of the first light emitting control circuit is connected to an anode of the light emitting device through a second node (N2), a control electrode of the first light emitting control circuit is configured to receive a light emitting control signal (EM), and the first light emitting control circuit is configured to be turned on in a light emitting stage in response to the light emitting control signal (EM) to make the light emitting device emit light; a second light emitting control circuit, a first electrode of the second light emitting control circuit is connected to the first power supply voltage terminal (VDD), and a second electrode of the second light emitting control circuit is connected to the first node (N1).

2. The pixel circuit of claim 1, wherein, When the second electrode of the data writing circuit is connected to the first electrode of the driving circuit through the first node (N1), the pixel circuit further comprises a compensation circuit, a third light emitting control circuit and an energy storage circuit; a first electrode of the compensation circuit is connected to a second electrode of the driving circuit through a third node (N3), a second electrode of the compensation circuit is connected to a control electrode of the driving circuit through a fourth node (N4), a control electrode of the compensation circuit is configured to receive a second control signal (G2), and the compensation circuit is configured to be turned on in a data writing stage in response to the second control signal (G2) to write the data signal (Data) and a threshold voltage to the control electrode of the driving circuit; a first electrode of the third light emitting control circuit is connected to the third node (N3), and a second electrode of the third light emitting control circuit is connected to the second power supply voltage terminal (VSS), and the control electrodes of the third light emitting control circuit and the second light emitting control circuit are configured to receive the light emitting control signal (EM). One end of the energy storage circuit is connected with the first power voltage terminal (VDD), and the other end of the energy storage circuit is connected with the fourth node (N4).

3. The pixel circuit of claim 2, wherein, The pixel circuit further comprises a first initialization circuit, a first electrode of the first initialization circuit is used for receiving a first initialization signal (V1), a second electrode of the first initialization circuit is connected with the second node (N2), a control electrode of the first initialization circuit is used for receiving a first reset signal (R1), and the first initialization circuit is used for writing the first initialization signal (V1) into the second node (N2) in response to the first reset signal (R1).

4. The pixel circuit of claim 3, wherein, The pixel circuit further comprises a second initialization circuit, a first electrode of the second initialization circuit is used for receiving a second initialization signal (V2), a second electrode of the second initialization circuit is connected with the fourth node (N4), a control electrode of the second initialization circuit is used for receiving a second reset signal (R2), and the second initialization circuit is used for writing the second initialization signal (V2) into the fourth node (N4) in an initialization stage in response to the second reset signal (R2).

5. The pixel circuit of claim 4, characterized in that, the second initialization circuit comprises a first transistor (T1), a first electrode of the first transistor (T1) is used for receiving the second initialization signal (V2), a second electrode of the first transistor (T1) is connected with the fourth node (N4), and a control electrode of the first transistor (T1) is used for receiving the second reset signal (R2); the compensation circuit comprises a second transistor (T2), a first electrode of the second transistor (T2) is connected with the third node (N3), a second electrode of the second transistor (T2) is connected with the fourth node (N4), and a control electrode of the second transistor (T2) is used for receiving the second control signal (G2); the driving circuit comprises a third transistor (T3), a first electrode of the third transistor (T3) is connected with the first node (N1), a second electrode of the third transistor (T3) is connected with the third node (N3), and a control electrode of the third transistor (T3) is connected with the fourth node (N4); the data writing circuit comprises a fourth transistor (T4), a first electrode of the fourth transistor (T4) is used for receiving the data signal (Data), a second electrode of the fourth transistor (T4) is connected with the first node (N1), and a control electrode of the fourth transistor (T4) is used for receiving a first control signal (G1); the second light-emitting control circuit comprises a fifth transistor (T5), a first electrode of the fifth transistor (T5) is connected with the first power voltage terminal (VDD), and a second electrode of the fifth transistor (T5) is connected with the first node (N1); The third light emitting control circuit comprises a sixth transistor (T6), a first electrode of the sixth transistor (T6) is connected with the third node (N3), a second electrode of the sixth transistor (T6) is connected with the second power supply voltage terminal (VSS), and control electrodes of the sixth transistor (T6) and the fifth transistor (T5) are both used for receiving the light emitting control signal (EM); The first initialization circuit comprises a seventh transistor (T7), a first electrode of the seventh transistor (T7) is used for receiving the first initialization signal (V1), a second electrode of the seventh transistor (T7) is connected with the second node (N2), and a control electrode of the seventh transistor (T7) is used for receiving the first reset signal (R1); The first light emitting control circuit comprises an eighth transistor (T8), a first electrode of the eighth transistor (T8) is connected with the first node (N1), a second electrode of the eighth transistor (T8) is connected with the second node (N2), and a control electrode of the eighth transistor (T8) is used for receiving the light emitting control signal (EM); The energy storage circuit comprises a capacitor (Cst), one end of the capacitor (Cst) is connected with the first power supply voltage terminal (VDD), and the other end of the capacitor (Cst) is connected with the fourth node (N4). The first control signal (G1), the second control signal (G2) and the first reset signal (R1) are all provided by a current stage scanning signal (GateN).

6. The pixel circuit of claim 3, wherein, The pixel circuit further comprises a third initialization circuit, a first electrode of the third initialization circuit is used for receiving a third initialization signal (V3), a second electrode of the third initialization circuit is connected with the third node (N3), and a control electrode of the third initialization circuit is used for receiving a third reset signal (R3), so as to write the third initialization signal (V3) into the third node (N3) in an initialization stage in response to the third reset signal (R3).

7. The pixel circuit of claim 6, wherein, The pixel circuit further comprises a fourth initialization circuit, a first electrode of the fourth initialization circuit is used for receiving a reference signal (Vref), a second electrode of the fourth initialization circuit is connected with the first node (N1), and a control electrode of the fourth initialization circuit is used for receiving a fourth reset signal (R4), so as to write the reference signal (Vref) into the first node (N1) in a biasing stage in response to the fourth reset signal (R4).

8. The pixel circuit of claim 7, wherein The third initialization circuit comprises a ninth transistor (T9), a first electrode of the ninth transistor (T9) is used for receiving the third initialization signal (V3), a second electrode of the ninth transistor (T9) is connected with the third node (N3), and a control electrode of the ninth transistor (T9) is used for receiving the third reset signal (R3). The compensation circuit comprises a tenth transistor (T10), a first electrode of the tenth transistor (T10) is connected with the third node (N3), a second electrode of the tenth transistor (T10) is connected with the fourth node (N4), and a control electrode of the tenth transistor (T10) is used for receiving the second control signal (G2); The driving circuit comprises an eleventh transistor (T11), a first electrode of the eleventh transistor (T11) is connected with the first node (N1), a second electrode of the eleventh transistor (T11) is connected with the third node (N3), and a control electrode of the eleventh transistor (T11) is connected with the fourth node (N4); The data writing circuit comprises a twelfth transistor (T12), a first electrode of the twelfth transistor (T12) is used for receiving the data signal (Data), a second electrode of the twelfth transistor (T12) is connected with the first node (N1), and a control electrode of the twelfth transistor (T12) is used for receiving the first control signal (G1); The second light emitting control circuit comprises a thirteenth transistor (T13), a first electrode of the thirteenth transistor (T13) is connected with the first power supply voltage terminal (VDD), and a second electrode of the thirteenth transistor (T13) is connected with the first node (N1); The third light emitting control circuit comprises a fourteenth transistor (T14), a first electrode of the fourteenth transistor (T14) is connected with the third node (N3), a second electrode of the fourteenth transistor (T14) is connected with the second power supply voltage terminal (VSS), and control electrodes of the fourteenth transistor (T14) and the thirteenth transistor (T13) are both used for receiving the light emitting control signal (EM); The first initialization circuit comprises a fifteenth transistor (T15), a first electrode of the fifteenth transistor (T15) is used for receiving the first initialization signal (V1), a second electrode of the fifteenth transistor (T15) is connected with the second node (N2), and a control electrode of the fifteenth transistor (T15) is used for receiving the first reset signal (R1); The fourth initialization circuit comprises a sixteenth transistor (T16), a first electrode of the sixteenth transistor (T16) is used for receiving the reference signal (Vref), a second electrode of the sixteenth transistor (T16) is connected with the first node (N1), and a control electrode of the sixteenth transistor (T16) is used for receiving the fourth reset signal (R4); The first light emitting control circuit comprises a seventeenth transistor (T17), a first electrode of the seventeenth transistor (T17) is connected with the first node (N1), a second electrode of the seventeenth transistor (T17) is connected with the second node (N2), and a control electrode of the seventeenth transistor (T17) is used for receiving the light emitting control signal (EM); The energy storage circuit comprises a capacitor (Cst), one end of the capacitor (Cst) is connected with the first power supply voltage terminal (VDD), and the other end of the capacitor (Cst) is connected with the fourth node (N4); Wherein, the first control signal (G1) is provided by a P-type gate scanning signal (P_Gate), the second control signal (G2) is provided by an N-type gate scanning signal (N_Gate), and the first reset signal (R1) and the fourth reset signal (R4) are both provided by a bias reset signal (P_ResetH).

9. A pixel circuit driving method, characterized by, The method is suitable for the pixel circuit of any one of claims 1 to 8, the pixel circuit comprising a data writing circuit, a driving circuit and a light emitting device, the driving circuit and the light emitting device being connected in parallel, and the method comprising: In the data writing stage, the data writing circuit writes a data signal (Data) to the control electrode of the driving circuit; In the non-light emitting stage, the driving circuit is turned on in response to the working level of the data signal (Data), so that the branch in which the light emitting device is located is short-circuited, and the light emitting device is turned off.

10. A display panel, characterized by, The display panel comprises the pixel circuit of any one of claims 1 to 9.

11. A display device comprising: The display panel comprises the pixel circuit of claim 10.

Images