Seal ring for wide band gap semiconductor layer stack
By forming a layer stack structure of multiple wide bandgap semiconductor layers on the substrate and using a sealing ring to prevent moisture from entering, the problem of structural instability of compound semiconductor devices in the thermal step is solved, and higher reliability and stability are achieved.
CN119581425APending Publication Date: 2025-03-07GLOBALFOUNDRIES US INC
View PDF 0 Cites 0 Cited by
Patent Information
- Application Number
- CN202410934497.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-09-06
- Filing Date
- 2024-07-12
- Publication Date
- 2025-03-07
AI Technical Summary
Technical Problem
The thermal steps of existing compound semiconductor-based devices during subsequent processing may result in rupture and/or damage of the semiconductor layer, resulting in structural instability.
Method used
A layer stack structure is adopted in which a plurality of wide bandgap semiconductor layers are formed on the substrate, and the mechanical strength of the structure is prevented from entering and strengthened by forming a sealing ring, including a trench, a second dielectric layer and a conductor layer.
Benefits of technology
It effectively prevents moisture from entering, improves the reliability and structural stability of the device, and avoids cracking and damage caused by thermal steps.
✦ Generated by Eureka AI based on patent content.
Smart Images
Figure CN119581425A_ABST
Abstract
The invention relates to a sealing ring for a wide bandgap semiconductor layer stack. A structure including a wide bandgap semiconductor layer stack and a method of forming such a structure. The structure includes a layer stack on a substrate and a first dielectric layer on the layer stack. The layer stack includes a semiconductor layer comprising a wide bandgap semiconductor material. The seal ring includes a trench passing through the first dielectric layer and the layer stack to the substrate, a second dielectric layer lining the trench, and a conductor layer including a first portion and a second portion within the trench. The trench surrounds the first dielectric layer and a portion of the layer stack. The second dielectric layer includes a first portion disposed between the first portion of the conductor layer and the portion of the layer stack, and the second dielectric layer includes a second portion disposed between the second portion of the conductor layer and the portion of the first dielectric layer.
Need to check novelty before this filing date? Find Prior Art