Diamond high-speed inverter circuit and preparation method thereof

Abstract

The application discloses a diamond high-speed inverter circuit and a preparation method thereof. The diamond high-speed inverter comprises a hydrogen / silicon composite terminal E-mode device and a hydrogen terminal D-mode device. The hydrogen / silicon composite terminal E-mode device and the hydrogen terminal D-mode device share a diamond substrate. The diamond substrate comprises a single crystal diamond substrate and a non-doped diamond epitaxial layer superposed on the single crystal diamond substrate. A terminal layer of the hydrogen / silicon composite terminal E-mode device is a hydrogen / silicon composite terminal diamond. A terminal layer of the hydrogen terminal D-mode device is a first hydrogen terminal diamond. An isolation area is arranged between the hydrogen / silicon composite terminal E-mode device and the hydrogen terminal D-mode device. An E-mode device drain of the hydrogen / silicon composite terminal E-mode device, a D-mode device source of the hydrogen terminal D-mode device and a D-mode device gate of the hydrogen terminal D-mode device are interconnected through a metal interconnection line, so that higher performance, higher safety and higher response speed are achieved.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of semiconductor, and particularly relates to a diamond high-speed inverter circuit and a preparation method thereof. BACKGROUND

[0002] Diamond is known as the "ultimate semiconductor" due to its excellent physical properties such as high thermal conductivity, high breakdown electric field, high intrinsic mobility and high saturation velocity. Diamond semiconductor devices not only have important application prospects in the fields of microwave power and power electronics, but also have unique advantages in the field of high-speed digital circuits. Diamond devices have excellent high-temperature working stability, which can greatly reduce the additional cost introduced by circuit heat dissipation. At the same time, the high breakdown voltage and high carrier saturation velocity of diamond can improve the working voltage of the device, and thus improve the driving ability of the circuit. As a basic logic circuit unit, the inverter plays an important role in digital integrated circuits and systems. Therefore, the E / D mode inverter circuit prepared by using diamond semiconductor has incomparable advantages in high temperature resistance and high response speed compared with silicon-based circuits, and is expected to become a key element of the next generation of digital circuits.

[0003] At present, diamond-based digital circuits mainly use direct coupled field effect transistor logic (DCFL) to realize, that is, to prepare depletion mode and enhancement mode devices, namely E mode devices and D mode devices, on the same substrate, and to connect them through metal interconnection to form logic circuits such as inverters. The method of modifying the surface of diamond can effectively change the physical and electrical properties of the surface of diamond. The hydrogen-terminated diamond surface has a two-dimensional hole gas conduction channel, and is widely used to prepare depletion mode diamond FETs (Field Effect Transistors). The device preparation process has been relatively mature. By specially processing the channel or gate dielectric of the hydrogen-terminated diamond FET, the device can realize the enhancement mode, and the commonly used processing methods include insulating dielectric charge regulation, gate Schottky barrier regulation and hydrogen-terminated modification. The existing diamond inverter mainly uses dielectric materials containing positive fixed charges as gate insulating films to prepare enhancement mode hydrogen-terminated diamond FET devices, and connects them with depletion mode hydrogen-terminated diamond FETs to realize logic applications.

[0004] However, the existing enhanced hydrogen-terminated diamond FET has problems of high MOS (abbreviation of MOSFET, Metal-Oxide-Semiconductor Field-Effect Transistor) interface state and low device threshold voltage, so that the channel carrier transport characteristics and device switching characteristics are poor, and it is difficult to meet the high threshold voltage requirement of the enhanced device, which leads to the working safety of the device cannot be guaranteed. Therefore, the response speed and working safety of the diamond E / D mode circuit prepared by the single hydrogen-terminated diamond material still need to be improved, which hinders the development and application of the diamond-based digital circuit. SUMMARY

[0005] In order to solve the above problems existing in the prior art, the present application provides a diamond high-speed inverter circuit and a preparation method thereof.

[0006] The technical problem to be solved by the present application is solved by the following technical scheme:

[0007] In a first aspect, the present application provides a diamond high-speed inverter circuit, which comprises:

[0008] A hydrogen / silicon composite-terminated E-mode device and a hydrogen-terminated D-mode device; the hydrogen / silicon composite-terminated E-mode device and the hydrogen-terminated D-mode device share a diamond substrate; the diamond substrate comprises a single crystal diamond substrate and a non-doped diamond epitaxial layer superimposed on the single crystal diamond substrate; a terminal layer of the hydrogen / silicon composite-terminated E-mode device is a hydrogen / silicon composite-terminated diamond; a terminal layer of the hydrogen-terminated D-mode device is a first hydrogen-terminated diamond;

[0009] An isolation region is arranged between the hydrogen / silicon composite-terminated E-mode device and the hydrogen-terminated D-mode device;

[0010] An E-mode device drain of the hydrogen / silicon composite-terminated E-mode device, a D-mode device source of the hydrogen-terminated D-mode device, and a D-mode device gate of the hydrogen-terminated D-mode device are interconnected by a metal interconnection line.

[0011] Optionally, the hydrogen / silicon composite-terminated E-mode device comprises:

[0012] A diamond substrate;

[0013] A first p-type heavy boron-doped diamond and a second p-type heavy boron-doped diamond superimposed on a top surface of the diamond substrate; lower surfaces of the first p-type heavy boron-doped diamond and the second p-type heavy boron-doped diamond are both deep into the diamond substrate;

[0014] a hydrogen / silicon recombination terminal diamond superimposed on the upper surface of the diamond substrate and located between the first p-type heavy boron doped diamond and the second p-type heavy boron doped diamond; the hydrogen / silicon recombination terminal diamond is in contact with the first p-type heavy boron doped diamond and the second p-type heavy boron doped diamond respectively on both sides; the hydrogen / silicon recombination terminal diamond comprises a silicon terminal diamond and a second hydrogen terminal diamond located on both sides of the silicon terminal diamond;

[0015] an E-mode device source electrode; the E-mode device source electrode is superimposed on the first p-type heavy boron doped diamond;

[0016] an E-mode device drain electrode; the E-mode device drain electrode is superimposed on the second p-type heavy boron doped diamond;

[0017] an E-mode device gate passivation layer; the E-mode device gate passivation layer is arranged on the upper surface of the hydrogen / silicon recombination terminal diamond and extends to both sides to cover part of the upper surfaces of the first p-type heavy boron doped diamond and the second p-type heavy boron doped diamond;

[0018] an E-mode device gate; the E-mode device gate is superimposed on the E-mode device gate passivation layer.

[0019] Optionally, the boron doping concentration of the first p-type heavy boron doped diamond and the second p-type heavy boron doped diamond is 1×10 20 cm -3 ~1×10 21 cm -3 ; the E-mode device source electrode and the E-mode device drain electrode are formed by stacking Ti and Au from bottom to top; the material of the E-mode device gate passivation layer is Al2O3; the material of the E-mode device gate is Al.

[0020] Optionally, the thickness of the first p-type heavy boron doped diamond and the second p-type heavy boron doped diamond ranges from 50nm to 150nm; the thickness of the hydrogen / silicon recombination terminal diamond ranges from 0.2nm to 1nm; the thickness of the E-mode device source electrode and the E-mode device drain electrode ranges from 100nm to 130nm; the thickness of the E-mode device gate passivation layer ranges from 20nm to 100nm; the thickness of the E-mode device gate ranges from 50nm to 150nm.

[0021] Optionally, the hydrogen terminal D-mode device comprises:

[0022] a diamond substrate;

[0023] a third p-type heavily boron-doped diamond and a fourth p-type heavily boron-doped diamond superimposed on the upper surface of the diamond substrate; the lower surfaces of the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond are both deep into the diamond substrate;

[0024] a first hydrogen-terminated diamond superimposed on the upper surface of the diamond substrate and between the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond; the two sides of the first hydrogen-terminated diamond are in contact with the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond respectively;

[0025] a D-mode device source electrode; the D-mode device source electrode is superimposed on the third p-type heavily boron-doped diamond;

[0026] a D-mode device drain electrode; the D-mode device drain electrode is superimposed on the fourth p-type heavily boron-doped diamond;

[0027] a D-mode device gate passivation layer; the D-mode device gate passivation layer is arranged on the upper surface of the first hydrogen-terminated diamond and extends to both sides to cover part of the upper surfaces of the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond;

[0028] a D-mode device gate; the D-mode device gate is superimposed on the D-mode device gate passivation layer.

[0029] Optionally, the boron doping concentrations of the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond are both 1×10 20 cm -3 ~1×10 21 cm -3 ; the D-mode device source electrode and the D-mode device drain electrode are both formed by stacking Ti and Au from bottom to top; the material of the D-mode device gate passivation layer is Al2O3; the material of the D-mode device gate is Al.

[0030] Optionally, the thickness ranges of the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond are both 50nm~150nm; the thickness range of the first hydrogen-terminated diamond is 0.2nm~1nm; the thickness ranges of the D-mode device source electrode and the D-mode device drain electrode are both 100nm~130nm; the thickness range of the D-mode device gate passivation layer is 20nm~100nm; the thickness range of the D-mode device gate is 50nm~150nm.

[0031] Optionally, the diamond high-speed inverter circuit further comprises an oxygen-terminated diamond isolation layer and a passivation dielectric layer; the oxygen-terminated diamond isolation layer is located at both ends of the upper surface of the diamond substrate and in the isolation region;

[0032] The passivation dielectric layer is located on the oxygen-terminated diamond isolation layer in the isolation region and extends to cover the upper surface of the E-mode device drain of the hydrogen / silicon composite-terminated E-mode device and the D-mode device source of the hydrogen-terminated D-mode device.

[0033] Optionally, the material of the passivation dielectric layer is Al2O3.

[0034] In a second aspect, the present application provides a preparation method of a diamond high-speed inverter circuit, the preparation method comprising:

[0035] forming a diamond substrate by epitaxially growing an undoped diamond epitaxial layer on the upper surface of a single crystal diamond substrate;

[0036] preparing a hydrogen / silicon composite-terminated E-mode device, a hydrogen-terminated D-mode device, and an isolation region between the hydrogen / silicon composite-terminated E-mode device and the hydrogen-terminated D-mode device; wherein the hydrogen / silicon composite-terminated E-mode device and the hydrogen-terminated D-mode device share the diamond substrate; the terminal layer of the hydrogen / silicon composite-terminated E-mode device is a hydrogen / silicon composite-terminated diamond; the terminal layer of the hydrogen-terminated D-mode device is a first hydrogen-terminated diamond; the hydrogen / silicon composite-terminated diamond and the first hydrogen-terminated diamond are prepared simultaneously by growing a silicon-terminated diamond on the diamond substrate and then performing hydrogenation treatment using mask etching and an MPCVD process;

[0037] interconnecting the E-mode device drain of the hydrogen / silicon composite-terminated E-mode device, the D-mode device source of the hydrogen-terminated D-mode device, and the D-mode device gate of the hydrogen-terminated D-mode device through a metal interconnection line.

[0038] The terminal layer in the hydrogen / silicon composite-terminated E-mode device in the diamond high-speed inverter circuit provided by the present application adopts a hydrogen / silicon composite-terminated diamond. Since the silicon in the silicon-terminated diamond in the hydrogen / silicon composite-terminated diamond has the same cubic crystal structure as the diamond, the silicon-terminated diamond has good lattice matching effect and low interface state density. At the same time, the surface conductivity of the oxidized silicon-terminated diamond is low, which is also conducive to realizing a high-threshold voltage enhancement mode device. Based on this, the diamond high-speed inverter circuit provided by the embodiments of the present application has higher performance, higher safety, and higher response speed compared with the existing single hydrogen-terminated diamond high-speed inverter circuit.

[0039] The present application will be further described in detail below with reference to the accompanying drawings and detailed description. BRIEF DESCRIPTION OF DRAWINGS

[0040] Figure 1 is a cross-sectional view of a diamond high-speed inverter circuit provided by the embodiments of the present application;

[0041] Figure 2is a structural schematic diagram of a diamond high-speed inverter circuit provided by an embodiment of the present application;

[0042] Figure 3 is a schematic diagram of energy band structures of hydrogen-terminated diamond and silicon-terminated diamond under vacuum conditions;

[0043] Figure 4 is a schematic diagram of an atomic configuration of a (001) face hydrogen / silicon composite-terminated diamond structure provided by an embodiment of the present application;

[0044] Figure 5 is a flowchart of a preparation method of a diamond high-speed inverter circuit provided by an embodiment of the present application;

[0045] Figure 6 is a preparation process diagram of a diamond high-speed inverter circuit provided by an embodiment of the present application.

[0046] The reference signs are as follows: 1, single-crystal diamond substrate; 2, undoped diamond epitaxial layer; 3, first p-type heavy boron-doped diamond; 4, second p-type heavy boron-doped diamond; 5, third p-type heavy boron-doped diamond; 6, fourth p-type heavy boron-doped diamond; 7, silicon-terminated diamond; 8, second hydrogen-terminated diamond; 9, first hydrogen-terminated diamond; 10, E-mode device source electrode; 11, E-mode device drain electrode; 12, E-mode device gate passivation layer; 13, E-mode device gate electrode; 14, D-mode device source electrode; 15, D-mode device drain electrode; 16, D-mode device gate passivation layer; 17, D-mode device gate electrode; 18, oxygen-terminated diamond isolation layer; 19, passivation dielectric layer. DETAILED DESCRIPTION

[0047] The present application will be further described in detail below with specific embodiments, but the embodiments of the present application are not limited thereto.

[0048] In order to solve the problems of slow response speed and poor working safety of a diamond E / D-mode circuit prepared by a single hydrogen-terminated diamond material, an embodiment of the present application provides a diamond high-speed inverter circuit, referring to Figure 1 and Figure 2 , Figure 1 is a sectional view of a diamond high-speed inverter circuit provided by an embodiment of the present application, Figure 2 is a structural schematic diagram of a diamond high-speed inverter circuit provided by an embodiment of the present application. The diamond high-speed inverter circuit provided by the embodiment of the present application comprises a hydrogen / silicon composite-terminated E-mode device and a hydrogen-terminated D-mode device.

[0049] In the embodiment of the present application, the hydrogen / silicon composite-terminated E-mode device and the hydrogen-terminated D-mode device share a diamond substrate.

[0050] The diamond substrate provides a basic structure and support for the hydrogen / silicon composite termination E-mode device and the hydrogen termination D-mode device. The diamond substrate comprises a single crystal diamond substrate 1 and a non-doped diamond epitaxial layer 2 superimposed on the single crystal diamond substrate 1.

[0051] The single crystal diamond substrate 1 is a single crystal diamond substrate formed by a HPHT (High pressure High Temperature) method, and can be specifically an Ib type (001) oriented single crystal diamond substrate. The Ib type diamond is a single crystal diamond with little nitrogen doping, and the (001) orientation refers to the surface orientation of the diamond crystal being a (001) plane. Using the Ib type (001) oriented single crystal diamond substrate can provide good crystal quality and excellent electronic properties for the subsequently grown material, and is suitable for high-power and high-frequency devices. In addition, the Ib type (001) oriented single crystal diamond substrate also has the characteristics of high thermal conductivity, which is beneficial to heat dissipation of high-power devices.

[0052] Specifically, the size of the single crystal diamond substrate 1 can be 3*3*0.5mm 3 .

[0053] In the embodiment of the present application, the non-doped diamond epitaxial layer 2 is superimposed on the single crystal diamond substrate 1. The non-doped diamond epitaxial layer 2 refers to a diamond thin film without introducing any dopant in the epitaxial growth process.

[0054] The non-doped diamond epitaxial layer 2 is specifically a high-quality non-doped diamond epitaxial layer, which refers to a diamond epitaxial layer that not only does not introduce any impurities in the growth process, but also has excellent crystal quality and uniformity, thereby exhibiting excellent electrical, optical and thermal properties.

[0055] Specifically, the thickness of the non-doped diamond epitaxial layer 2 can be 500nm.

[0056] In the embodiment of the present application, an isolation region is arranged between the hydrogen / silicon composite termination E-mode device and the hydrogen termination D-mode device. By arranging the isolation region, the electric field interference between the hydrogen / silicon composite termination E-mode device and the hydrogen termination D-mode device can be physically isolated.

[0057] In the embodiment of the present application, in addition to the diamond substrate, the hydrogen / silicon composite termination E-mode device and the hydrogen termination D-mode device further comprise a p-type doped region, a termination layer, a passivation layer and an electrode region, respectively. The electrode region further comprises a source electrode, a gate electrode and a drain electrode.

[0058] Specifically, the termination layer of the hydrogen / silicon composite termination E-mode device is a hydrogen / silicon composite termination diamond, and the termination layer of the hydrogen termination D-mode device is a first hydrogen termination diamond 9.

[0059] Referring to Figure 3 , Figure 3 is a schematic diagram of the energy band structure of hydrogen-terminated diamond and silicon-terminated diamond under vacuum conditions. The energy band structure includes a conduction band CBM, a forbidden band, a Fermi level E F and a valence band VBM. The hydrogen-terminated diamond and the silicon-terminated diamond have negative electron affinity (NEA), which is a physical quantity for measuring the energy difference between the vacuum electron level and the conduction band bottom level, and reflects the difficulty of the electron moving from the conduction band to the vacuum level to become a free electron. The hydrogen-terminated diamond and the silicon-terminated diamond have NEA, so that the surface electrons escape and form a hole layer on the diamond surface; the silicon is extremely easy to self-oxidize in the air, so that the NEA of the oxidized silicon-terminated diamond is reduced, which is beneficial to the development of enhanced devices, i.e. E-mode devices. Therefore, in the embodiment of the present application, the E-mode device is a hydrogen / silicon composite-terminated E-mode device.

[0060] In the embodiment of the present application, the E-mode device drain 11 of the hydrogen / silicon composite-terminated E-mode device, the D-mode device source 14 of the hydrogen-terminated D-mode device, and the D-mode device gate 17 of the hydrogen-terminated D-mode device are interconnected by metal interconnection lines to form an inverter circuit structure.

[0061] In the embodiment of the present application, the terminal layer in the hydrogen / silicon composite-terminated E-mode device of the diamond high-speed inverter circuit adopts hydrogen / silicon composite-terminated diamond. Since the silicon in the silicon-terminated diamond 7 in the hydrogen / silicon composite-terminated diamond has the same cubic crystal structure as the diamond, the silicon-terminated diamond 7 has good lattice matching effect and low interface state density. At the same time, the surface conductivity of the oxidized silicon-terminated diamond 7 is low, which is also beneficial to the realization of high-threshold voltage enhanced devices. Based on this, the diamond high-speed inverter circuit provided in the embodiment of the present application has higher performance, higher safety and higher response speed compared with the existing single hydrogen-terminated diamond high-speed inverter circuit.

[0062] In one implementation, the hydrogen / silicon composite-terminated E-mode device includes a diamond substrate, a first p-type heavy boron doped diamond 3, a second p-type heavy boron doped diamond 4, a hydrogen / silicon composite-terminated diamond, an E-mode device source 10, an E-mode device drain 11, an E-mode device gate passivation layer 12, and an E-mode device gate 13.

[0063] In the embodiment of the present application, the first p-type heavy boron doped diamond 3 and the second p-type heavy boron doped diamond 4 are superimposed on the upper surface of the diamond substrate. The lower surfaces of the first p-type heavy boron doped diamond 3 and the second p-type heavy boron doped diamond 4 both penetrate into the diamond substrate, specifically, into the non-doped diamond epitaxial layer 2 of the diamond substrate.

[0064] The p-type doped regions of the hydrogen / silicon composite terminated E-mode device specifically refer to p-type heavily boron-doped diamond, namely, first p-type heavily boron-doped diamond 3 and second p-type heavily boron-doped diamond 4. P-type heavily boron-doped diamond is formed by doping the diamond with boron (B) to alter its electrical properties, turning it into a p-type semiconductor material. The addition of boron replaces some carbon atoms in the diamond crystal structure with boron atoms, resulting in the formation of additional positive charge carriers and thus imparting p-type conductivity to the diamond.

[0065] Specifically, the boron doping concentration of the first p-type heavily boron-doped diamond 3 and the second p-type heavily boron-doped diamond 4 are both 1×10 20 cm -3 ~1×10 21 cm -3 The thickness of the first p-type heavily boron-doped diamond 3 and the second p-type heavily boron-doped diamond 4 are both in the range of 50 nm to 150 nm.

[0066] In an embodiment of the present invention, a hydrogen / silicon composite terminated diamond is superimposed on the top surface of a diamond substrate and positioned between a first p-type heavily boron-doped diamond 3 and a second p-type heavily boron-doped diamond 4. A two-dimensional hole gas channel is formed in the diamond substrate at the interface of the hydrogen / silicon composite terminated diamond. Specifically, the hydrogen / silicon composite terminated diamond comprises a silicon-terminated diamond 7 and second hydrogen-terminated diamonds 8 located on either side of the silicon-terminated diamond 7. The hole concentration at the interface channel of the second hydrogen-terminated diamond 8 is higher, while the hole concentration at the interface channel of the silicon-terminated diamond 7 is lower.

[0067] Specifically, the thickness of the hydrogen / silicon composite terminal diamond ranges from 0.2 nm to 1 nm.

[0068] The hydrogen / silicon composite terminated diamond provided in the embodiment of the present invention may specifically be a (001) face hydrogen / silicon composite terminated diamond, see Figure 4 , Figure 4 Schematic diagram of the atomic configuration of the (001) face hydrogen / silicon composite terminated diamond structure provided by an embodiment of the present invention. Figure 4 The left side of the middle is the 3×1 structure of (001) face silicon terminated diamond. Figure 4 The middle right side shows the 2×1 structure of (001) plane hydrogen-terminated diamond.

[0069] See also Figure 1 and Figure 2 The electrode region of the hydrogen / silicon composite terminal E-mode device specifically includes an E-mode device source 10, an E-mode device drain 11, and an E-mode device gate 13. Among them, the E-mode device drain 11 is used to establish a connection with the hydrogen terminal D-mode device, the E-mode device source 10 is used to ground GND, and the E-mode device gate 13 is used to connect to the input voltage V inBy changing the input voltage of the input E-mode device gate 13, the conduction performance of the device can be controlled.

[0070] The E-mode device source 10 is superimposed on the first p-type heavy boron doped diamond 3 to form an ohmic contact at the contact interface; and the E-mode device drain 11 is superimposed on the second p-type heavy boron doped diamond 4 to form an ohmic contact at the contact interface.

[0071] The E-mode device gate passivation layer 12 is arranged between the E-mode device gate 13 and the hydrogen / silicon recombination terminal diamond.

[0072] The E-mode device gate passivation layer 12 can be used to isolate the E-mode device gate 13 from the hydrogen / silicon recombination terminal diamond to avoid leakage. The material of the E-mode device gate passivation layer 12 is metal oxide, specifically Al2O3 (aluminum oxide), and the thickness range is 20 nm-100 nm, extending to the upper surface of the first p-type heavy boron doped diamond 3 and the second p-type heavy boron doped diamond 4 by 1 μm-2 μm.

[0073] The E-mode device gate 13 is superimposed on the E-mode device gate passivation layer 12 and forms a metal / insulator structure with the E-mode device gate passivation layer 12.

[0074] In the embodiment of the present application, the E-mode device source 10 and the E-mode device drain 11 are formed by stacking Ti (titanium) and Au (gold) from bottom to top, and the material of the E-mode device gate 13 is Al (aluminum).

[0075] The thickness range of the E-mode device source 10 and the E-mode device drain 11 is 100 nm-130 nm, and the thickness range of the E-mode device gate 13 is 50 nm-150 nm. Specifically, the thickness of Ti in the E-mode device source 10 and the E-mode device drain 11 can be 30 nm, and the thickness of Au in the E-mode device source 10 and the E-mode device drain 11 can be 100 nm.

[0076] In one implementation, the hydrogen terminal D-mode device includes a diamond substrate, a third p-type heavy boron doped diamond 5, a fourth p-type heavy boron doped diamond 6, a first hydrogen terminal diamond 9, a D-mode device source 14, a D-mode device drain 15, a D-mode device gate passivation layer 16, and a D-mode device gate 17.

[0077] In the embodiment of the present application, the p-type doped region of the hydrogen-terminated D-mode device is specifically a p-type heavily boron-doped diamond, i.e., the third p-type heavily boron-doped diamond 5 and the fourth p-type heavily boron-doped diamond 6. The third p-type heavily boron-doped diamond 5 and the fourth p-type heavily boron-doped diamond 6 are stacked on the upper surface of the diamond substrate. The lower surfaces of the third p-type heavily boron-doped diamond 5 and the fourth p-type heavily boron-doped diamond 6 both extend into the diamond substrate, specifically into the undoped diamond epitaxial layer 2 of the diamond substrate.

[0078] Specifically, the boron doping concentration of the third p-type heavily boron-doped diamond 5 and the fourth p-type heavily boron-doped diamond 6 is both 1×10 20 cm -3 ~1×10 21 cm -3 . The thickness range of the third p-type heavily boron-doped diamond 5 and the fourth p-type heavily boron-doped diamond 6 is both 50 nm~150 nm.

[0079] In the embodiment of the present application, the first hydrogen-terminated diamond 9 is stacked on the upper surface of the diamond substrate and located between the third p-type heavily boron-doped diamond 5 and the fourth p-type heavily boron-doped diamond 6, and forms a two-dimensional hole gas channel at the interface of the first hydrogen-terminated diamond 9 in the diamond substrate layer.

[0080] Specifically, the thickness range of the first hydrogen-terminated diamond 9 is 0.2 nm~1 nm.

[0081] Referring to Figure 1 and Figure 2 , the electrode region of the hydrogen-terminated D-mode device specifically includes a D-mode device source 14, a D-mode device drain 15 and a D-mode device gate 17. Among them, the D-mode device source 14 and the D-mode device gate 17 of the hydrogen-terminated D-mode device are interconnected with the E-mode device drain 11 to finally generate an output voltage V out , and the D-mode device drain 15 is connected to a power supply voltage V DD .

[0082] The D-mode device source 14 is stacked on the third p-type heavily boron-doped diamond 5 to form an ohmic contact at the contact interface; and the D-mode device drain 15 is stacked on the fourth p-type heavily boron-doped diamond 6 to form an ohmic contact at the contact interface.

[0083] The D-mode device gate passivation layer 16 is provided between the D-mode device gate 17 and the hydrogen-terminated diamond. Specifically, the D-mode device gate passivation layer 16 is provided on the upper surface of the first hydrogen-terminated diamond 9 and extends to the upper surfaces of the third p-type heavily boron-doped diamond 5 and the fourth p-type heavily boron-doped diamond 6 on both sides.

[0084] The D-mode device gate passivation layer 16 can be used to isolate the D-mode device gate 17 from the first hydrogen-terminated diamond 9 to avoid leakage. The material of the D-mode device gate passivation layer 16 is metal oxide, specifically Al2O3 (aluminum oxide), and the thickness thereof ranges from 20 nm to 100 nm, extending to cover the upper surfaces of the partial third p-type heavily boron-doped diamond 5 and the fourth p-type heavily boron-doped diamond 6 by 1-2 μm.

[0085] The D-mode device gate 17 is stacked on the D-mode device gate passivation layer 16 and forms a metal / insulator structure with the D-mode device gate passivation layer 16.

[0086] In the embodiment of the present application, the D-mode device source 14 and the D-mode device drain 15 are both formed by stacking Ti (titanium) and Au (gold) from bottom to top, and the material of the D-mode device gate 17 is Al (aluminum).

[0087] The thickness of the D-mode device source 14 and the D-mode device drain 15 both ranges from 100 nm to 130 nm, and the thickness of the D-mode device gate 17 ranges from 50 nm to 150 nm. For example, the thickness of Ti in the D-mode device source 14 and the D-mode device drain 15 can be 30 nm, and the thickness of Au in the D-mode device source 14 and the D-mode device drain 15 can be 100 nm.

[0088] In one implementation, the diamond high-speed inverter circuit further includes an oxygen-terminated diamond isolation layer 18 and a passivation dielectric layer 19. The oxygen-terminated diamond isolation layer 18 is located at both ends and in the isolation region of the upper surface of the diamond substrate, and the passivation dielectric layer 19 is located on the oxygen-terminated diamond isolation layer 18 in the isolation region and extends to cover the upper surfaces of the E-mode device drain 11 of the hydrogen / silicon composite-terminated E-mode device and the D-mode device source 14 of the hydrogen-terminated D-mode device. Both the oxygen-terminated diamond isolation layer 18 and the passivation dielectric layer 19 serve the purpose of device isolation.

[0089] It should be noted that the passivation dielectric layer 19 does not completely cover the upper surfaces of the E-mode device drain 11 and the D-mode device source 14, but forms a through hole in the upper surfaces of the E-mode device drain 11 and the D-mode device source 14 for leading out the connection line.

[0090] Specifically, the thickness of the oxygen-terminated diamond ranges from 0.2 nm to 0.5 nm, and the thickness of the passivation dielectric layer 19 ranges from 20 nm to 100 nm. The material of the passivation dielectric layer 19 is Al2O3.

[0091] The embodiment of the present application provides a preparation method of a diamond high-speed inverter circuit, which is shown in Figure 5 , Figure 5 is a flowchart of the preparation method of the diamond high-speed inverter circuit provided by the embodiment of the present application, and the specific steps are as follows:

[0092] Step S501, a non-doped diamond epitaxial layer 2 is formed on the single crystal diamond substrate 1 by epitaxial growth on the surface.

[0093] First, a single crystal diamond substrate 1 is selected. The selected single crystal diamond substrate 1 can be a 3x3x0.5mm Ib type (001) oriented single crystal diamond substrate. 3

[0094] Referring to Figure 6 , Figure 6 is a preparation process diagram of a diamond high-speed inverter circuit provided by an embodiment of the present application. A high-quality diamond layer with low impurity content is epitaxially grown on the surface of a single crystal diamond substrate 1 to obtain a non-doped diamond epitaxial layer 2, as shown in (a) of Figure 6 . Thus, a diamond substrate is formed.

[0095] In the embodiment of the present application, the epitaxially grown non-doped diamond epitaxial layer 2 is specifically obtained by a microwave plasma chemical vapor deposition (MPCVD) method to obtain a 500nm thick undoped diamond layer, and then the substrate is treated by hot mixed acid, organic cleaning, etc.

[0096] The reason for selecting the MPCVD method to obtain the non-doped diamond epitaxial layer 2 is that the MPCVD method has the advantages of no electrode pollution, high plasma density, easy size control, etc., and is currently internationally recognized as the best method for growing high-quality single crystal diamond. In this way, high-purity diamond substrates that meet the application of electronic devices can be simply and efficiently synthesized by the MPCVD method.

[0097] In the embodiment of the present application, the typical experimental parameters for epitaxial growth of the non-doped diamond epitaxial layer 2 by the MPCVD method include: H2(hydrogen) flow rate of 392sccm, CH4(methane) flow rate of 3sccm, CO2(carbon dioxide) flow rate of 3sccm, microwave power of 750W, pressure of 35Torr, and temperature of 600℃.

[0098] ​Step S502, preparing a hydrogen / silicon composite terminal E-mode device, a hydrogen terminal D-mode device, and an isolation region between the hydrogen / silicon composite terminal E-mode device and the hydrogen terminal D-mode device; wherein the hydrogen / silicon composite terminal E-mode device and the hydrogen terminal D-mode device share a diamond substrate; a terminal layer of the hydrogen / silicon composite terminal E-mode device is a hydrogen / silicon composite terminal diamond; a terminal layer of the hydrogen terminal D-mode device is a first hydrogen terminal diamond 9; and the hydrogen / silicon composite terminal diamond and the first hydrogen terminal diamond 9 are prepared simultaneously by growing a silicon terminal diamond 7 on the diamond substrate and then performing hydrogenation treatment by using mask etching and an MPCVD (Microwave Plasma Chemical Vapor Deposition) process.

[0099] The specific process of preparing the hydrogen / silicon composite terminal E-mode device and the hydrogen terminal D-mode device will be described below.

[0100] a) preparing a Ti / Au mask on a surface of the diamond substrate.

[0101] The Ti / Au mask is a layer of Ti / Au metal film deposited by using electron beam evaporation technology with the assistance of photolithography technology. The thickness of Ti is about 30 nm, and the thickness of Au is about 100 nm. The metal film plays a role of mask in the subsequent p++-Diamond (heavily doped diamond) selective growth step. Then, annealing at 500°C in H2 atmosphere for 30 min forms a TiC (Titanium Carbide) metal compound at the Ti / diamond interface to improve the stability of the metal mask / diamond interface.

[0102] b) performing dry etching on the diamond surface.

[0103] The dry etching refers to etching the diamond region other than the Ti / Au mask by using ICPRIE (Inductively Coupled Plasma Reactive Ion Etching), and the etching gas is O2 (oxygen) with an etching depth of 40 nm. The purpose is to make the subsequently grown p++-Diamond and channel part have better contact characteristics.

[0104] c) growing heavily boron-doped p-type diamond in the etched region of the diamond surface, i.e., the source-drain region of the device.

[0105] The heavily doped ohmic contact technology is a reliable and industrialized device ohmic contact process, which can reduce the on-resistance of the device and improve the output current of the device. The heavily boron-doped p-type diamond grown in the source-drain region of the device is grown by placing the sample in the MPCVD device for heavy boron-doped diamond growth. The thickness of the heavily boron-doped p-type diamond film is about 150 nm, and the boron doping concentration ranges from about 1×1019 cm-3 to about 1×1021 cm-3. 20 cm -3 ~1×1021 cm -3 This area is used to form an ohmic contact with the metal source and drain when they are subsequently prepared.

[0106] In an embodiment of the present invention, the specific process of growing heavily boron-doped p-type diamond is as follows:

[0107] H₂ gas was first introduced. Once the chamber pressure stabilized at 110 Torr, the microwave power generator was turned on, igniting the plasma. Once the plasma stabilized, TMB (trimethylborane) and CH₄ gases were introduced, starting with the introduction of CH₄ gas. The treatment time was nine minutes. After the MPCVD treatment was complete, the sample was removed, completing the growth of heavily boron-doped p-type diamond.

[0108] d) Surface hydrogenation treatment is performed after removing the Ti / Au mask.

[0109] The Ti / Au mask can be completely removed by the same hot mixed acid treatment as in the diamond substrate processing step, leaving a clean diamond surface, thereby forming a first p-type heavily boron-doped diamond 3, a second p-type heavily boron-doped diamond 4, a third p-type heavily boron-doped diamond 5 and a fourth p-type heavily boron-doped diamond 6. Figure 6 (b) in the.

[0110] Surface hydrogenation involves transferring the sample to an MPCVD device for hydrogen plasma treatment to create a hydrogen-terminated surface. This converts oxygen terminations on the diamond surface into hydrogen terminations, preventing Si atoms from forming bonds with O (oxygen) atoms instead of C (carbon) atoms during subsequent silicon deposition steps.

[0111] e) Preparing silicon-terminated diamonds 7 on the upper surface of the diamond substrate.

[0112] The diamond substrate sample prepared with p-type heavily boron-doped diamond was placed in an ultra-high vacuum system equipped with a Si sublimation source to prepare silicon-terminated diamond 7, see Figure 6 (c) in the figure. First, the sample was heated at 450°C for 30 minutes to remove the adsorbents on the surface of the hydrogen-terminated diamond. When the sample temperature returned to room temperature, Si molecular beam deposition was performed on the diamond surface. The thickness of the deposited Si film was 0.5 nm. After the deposition was completed, the sample was subjected to in-situ vacuum annealing at 920°C for 15 minutes. Through this treatment, the C (carbon) in the diamond reacted with the deposited Si to form a C-Si structure, and was instantly oxidized by oxygen in the air environment to form a C-Si-O (oxygen) silicon-terminated diamond structure, as shown in FIG. Figure 4The C-Si-O structure also has a negative electron affinity, so after the silicon terminal surface electrons escape, in order to satisfy electrical neutrality, a hole channel is formed on the surface of the silicon terminal diamond 7 in the homoepitaxial undoped diamond.

[0113] f) SiO2mask is prepared in the gate region of the hydrogen / silicon composite terminal E-mode device.

[0114] In the embodiment of the present application, the SiO2mask can be prepared by magnetron sputtering with the aid of a photolithography process, and the thickness of the mask is 100 nm.

[0115] g) The silicon terminal diamond 7 and the hydrogen terminal are partially etched.

[0116] The C-Si-O surface outside the SiO2covered region is removed by fluorine-based inductively coupled plasma reactive ion method to obtain the silicon terminal diamond 7, see (d) in Figure 6 The specific etching conditions of the fluorine-based inductively coupled plasma reactive ion are: radio frequency power is 30 W, and etching time is 2 s.

[0117] Subsequently, the sample is transferred into the MPCVD device for hydrogen plasma treatment to form a hydrogen terminal surface, including the first hydrogen terminal diamond 9 of the hydrogen terminal D-mode device and the second hydrogen terminal diamond 8 of the hydrogen / silicon composite terminal E-mode device, see (e) in Figure 6 The C-H (hydrogen) structure has a negative electron affinity, so after the hydrogen terminal surface electrons escape, in order to satisfy electrical neutrality, a two-dimensional hole gas channel is formed on the surface of the hydrogen terminal diamond.

[0118] h) HF (hydrogen fluoride) removes the SiO2mask.

[0119] In order to remove the SiO2mask of the active region, the sample is placed in 20% HF acid for 1 hour, and then placed in deionized water for ultrasonic cleaning for 30 minutes.

[0120] i) The hydrogen terminal is converted into an oxygen terminal for device isolation.

[0121] The hydrogen terminal in the isolation region between the upper surfaces of the two ends of the diamond substrate and the second p-type heavy boron-doped diamond 4 and the third p-type heavy boron-doped diamond 5 is converted into an oxygen terminal by oxygen plasma etching, see (f) in Figure 6 The device used is a reactive ion etching machine (RIE), and the gas flow during etching is 80 sccm, the etching power is 100 W, the etching depth is 10 nm, and the etching time is 5 min.

[0122] j) Source and drain are prepared.

[0123] In the embodiment of the present application, referring to (g) in Figure 6 , the prepared metal source electrode and drain electrode are Ti / Au metal layers prepared by electron beam evaporation, and in the process, the E-mode device source electrode 10 and the E-mode device drain electrode 11 of the hydrogen / silicon composite terminal E-mode device and the D-mode device source electrode 14 and the D-mode device drain electrode 15 of the hydrogen terminal D-mode device are prepared at the same time. The thickness of Ti can be 30 nm, and the thickness of Au can be 100 nm.

[0124] l) Deposition of a passivation layer and windowing.

[0125] In an embodiment of the present application, the deposited passivation layer refers to an Al2O3 thin film deposited on the surface of the sample at 300°C using atomic layer deposition (ALD), obtaining the gate passivation layer and the device passivation medium layer 19 of the E / D-mode device, specifically the E-mode device gate passivation layer 12, the D-mode device gate passivation layer 16 and the passivation medium layer 19, referring to (h) in Figure 6 . The thickness of the thin film can be 20 nm. Specifically, the deposition conditions include a deposition temperature of 300°C. Subsequently, the Al2O3 thin film is subjected to wet etching windowing treatment to form a through hole on the upper surface of the E-mode device drain electrode 11 and the D-mode device source electrode 14 for leading out the metal interconnection line.

[0126] m) Preparation of a metal gate.

[0127] In the embodiment of the present application, the prepared metal gate is specifically an Al thin film with a thickness of 100 nm prepared by resistance heating vacuum evaporation, and in the process, the E-mode device gate 13 of the hydrogen / silicon composite terminal E-mode device and the D-mode device gate 17 of the hydrogen terminal D-mode device are prepared at the same time, referring to (i) in Figure 6 .

[0128] Step S503, interconnecting the E-mode device drain electrode 11 of the hydrogen / silicon composite terminal E-mode device, the D-mode device source electrode 14 of the hydrogen terminal D-mode device and the D-mode device gate 17 of the hydrogen terminal D-mode device through the metal interconnection line.

[0129] In the embodiment of the present application, the metal lead is prepared on the surface of the device, the E-mode device drain electrode 11 of the hydrogen / silicon composite terminal E-mode device, the D-mode device source electrode 14 of the hydrogen terminal D-mode device and the D-mode device gate 17 of the hydrogen terminal D-mode device are interconnected through the metal interconnection line, completing the preparation of the diamond high-speed inverter circuit provided in the embodiment of the present application, referring to Figure 1 . This step can be performed at the same time as the preparation of the metal electrode.

[0130] In the embodiment of the present application, the terminal layer in the hydrogen / silicon composite terminal E-mode device of the diamond high-speed inverter circuit adopts hydrogen / silicon composite terminal diamond. Since the silicon in the silicon terminal diamond 7 in the hydrogen / silicon composite terminal diamond has the same cubic crystal structure as the diamond, the silicon terminal diamond 7 has good lattice matching effect and low interface state density. At the same time, the surface conductivity of the oxidized silicon terminal diamond 7 is low, which is also conducive to realizing high threshold voltage enhancement mode devices. Based on this, the diamond high-speed inverter circuit provided in the embodiment of the present application has higher performance, higher safety and higher response speed compared with the existing single hydrogen terminal diamond high-speed inverter circuit.

[0131] It should be noted that in the embodiment of the present application, the silicon terminal diamond 7 under the etched SiO2 mask is etched, and the hydrogen terminal diamond including the first hydrogen terminal diamond 9 and the second hydrogen terminal diamond 8 is formed by hydrogenation treatment by MPCVD. The step is the core process of simultaneously preparing the hydrogen / silicon composite terminal diamond E-mode device and the hydrogen terminal diamond D-mode device and forming the E / D-mode inverter circuit.

[0132] It should be noted that the terms "first", "second", and the like are used to distinguish similar objects, and do not necessarily have to be used to describe a particular order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of devices and methods consistent with some aspects of the present application.

[0133] In the description of the present specification, the description of the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" and the like means that the specific features or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in the present specification.

[0134] Although the present application is described in conjunction with the preferred embodiments thereof, numerous modifications and changes can be made by those skilled in the art without departing from the present application. For example, the term "comprising" is intended to mean that there are no restrictions on the steps or components of the present application, and that the steps or components can be replaced with alternative steps or components without departing from the scope of the present application. It is also intended that the steps or components can be combined, deleted, or added to without departing from the scope of the present application. It is further intended that the steps or components can be rearranged, without departing from the scope of the present application. It is also intended that the term "including" does not exclude other components or steps, and that the indefinite articles "a" or "an" do not exclude a plurality, and that the term "plurality" means two or more unless otherwise specified. It is also intended that one or more disclosed components can be substituted for or added to other disclosed components without departing from the scope of the present application. Furthermore, it is intended that features of the various embodiments described herein can be combined with each other, unless specifically noted otherwise.

[0135] In the description of the present application, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations or positional relationships based on the orientations or positional relationships as shown by the drawings, and are merely intended for convenience in describing the present application and simplifying the description, and are not intended to indicate or imply that a device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0136] In the present application, unless specifically noted and limited otherwise, the terms "mounting", "connection", "connecting", "fixed", and the like, are to be broadly understood, for example, can be fixed connection, or detachable connection, or integral; can be mechanical connection, or electrical connection; can be direct connection, or indirect connection through intermediate medium; can be internal communication of two elements, or interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0137] In the present application, unless specifically noted and limited otherwise, the first feature "on" or "under" the second feature can include that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, the first feature "on", "above" and "over" the second feature includes that the first feature is directly above and obliquely above the second feature, or only means that the horizontal height of the first feature is higher than that of the second feature. The first feature "under", "below" and "under" the second feature includes that the first feature is directly below and obliquely below the second feature, or only means that the horizontal height of the first feature is less than that of the second feature.

[0138] The above is further detailed description of the present application in combination with specific preferred embodiments, and cannot be deemed as limitation of the specific implementation of the present application to these descriptions. For those skilled in the art to which the present application belongs, without departing from the concept of the present application, a number of simple deductions or substitutions can be made, and all of them shall be deemed as falling within the protection scope of the present application.

Claims

1. A diamond high speed inverter circuit, characterized by, The diamond high-speed inverter comprises: A hydrogen / silicon composite terminal E-mode device and a hydrogen terminal D-mode device; the hydrogen / silicon composite terminal E-mode device and the hydrogen terminal D-mode device share a diamond substrate; the diamond substrate comprises a single crystal diamond substrate and a non-doped diamond epitaxial layer superposed on the single crystal diamond substrate; a terminal layer of the hydrogen / silicon composite terminal E-mode device is a hydrogen / silicon composite terminal diamond; a terminal layer of the hydrogen terminal D-mode device is a first hydrogen terminal diamond; An isolation region is arranged between the hydrogen / silicon composite terminal E-mode device and the hydrogen terminal D-mode device; An E-mode device drain of the hydrogen / silicon composite terminal E-mode device, a D-mode device source of the hydrogen terminal D-mode device and a D-mode device gate of the hydrogen terminal D-mode device are interconnected through a metal interconnection line; The hydrogen / silicon composite terminal E-mode device comprises: A diamond substrate; A first p-type heavy boron doped diamond and a second p-type heavy boron doped diamond superposed on an upper surface of the diamond substrate; lower surfaces of the first p-type heavy boron doped diamond and the second p-type heavy boron doped diamond are both deep into the diamond substrate; A hydrogen / silicon composite terminal diamond superposed on the upper surface of the diamond substrate and located between the first p-type heavy boron doped diamond and the second p-type heavy boron doped diamond; the hydrogen / silicon composite terminal diamond is in contact with the first p-type heavy boron doped diamond and the second p-type heavy boron doped diamond on both sides respectively; the hydrogen / silicon composite terminal diamond comprises a silicon terminal diamond and a second hydrogen terminal diamond located on both sides of the silicon terminal diamond; An E-mode device source; the E-mode device source is superposed on the first p-type heavy boron doped diamond; An E-mode device drain; the E-mode device drain is superposed on the second p-type heavy boron doped diamond; An E-mode device gate passivation layer; the E-mode device gate passivation layer is arranged on an upper surface of the hydrogen / silicon composite terminal diamond and extends to both sides to cover part of upper surfaces of the first p-type heavy boron doped diamond and the second p-type heavy boron doped diamond; An E-mode device gate; the E-mode device gate is superposed on the E-mode device gate passivation layer; The hydrogen terminal D-mode device comprises: A diamond substrate; A third p-type heavy boron doped diamond and a fourth p-type heavy boron doped diamond superposed on an upper surface of the diamond substrate; lower surfaces of the third p-type heavy boron doped diamond and the fourth p-type heavy boron doped diamond are both deep into the diamond substrate; A first hydrogen terminal diamond superposed on the upper surface of the diamond substrate and located between the third p-type heavy boron doped diamond and the fourth p-type heavy boron doped diamond; the first hydrogen terminal diamond is in contact with the third p-type heavy boron doped diamond and the fourth p-type heavy boron doped diamond on both sides respectively; A D-mode device source; the D-mode device source is superposed on the third p-type heavy boron doped diamond; A D-mode device drain; the D-mode device drain is superposed on the fourth p-type heavy boron doped diamond; A D-mode device gate passivation layer; the D-mode device gate passivation layer is disposed on the first hydrogen-terminated diamond upper surface and extends to cover part of the upper surfaces of the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond; A D-mode device gate; the D-mode device gate is superimposed on the D-mode device gate passivation layer.

2. The diamond high speed inverter circuit of claim 1, wherein, The boron doping concentration of the first p-type heavy boron doped diamond and the second p-type heavy boron doped diamond is 1x10 20 cm -3 ~1x10 21 cm -3 ; the E-mode device source and the E-mode device drain are both formed by stacking Ti and Au from bottom to top; the material of the E-mode device gate passivation layer is Al2O3; and the material of the E-mode device gate is Al.

3. The diamond high speed inverter circuit of claim 1, wherein, The thickness of the first p-type heavily boron-doped diamond and the second p-type heavily boron-doped diamond ranges from 50nm to 150nm; the thickness of the hydrogen / silicon composite-terminated diamond ranges from 0.2nm to 1nm; the thickness of the E-mode device source and the E-mode device drain ranges from 100nm to 130nm; the thickness of the E-mode device gate passivation layer ranges from 20nm to 100nm; the thickness of the E-mode device gate ranges from 50nm to 150nm.

4. The diamond high speed inverter circuit of claim 1, wherein, The boron doping concentration of the third p-type heavy boron doped diamond and the fourth p-type heavy boron doped diamond is 1x10 20 cm -3 ~1x10 21 cm -3 ; the D-mode device source and the D-mode device drain are both formed by stacking Ti and Au from bottom to top; the material of the D-mode device gate passivation layer is Al2O3; and the material of the D-mode device gate is Al.

5. The diamond high speed inverter circuit of claim 1, wherein, The thickness of the third p-type heavily boron-doped diamond and the fourth p-type heavily boron-doped diamond ranges from 50nm to 150nm; the thickness of the first hydrogen-terminated diamond ranges from 0.2nm to 1nm; the thickness of the D-mode device source and the D-mode device drain ranges from 100nm to 130nm; the thickness of the D-mode device gate passivation layer ranges from 20nm to 100nm; the thickness of the D-mode device gate ranges from 50nm to 150nm.

6. The diamond high speed inverter circuit of claim 1, wherein, The diamond high-speed inverter circuit further comprises an oxygen-terminated diamond isolation layer and a passivation dielectric layer; the oxygen-terminated diamond isolation layer is located at both ends of the upper surface of the diamond substrate and in the isolation region; The passivation dielectric layer is located on the oxygen-terminated diamond isolation layer in the isolation region and extends to cover the upper surfaces of the E-mode device drain of the hydrogen / silicon composite-terminated E-mode device and the D-mode device source of the hydrogen-terminated D-mode device.

7. The diamond high speed inverter circuit of claim 6, wherein, The material of the passivation dielectric layer is Al2O3.

8. A method of fabricating a diamond high speed inverter circuit, characterized by, The preparation method comprises: Epitaxially growing a non-doped diamond epitaxial layer on the upper surface of a single crystal diamond substrate to form a diamond substrate; Preparation of a hydrogen / silicon composite-terminated E-mode device, a hydrogen-terminated D-mode device, and an isolation region between the hydrogen / silicon composite-terminated E-mode device and the hydrogen-terminated D-mode device; wherein the hydrogen / silicon composite-terminated E-mode device and the hydrogen-terminated D-mode device share the diamond substrate; the terminal layer of the hydrogen / silicon composite-terminated E-mode device is a hydrogen / silicon composite-terminated diamond; the terminal layer of the hydrogen-terminated D-mode device is a first hydrogen-terminated diamond; the hydrogen / silicon composite-terminated diamond and the first hydrogen-terminated diamond are prepared simultaneously by growing a silicon-terminated diamond on the diamond substrate and then performing hydrogenation treatment using mask etching and MPCVD process; The E-mode device drain of the hydrogen / silicon composite-terminated E-mode device, the D-mode device source of the hydrogen-terminated D-mode device, and the D-mode device gate of the hydrogen-terminated D-mode device are interconnected by a metal interconnection line; The hydrogen / silicon composite-terminated E-mode device comprises: A diamond substrate; a first p-type heavily boron-doped diamond superimposed on the upper surface of the diamond substrate, and a second p-type heavily boron-doped diamond superimposed on the upper surface of the diamond substrate; the lower surfaces of the first and second p-type heavily boron-doped diamonds are both deep into the diamond substrate; a hydrogen / silicon recombination terminal diamond superimposed on the upper surface of the diamond substrate and between the first and second p-type heavily boron-doped diamonds; the hydrogen / silicon recombination terminal diamond is in contact with the first and second p-type heavily boron-doped diamonds on both sides respectively; the hydrogen / silicon recombination terminal diamond comprises a silicon terminal diamond and second hydrogen terminal diamonds on both sides of the silicon terminal diamond; an E-mode device source electrode; the E-mode device source electrode is superimposed on the first p-type heavily boron-doped diamond; an E-mode device drain electrode; the E-mode device drain electrode is superimposed on the second p-type heavily boron-doped diamond; an E-mode device gate passivation layer; the E-mode device gate passivation layer is arranged on the upper surface of the hydrogen / silicon recombination terminal diamond and extends to both sides to cover part of the upper surfaces of the first and second p-type heavily boron-doped diamonds; an E-mode device gate; the E-mode device gate is superimposed on the E-mode device gate passivation layer; the hydrogen terminal D-mode device comprises: a diamond substrate; a third p-type heavily boron-doped diamond superimposed on the upper surface of the diamond substrate, and a fourth p-type heavily boron-doped diamond superimposed on the upper surface of the diamond substrate; the lower surfaces of the third and fourth p-type heavily boron-doped diamonds are both deep into the diamond substrate; a first hydrogen terminal diamond superimposed on the upper surface of the diamond substrate and between the third and fourth p-type heavily boron-doped diamonds; the first hydrogen terminal diamond is in contact with the third and fourth p-type heavily boron-doped diamonds on both sides respectively; a D-mode device source electrode; the D-mode device source electrode is superimposed on the third p-type heavily boron-doped diamond; a D-mode device drain electrode; the D-mode device drain electrode is superimposed on the fourth p-type heavily boron-doped diamond; a D-mode device gate passivation layer; the D-mode device gate passivation layer is arranged on the upper surface of the first hydrogen terminal diamond and extends to both sides to cover part of the upper surfaces of the third and fourth p-type heavily boron-doped diamonds; a D-mode device gate; the D-mode device gate is superimposed on the D-mode device gate passivation layer.

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