Array substrate and display panel

Abstract

The invention discloses an array substrate and a display panel. The array substrate comprises a substrate base plate, wherein the substrate base plate comprises a display area, a first frame area and a binding area; the array substrate located in the first frame area at least comprises a first inorganic insulating layer, a metal wiring layer and a second inorganic insulating layer; the edge, extending in the first direction, of the first inorganic insulating layer is provided with a fluctuating structure, and the first direction is the direction from the display area to the first frame area; the metal wiring layer is located on the surface, away from the substrate, of the first inorganic insulating layer, the edge, extending in the first direction, of the metal wiring layer tilts in the second direction, and the second direction is the direction, pointing to the metal wiring layer, of the substrate; the second inorganic insulating layer is located on the surface, away from the first inorganic insulating layer, of the metal wiring layer and covers the side face of the edge, extending in the first direction, of the metal wiring layer. According to the technical scheme provided by the embodiment of the invention, the packaging effect of the metal wiring layer of the frame area is improved.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of semiconductor technology, and in particular to an array substrate and a display panel. Background Art

[0002] Flexible organic light-emitting diode (OLED) screens have entered the era of narrow bezels. The metal routing in the lower bezel area, which is close to the binding area, is more complex and the film structure is more concentrated than that in the other three positions.

[0003] However, the existing border area packaging design structure results in poor packaging effect of the metal routing layer. Summary of the invention

[0004] In view of this, an embodiment of the present invention provides an array substrate and a display panel to improve the packaging effect of the metal wiring layer in the frame area.

[0005] An embodiment of the present invention provides an array substrate, including:

[0006] A base substrate, the base substrate comprising a display area, a first frame area and a binding area, wherein the first frame area is located between the display area and the binding area;

[0007] The array substrate located in the first border area at least includes a first inorganic insulating layer, a metal wiring layer, and a second inorganic insulating layer;

[0008] The first inorganic insulating layer is located on one side of the base substrate, and an undulating structure is provided on an edge of the first inorganic insulating layer extending along a first direction, wherein the first direction is a direction from the display area to the first frame area; the undulating structure is located on a surface of the first inorganic insulating layer away from the base substrate or inside a film layer;

[0009] The metal wiring layer is located on the surface of the first inorganic insulating layer away from the base substrate, and the edge of the metal wiring layer extending along the first direction is tilted toward the second direction, and the second direction is the direction from the base substrate to the metal wiring layer;

[0010] The second inorganic insulating layer is located on a surface of the metal wiring layer away from the first inorganic insulating layer, and covers a side surface of an edge of the metal wiring layer extending along the first direction.

[0011] In this technical solution, the edge of the first inorganic insulating layer extending in the direction from the display area to the first frame area is provided with an undulating structure, and under the support of the undulating structure, the edge of the metal wiring layer extending in the direction from the display area to the first frame area is tilted toward the direction from the base substrate to the metal wiring layer. The over-etched area of ​​the metal wiring layer generated in the process of etching the organic planarization layer is also tilted toward the direction from the base substrate to the metal wiring layer, so the second inorganic insulating layer can be deposited in the over-etched area, so that the metal wiring layer is wrapped by the first inorganic insulating layer and the second inorganic insulating layer, thereby improving the packaging effect of the metal wiring layer.

[0012] Optionally, the undulating structure comprises an auxiliary metal layer, and the auxiliary metal layer is located inside the first inorganic insulating layer; preferably, the thickness of the auxiliary metal layer increases in a direction from the middle region of the first inorganic insulating layer to the edge;

[0013] And / or, the undulating structure includes a recessed structure, which extends from the surface of the first inorganic insulating layer away from the base substrate to the inside of the first inorganic insulating layer; the recessed structure includes a side wall and a bottom surface, the side wall includes a first side wall and a second side wall arranged opposite to each other, the direction of the second side wall pointing to the first side wall is the direction of the middle area of ​​the first inorganic insulating layer pointing to the edge, and the angle between the bottom surface and the first side wall is less than 90°.

[0014] In this technical solution, the auxiliary metal layer is located inside the first inorganic insulating layer, and the thickness of the auxiliary metal layer in the direction from the middle area of ​​the first inorganic insulating layer to the edge becomes thicker and thicker. Under the support of the auxiliary metal layer, the edge of the metal wiring layer extending from the display area to the first frame area is tilted toward the direction of the base substrate pointing to the metal wiring layer. The over-etched area of ​​the metal wiring layer generated in the process of etching the organic planarization layer is also tilted toward the direction of the base substrate pointing to the metal wiring layer, so the second inorganic insulating layer can be deposited in the over-etched area, so that the metal wiring layer is wrapped by the first inorganic insulating layer and the second inorganic insulating layer, thereby improving the packaging effect of the metal wiring layer.

[0015] In this technical solution, the recessed structure is located on the surface of the first inorganic insulating layer away from the base substrate; the recessed structure includes side walls and a bottom surface, the side walls include a first side wall and a second side wall arranged opposite to each other, the direction from the second side wall to the first side wall is the direction from the middle area of ​​the first inorganic insulating layer to the edge, the angle between the bottom surface and the first side wall is less than 90°, and under the support of the recessed structure, the edge of the metal wiring layer extending from the display area to the first frame area is tilted toward the direction from the base substrate to the metal wiring layer. The over-etched area of ​​the metal wiring layer generated during the etching of the organic planarization layer is also tilted toward the direction from the base substrate to the metal wiring layer, so the second inorganic insulating layer can be deposited in the over-etched area, so that the metal wiring layer is wrapped by the first inorganic insulating layer and the second inorganic insulating layer, thereby improving the packaging effect of the metal wiring layer.

[0016] Optionally, the auxiliary metal layer and the first metal layer located in the display area are located in the same layer; and / or,

[0017] The metal wiring layer and the second metal layer located in the display area are located in the same layer, and the first metal layer and the second metal layer are located in different layers.

[0018] In this technical solution, the auxiliary metal layer and the first metal layer located in the display area are located in the same layer, and the preparation of the auxiliary metal layer is completed while the first metal layer is prepared; the metal routing layer and the second metal layer located in the display area are located in the same layer, and the preparation of the metal routing layer is completed while the second metal layer is prepared; the above technical solution simplifies the number of film layers of the array substrate and reduces the preparation cost.

[0019] Optionally, the depth of the recessed structure is less than the thickness of the first inorganic insulating layer.

[0020] In this technical solution, specifically, the depth of the recessed structure is less than the thickness of the first inorganic insulating layer, thereby avoiding contact between the metal wiring layer and the base substrate, thereby ensuring the packaging effect of the metal wiring layer.

[0021] Optionally, in the second direction, the first inorganic insulating layer at least includes a first sub-inorganic insulating layer, a second sub-inorganic insulating layer and a third sub-inorganic insulating layer in sequence;

[0022] The first inorganic insulating sub-layer and the gate insulating layer located in the display area are located in the same layer;

[0023] The second inorganic insulating sub-layer and the capacitive insulating layer located in the display area are located in the same layer;

[0024] The third inorganic insulating sub-layer and the interlayer insulating layer located in the display area are located in the same layer;

[0025] Preferably, the recessed structure is located on a surface of the third inorganic sub-insulating layer away from the second inorganic sub-insulating layer.

[0026] In this technical solution, the first inorganic insulating layer and the gate insulating layer in the display area are located in the same layer, and the first inorganic insulating layer is prepared while the gate insulating layer is prepared; the second inorganic insulating layer and the capacitor insulating layer in the display area are located in the same layer, and the second inorganic insulating layer is prepared while the capacitor insulating layer is prepared; the third inorganic insulating layer and the interlayer insulating layer in the display area are located in the same layer, and the third inorganic insulating layer is prepared while the interlayer insulating layer is prepared; the above technical solution simplifies the number of film layers of the array substrate and reduces the preparation cost. Optionally, the depth of the recessed structure is less than the thickness of the third inorganic insulating layer.

[0027] In this technical solution, the third sub-inorganic insulating layer and the interlayer insulating layer are located in the same layer, which are used to separate the gate, source and drain. The thickness of the third sub-inorganic insulating layer is relatively thick, and the thickness of the gate insulating layer and the capacitor insulating layer is relatively thin. The depth of the recessed structure is less than the thickness of the third sub-inorganic insulating layer. This can prevent the corrosive liquid for etching the organic planarization layer from entering the gap between the first sub-inorganic insulating layer and the second sub-inorganic insulating layer or entering the gap between the second sub-inorganic insulating layer and the third sub-inorganic insulating layer, and over-etching other film layers, thereby ensuring the packaging effect of the array substrate.

[0028] Optionally, the recessed structure comprises a plurality of recessed holes arranged at intervals; preferably, an opening area of ​​the recessed holes gradually decreases in a direction from the metal wiring layer to the substrate.

[0029] In this technical solution, a plurality of recessed holes are arranged at intervals, and the opening area of ​​the recessed holes gradually decreases in the direction from the metal wiring layer to the substrate, so that the angle between the bottom surface of the recessed structure and the first side wall is less than 90°. Under the support of the recessed structure, the edge of the metal wiring layer extending from the display area to the first frame area is tilted toward the direction from the substrate to the metal wiring layer. The over-etched area of ​​the metal wiring layer generated in the process of etching the organic planarization layer is also tilted toward the direction from the substrate to the metal wiring layer, so the second inorganic insulating layer can be deposited in the over-etched area, so that the metal wiring layer is wrapped by the first inorganic insulating layer and the second inorganic insulating layer, thereby improving the packaging effect of the metal wiring layer.

[0030] Optionally, the recessed structure comprises a trapezoidal groove.

[0031] In this technical solution, the angle between the bottom surface of the trapezoidal groove and the first side wall is less than 90°, and under the support of the recessed structure, the edge of the metal wiring layer extending in the direction from the display area to the first frame area is tilted toward the direction of the base substrate pointing to the metal wiring layer. The over-etched area of ​​the metal wiring layer generated in the process of etching the organic planarization layer is also tilted toward the direction of the base substrate pointing to the metal wiring layer, so the second inorganic insulating layer can be deposited in the over-etched area, so that the metal wiring layer is wrapped by the first inorganic insulating layer and the second inorganic insulating layer, thereby improving the packaging effect of the metal wiring layer.

[0032] Optionally, the base substrate further includes a second frame area, and the second frame area is located between the display area and the first frame area;

[0033] The array substrate located in the second border area includes the first inorganic insulating layer, the metal wiring layer, an organic planarization layer and the second inorganic insulating layer;

[0034] The first inorganic insulating layer is located on one side of the base substrate;

[0035] The metal wiring layer is located on the surface of the first inorganic insulating layer away from the substrate;

[0036] The organic planarization layer is located on a side of the metal wiring layer away from the first inorganic insulating layer, and the organic planarization layer is provided with a plurality of first grooves arranged at intervals, and the first grooves are arranged at intervals in the first direction; the depth of the first grooves is less than the depth of the organic planarization layer;

[0037] Preferably, the organic planarization layer is further provided with a plurality of second grooves arranged at intervals, the second grooves are arranged at intervals in the first direction, one second groove is provided between two adjacent first grooves, and the depth of the second groove is equal to the depth of the organic planarization layer;

[0038] The second inorganic insulating layer is located on a surface of the organic planarization layer away from the metal wiring layer, and is filled in the first groove and the second groove.

[0039] In this technical solution, a structure consisting of a plurality of first grooves and second grooves and a second inorganic insulating layer filled therein can be used as a water vapor barrier structure to prevent water vapor from corroding the display area, thereby ensuring the packaging effect of the entire array substrate.

[0040] An embodiment of the present invention further provides a display panel, comprising the array substrate described in any one of the embodiments of the present invention.

[0041] In this technical solution, the display panel includes the array substrate described in the above embodiment. Therefore, the display panel provided by the embodiment of the present invention also has the beneficial effects described in the above embodiment.

[0042] In the technical solution provided by the embodiment of the present invention, the edge of the first inorganic insulating layer extending in the direction from the display area to the first frame area is provided with an undulating structure, and under the support of the undulating structure, the edge of the metal wiring layer extending in the direction from the display area to the first frame area is tilted toward the direction from the base substrate to the metal wiring layer. The over-etched area of ​​the metal wiring layer generated in the process of etching the organic planarization layer is also tilted toward the direction from the base substrate to the metal wiring layer, so the second inorganic insulating layer can be deposited in the over-etched area, so that the metal wiring layer is wrapped by the first inorganic insulating layer and the second inorganic insulating layer, thereby improving the packaging effect of the metal wiring layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 is a top view of an array substrate provided by the prior art;

[0044] Figure 2 yes Figure 1 A schematic cross-sectional structure diagram of an edge of the first frame area extending in a direction from the display area to the first frame area;

[0045] Figure 3 yes Figure 1 A schematic diagram of the cross-sectional structure of the first border area in the direction a1-a2;

[0046] Figure 4 is a top view of an array substrate provided by an embodiment of the present invention;

[0047] Figure 5 yes Figure 4 A schematic diagram of a cross-sectional structure in the b1-b2 direction;

[0048] Figure 6 yes Figure 4 A schematic diagram of a cross-sectional structure in the a1-a2 direction;

[0049] Figure 7 yes Figure 4 Another schematic diagram of the cross-sectional structure in the b1-b2 direction;

[0050] Figure 8 yes Figure 4 Another schematic diagram of the cross-sectional structure in the a1-a2 direction;

[0051] Fig. 9 yes Figure 4 Another schematic diagram of a cross-sectional structure in the a1-a2 direction;

[0052] Fig.10is a top view of a first inorganic insulating layer including a recessed hole. DETAILED DESCRIPTION

[0053] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0054] In the process of implementing the present invention, the inventors discovered that the following problems exist in the related art: the existing border area packaging design structure leads to poor packaging effect of the metal routing layer. Figure 1 is a top view of an array substrate provided by the prior art, Figure 2 yes Figure 1 A schematic cross-sectional structure diagram of an edge S1 of the first frame region extending in a direction from the display region to the first frame region, Figure 3 yes Figure 1 A schematic diagram of the cross-sectional structure of the first border area in the a1-a2 direction is shown in FIG. Figure 1-Figure 3 As shown, the inventors have found through careful research that the existing array substrate includes a base substrate 100, the base substrate 100 includes a display area AA, a first frame area NA01 and a binding area NA02, and the first frame area NA01 is located between the display area AA and the binding area NA02. Figure 2 and Figure 3 As shown, the array substrate located in the first border area NA01 includes a first inorganic insulating layer 101, a metal wiring layer 102, and a second inorganic insulating layer 103. An over-etched area 104 exists at the edge S1 of the first border area NA01 extending in the direction from the display area AA to the first border area NA01, so that the second inorganic insulating layer 103 cannot guarantee the packaging effect of the metal wiring layer 102, resulting in poor packaging effect of the metal wiring layer 102.

[0055] In view of the above technical problems, the embodiments of the present invention provide the following technical solutions:

[0056] like Figure 4-Figure 6 As shown, Figure 4 is a top view of an array substrate provided by an embodiment of the present invention, Figure 5 yes Figure 4 A schematic diagram of a cross-sectional structure in the b1-b2 direction. Figure 6 yes Figure 4A schematic diagram of a cross-sectional structure in the direction a1-a2, the array substrate comprises: a base substrate 100, the base substrate 100 comprises a display area AA, a first frame area NA01 and a binding area NA02, the first frame area NA01 is located between the display area AA and the binding area NA02; the array substrate located in the first frame area NA01 comprises at least a first inorganic insulating layer 101, a metal wiring layer 102 and a second inorganic insulating layer 103; the first inorganic insulating layer 101 is located on one side of the base substrate 100, and an edge S1 of the first inorganic insulating layer 101 extending along a first direction is provided with an undulating structure 105, the first direction is the direction from the display area AA to the first frame area NA01 (i.e. Figure 4 The undulating structure 105 is located on the surface of the first inorganic insulating layer 101 away from the base substrate 100 or inside the film layer of the first inorganic insulating layer 101; the metal wiring layer 102 is located on the surface of the first inorganic insulating layer 101 away from the base substrate 100, and the metal wiring layer 102 is arranged along the first direction (i.e. Figure 4 The edge S1 extending in the Y direction in FIG. 1 is tilted toward the second direction, and the second direction is the direction from the base substrate 100 to the metal wiring layer 102 (i.e. Figure 4 the second inorganic insulating layer 103 is located on the surface of the metal wiring layer 102 away from the first inorganic insulating layer 101, and covers the side of the edge S1 of the metal wiring layer 102 extending along the first direction.

[0057] It should be noted that the first frame area NA01 is located between the display area AA and the binding area NA02. The wiring width in the metal wiring layer 102 in the first frame area NA01 is relatively wide and can be used to carry the large driving current required by the display area AA.

[0058] In this embodiment, if Figure 6 As shown, before the second inorganic insulating layer 103 is formed, it is necessary to etch away the organic planarization layer covering the surface of the metal wiring layer 102 in the first border area NA01. In the process of etching the organic planarization layer, since the metal wiring layer 102 generally adopts a sandwich structure of Ti / Al / Ti, the metal Al at the edge S1 of the metal wiring layer 102 extending from the display area AA to the first border area NA01 is easily etched, resulting in over-etching of the metal wiring layer 102, so that there is an over-etched area 104 at the edge S1 of the first border area NA01 extending from the display area AA to the first border area NA01.

[0059] In the technical solution provided by the embodiment of the present invention, the edge S1 of the first inorganic insulating layer 101 extending in the direction from the display area AA to the first frame area NA01 is provided with an undulating structure 105. Under the support of the undulating structure 105, the edge S1 of the metal wiring layer 102 extending in the direction from the display area AA to the first frame area NA01 is tilted toward the direction from the base substrate 100 to the metal wiring layer 102. The over-etched area 104 of the metal wiring layer 102 generated in the process of etching the organic planarization layer is also tilted toward the direction from the base substrate 100 to the metal wiring layer 102, so the second inorganic insulating layer 103 can be deposited in the over-etched area 104, so that the metal wiring layer 102 is wrapped by the first inorganic insulating layer 101 and the second inorganic insulating layer 103, thereby improving the packaging effect of the metal wiring layer 102.

[0060] Optionally, based on the above technical solution, Figure 5 and Figure 6 As shown, the relief structure 105 includes an auxiliary metal layer 1051, and the auxiliary metal layer 1051 is located inside the first inorganic insulating layer 101. Preferably, the thickness of the auxiliary metal layer 1051 in the direction from the middle area of ​​the first inorganic insulating layer 101 to the edge S1 becomes thicker and thicker. Figure 4 The direction from the middle area of ​​the first inorganic insulating layer 101 to the edge S1 is Figure 4 In the X direction. Figure 4 The direction from the middle area of ​​the first inorganic insulating layer 101 to the edge S1 is Figure 4 The opposite direction of the X direction.

[0061] Specifically, the auxiliary metal layer 1051 is located inside the first inorganic insulating layer 101, and the thickness of the auxiliary metal layer 1051 in the direction of the edge S1 in the middle area of ​​the first inorganic insulating layer 101 becomes thicker and thicker. Under the support of the auxiliary metal layer 1051, the edge S1 of the metal wiring layer 102 extending in the direction from the display area AA to the first frame area NA01 is tilted toward the direction of the base substrate 100 pointing to the metal wiring layer 102. The over-etched area 104 of the metal wiring layer 102 generated in the process of etching the organic planarization layer is also tilted toward the direction of the base substrate 100 pointing to the metal wiring layer 102, so the second inorganic insulating layer 103 can be deposited in the over-etched area 104, so that the metal wiring layer 102 is wrapped by the first inorganic insulating layer 101 and the second inorganic insulating layer 103, thereby improving the packaging effect of the metal wiring layer 102.

[0062] like Figure 7-Figure 9 As shown, Figure 7 yes Figure 4 Another cross-sectional structure diagram in the b1-b2 direction, Figure 8 yes Figure 4 Another cross-sectional structure diagram in the a1-a2 direction, Fig. 9 yes Figure 4 Another schematic diagram of the cross-sectional structure in the a1-a2 direction, the undulating structure 105 includes a recessed structure 1052, the recessed structure 1052 extends from the surface of the first inorganic insulating layer 101 away from the base substrate 100 to the inside of the first inorganic insulating layer 101; the recessed structure 1052 includes a side wall and a bottom surface, the side wall includes a first side wall and a second side wall arranged opposite to each other, the direction of the second side wall pointing to the first side wall is the direction of the middle area of ​​the first inorganic insulating layer 101 pointing to the edge S1, and the angle between the bottom surface and the first side wall is less than 90°.

[0063] Specifically, the recessed structure 1052 is located on the surface of the first inorganic insulating layer 101 away from the base substrate 100; the recessed structure 1052 includes a side wall and a bottom surface, the side wall includes a first side wall and a second side wall that are relatively arranged, the direction of the second side wall pointing to the first side wall is the direction of the middle area of ​​the first inorganic insulating layer 101 pointing to the edge S1, and the angle between the bottom surface and the first side wall is less than 90°. Under the support of the recessed structure 1052, the edge S1 of the metal wiring layer 102 extending in the direction from the display area AA to the first frame area NA01 is tilted toward the direction of the base substrate 100 pointing to the metal wiring layer 102. The over-etched area 104 generated by the metal routing layer 102 during the etching process of the organic planarization layer also rises toward the direction of the base substrate 100 pointing to the metal routing layer 102, so that the second inorganic insulating layer 103 can be deposited in the over-etched area 104, so that the metal routing layer 102 is wrapped by the first inorganic insulating layer 101 and the second inorganic insulating layer 103, thereby improving the packaging effect of the metal routing layer 102.

[0064] It should be noted that an array substrate may also include an auxiliary metal layer 1051 and a recessed structure 1052 at the same time, so that the edge S1 of the metal wiring layer 102 extending in the direction from the display area AA to the first frame area NA01 is tilted toward the direction from the base substrate 100 to the metal wiring layer 102. The over-etched area 104 of the metal wiring layer 102 generated in the process of etching the organic planarization layer is also tilted toward the direction from the base substrate 100 to the metal wiring layer 102, so the second inorganic insulating layer 103 can be deposited in the over-etched area 104, so that the metal wiring layer 102 is wrapped by the first inorganic insulating layer 101 and the second inorganic insulating layer 103, thereby improving the packaging effect of the metal wiring layer 102.

[0065] Optionally, based on the above technical solution, the auxiliary metal layer 1051 and the first metal layer located in the display area AA are located in the same layer; and / or the metal routing layer 102 and the second metal layer located in the display area AA are located in the same layer, and the first metal layer and the second metal layer are located in different layers.

[0066] For example, Figure 5 and Figure 6 As shown, the display area also includes a thin film transistor T0 and a storage capacitor C0, and the thin film transistor T0 includes a semiconductor active layer 200, a gate 201, a source 202 and a drain 203. The storage capacitor C0 includes a first electrode 204 and a second electrode 205. A gate insulating layer is spaced between the semiconductor active layer 200 and the gate 201, and a capacitor insulating layer and an interlayer insulating layer are spaced between the gate 201 and the source 202 and the drain 203. The first metal layer located in the display area AA may be a metal layer where the second electrode 205 of the storage capacitor C0 is located. The second metal layer located in the display area AA may be a metal layer where the source 202 and the drain 203 of the thin film transistor T0 are located. In other embodiments, the first metal layer and the second metal layer may also be other metal layers of the display area AA.

[0067] Specifically, the auxiliary metal layer 1051 and the first metal layer located in the display area AA are located in the same layer, and the preparation of the auxiliary metal layer 1051 is completed while the first metal layer is being prepared; the metal wiring layer 102 and the second metal layer located in the display area AA are located in the same layer, and the preparation of the metal wiring layer 102 is completed while the second metal layer is being prepared; the above technical solution simplifies the number of film layers of the array substrate and reduces the preparation cost.

[0068] Optionally, based on the above technical solution, Figure 7-Figure 9 As shown, the depth of the recessed structure 1052 is less than the thickness of the first inorganic insulating layer 101 .

[0069] Specifically, the depth of the recessed structure 1052 is less than the thickness of the first inorganic insulating layer 101 , so as to avoid the metal wiring layer 102 from contacting the base substrate 100 , thereby ensuring the packaging effect of the metal wiring layer 102 .

[0070] Optionally, based on the above technical solution, Figure 4 and Figure 7 As shown, in the second direction (i.e. Figure 4 In the Z direction), the first inorganic insulating layer 101 at least includes a first sub-inorganic insulating layer 1011, a second sub-inorganic insulating layer 1012 and a third sub-inorganic insulating layer 1013 in sequence; the first sub-inorganic insulating layer 1011 and the gate insulating layer located in the display area AA are located in the same layer; the second sub-inorganic insulating layer 1012 and the capacitor insulating layer located in the display area AA are located in the same layer; the third sub-inorganic insulating layer 1013 and the interlayer insulating layer located in the display area AA are located in the same layer; preferably, the recessed structure 1052 is located on the surface of the third sub-inorganic insulating layer 1013 away from the second sub-inorganic insulating layer 1012.

[0071] Specifically, the first sub-inorganic insulating layer 1011 and the gate insulating layer located in the display area AA are located in the same layer, and the preparation of the first sub-inorganic insulating layer 1011 is completed while preparing the gate insulating layer; the second sub-inorganic insulating layer 1012 and the capacitor insulating layer located in the display area AA are located in the same layer, and the preparation of the second sub-inorganic insulating layer 1012 is completed while preparing the capacitor insulating layer; the third sub-inorganic insulating layer 1013 and the interlayer insulating layer located in the display area AA are located in the same layer, and the preparation of the third sub-inorganic insulating layer 1013 is completed while preparing the interlayer insulating layer; the above technical scheme simplifies the number of film layers of the array substrate and reduces the preparation cost.

[0072] Optionally, based on the above technical solution, Figure 7-Figure 9 As shown, the depth of the recessed structure 1052 is less than the thickness of the third inorganic insulating sub-layer 1013 .

[0073] Specifically, the third sub-inorganic insulating layer 1013 and the interlayer insulating layer are located in the same layer, which are used to separate the gate 201, the source 202 and the drain 203. The thickness is relatively thick, and the thickness of the gate insulating layer and the capacitor insulating layer is relatively thin. The depth of the recessed structure 1052 is less than the thickness of the third sub-inorganic insulating layer 1013, which can prevent the corrosive liquid for etching the organic planarization layer from entering the gap between the first sub-inorganic insulating layer 1011 and the second sub-inorganic insulating layer 1012 or entering the gap between the second sub-inorganic insulating layer 1012 and the third sub-inorganic insulating layer 1013, and over-etching other film layers, thereby ensuring the packaging effect of the array substrate.

[0074] Optionally, based on the above technical solution, Fig.10 As shown, the recessed structure 1052 also includes a plurality of recessed holes arranged at intervals; preferably, referring to Figure 8 and Fig. 9 , the opening area of ​​the recessed hole gradually decreases in the direction from the metal wiring layer 102 to the substrate 100. Figure 4 In the direction opposite to the Z direction. For example, Fig.10 In FIG. 1 , the recessed structure 1052 includes two recessed holes.

[0075] Specifically, a plurality of recessed holes are arranged at intervals, and the opening area of ​​the recessed holes gradually decreases in the direction from the metal wiring layer 102 to the base substrate 100, so that the angle α between the bottom surface of the recessed structure 1052 and the first side wall is less than 90°. Under the support of the recessed structure 1052, the edge S1 of the metal wiring layer 102 extending in the direction from the display area AA to the first frame area NA01 is tilted toward the direction from the base substrate 100 to the metal wiring layer 102. The over-etched area 104 generated by the metal wiring layer 102 in the process of etching the organic planarization layer is also tilted toward the direction from the base substrate 100 to the metal wiring layer 102, so the second inorganic insulating layer 103 can be deposited in the over-etched area 104, so that the metal wiring layer 102 is wrapped by the first inorganic insulating layer 101 and the second inorganic insulating layer 103, thereby improving the packaging effect of the metal wiring layer 102.

[0076] Optionally, based on the above technical solution, Figure 7-Figure 9 As shown, the recessed structure 1052 includes a trapezoidal groove, and the angle α between the bottom surface of the trapezoidal groove and the first side wall is less than 90°. Fig. 9 The right-angled trapezoidal groove in Figure 8 The non-right-angled trapezoidal groove in the

[0077] Specifically, the angle α between the bottom surface of the trapezoidal groove and the first side wall is less than 90°, and under the support of the recessed structure 1052, the edge S1 of the metal wiring layer 102 extending in the direction from the display area AA to the first frame area NA01 is tilted toward the direction of the base substrate 100 pointing to the metal wiring layer 102. The over-etched area 104 of the metal wiring layer 102 generated in the process of etching the organic planarization layer is also tilted toward the direction of the base substrate 100 pointing to the metal wiring layer 102, so the second inorganic insulating layer 103 can be deposited in the over-etched area 104, so that the metal wiring layer 102 is wrapped by the first inorganic insulating layer 101 and the second inorganic insulating layer 103, thereby improving the packaging effect of the metal wiring layer 102.

[0078] Optionally, based on the above technical solution, Figure 5 and Figure 7As shown, the base substrate also includes a second frame area NA03, and the second frame area NA03 is located between the display area AA and the first frame area NA01; the array substrate located in the second frame area NA03 includes a first inorganic insulating layer 101, a metal wiring layer 102, an organic planarization layer 106 and a second inorganic insulating layer 103; the first inorganic insulating layer 101 is located on one side of the base substrate 100; the metal wiring layer 102 is located on the surface of the first inorganic insulating layer 101 away from the base substrate 100; the organic planarization layer 106 is located on the side of the metal wiring layer 102 away from the first inorganic insulating layer 101, and the organic planarization layer 106 is provided with a plurality of first grooves 107 arranged at intervals, and the first grooves 107 are arranged in a first direction (i.e. Figure 4 The depth of the first groove 107 is less than the depth of the organic planarization layer 106; the organic planarization layer 106 is further provided with a plurality of second grooves 108 arranged at intervals, and the second grooves 108 are arranged in the first direction (ie Figure 4 The first grooves 107 are arranged in a spaced relationship along the Y direction in the figure, and a second groove 108 is disposed between two adjacent first grooves 107. The depth of the second groove 108 is equal to the depth of the organic planarization layer 106. The second inorganic insulating layer 103 is located on the surface of the organic planarization layer 106 away from the metal wiring layer 102, and fills the first groove 107 and the second groove 108. Exemplarily, Figure 5 and Figure 7 Only two first grooves 107 and one second groove 108 are shown.

[0079] Specifically, the structure formed by the plurality of first grooves 107 and second grooves 108 and the second inorganic insulating layer 103 filled therein can be used as a water vapor barrier structure to prevent water vapor from corroding the display area AA, thereby ensuring the packaging effect of the entire array substrate.

[0080] The embodiment of the present invention further provides a display panel, comprising any array substrate described in the above technical solution. The display panel provided by the embodiment of the present invention can be applied to display devices with display functions such as mobile phones, computers and smart wearable devices, and the embodiment of the present invention does not limit this.

[0081] The display panel provided by the embodiment of the present invention includes the array substrate provided by the embodiment of the present invention, and has the same functions and effects, which will not be described in detail here.

[0082] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. An array substrate, characterized in that: include: A base substrate, the base substrate comprising a display area, a first frame area and a binding area, wherein the first frame area is located between the display area and the binding area; The array substrate located in the first border area at least includes a first inorganic insulating layer, a metal wiring layer, and a second inorganic insulating layer; The first inorganic insulating layer is located on one side of the base substrate, and an undulating structure is provided on an edge of the first inorganic insulating layer extending along a first direction, wherein the first direction is a direction from the display area to the first frame area; the undulating structure is located on a surface of the first inorganic insulating layer away from the base substrate or inside a film layer; The metal wiring layer is located on the surface of the first inorganic insulating layer away from the base substrate, and the edge of the metal wiring layer extending along the first direction is tilted toward the second direction, and the second direction is the direction from the base substrate to the metal wiring layer; The second inorganic insulating layer is located on a surface of the metal wiring layer away from the first inorganic insulating layer, and covers a side surface of an edge of the metal wiring layer extending along the first direction.

2. The array substrate according to claim 1, characterized in that: The undulating structure includes an auxiliary metal layer, and the auxiliary metal layer is located inside the first inorganic insulating layer; And / or, the undulating structure comprises a recessed structure, the recessed structure extends from the surface of the first inorganic insulating layer away from the substrate to the inside of the first inorganic insulating layer; the recessed structure comprises a side wall and a bottom surface, the side wall comprises a first side wall and a second side wall arranged opposite to each other, the direction in which the second side wall points to the first side wall is the direction in which the middle region of the first inorganic insulating layer points to the edge, and the angle between the bottom surface and the first side wall is less than 90°; Preferably, the auxiliary metal layer becomes thicker in a direction from a middle region of the first inorganic insulating layer toward an edge thereof.

3. The array substrate according to claim 2, characterized in that: The auxiliary metal layer and the first metal layer located in the display area are located in the same layer; and / or, The metal wiring layer and the second metal layer located in the display area are located in the same layer, and the first metal layer and the second metal layer are located in different layers.

4. The array substrate according to claim 2, characterized in that: The depth of the recessed structure is less than the thickness of the first inorganic insulating layer.

5. The array substrate according to claim 4, characterized in that: In the second direction, the first inorganic insulating layer at least includes a first sub-inorganic insulating layer, a second sub-inorganic insulating layer and a third sub-inorganic insulating layer in sequence; The first inorganic insulating sub-layer and the gate insulating layer located in the display area are located in the same layer; The second inorganic insulating sub-layer and the capacitive insulating layer located in the display area are located in the same layer; The third inorganic insulating sub-layer and the interlayer insulating layer located in the display area are located in the same layer; Preferably, the recessed structure is located on a surface of the third inorganic sub-insulating layer away from the second inorganic sub-insulating layer.

6. The array substrate according to claim 5, characterized in that: The depth of the recessed structure is less than the thickness of the third inorganic insulating sub-layer.

7. The array substrate according to claim 2, characterized in that: The recessed structure includes a plurality of recessed holes arranged at intervals; Preferably, an opening area of ​​the recessed hole gradually decreases in a direction from the metal wiring layer to the substrate.

8. The array substrate according to claim 2, characterized in that: The recessed structure includes a trapezoidal groove.

9. The array substrate according to claim 1, characterized in that: The base substrate further includes a second frame area, and the second frame area is located between the display area and the first frame area; The array substrate located in the second border area includes the first inorganic insulating layer, the metal wiring layer, an organic planarization layer and the second inorganic insulating layer; The first inorganic insulating layer is located on one side of the base substrate; The metal wiring layer is located on the surface of the first inorganic insulating layer away from the substrate; The organic planarization layer is located on a side of the metal wiring layer away from the first inorganic insulating layer, and the organic planarization layer is provided with a plurality of first grooves arranged at intervals, and the first grooves are arranged at intervals in the first direction; the depth of the first grooves is less than the depth of the organic planarization layer; Preferably, the organic planarization layer is further provided with a plurality of second grooves arranged at intervals, the second grooves are arranged at intervals in the first direction, one second groove is provided between two adjacent first grooves, and the depth of the second groove is equal to the depth of the organic planarization layer; The second inorganic insulating layer is located on a surface of the organic planarization layer away from the metal wiring layer, and is filled in the first groove and the second groove.

10. A display panel, characterized in that: Comprising the array substrate according to any one of claims 1-9.

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