Method for manufacturing metalized grid lines of heterojunction solar cells and device therefor

Abstract

The present application relates to the technical field of grid line preparation of heterojunction solar cells, and particularly relates to a preparation method and device of grid line of heterojunction solar cells, which specifically comprises the following steps: etching the front and back surfaces of a single crystal silicon wafer to form a pyramid texturing structure; cleaning the silicon wafer after etching to form a clean surface state; depositing a silicon film on the front and back surfaces of the cleaned silicon wafer, and then sequentially depositing a transparent conductive oxide film and a metal layer film; laying copper wires on the front and back surfaces of the silicon wafer after the preparation of the metal layer film as grid line electrodes; and placing the silicon wafer with the prepared grid line electrodes in an oxidizing acid solution to obtain a heterojunction solar cell wafer with different pattern grid line electrodes on the front and back surfaces. The present application replaces expensive silver paste with low-cost copper metal, which not only reduces the cost by more than 70%, but also does not require electroplating equipment and does not produce wastewater, without additional equipment investment, and has great mass production prospects.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of grid line preparation of heterojunction solar cells, in particular to a preparation method and device of a metalized grid line of a heterojunction solar cell. BACKGROUND

[0002] Heterojunction solar cells have high efficiency, low attenuation and other performances which have been widely concerned by the industry, but the cost is high due to the use of low-temperature silver paste as a grid line, which has always limited its further large-scale production. In order to reduce the preparation cost of the metalized grid line of the heterojunction solar cell, a copper electroplating technology for preparing a copper grid line is currently introduced,

[0003] The technology of preparing a copper grid line by copper electroplating in the prior art needs to use more equipment, the production process is complex, the production yield is reduced, and the equipment investment cost is also increased. In addition, copper electroplating will produce a large amount of copper-containing wastewater, which will cause great environmental pressure. Therefore, the technology of preparing a copper grid line by copper electroplating has always been limited and has not been widely promoted, which has become a big problem for the production and development of heterojunction solar cells. SUMMARY

[0004] The present application aims to at least improve one of the technical problems existing in the prior art. To this end, the present application provides a preparation method and device of a metalized grid line of a heterojunction solar cell.

[0005] The preparation method of the metalized grid line of the heterojunction solar cell according to the first aspect of the present application comprises the following steps:

[0006] Step S1, texturing the front surface and the back surface of a single crystal silicon wafer to form a pyramid textured structure;

[0007] Step S2, cleaning the textured silicon wafer to remove metal impurities on the surface of the silicon wafer, and finally removing the surface oxide layer on the surface of the silicon wafer with hydrofluoric acid to form a clean surface state;

[0008] Step S3, depositing a silicon thin film on the front surface and the back surface of the cleaned silicon wafer: depositing an intrinsic amorphous silicon layer and a doped amorphous silicon layer or a microcrystalline silicon thin film on the front surface of the silicon wafer in sequence; depositing an intrinsic amorphous silicon layer and a doped amorphous silicon layer or a microcrystalline silicon thin film on the back surface of the silicon wafer in sequence;

[0009] Step S4, depositing a transparent conductive oxide layer thin film and a metal layer thin film on the front surface of the silicon wafer after depositing the amorphous silicon layer by physical vapor deposition method;

[0010] Step S5, depositing a transparent conductive oxide layer thin film and a metal layer thin film on the back surface of the silicon wafer after depositing the amorphous silicon layer by physical vapor deposition method;

[0011] Step S6, after the preparation of the metal layer thin film, the front surface of the silicon wafer is paved with copper wire as the front surface fine grid electrode, and then 5 to 20 same copper wires are paved as the front surface main grid electrode in the direction perpendicular to the fine grid electrode. The mold is used to apply pressure and temperature to the copper wire on the surface of the silicon wafer. Under the double action of pressure and temperature, the tin layer on the surface of the copper wire and the metal layer on the surface of the silicon wafer are melted and welded together to form ohmic contact to reduce the contact resistance.

[0012] Step S7, after the preparation of the metal layer, the back surface of the silicon wafer is paved with copper wire as the back surface fine grid electrode, and then 5 to 20 same copper wires are paved as the back surface main grid electrode in the direction perpendicular to the fine grid electrode. The mold is used to apply pressure and temperature to the copper wire on the surface of the silicon wafer. Under the double action of pressure and temperature, the tin layer on the surface of the copper wire and the metal layer on the surface of the silicon wafer are melted and welded together to form ohmic contact to reduce the contact resistance.

[0013] Step S8, the silicon wafer with the prepared front and back grid line electrodes is placed in an oxidizing acid solution to corrode the metal layer outside the grid line to form a complete heterojunction solar cell wafer with different pattern grid line electrodes on the front and back surfaces, and the preparation process of the heterojunction solar cell metalized grid line is completed.

[0014] According to the preparation method of the heterojunction solar cell metalized grid line, the expensive silver paste is replaced by the low-cost copper metal to realize the silver-free processing design of the completely heterojunction solar cell metalized grid line. The cost is reduced by more than 70%, and the electroplating equipment is not needed, and no wastewater is generated, and no additional equipment investment is needed, so that the great mass production prospect is achieved.

[0015] In a possible implementation manner of the first aspect, the copper wire in the step S6 and the step S7 is composed of a copper wire with a tin layer plated on the surface for protection, the diameter of the copper wire is 5-40 um, and the front surface fine grid electrode is paved with 50-200 copper wires to balance the light shielding and conductivity of the grid line. If the number of grid lines is less than 50, the conductivity is not enough, and finally the battery efficiency is reduced. If the number of grid lines is greater than 200, the light shielding area of the grid line is too large, which will lead to the decrease of the current and finally the decrease of the battery efficiency.

[0016] In a possible implementation manner of the first aspect, the copper wire is in any one of a circular shape, a square shape and a triangular shape.

[0017] In a possible implementation manner of the first aspect, the diameter of the copper wire of the main grid electrode in the step S6 and the step S7 is 30-100 um, which improves the light shielding area to ensure the battery efficiency while reducing the manufacturing cost.

[0018] In a possible implementation manner of the first aspect, the pressure in the step S6 and the step S7 is 0.5 N-10 N, the temperature is 150 DEG C-300 DEG C, and the heating time is 10 s-50 s, so as to ensure the battery efficiency while improving the product yield.

[0019] In a possible implementation manner of the first aspect, the acid solution in the step S8 includes hydrochloric acid and / or aqueous sulfuric acid, the concentration of the acid solution is 1%-10%, and the etching time is 10 s-60 s, so as to clean more thoroughly while improving the battery efficiency.

[0020] In a possible implementation manner of the first aspect, the transparent conductive oxide layer film in the step S4 and the step S5 is any one of an indium tin oxide layer, a doped element indium oxide composite layer, and an aluminum and boron element doped zinc oxide material, and the thickness of the transparent conductive oxide layer film is 50 nm-200 nm; if the thickness is less than 50 nm, a good anti-reflection effect cannot be formed, the conductivity is not enough, and finally the battery efficiency is reduced; if the thickness is greater than 200 nm, the production cost is excessively wasted, the deposition time is too long, the production capacity is also wasted, and this is not conducive to mass production.

[0021] In a possible implementation manner of the first aspect, the metal layer film in the step S4 and the step S5 is an alloy of one or more of copper, tin, nickel, and silver, and the thickness of the metal layer film is 50 nm-300 nm; if the thickness is less than 50 nm, the transparent conductive layer is easily burned through in the subsequent lamination process, and finally the battery efficiency is reduced; if the thickness is greater than 300 nm, the subsequent acid etching is difficult, residues are easily generated, the product is not good, and the production cost is also increased.

[0022] In a possible implementation manner of the first aspect, the chemical vapor deposition method is adopted to deposit the intrinsic amorphous silicon layer and the doped amorphous silicon layer or the microcrystalline silicon film on the front surface and the back surface of the silicon wafer in the step S3; the main function of the thin film is to passivate the dangling bonds on the surface of the silicon wafer to reduce the defect density, and to transmit the current generated by the silicon wafer to the electrode as the emitter and the electron collection layer.

[0023] According to the preparation device of the metalized grid line of the heterojunction solar cell according to the second aspect of the embodiment of the present application, the device performs the preparation method of the metalized grid line of the heterojunction solar cell to prepare the metalized grid line of the heterojunction solar cell.

[0024] Additional aspects and advantages of the present application will be in part apparent and in part pointed out hereinafter. BRIEF DESCRIPTION OF DRAWINGS

[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. Obviously, the drawings described below only show some of the embodiments of the present application, and other drawings can also be obtained by those skilled in the art without any creative effort based on these drawings.

[0026] Figure 1 is a flow chart of a preparation method of a metalized grid line of a heterojunction solar cell according to an embodiment of the present application. DETAILED DESCRIPTION

[0027] The embodiments of the present application will be described in detail below, and the embodiments described with reference to the drawings are exemplary, and it should be understood that the specific embodiments described herein are only used to explain the present application, and are not intended to limit the present application.

[0028] It should be noted that when an element is referred to as being "fixed" to another element, it can be directly on the other element or there can be an intervening element. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or there can be an intervening element.

[0029] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terminology used in the description of the present application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0030] Embodiment 1

[0031] Referring to Figure 1 The present embodiment provides a preparation method of a metalized grid line of a heterojunction solar cell, which comprises the following steps:

[0032] Step S1, texturing the front surface and the back surface of a single crystal silicon wafer to form a pyramid textured structure, thereby reducing the reflectivity of the surface of the silicon wafer;

[0033] Step S2, cleaning the textured silicon wafer to remove metal impurities on the surface of the silicon wafer, and finally removing the surface oxide layer on the surface of the silicon wafer by hydrofluoric acid to form a clean surface state;

[0034] Step S3, depositing a silicon thin film on the front surface and the back surface of the cleaned silicon wafer: depositing an intrinsic amorphous silicon layer and a doped amorphous silicon layer or a microcrystalline silicon thin film on the front surface of the silicon wafer in sequence; and depositing an intrinsic amorphous silicon layer and a doped amorphous silicon layer or a microcrystalline silicon thin film on the back surface of the silicon wafer in sequence;

[0035] Step S4, a transparent conductive oxide layer film and a metal layer film are deposited on the front surface of the silicon wafer after depositing the amorphous silicon layer by physical vapor deposition method;

[0036] Step S5, a transparent conductive oxide layer film and a metal layer film are deposited on the back surface of the silicon wafer after depositing the amorphous silicon layer by physical vapor deposition method;

[0037] Step S6, the front surface of the silicon wafer after preparing the metal layer film is prepared into a grid electrode, specifically, copper wires are laid on the front surface of the silicon wafer as the front surface fine grid electrode, the copper wires refer to copper wires with a tinned layer on the surface for protection; then 5 to 20 same copper wires are laid in the direction perpendicular to the fine grid electrode as the front surface main grid electrode, finally a mold is used to apply a certain pressure and temperature to the copper wires on the surface of the silicon wafer, under the double action of pressure and temperature, the tin layer on the surface of the copper wire and the metal layer on the surface of the silicon wafer are melted and welded together to form ohmic contact to reduce the contact resistance;

[0038] Step S7, the back surface of the silicon wafer after preparing the metal layer is prepared into a grid electrode, specifically, copper wires are laid on the back surface of the silicon wafer as the back surface fine grid electrode, then 5 to 20 same copper wires are laid in the direction perpendicular to the fine grid electrode as the back surface main grid electrode, finally a mold is used to apply a certain pressure and temperature to the copper wires on the surface of the silicon wafer, under the double action of pressure and temperature, the tin layer on the surface of the copper wire and the metal layer on the surface of the silicon wafer are melted and welded together to form ohmic contact to reduce the contact resistance;

[0039] Step S8, the silicon wafer with the prepared front and back grid electrodes is placed in a certain oxidizing acid solution to corrode the metal layer outside the grid lines to form a complete heterojunction solar cell wafer with different pattern grid electrodes on the front and back surfaces, and the preparation process of the heterojunction solar cell metalized grid line is completed.

[0040] According to the preparation method of the heterojunction solar cell metalized grid line, the expensive silver paste is replaced by the low-cost copper metal to realize the silver-free processing design of the completely heterojunction solar cell metalized grid line, which not only reduces the cost by more than 70%, but also does not need to use electroplating equipment and will not produce wastewater, without increasing additional equipment investment, and has great mass production prospect.

[0041] It should be noted that the copper wire in the step S6 and the step S7 is composed of a copper wire with a tinned layer on the surface for protection, the diameter of the copper wire is 5-40 um, and 50-200 copper wires are laid on the front surface fine grid electrode to balance the light shielding and conductivity of the grid line, if the number of grid lines is less than 50, the conductivity is not enough, which will eventually lead to the reduction of the battery efficiency; if the number of grid lines is greater than 200, the light shielding area of the grid line is too large, which will lead to the reduction of the current, and eventually also lead to the reduction of the battery efficiency.

[0042] It should be noted that the copper wire is any one of a circle, a square, a triangle.

[0043] It should be noted that the diameter of the copper wire of the main grid electrode in the step S6 and the step S7 is 30-100um, which improves the light shielding area to ensure the battery efficiency and reduces the production cost. The main grid is the last current guide outlet. If the diameter is less than 30um, the copper wire resistance is too large to cause a large efficiency loss. If the diameter is greater than 100um, the light shielding area and the production cost are increased, which is not conducive to mass production.

[0044] It should be noted that the pressure in the step S6 and the step S7 is 0.5N-10N, the temperature is 150℃-300℃, and the heating time is 10s-50s; which ensures the battery efficiency and improves the product yield. The pressure, temperature and time are the key parameters in the lamination process. If the parameters are not in the range, the copper wire and the metal layer will not be combined tightly, which will cause a large contact resistance and low battery efficiency. If the pressure is too large or the temperature is too high, the battery piece will be broken and the passivation effect of the silicon film will be invalid, which will seriously increase the production failure rate and reduce the efficiency. Therefore, the process parameters need to be strictly controlled in this range.

[0045] It should be noted that the acid solution in the step S8 includes hydrochloric acid and / or sulfuric acid aqueous solution, the acid solution concentration is 1%-10%, and the etching time is 10s-60s; which is more thorough and improves the battery efficiency. If the acid concentration or time is not enough, it is difficult to completely remove the metal layer outside the copper wire, which will increase the light shielding area, reduce the current, and ultimately lead to a decrease in battery efficiency. If the concentration and time are too high, it will cause excessive corrosion, damage the transparent conductive film and the silicon film layer on the surface of the silicon battery, and also cause a serious decrease in the efficiency of the battery piece.

[0046] It should be noted that the transparent conductive oxide layer film in the step S4 and the step S5 is any one of an indium tin oxide layer, a doped element indium oxide composite layer, an aluminum-doped zinc oxide material, and a boron-doped zinc oxide material. The thickness of the transparent conductive oxide layer film is 50nm-200nm. If the thickness is less than 50nm, a good antireflection effect cannot be formed, and the conductivity is not enough, which will eventually cause a decrease in battery efficiency. If the thickness is greater than 200nm, the production cost is wasted, the deposition time is too long, and the production capacity is also wasted, which is not conducive to mass production.

[0047] It should be noted that the metal layer film in the step S4 and the step S5 is an alloy of one or more of copper, tin, nickel and silver, and the thickness of the metal layer film is 50-300 nm; if the thickness is less than 50 nm, the transparent conductive layer is easily burnt through in the subsequent lamination process, which damages the transparent conductive layer and finally reduces the battery efficiency; if the thickness is greater than 300 nm, the subsequent acid etching is difficult, residues are easily generated, product defects are caused, and the production cost is also increased.

[0048] It should be noted that the chemical vapor deposition method is used to deposit the intrinsic amorphous silicon layer and the doped amorphous silicon layer or the microcrystalline silicon film on the front surface and the back surface of the silicon wafer in the step S3; the main function of the thin film is to passivate the dangling bonds on the surface of the silicon wafer to reduce the defect density, and the thin film also serves as an emitter and an electron collection layer to transmit the current generated by the silicon wafer to the electrode.

[0049] Embodiment 2

[0050] The embodiment provides a device for preparing a metalized grid line of a heterojunction solar cell, wherein the device performs the preparation method of the metalized grid line of the heterojunction solar cell on the metalized grid line of the heterojunction solar cell.

[0051] In the description of the present application, it should be understood that the orientation or positional relationship indicated by the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the application.

[0052] In the description of the present application, the description of the terms "one embodiment", "some embodiments", "exemplary embodiment", "example", "specific example" or "some examples" means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present application, the exemplary description of the above terms does not necessarily refer to the same embodiment or example.

[0053] It is apparent that the described embodiments are only some, but not all, of the embodiments of the present application. Reference to "an embodiment" in this text means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present application. The appearances of the phrase "in an embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are they necessarily mutually exclusive of one another. As those skilled in the art will appreciate, embodiments described herein can be combined with other embodiments in various ways. All other embodiments obtained by combining the embodiments described herein in various ways are within the scope of the present application.

[0054] Although the embodiments of the present application have been shown and described, it will be appreciated by those skilled in the art that changes can be made in these embodiments without departing from the principles and the scope of the application, which is defined by the claims and their equivalents.

Claims

1. A method for fabricating metallized grid lines in a heterojunction solar cell, characterized in that, Includes the following steps: Step S1: Texturing is performed on the front and back sides of the monocrystalline silicon wafer to form a pyramidal textured surface structure; Step S2: Clean the texturized silicon wafer to remove metal impurities from the surface of the silicon wafer. Finally, use hydrofluoric acid to remove the surface oxide layer from the silicon wafer surface to form a clean surface. Step S3: Deposit silicon thin films on the front and back sides of the cleaned silicon wafer respectively: deposit an intrinsic amorphous silicon layer and a doped amorphous silicon layer or a microcrystalline silicon thin film sequentially on the front side of the silicon wafer; deposit an intrinsic amorphous silicon layer and a doped amorphous silicon layer or a microcrystalline silicon thin film sequentially on the back side of the silicon wafer. Step S4: On the front side of the silicon wafer after depositing the amorphous silicon layer, a transparent conductive oxide film and a metal film are deposited sequentially using physical vapor deposition. Step S5: After depositing the amorphous silicon layer, a transparent conductive oxide film and a metal film are sequentially deposited on the back side of the silicon wafer using physical vapor deposition. Step S6: After the metal layer film is prepared, copper wires are laid on the front side of the silicon wafer as the front fine gate electrode. Then, 5 to 20 identical copper wires are laid in the direction perpendicular to the fine gate electrode as the front main gate electrode. A mold is used to apply pressure and temperature to the copper wires on the silicon wafer surface. Under the dual action of pressure and temperature, the tin layer on the surface of the copper wires and the metal layer on the surface of the silicon wafer melt and weld together to form an ohmic contact to reduce the contact resistance. Step S7: After the metal layer is prepared, copper wires are laid on the back side of the silicon wafer as back fine gate electrodes. Then, 5 to 20 identical copper wires are laid in the direction perpendicular to the fine gate electrodes as back main gate electrodes. A mold is used to apply pressure and temperature to the copper wires on the silicon wafer surface. Under the dual action of pressure and temperature, the tin layer on the surface of the copper wires and the metal layer on the surface of the silicon wafer melt and weld together to form an ohmic contact to reduce the contact resistance. Step S8: Place the silicon wafer with prepared front and back grid line electrodes in an oxidizing acid solution to etch away the metal layer outside the grid lines, forming a complete heterojunction solar cell with front and back grid line electrodes of different patterns, thus completing the preparation process of the metallized grid lines of the heterojunction solar cell.

2. The method for fabricating metallized grid lines of a heterojunction solar cell according to claim 1, characterized in that, The copper wires in steps S6 and S7 are composed of copper wires with a tin-plated protective layer on the surface. The diameter of the copper wires is 5um-40um, and the front fine grid electrode is laid with 50-200 copper wires.

3. The method for fabricating metallized grid lines of a heterojunction solar cell according to claim 2, characterized in that, The copper wire can be any of the following shapes: round, square, or triangular.

4. The method for fabricating metallized grid lines of a heterojunction solar cell according to claim 1, characterized in that, The copper wire diameter of the main gate electrode in steps S6 and S7 is 30-100 μm.

5. The method for fabricating metallized grid lines of a heterojunction solar cell according to claim 1, characterized in that, The pressure in steps S6 and S7 is 0.5N-10N, the temperature is 150℃-300℃, and the heating time is 10s-50s.

6. The method for fabricating metallized grid lines of a heterojunction solar cell according to claim 1, characterized in that, The acid solution in step S8 includes hydrochloric acid and / or sulfuric acid aqueous solution, and the corrosion time is 10s-60s.

7. The method for fabricating metallized grid lines of a heterojunction solar cell according to claim 1, characterized in that, The transparent conductive oxide film in steps S4 and S5 is any one of indium tin oxide, indium oxide composite layer with doped elements, or zinc oxide material doped with aluminum and boron, and the thickness of the transparent conductive oxide film is 50nm-200nm.

8. The method for fabricating metallized grid lines of a heterojunction solar cell according to claim 1, characterized in that, The metal layer film in step S4 and step S5 is one or more alloys of copper, tin, nickel, and silver, and the thickness of the metal layer film is 50nm-300nm.

9. The method for fabricating metallized grid lines of a heterojunction solar cell according to claim 1, characterized in that, In step S3, an intrinsic amorphous silicon layer and a doped amorphous silicon layer or a microcrystalline silicon thin film are deposited on the front and back sides of the silicon wafer using chemical vapor deposition.

10. An apparatus for fabricating metallized grid lines in a heterojunction solar cell, characterized in that, The apparatus performs the fabrication method of heterojunction solar cell metallized grid line as described in any one of claims 1-9 to fabricate heterojunction solar cell metallized grid line.

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