A Silicon-on-Insulator Arrayed Waveguide Grating Chip for Dense Wavelength Division Multiplexing

Abstract

The present application discloses a silicon-on-insulator array waveguide grating chip for dense wavelength division multiplexing, which relates to the field of integrated silicon photonics technology. The chip includes an AWG and a wavelength thermal tuning structure. The AWG is composed of an input waveguide, a first slab waveguide, an array waveguide, a second slab waveguide, and an output waveguide connected in sequence along the optical path direction. The AWG is used to implement wavelength division multiplexing and demultiplexing. The wavelength thermal tuning structure includes a thermal tuning electrode and a metal electrode. The thermal tuning electrode is located above the array waveguide and is connected to an external control circuit via the metal electrode. The thermal tuning electrode is used to heat the array waveguide according to an external voltage to achieve wavelength tuning of the AWG channel. As the voltage amplitude increases, the heat generated by the thermal tuning electrode increases, and the wavelength of the AWG channel drifts toward a longer wavelength. The technical solution of the present application can realize multi-wavelength dense wavelength division multiplexing on a compact chip, has the advantages of small size and high reliability, and can realize passband wavelength control through the wavelength thermal tuning structure to meet the application requirements of multi-wavelength optical networks.

Description

Technical Field

[0001] The present application relates to the technical field of integrated silicon photonics, and in particular to a silicon-on-insulator (SOI) arrayed waveguide grating chip for dense wavelength division multiplexing. Background Art

[0002] With the exponential growth of data traffic in global optical networks, the demand for high-speed, high-capacity data transmission has made optical communication devices a key research focus. To expand the communication capacity and increase transmission rates of optical networks, one effective approach is to employ wavelength division multiplexing (WDM). This technology allows for the simultaneous transmission of multiple independent wavelength carrier optical signals within the same optical fiber or waveguide. This significantly increases the transmission capacity of optical networks and holds broad application prospects in microwave photonics, optical communication networks, and other technical fields. Optical WDMs can be broadly categorized into arrayed waveguide gratings (AWGs), dielectric thin film filters (TFFs), and comb filters. AWGs, as planar waveguide components based on optical integration technology, offer advantages such as mass production, compact size, and a high number of channels. Compared to other WDM technologies, these devices hold considerable research and application value.

[0003] An AWG generally consists of five components: an input waveguide, a first slab waveguide, an arrayed waveguide, a second slab waveguide, and an output waveguide. It enables wavelength multiplexing and demultiplexing. Specifically, after multiplexing signal light containing multiple wavelengths is output through the central input channel waveguide, it is diffracted within the input slab waveguide, reaches the input concave grating for power distribution, and is coupled into the arrayed waveguide region. Because the arrayed waveguide end faces lie on the circumference of the grating circle, the diffracted light arrives at the arrayed waveguide end faces with the same phase. After transmission through the arrayed waveguide, adjacent arrayed waveguides maintain the same length difference ΔL. Therefore, the output light of a given wavelength from adjacent arrayed waveguides on the output concave grating has the same phase difference. This phase difference is different for light of different wavelengths, so light of different wavelengths is diffracted in the output slab waveguide and focused onto different output channel waveguide positions. After being output from the output channel waveguide, wavelength distribution, or demultiplexing, is completed. The reverse process, that is, if the signal light is input in the opposite direction, can achieve multiplexing.

[0004] The SOI platform offers advantages such as a large refractive index difference, a good optical confinement effect, compatibility with CMOS processes, and mass production. However, it also faces challenges such as small process tolerances and high design difficulty. For example, the publicly available invention patent CN 114755764A has solved the current design difficulties of a 32-channel 100GHz compact dense wavelength division multiplexer. However, the refractive index difference between the core and cladding layers of silicon-based materials is large, and the current chip manufacturing process has limited precision. Phase errors have a significant impact on device performance. Device performance produced by the process can deviate significantly from the designed value. For example, the center wavelength offset does not match the ITU standard channel wavelength, which can affect the device's application in optical communications and microwave photonics. Summary of the Invention

[0005] The purpose of this application is to provide an arrayed waveguide grating chip based on the SOI platform, which has the characteristics of a large number of optical channels, tunable wavelength, high integration, large process tolerance, and CMOS process compatibility. It can be used in optical technology fields with dense wavelength division multiplexing requirements such as multi-beam microwave photonic systems and large-capacity optical communication systems, and improve the system's optical information capacity and on-chip integration level.

[0006] The technical solution of the present application is to provide a silicon-on-insulator arrayed waveguide grating chip for dense wavelength division multiplexing, wherein the silicon arrayed waveguide grating chip includes an AWG structure and a wavelength thermal tuning structure, wherein the wavelength thermal tuning structure is located above the AWG structure;

[0007] The AWG structure is composed of an input waveguide, a first slab waveguide, an arrayed waveguide, a second slab waveguide and an output waveguide connected in sequence along the optical path direction, and the AWG structure is used to realize wavelength division multiplexing and demultiplexing of optical signals;

[0008] One side of the first slab waveguide is connected to the input waveguide via an adiabatic transition structure, and the other side is connected to the array waveguide via an adiabatic transition structure; one side of the second slab waveguide is connected to the output waveguide via an adiabatic transition structure, and the other side is connected to the array waveguide via an adiabatic transition structure; the adiabatic transition structure is used to achieve mode field transition of the waveguides on both sides connected by gradually changing the cross-sectional dimensions of the waveguides;

[0009] The wavelength thermal tuning structure includes a thermal tuning electrode, which is arranged directly above the arrayed waveguide and is connected to an external control circuit. The thermal tuning electrode is used to generate Joule heat according to the voltage input by the external control circuit and achieve tuning of the AWG channel wavelength by heating the arrayed waveguide. The square of the voltage amplitude is positively correlated with the drift of the AWG channel wavelength toward the longer wavelength direction.

[0010] Furthermore, a side of the first slab waveguide close to the input waveguide is located on the circumference of the Rowland circle, and a side of the first slab waveguide close to the arrayed waveguide is located on the circumference of the grating circle, wherein the Rowland circle is inscribed in the grating circle.

[0011] Furthermore, the ports of the first slab waveguide used for connecting to the input waveguide are arranged at equal intervals on the circumference of the first slab waveguide on the Rowland circle side, and the ports of the first slab waveguide used for connecting to the arrayed waveguide are arranged at equal intervals on the circumference of the first slab waveguide on the grating circle side.

[0012] Furthermore, the arrayed waveguide includes a group of strip waveguides arranged at equal intervals, and the same length difference is set between adjacent strip waveguides. One end of a single strip waveguide is connected to the first slab waveguide through an adiabatic transition structure, and the other end is connected to the second slab waveguide through an adiabatic transition structure.

[0013] Furthermore, a single strip waveguide adopts a structural form of a straight waveguide plus a curved waveguide, wherein the length of the straight waveguide is greater than the length of the curved waveguide, the width of the straight waveguide is greater than the width of the curved waveguide, and a width gradient transition structure is provided at the connection between the straight waveguide and the curved waveguide, and the width gradient transition structure gradually narrows from the straight waveguide connection end to the curved waveguide connection end.

[0014] Furthermore, a side of the second slab waveguide close to the output waveguide is located on the circumference of the Rowland circle, and a side of the second slab waveguide close to the arrayed waveguide is located on the circumference of the grating circle;

[0015] The ports of the second slab waveguide for connecting to the output waveguide are arranged at equal intervals on the circumference of the second slab waveguide on the Rowland circle side. The central output waveguide of the output waveguide is located at the center of the Rowland circle side of the second slab waveguide. The ports of the second slab waveguide for connecting to the array waveguide are arranged at equal intervals on the circumference of the second slab waveguide on the grating circle side.

[0016] Furthermore, a first passivation layer is provided between the thermal adjustment electrode and the arrayed waveguide, and the first passivation layer is an insulating passivation layer.

[0017] Furthermore, the wavelength thermal tuning structure further includes a metal electrode, and the thermal tuning electrode is connected to an external control circuit via the metal electrode.

[0018] Furthermore, a second passivation layer and a third passivation layer are sequentially arranged on the first passivation layer from bottom to top, the second passivation layer is located above the thermal adjustment electrode, a metal electrode passivation layer opening is arranged in the third passivation layer, and a conductive through hole for accommodating the metal electrode is arranged in the second passivation layer between the metal electrode passivation layer opening and the thermal adjustment electrode;

[0019] The top end of the metal electrode is arranged in the opening of the metal electrode passivation layer, and the bottom end of the metal electrode passes through the conductive through hole of the second passivation layer and is connected to the thermal adjustment electrode.

[0020] The technical solution of the present application also provides an application of a silicon-on-insulator arrayed waveguide grating chip for dense wavelength division multiplexing in AWG channel wavelength tuning, including:

[0021] S101: Determine the amplitude of the applied voltage based on the required drift of the AWG channel wavelength. The relationship between the voltage amplitude and the drift of the AWG channel wavelength is:

[0022] Δλ=γ·V 2

[0023] Where Δλ is the wavelength drift of the AWG channel, γ is the proportional coefficient, and V is the voltage amplitude;

[0024] S102: Using an external control circuit to apply a voltage of a predetermined amplitude, the thermal adjustment electrode generates heat under the action of the voltage and heats the arrayed waveguide, causing the AWG channel wavelength to drift toward a longer wavelength by an amount Δλ.

[0025] The beneficial effects of this application are:

[0026] First, the number of channels N included in the arrayed waveguide grating in the technical solution of this application ch The free spectral range of the AWG structure is proportional to the channel spacing Δλ, so that the free spectral range (FSR) of the AWG satisfies the formula FSR=N ch ·Δλ condition. This design allows the channels in adjacent FSRs to compensate for the channel wavelengths in the designed center wavelength range when wavelength shift occurs, so that the target center wavelength channels can all operate normally. Compared with devices in the prior art that cannot meet the conditions, the AWG structure in the technical solution of this application can still align the target center wavelength with the target wavelength channel when the wavelength shift occurs due to process errors. The AWG structure in the technical solution of this application can realize multi-wavelength dense wavelength division multiplexing on a compact chip, with the advantages of small size and high reliability, and is suitable for integrated microwave photonics and optical communication network systems. The technical solution of this application can be prepared using an SOI platform, and its preparation is compatible with CMOS technology to achieve mass production and effectively reduce the cost of chip manufacturing.

[0027] Second, the technical solution of the present application sets up a wavelength thermal tuning structure in the silicon arrayed waveguide grating chip. This structure is located above the AWG and is connected to an external control circuit. It can generate Joule heat under the action of an external control voltage, and change the effective refractive index of the arrayed waveguide area by heating the arrayed waveguide, modulate the phase characteristics of the light after passing through the arrayed waveguide area, so that the central wavelength of the output spectrum changes, thereby realizing precise control of the passband wavelength of the wavelength division multiplexer and meeting the application requirements of multi-wavelength optical networks. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The advantages of the above and / or additional aspects of the present application will become apparent and readily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0029] Figure 1 is a schematic diagram of an AWG planar structure according to an embodiment of the present application;

[0030] Figure 2 is a schematic diagram of an AWG cross-sectional structure according to an embodiment of the present application;

[0031] Figure 3 FIG. 4 is a simulated spectrum diagram of an AWG according to an embodiment of the present application.

[0032] Among them, 1-input waveguide, 2-adiabatic transition structure, 3-first planar waveguide, 4-array waveguide, 5-thermal adjustment electrode, 6-metal electrode, 7-metal electrode passivation layer opening, 8-second planar waveguide, 9-output waveguide, 10-first passivation layer, 11-second passivation layer, 12-third passivation layer. DETAILED DESCRIPTION

[0033] In order to more clearly understand the above-mentioned objectives, features and advantages of the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the embodiments of the present application and the features therein can be combined with each other in the absence of conflict.

[0034] In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application may also be implemented in other ways different from those described herein. Therefore, the scope of protection of the present application is not limited to the specific embodiments disclosed below.

[0035] like Figures 1 to 2 As shown, this embodiment provides a silicon-on-insulator array waveguide grating (AWG) chip for dense wavelength division multiplexing. The AWG chip is prepared based on an SOI wafer platform, wherein the SOI wafer consists of a silicon substrate, a buried oxide layer and a top silicon layer.

[0036] The silicon-on-insulator array waveguide grating chip for dense wavelength division multiplexing includes an AWG structure and a wavelength thermal tuning structure. The wavelength thermal tuning structure is arranged above the AWG structure; the AWG structure is used to realize wavelength division multiplexing and demultiplexing of optical signals; the wavelength thermal tuning structure is used to tune the AWG channel wavelength by heating, thereby causing the center wavelength of the AWG structure's output spectrum to change, achieving precise control of its passband wavelength to meet the application requirements of multi-wavelength optical networks.

[0037] like Figure 1 As shown, the AWG structure is composed of an input waveguide 1, a first slab waveguide 3, an array waveguide 4, a second slab waveguide 8 and an output waveguide 9 connected in sequence along the optical path direction.

[0038] The input waveguide 1 is connected to the first slab waveguide 3 through the adiabatic transition structure 2; the input waveguide 1 serves as an input port for multi-wavelength multiplexed light when the AWG structure implements the optical signal demultiplexing function, and serves as an output port for multi-wavelength multiplexed light when the AWG structure implements the optical signal multiplexing function.

[0039] In this embodiment, the input waveguide 1 can adopt a single-mode waveguide (a single-mode waveguide means that the optical signal maintains a single mode during transmission to reduce mode interference. The mode refers to the electromagnetic field distribution form when the light wave is transmitted in the waveguide). There are one or more of them, and each input waveguide 1 is connected to the first slab waveguide 3 through an adiabatic transition structure 2.

[0040] The adiabatic transition structure 2 is used to achieve mode field transition (i.e., achieve continuous transition of the waveguide mode) between the two connected waveguides by gradually changing the waveguide cross-sectional dimensions (width or height). The waveguide mode refers to the propagation mode of light waves within the waveguide, specifically manifested as the distribution of the electromagnetic field on the waveguide cross-section), thereby reducing loss and crosstalk caused by mode mutations. For example, the adiabatic transition structure 2 disposed between the input waveguide 1 and the first slab waveguide 3 can achieve mode field transition between the input waveguide 1 and the first slab waveguide 3, reducing loss and crosstalk in optical signal transmission. In this embodiment, the waveguide cross-sectional dimensions of the end where the adiabatic transition structure 2 is connected to the input waveguide 1 are small, while the waveguide cross-sectional dimensions of the end where the adiabatic transition structure 2 is connected to the first slab waveguide 3 are large, and the waveguide cross-sectional dimensions gradually increase from the input waveguide 1 to the first slab waveguide 3.

[0041] It should be noted that the structure of the adiabatic transition structure 2 includes but is not limited to a linear gradient type and a parabolic type, and its waveguide structure characteristics can be a full etching type or a partially shallow etching type. The full etching type means that the top silicon of the SOI is completely etched, and the shallow etching type means that the top silicon of the SOI is not completely etched.

[0042] One side of the first slab waveguide 3 is connected to the input waveguide 1 through the adiabatic transition structure 2 , and the other side of the first slab waveguide 3 is connected to the arrayed waveguide 4 through the adiabatic transition structure 2 .

[0043] In this embodiment, the waveguide cross-section at the end where the adiabatic transition structure 2 connects to the arrayed waveguide 4 is small, while the waveguide cross-section at the end where the adiabatic transition structure 2 connects to the first slab waveguide 3 is large. The waveguide cross-section gradually decreases from the first slab waveguide 3 to the arrayed waveguide 4. For example, one end of the adiabatic transition structure is connected to the input waveguide (or arrayed waveguide) via a fully etched waveguide with a gradually varying width, and the other end is connected to the slab waveguide via a shallowly etched ridge waveguide.

[0044] The side of the first slab waveguide 3 connected to the input waveguide 1 is located on the circumference of the Rowland circle, and the side of the first slab waveguide 3 connected to the arrayed waveguide 4 is located on the circumference of the grating circle, wherein the Rowland circle is inscribed in the grating circle.

[0045] The ports of the first slab waveguide 3 for connecting to the input waveguide 1 are arranged at equal intervals on the circumference of the Rowland circle side of the first slab waveguide 3, and the ports of the first slab waveguide 3 for connecting to the arrayed waveguide 4 are arranged at equal intervals on the circumference of the grating circle side of the first slab waveguide 3.

[0046] In this embodiment, except for the Rowland circle side and the grating circle side, the remaining boundary positions of the first slab waveguide 3 can be shallowly etched or not etched to reduce interface reflection crosstalk.

[0047] In this embodiment, when the AWG implements wavelength demultiplexing, the first slab waveguide 3 serves as a diffraction region for multi-wavelength multiplexed light, expanding and diffracting the multi-wavelength multiplexed light from the input waveguide 1 and coupling it into the arrayed waveguide 4 with the same phase. After transmitting through the arrayed waveguide 4, where the length difference between adjacent waveguides is constant, a phase difference is generated. Due to the different phase differences, light of different wavelengths is focused by the second slab waveguide 8 to different positions on the output waveguide 9 for output, thereby completing wavelength demultiplexing. When the AWG implements wavelength multiplexing (i.e., the reverse process of demultiplexing), monochromatic light of different wavelengths is input from different ports of the output waveguide 9, passes through the second slab waveguide 8, the arrayed waveguide 4, and the first slab waveguide 3, and then converges to the same port of the input waveguide 1, thus achieving wavelength multiplexing.

[0048] The arrayed waveguide 4 includes a group of strip waveguides arranged at equal intervals, and the same length difference is set between adjacent strip waveguides (for example, the length difference of adjacent waveguides is set to △L. In the arrayed waveguide 4, if the length of the strip waveguides in the first row is x, the length of the second row can be x+△L, and the length of the third row can be x+2△L). One end of a single strip waveguide is connected to the first slab waveguide 3 through an adiabatic transition structure 2, and the other end is connected to the second slab waveguide 8 through the adiabatic transition structure 2. When the AWG implements wavelength demultiplexing, the optical signal enters the arrayed waveguide 4 after passing through the first slab waveguide 3, and is transmitted along the strip waveguides in the arrayed waveguide 4 to the second slab waveguide 8, and is then output by the second slab waveguide 8. Similarly, when the AWG implements wavelength multiplexing, the optical signal enters the arrayed waveguide 4 after passing through the second slab waveguide 8, and is transmitted along the strip waveguides in the arrayed waveguide 4 to the first slab waveguide 3, and is then output by the first slab waveguide 3.

[0049] In this embodiment, the maximum number of channels of the AWG structure (the number of channels is the maximum number of wavelengths that the AWG can multiplex or demultiplex), the free spectral range, and the channel spacing satisfy the following formula:

[0050] FSR≥N ch ·Δλ

[0051] Where FSR is the free spectral range of the AWG structure, Δλ is the channel spacing, and N ch is the maximum number of channels; when FSR=N ch ·Δλ, N ch Get the maximum value.

[0052] A single strip waveguide adopts a structural form of a straight waveguide plus a curved waveguide, wherein the length and width of the straight waveguide are respectively greater than the length and width of the curved waveguide, and a width gradient transition structure is provided at the connection between the straight waveguide and the curved waveguide, and the width gradient transition structure gradually narrows from the straight waveguide connection end to the curved waveguide connection end.

[0053] In this embodiment, the individual strip waveguides in the arrayed waveguide 4 can be arranged in a saddle, S-shaped, or other configuration. During this arrangement, the length of the curved waveguides is minimized within the permitted range, and the straight waveguides are widened to minimize phase noise introduced by process errors. A gradual width transition structure is employed at the junction of the straight and curved waveguides, allowing the optical field to transition slowly between single-mode and multimode waveguides, reducing loss and crosstalk caused by mode abrupt changes.

[0054] In this embodiment, the structural form of a straight waveguide plus a curved waveguide refers to a waveguide structure that includes two parts with different forms in the propagation path, one part is a straight waveguide, and the other part is a curved waveguide. For example, the common saddle-shaped and S-shaped waveguide structures are both structural forms of a straight waveguide plus a curved waveguide. The saddle-shaped waveguide structure presents a shape similar to a saddle, usually the waveguide is bent in a certain direction and has different degrees of curvature in the other direction. The S-shaped waveguide layout presents a shape similar to the letter S, and the waveguide makes one or more turns in the propagation path, usually bending along a plane or spatial direction to form two corners of 90 degrees or more.

[0055] The output waveguide 9 is connected to the second slab waveguide 8 through the adiabatic transition structure 2; the output waveguide 9 serves as an output port of single-wavelength demultiplexed light when the AWG implements the optical signal demultiplexing function, and serves as an input port of single-wavelength demultiplexed light when the AWG implements the optical signal multiplexing function.

[0056] In this embodiment, the output waveguide 9 can be a strip waveguide, the number of which is greater than or equal to the actual number of AWG channels (usually one wavelength channel corresponds to one output waveguide, and the output waveguide can be redundant), and each output waveguide 9 is connected to the second slab waveguide 8 through the adiabatic transition structure 2.

[0057] One side of the second slab waveguide 8 is connected to the output waveguide 9 through the adiabatic transition structure 2 , and the other side of the second slab waveguide 8 is connected to the arrayed waveguide 4 through the adiabatic transition structure 2 .

[0058] The side of the second slab waveguide 8 connected to the output waveguide 9 is located on the circumference of the Rowland circle, and the side of the second slab waveguide 8 connected to the arrayed waveguide 4 is located on the circumference of the grating circle, wherein the Rowland circle is inscribed in the grating circle.

[0059] The ports of the second slab waveguide 8 for connecting to the output waveguide 9 are arranged symmetrically and at equal intervals on the circumference of the Rowland circle side of the second slab waveguide 8. The central output waveguide of the output waveguide 9 is located at the intersection of the extension line of the array waveguide 4 and the Rowland circle, that is, at the center position of the Rowland circle side of the second slab waveguide 8. The ports of the second slab waveguide 8 for connecting to the array waveguide 4 are arranged symmetrically on the circumference of the grating circle side of the second slab waveguide 8.

[0060] In this embodiment, the structure of the second slab waveguide 8 is similar to that of the first slab waveguide 3. Except for the Rowland circle side and the grating circle side, the remaining boundary positions of the second slab waveguide 8 can be shallowly etched or not etched to reduce interface reflection crosstalk.

[0061] In this embodiment, when the AWG implements wavelength demultiplexing, the second slab waveguide 8 serves as an interference radiation area for multi-wavelength light, and is used to interfere with the multi-wavelength light from the arrayed waveguide 4, focusing the light of different wavelengths to different port positions on the Rowland circle side interface of the second slab waveguide 8, and outputting the wavelength demultiplexed light through different ports between the second slab waveguide 8 and the output waveguide 9, thereby implementing wavelength demultiplexing; when the AWG implements wavelength multiplexing, monochromatic light of different wavelengths is input from different ports of the output waveguide 9, and after passing through the second slab waveguide 8, the arrayed waveguide 4, and the first slab waveguide 3, it converges to the same port of the input waveguide 1, thereby implementing wavelength multiplexing.

[0062] In this embodiment, when light of different wavelengths transmitted through the array waveguide 4 reaches the grating circle side interface of the second slab waveguide 8, light of the same wavelength has different phase differences. These lights with different phase differences will interfere in the second slab waveguide 8 and focus to the same position. Ultimately, light of different wavelengths will focus to different ports on the Rowland circle side interface.

[0063] In this embodiment, all the adiabatic transition structures 2 have the same function, which is to realize the mode field transition between the two waveguides to reduce the loss and crosstalk caused by mode mutation; their structures include but are not limited to linear gradient type and parabolic type, and the waveguide structure characteristics can be fully etched type or partially shallow etched type.

[0064] The wavelength thermal tuning structure includes a thermal tuning electrode 5, which covers the arrayed waveguide 4. The thermal tuning electrode 5 is connected to an external control circuit and is used to generate Joule heat according to the voltage input by the external control circuit. The thermal tuning electrode 5 achieves tuning of the AWG channel wavelength by heating the arrayed waveguide 4. The square of the voltage amplitude is positively correlated with the drift of the AWG channel wavelength toward the longer wavelength direction.

[0065] A first passivation layer 10 is provided between the thermal tuning electrode 5 and the arrayed waveguide 4 . The first passivation layer 10 is an insulating passivation layer provided between the thermal tuning electrode 5 and the arrayed waveguide 4 by evaporation. The material of the first passivation layer 10 is silicon dioxide or silicon nitride.

[0066] In this embodiment, the function of the thermally tuned electrode 5 is to heat the arrayed waveguide 4, causing a shift in the Free Spectral Range (FSR), which represents the frequency or wavelength difference between adjacent modes in wavelength space in an AWG, thereby changing the channel wavelength of the AWG. The thermally tuned electrode 5 can be formed from a thin film with a certain resistance value, deposited using materials such as TiN and NiCr. Deposition methods include, but are not limited to, electron beam evaporation, atomic layer deposition, and magnetron sputtering.

[0067] The wavelength thermal tuning structure further includes a metal electrode 6 , and the thermal tuning electrode 5 is connected to an external control circuit via the metal electrode 6 .

[0068] A second passivation layer 11 and a third passivation layer 12 are sequentially arranged on the first passivation layer 10 from bottom to top. The second passivation layer 11 is located above the thermal adjustment electrode 5. A metal electrode passivation layer opening 7 is provided in the third passivation layer 12. A conductive through hole for accommodating the metal electrode 6 is provided in the second passivation layer 11 between the metal electrode passivation layer opening 7 and the thermal adjustment electrode 5.

[0069] The top end of the metal electrode 6 is disposed in the metal electrode passivation layer opening 7 , and the bottom end of the metal electrode 6 passes through the conductive through hole of the second passivation layer 11 to be connected to the thermal adjustment electrode 5 .

[0070] The metal electrode 6 is made of a metal material with low resistivity such as Al, Cu, Au or their alloys. The resistivity of the metal electrode 6 is much lower than that of the thermal adjustment electrode 5 , and the sheet resistance of the metal electrode 6 is ≤0.1Ω / sq.

[0071] The second passivation layer 11 is an insulating passivation layer provided between the thermal adjustment electrode 5 and the metal electrode passivation layer opening 7 by evaporation. The material of the second passivation layer 11 is silicon dioxide or silicon nitride.

[0072] The third passivation layer 12 is an insulating passivation layer disposed on the second passivation layer 11 by evaporation, and its material is silicon dioxide or silicon nitride.

[0073] In this embodiment, when using an AWG, an external control circuit applies a voltage to the metal electrode 6, causing the thermally tunable electrode 5 to generate Joule heat. This generated Joule heat is then used to heat the arrayed waveguide 4, thereby tuning the AWG channel wavelength. By controlling the voltage amplitude applied to the metal electrode 6 to adjust the heat generated by the thermally tunable electrode 5, the AWG channel wavelength can be precisely controlled, achieving wavelength adjustment and selection. Specifically, the greater the voltage amplitude applied to the metal electrode 6, the more heat the thermally tunable electrode 5 generates. Because the increased temperature causes the refractive index of the silicon waveguide to increase, the refractive index of the arrayed waveguide 4 increases, and the phase difference between different light wavelengths also increases, causing the AWG channel wavelength to shift toward longer wavelengths.

[0074] In this embodiment, a metal electrode passivation layer opening 7 is provided in the third passivation layer 12 , which can connect the on-chip electrode to the external control circuit by wire bonding or the like, thereby enabling the external control circuit to drive and control the on-chip power-consuming unit.

[0075] In this embodiment, the first passivation layer 10 , the second passivation layer 11 and the third passivation layer 12 are generally made of insulating materials with relatively high hardness, such as silicon dioxide or silicon nitride, which can protect the chip surface and provide electrical insulation.

[0076] In this embodiment, the AWG chip is prepared based on an SOI wafer. The SOI wafer is generally composed of a silicon substrate, a buried oxide layer, and a top silicon layer. The waveguide devices (i.e., the AWG structure) are all located in the top silicon layer. The waveguide devices include an input waveguide 1, an adiabatic transition structure 2, a first slab waveguide 3, an arrayed waveguide 4, a second slab waveguide 8, and an output waveguide 9. The thickness of the top silicon layer is generally set to 220 nm, and can also be adjusted accordingly according to different usage scenarios.

[0077] This embodiment further provides an application of a silicon-on-insulator arrayed waveguide grating chip for dense wavelength division multiplexing in AWG channel wavelength tuning, which includes:

[0078] S101: Determine the amplitude of the applied voltage based on the required drift of the AWG channel wavelength. The relationship between the voltage amplitude and the drift of the AWG channel wavelength is:

[0079] Δλ=γ·V 2

[0080] Where Δλ is the wavelength drift of the AWG channel, γ is the proportionality coefficient, and V is the voltage amplitude. The proportionality coefficient γ is used to describe the relationship between the wavelength drift of the AWG channel and the voltage amplitude. It is a constant. In practice, the value of the proportionality coefficient γ depends on the thermo-optical coefficient of the waveguide material and the thermal properties of the waveguide, which can be obtained through experimental measurement.

[0081] S102: Using an external control circuit to apply a voltage of a predetermined amplitude, the thermal adjustment electrode 5 generates heat under the action of the voltage and heats the arrayed waveguide 4, and the wavelength of the AWG channel shifts toward a longer wavelength by an amount Δλ.

[0082] For example, a 32-channel AWG with a C-band frequency interval of 100 GHz is fabricated using a micro-nano process based on an SOI wafer with a typical top silicon thickness of 220 nm (standard CMOS process can be used). The buried oxide layer and silicon substrate layer thicknesses of the SOI wafer are typically 3 μm and 700 μm, respectively.

[0083] The input waveguide 1 is a strip waveguide with a width of 500 nm, and a total of 9 strip waveguides are provided. The spacing between adjacent input waveguides 1 is 30 μm. The effective refractive index of the input waveguide 1 is about 2.45, and the group refractive index is about 4.21.

[0084] The adiabatic transition structure 2 adopts a composite structure of linear gradient full etching and parabolic shallow etching, such as Figure 1As shown in the enlarged image on the left, the full etching depth is 220nm and the shallow etching depth is 90nm; the length of the linear gradient structure is 40μm, the length of the parabolic structure is 32μm, and the width of the end of the adiabatic transition structure 2 connected to the input waveguide 1 is 500nm. Its width gradually changes from 500nm to 2μm before connecting to the first slab waveguide 3; this composite structure realizes the mode field transition between the input waveguide and the slab waveguide, reducing the loss and crosstalk caused by mode mutation.

[0085] The grating circle radius of the first slab waveguide 3 is set to 850 μm, and the Rowland circle radius is set to 425 μm. The ports corresponding to the input waveguide 1 are arranged on the circumference of the Rowland circle in an axisymmetric and evenly spaced manner. The ports corresponding to the arrayed waveguide 4 are arranged on the grating circle in an axisymmetric and evenly spaced manner. A 90 nm shallow etching process is performed on the upper and lower boundaries of the first slab waveguide 3 to reduce interface reflection crosstalk.

[0086] The arrayed waveguide 4 uses a group of strip waveguides with a lateral spacing of 2.24 μm and a length spacing of 24.21 μm. The individual strip waveguides are arranged in a saddle shape, including the structural forms of straight waveguides and curved waveguides. The width of the straight waveguide is set to 1 μm to reduce the phase noise introduced by process errors. The connection between the straight waveguide and the curved waveguide adopts a width gradient transition structure, and the length of the width gradient transition structure is set to 8 μm. Figure 1 As shown in the enlarged view on the right, the number of arrayed waveguides 4 is set to 149.

[0087] The thermal adjustment electrode 5 is made of TiN material. Specifically, the TiN material is evaporated on the first passivation layer 10 by atomic layer deposition, and the TiN thin film pattern is prepared by metal etching or lift-off process to form a TiN thin film with a thickness of 50nm. The square resistance of the thermal adjustment electrode 5 is about 11Ω / sq.

[0088] The metal electrode 6 is made of AlCu alloy material. Specifically, a metal electrode passivation layer opening 7 is prepared by a photolithography etching process, and the AlCu alloy material is disposed above the thermal adjustment electrode 5 by electron beam evaporation or vapor deposition. The AlCu pattern is then prepared by a metal etching or lift-off process to form the metal electrode 6. The square resistance of the metal electrode 6 is approximately 0.1Ω / sq. The metal electrode 6 is connected to an external circuit to realize the drive control of the on-chip power unit by the external circuit.

[0089] The output waveguide 9 uses a strip waveguide with a width of 500 nm, with a total of 36 strips, which is greater than the actual number of channels 32. The ports corresponding to the output waveguide 9 are arranged on the circumference of the Rowland circle side of the second slab waveguide 8 in an axially symmetrical and equidistant manner, and the output waveguide spacing is set to 6.5 μm.

[0090] Using the above AWG structure, the multiplexed light of ITU22-53 with a total of 32 wavelengths is input from the input waveguide 1, and the monochromatic light of 32 wavelengths can be obtained at the output waveguide 9. The output spectrum is shown in the attached figure. Figure 3 As shown, the AWG structure in this example can realize the demultiplexing function, and its reverse process can multiplex 32 wavelengths into one multi-wavelength light beam to realize wavelength multiplexing. Figure 3 As shown in FIG, when the designed central wavelength shifts one channel toward the longer wavelength direction, the rightmost channel in the first adjacent FSR will compensate to the leftmost channel of the designed central wavelength, so that all 32 target central wavelength channels can work normally.

[0091] The steps in this application can be adjusted in order, combined, and deleted according to actual needs.

[0092] The units in the device of the present application can be combined, divided and deleted according to actual needs.

[0093] Although the present application is disclosed in detail with reference to the accompanying drawings, it should be understood that these descriptions are merely exemplary and are not intended to limit the application of the present application. The scope of protection of the present application is defined by the appended claims and may include various modifications, alterations and equivalents made to the invention without departing from the scope and spirit of the present application.

Claims

1. A silicon-on-insulator arrayed waveguide grating chip for dense wavelength division multiplexing, characterized in that: The silicon array waveguide grating chip includes an AWG structure and a wavelength thermal tuning structure, wherein the wavelength thermal tuning structure is located above the AWG structure; The AWG structure is composed of an input waveguide (1), a first slab waveguide (3), an arrayed waveguide (4), a second slab waveguide (8), and an output waveguide (9) connected in sequence according to the direction of the optical path, and the AWG structure is used to realize wavelength division multiplexing and demultiplexing of optical signals; One side of the first flat plate waveguide (3) is connected to the input waveguide (1) via an adiabatic transition structure (2), and the other side is connected to the array waveguide (4) via the adiabatic transition structure (2); one side of the second flat plate waveguide (8) is connected to the output waveguide (9) via the adiabatic transition structure (2), and the other side is connected to the array waveguide (4) via the adiabatic transition structure (2); the adiabatic transition structure (2) is used to achieve mode field transition of the waveguides on both sides connected thereto by gradually changing the cross-sectional dimensions of the waveguides; The wavelength thermal tuning structure comprises a thermal tuning electrode (5), which is arranged directly above the arrayed waveguide (4). The thermal tuning electrode (5) is connected to an external control circuit and is used to generate Joule heat according to a voltage input by the external control circuit, and to achieve tuning of the AWG channel wavelength by heating the arrayed waveguide (4), wherein the square of the voltage amplitude is positively correlated with the amount of drift of the AWG channel wavelength toward a longer wavelength.

2. The silicon-on-insulator arrayed waveguide grating chip for dense wavelength division multiplexing according to claim 1, characterized in that: The side of the first slab waveguide (3) close to the input waveguide (1) is located on the circumference of the Rowland circle, and the side of the first slab waveguide (3) close to the arrayed waveguide (4) is located on the circumference of the grating circle, wherein the Rowland circle is inscribed in the grating circle.

3. The silicon-on-insulator arrayed waveguide grating chip for dense wavelength division multiplexing according to claim 2, characterized in that: The ports of the first slab waveguide (3) for connecting to the input waveguide (1) are arranged at equal intervals on the circumference of the Rowland circle side of the first slab waveguide (3), and the ports of the first slab waveguide (3) for connecting to the arrayed waveguide (4) are arranged at equal intervals on the circumference of the grating circle side of the first slab waveguide (3).

4. The silicon-on-insulator arrayed waveguide grating chip for dense wavelength division multiplexing according to claim 1, characterized in that: The arrayed waveguide (4) comprises a group of strip waveguides arranged at equal intervals, with the same length difference being set between adjacent strip waveguides; one end of a single strip waveguide is connected to a first planar waveguide (3) via an adiabatic transition structure (2), and the other end is connected to a second planar waveguide (8) via an adiabatic transition structure (2).

5. The silicon-on-insulator arrayed waveguide grating chip for dense wavelength division multiplexing according to claim 4, characterized in that: The single strip waveguide adopts a structural form of a straight waveguide plus a curved waveguide, wherein the length of the straight waveguide is greater than the length of the curved waveguide, the width of the straight waveguide is greater than the width of the curved waveguide, and a width gradient transition structure is provided at the connection between the straight waveguide and the curved waveguide, and the width gradient transition structure gradually narrows from the straight waveguide connection end to the curved waveguide connection end.

6. The silicon-on-insulator arrayed waveguide grating chip for dense wavelength division multiplexing according to claim 1, characterized in that: The side of the second slab waveguide (8) close to the output waveguide (9) is located on the circumference of the Rowland circle, and the side of the second slab waveguide (8) close to the arrayed waveguide (4) is located on the circumference of the grating circle; The ports of the second slab waveguide (8) for connecting to the output waveguide (9) are arranged at equal intervals on the circumference of the second slab waveguide (8) on the Rowland circle side, the central output waveguide of the output waveguide (9) is located at the center of the Rowland circle side of the second slab waveguide (8), and the ports of the second slab waveguide (8) for connecting to the arrayed waveguide (4) are arranged at equal intervals on the circumference of the second slab waveguide (8) on the grating circle side.

7. The silicon-on-insulator arrayed waveguide grating chip for dense wavelength division multiplexing according to claim 1, characterized in that: A first passivation layer (10) is provided between the thermal adjustment electrode (5) and the arrayed waveguide (4), and the first passivation layer (10) is an insulating passivation layer.

8. The silicon-on-insulator arrayed waveguide grating chip for dense wavelength division multiplexing according to claim 7, characterized in that: The wavelength thermal tuning structure further comprises a metal electrode (6), and the thermal tuning electrode (5) is connected to an external control circuit via the metal electrode (6).

9. The silicon-on-insulator arrayed waveguide grating chip for dense wavelength division multiplexing according to claim 8, characterized in that: A second passivation layer (11) and a third passivation layer (12) are sequentially arranged on the first passivation layer (10) from bottom to top, the second passivation layer (11) is located above the thermal adjustment electrode (5), a metal electrode passivation layer opening (7) is arranged in the third passivation layer (12), and a conductive through hole for accommodating a metal electrode (6) is arranged in the second passivation layer (11) between the metal electrode passivation layer opening (7) and the thermal adjustment electrode (5); The top end of the metal electrode (6) is arranged in the metal electrode passivation layer opening (7), and the bottom end of the metal electrode (6) passes through the conductive through hole of the second passivation layer (11) to be connected to the thermal adjustment electrode (5).

10. An application of the silicon-on-insulator arrayed waveguide grating chip for dense wavelength division multiplexing according to any one of claims 1 to 9 in AWG channel wavelength tuning, comprising: S101: Determine the amplitude of the applied voltage based on the required drift of the AWG channel wavelength. The relationship between the voltage amplitude and the drift of the AWG channel wavelength is: Δλ=γ·V 2 Where Δλ is the wavelength drift of the AWG channel, γ is the proportional coefficient, and V is the voltage amplitude; S102: Using an external control circuit to apply a voltage of a predetermined amplitude, the thermal adjustment electrode (5) generates heat under the action of the voltage and heats the arrayed waveguide (4), and the wavelength of the AWG channel drifts toward a longer wavelength by an amount Δλ.

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