Display panel, driving method thereof and display device

Abstract

The embodiment of the invention provides a display panel, a driving method thereof and a display device, the display panel comprises a first driving mode, a display frame of the first driving mode comprises a write-in frame, a first holding frame and a second holding frame, the first holding frame and the second holding frame are carried out after the write-in frame, and the first holding frame is located between the write-in frame and the second holding frame; the display panel comprises a plurality of sub-pixels, each sub-pixel comprises a pixel circuit and a light-emitting device which are electrically connected with each other, the pixel circuit comprises a driving transistor and a first transistor, the first transistor is electrically connected with the driving transistor, and the first transistor is used for transmitting a first adjusting voltage to the driving transistor in a first holding frame. The second voltage regulator is used for transmitting a second regulation voltage to the driving transistor in a second holding frame; wherein the first regulating voltage is greater than the second regulating voltage. The problem of frequency-switching flicker of the display panel can be solved while the fixed-frequency flicker-free display panel is realized.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a driving method thereof, and a display device. Background Art

[0002] In the field of display technology, display panels may use different refresh frequencies for display in different application scenarios, such as switching from a higher refresh frequency to a lower refresh frequency, or from a lower refresh frequency to a higher refresh frequency, to meet different display requirements.

[0003] However, in existing display panels, flickering is prone to occur when the refresh rate of the display panel is switched, which affects the user experience. Summary of the invention

[0004] In view of this, embodiments of the present application provide a display panel and a driving method thereof, and a display device to solve the above problems.

[0005] In a first aspect, an embodiment of the present application provides a display panel, including a first driving mode, wherein a display frame of the first driving mode includes a writing frame and a first holding frame and a second holding frame performed after the writing frame, wherein the first holding frame is located between the writing frame and the second holding frame; the display panel includes a plurality of sub-pixels, wherein the sub-pixels include a pixel circuit and a light-emitting device electrically connected to each other, wherein the pixel circuit includes: A driving transistor for generating a light-emitting driving current; a first transistor electrically connected to the driving transistor, the first transistor being used to transmit a first regulating voltage to the driving transistor in a first holding frame, and being used to transmit a second regulating voltage to the driving transistor in a second holding frame; The first regulating voltage is greater than the second regulating voltage.

[0006] In an implementation manner of the first aspect, in a writing frame, the first transistor is used to transmit a data voltage to the driving transistor.

[0007] In an implementation manner of the first aspect, a first electrode of the first transistor is electrically connected to the data signal line, a second electrode is electrically connected to the first electrode of the driving transistor, and a gate is electrically connected to the first control signal line.

[0008] In an implementation manner of the first aspect, a difference between the first regulation voltage and the second regulation voltage is no greater than 1V.

[0009] In an implementation of the first aspect, the pixel circuit also includes a second transistor, which is electrically connected to the first pole of the light-emitting device, and the second transistor is used to transmit a first reset voltage to the first pole of the light-emitting device in a first hold frame, and is used to transmit a second reset voltage to the first pole of the light-emitting device in a second hold frame; the second reset voltage is greater than the first reset voltage.

[0010] In an implementation manner of the first aspect, in a writing frame, the second transistor is used to transmit a first initialization voltage to a first electrode of the light-emitting device, and the first initialization voltage is greater than the second reset voltage.

[0011] In an implementation of the first aspect, a first electrode of the second transistor is electrically connected to the first initialization signal line, a second electrode is electrically connected to the first electrode of the light-emitting device, and a gate is electrically connected to the first control signal line.

[0012] In an implementation manner of the first aspect, a turn-on period of the second transistor is the same as that of the first transistor.

[0013] In an implementation manner of the first aspect, a difference between the second reset voltage and the first reset voltage is no more than 1V.

[0014] In an implementation of the first aspect, the display frame of the first driving mode also includes a third holding frame, which is performed after the second holding frame; in the third holding frame, the first transistor is used to transmit a third regulation voltage to the driving transistor, and the third regulation voltage is less than the first regulation voltage.

[0015] In an implementation manner of the first aspect, the third regulation voltage is equal to the second regulation voltage.

[0016] In an implementation manner of the first aspect, the third regulation voltage is less than the second regulation voltage.

[0017] In an implementation of the first aspect, the display frame of the first driving mode also includes a third hold frame, which is performed after the second hold frame; in the third hold frame, the second transistor is used to transmit a third reset voltage to the first electrode of the light-emitting device, and the third reset voltage is greater than the first reset voltage.

[0018] In an implementation manner of the first aspect, the third reset voltage is equal to the second reset voltage.

[0019] In an implementation manner of the first aspect, the third reset voltage is greater than the second reset voltage.

[0020] In an implementation of the first aspect, the display panel also includes a second driving mode, and the display frame of the second driving mode includes a writing frame and a first holding frame; the pixel circuit also includes a second transistor, the second transistor is electrically connected to the first pole of the light-emitting device, and the second transistor is used to transmit a first initialization voltage to the first pole of the light-emitting device in the writing frame, and is used to transmit a first reset voltage to the first pole of the light-emitting device in the first holding frame; the first reset voltage is less than the first initialization voltage.

[0021] In an implementation manner of the first aspect, a difference between the first reset voltage and the first initialization voltage is no more than 1V.

[0022] In a second aspect, an embodiment of the present application provides a method for driving a display panel, for driving the display panel provided in the first aspect; the method comprises: In a first hold frame, the first transistor transmits a first regulated voltage to the driving transistor; In a second hold frame, the first transistor transmits a second regulated voltage to the driving transistor; The first regulating voltage is greater than the second regulating voltage.

[0023] In an implementation of the second aspect, the pixel circuit further includes a second transistor, and the second transistor is electrically connected to the first electrode of the light-emitting device; and the driving method further includes: In the first holding frame, the second transistor transmits a first reset voltage to the first electrode of the light emitting device; In the second holding frame, the second transistor transmits a second reset voltage to the first electrode of the light emitting device; The second reset voltage is greater than the first reset voltage.

[0024] In a third aspect, an embodiment of the present application provides a display device, comprising a display panel provided in the first aspect.

[0025] In the embodiment of the present application, the first regulating voltage is set to be greater than the second regulating voltage, and the larger first regulating voltage can make the threshold voltage of the driving transistor in the first holding frame more negative, which is beneficial to reduce the light-emitting driving current generated by the driving transistor in the first holding frame, thereby helping to reduce the brightness of the first holding frame. In the case where the display panel can execute multiple low-frequency refresh frequencies, it is beneficial to neutralize the light-emitting duration of the first holding frame based on the lower refresh frequency compensation, which leads to an increase in the brightness of the first holding frame caused by the over-compensation of the light-emitting duration of the first holding frame at a higher refresh frequency, thereby helping to avoid the problem that the display panel has a display frame brightness greater than the display frame brightness at the basic frequency at these low refresh frequencies, and is beneficial to improve the flickering problem when the display panel switches from the basic frequency to the low refresh frequency, thereby improving the user experience.

[0026] Moreover, by allowing the first transistor to transmit the first adjustment voltage to the driving transistor in the first holding frame and to transmit the second adjustment voltage to the driving transistor in the second holding frame, the difference between the bias state of the driving transistor in the first holding frame and the second holding frame and its bias state in the writing frame under the same refresh frequency can be improved, thereby reducing the brightness difference between the writing frame and each holding frame, which is beneficial to improving the brightness uniformity of the display panel in a display frame, and further beneficial to enabling the display panel to maintain good brightness uniformity at each refresh frequency, thereby improving the flicker problem of the display panel under fixed frequency. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 A schematic diagram of a display panel provided in an embodiment of the present application; Figure 2 for Figure 1 A schematic diagram of a pixel circuit in FIG. Figure 3 for Figure 2 A timing diagram of the pixel circuit shown; Figure 4 A timing diagram of a pixel circuit in the prior art; Figure 5A A schematic diagram of the relationship between an adjustment voltage and a frequency-cutting brightness difference related to the present application; Figure 5B for Figure 2 Another timing diagram of the pixel circuit shown; Figure 6 for Figure 2 Another timing diagram of the pixel circuit shown; Figure 7 for Figure 2 Another timing diagram of the pixel circuit shown; Figure 8 for Figure 2 Another timing diagram of the pixel circuit shown; Fig. 9 for Figure 2 Another timing diagram of the pixel circuit shown; Fig.10 for Figure 2 Another timing diagram of the pixel circuit shown; Fig.11 A flowchart of a driving method provided in an embodiment of the present application; Fig.12 A schematic diagram of a display device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0028] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0029] It should be clear that the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0030] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0031] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0032] Figure 1 A schematic diagram of a display panel provided in an embodiment of the present application, Figure 2 for Figure 1 A schematic diagram of a pixel circuit in FIG. Figure 3 for Figure 2 A timing diagram of the pixel circuit shown.

[0033] The present application embodiment provides a display panel 01, such as Figure 1 As shown, the display panel 01 includes a plurality of sub-pixels 10. The sub-pixels 10 include a pixel circuit 11 and a light-emitting device 12 that are electrically connected to each other. The pixel circuit 11 is used to drive the light-emitting device 12 to emit light.

[0034] Combination Figure 2 As shown, the pixel circuit 11 includes a driving transistor Md and a first transistor M1. The first transistor M1 is electrically connected to the driving transistor Md. The driving transistor Md is used to generate a light-emitting driving current.

[0035] Combination Figure 3 As shown, the display panel 01 includes a first driving mode, and a display frame of the first driving mode includes a writing frame T1 and a first holding frame T2 and a second holding frame T3 performed after the writing frame T1, and the first holding frame T2 is located between the writing frame T1 and the second holding frame T3. That is, in the first driving mode, a frame of display picture of the display panel 01 includes the writing frame T1, the first holding frame T2 and the second holding frame T3 performed in sequence.

[0036] The writing frame T1 includes a process of writing a data signal to the gate of the driving transistor Md, and the first holding frame T2 and the second holding frame T3 do not include a process of writing a data signal to the gate of the driving transistor Md.

[0037] The first transistor M1 is used to transmit the first regulated voltage VH1 to the driving transistor Md in the first hold frame T2, and is used to transmit the second regulated voltage VH2 to the driving transistor Md in the second hold frame T2.

[0038] For example, Figure 2 As shown, the first transistor M1 is electrically connected to the first electrode of the driving transistor Md. In the first holding frame T2, the first transistor M1 transmits the first adjustment voltage VH1 to the first electrode of the driving transistor Md. In the second holding frame T3, the first transistor M1 transmits the second adjustment voltage VH2 to the first electrode of the driving transistor Md. The first electrode of the driving transistor Md can be its source.

[0039] The first regulating voltage VH1 is greater than the second regulating voltage VH2.

[0040] Exemplarily, the first regulation voltage VH1 and the second regulation voltage VH2 are both positive values.

[0041] It can be understood that in the holding frame (including the first holding frame T2 and the second holding frame T3), providing the adjustment voltage (including the first adjustment voltage VH1 and the second adjustment voltage VH2) to the driving transistor can improve the bias state of the driving transistor Md in the holding frame and adjust the threshold voltage of the driving transistor. Moreover, the larger the adjustment voltage, the more negative the threshold voltage of the driving transistor Md, the larger the absolute value of the threshold voltage of the driving transistor Md, and the smaller the light-emitting driving current generated by the driving transistor Md when other conditions remain unchanged.

[0042] The inventor of the present application has found through research that when the display panel displays at a low frequency, due to the leakage problem of the transistor in the pixel circuit, such as Figure 2 The leakage problem of transistor M3 and transistor M4 in the display is that the leakage of transistor M4 will cause the gate potential of the driving transistor to increase, and the leakage of transistor M3 will cause the gate potential of the driving transistor to decrease. Under high grayscale, since the gate potential of the driving transistor is low and the light-emitting driving current is large, the leakage of transistor M4 will be greater than the leakage of transistor M3, causing the gate potential of the driving transistor to increase continuously within a display frame, thereby causing the brightness within the display frame to decrease continuously. As the refresh frequency decreases, the number of hold frames within a display frame will increase, and the brightness of the display frame will decrease more.

[0043] It should be noted that the display panel has a higher driving frequency at a high refresh frequency, and the display panel has a lower driving frequency at a low refresh frequency. The frequency of writing frames of the display panel at a high refresh frequency is higher than the frequency of writing frames at a low refresh frequency. One implementation method is to reduce the frequency to an integer multiple of the basic frequency on the basis of the basic frequency. The display frame of the basic frequency includes a write frame. The display frame after the frequency is reduced on the basis of the basic frequency includes a write frame and a hold frame, wherein the frame length of the write frame and the frame length of the hold frame may be the same. In other words, the driving frequency is reduced by inserting a hold frame between adjacent write frames, and the reduction multiple of the driving frequency is changed by changing the number of hold frames inserted between adjacent write frames. For example, the basic frequency is 120HZ, and the reduced frequency may be 60HZ, 40HZ or 30HZ, etc. The low refresh frequency in this application may refer to a driving frequency less than the basic frequency.

[0044] In an existing solution, the light emitting time of the frame is usually increased to compensate for the problem of decreased brightness of the display frame.

[0045] However, in the prior art, Figure 4 As shown, Figure 4 This is a timing diagram of a pixel circuit in the prior art. Taking the refresh frequencies of 120HZ, 60HZ, and 40HZ as an example, at a refresh frequency of 120HZ, a display frame of the display panel includes a write frame T1' and does not include a hold frame. At a refresh frequency of 60HZ, a display frame of the display panel includes a write frame T1' and a first hold frame T2' that are performed in sequence. At a refresh frequency of 40HZ, a display frame of the display panel includes a write frame T1', a first hold frame T2', and a second hold frame T3' that are performed in sequence.

[0046] When the EM' signal is a low level signal, the pixel circuit drives the light emitting device to emit light. When the SN1' signal is a low level signal, the pixel circuit performs the work of resetting the gate of the driving transistor. When the SN2' signal is a low level signal and the SP' signal is a low level signal, the pixel circuit performs the work of writing the data signal into the driving transistor.

[0047] Depend on Figure 4 It can be seen that the 60HZ refresh frequency and the 40HZ refresh frequency share the first hold frame T2'. Since the 40HZ refresh frequency is lower than the 60HZ refresh frequency, the number of hold frames included in a display frame under the 40HZ refresh frequency is greater than the number of hold frames included in a display frame under the 60HZ refresh frequency. From the above analysis, it can be seen that the display frame brightness of the display panel under the 40HZ refresh frequency decreases more than the display frame brightness under the 60HZ refresh frequency.

[0048] Since the display frame brightness at a 60HZ refresh rate is greater than that at a 40HZ refresh rate, when compensating the luminous duration in the first maintained frame T2' based on the 40HZ refresh rate, the luminous duration in the first maintained frame T2' at a 60HZ refresh rate will be over-compensated, which may easily cause the brightness of the display frame at a 60HZ refresh rate to be greater than that at a 120HZ refresh rate. When the display panel switches from a 120HZ refresh rate to a 60HZ refresh rate, flickering may be easily recognized by the human eye, affecting the user experience.

[0049] In view of this, in an embodiment of the present application, the first regulating voltage VH1 is set to be greater than the second regulating voltage VH2. From the above analysis, it can be seen that the larger first regulating voltage VH1 can make the threshold voltage of the driving transistor Md in the first holding frame T2 more negative, which is beneficial to reducing the light-emitting driving current generated by the driving transistor Md in the first holding frame T2, thereby helping to reduce the brightness of the first holding frame T2.

[0050] When the display panel 01 can execute multiple low refresh frequencies, it is helpful to neutralize the increase in brightness of the first holding frame T2 caused by over-compensation of the luminous duration of the first holding frame T2 at a higher refresh frequency due to compensation of the luminous duration of the first holding frame T2 based on the lower refresh frequency. This is helpful to avoid the problem that the display frame brightness of the display panel 01 is greater than the display frame brightness at the basic frequency at these low refresh frequencies, and is helpful to improve the flickering problem when the display panel 01 switches from the basic frequency to the low refresh frequency, thereby improving the user experience.

[0051] For example, Figure 3 As shown, the display panel 01 can execute the refresh frequency of 120HZ, 60HZ, and 40HZ. At the refresh frequency of 120HZ, one display frame of the display panel 01 includes the write frame T1 and does not include the hold frame. At the refresh frequency of 60HZ, one display frame of the display panel 01 includes the write frame T1 and the first hold frame T2 performed in sequence. At the refresh frequency of 40HZ, one display frame of the display panel includes the write frame T1, the first hold frame T2, and the second hold frame T3 performed in sequence.

[0052] When compensating the luminous duration in the first holding frame T2 based on the 40HZ refresh frequency, making the first adjustment voltage VH1 in the first holding frame T2 larger, the brightness of the first holding frame T2 can be reduced, thereby improving the problem of excessive brightness of the display panel 01 caused by excessive compensation of the luminous duration in the first holding frame T2 under the 60HZ refresh frequency, which is beneficial to improve the flickering problem of the display panel 01 when the frequency switches from 120HZ to 60HZ.

[0053] like Figure 5A As shown, Figure 5AThis is a schematic diagram of the relationship between the adjustment voltage and the frequency-cutting brightness difference related to this application. The horizontal axis is the potential of the adjustment voltage VH, and the vertical axis is the difference △LV between the brightness of the display frame at 60HZ and the brightness of the display frame at 120HZ at the same grayscale. Figure 5A It can be seen that within a certain range, the larger the adjustment voltage VH is, the smaller the difference between the brightness of the display frame at 60HZ and the brightness of the display frame at 120HZ is, which is more conducive to improving the flicker problem when the display panel 01 switches from 120HZ to 60HZ. The first adjustment voltage VH1 can be flexibly set according to actual needs.

[0054] Moreover, in the embodiment of the present application, the first transistor M1 transmits the first adjustment voltage VH1 to the driving transistor Md in the first holding frame T2, and transmits the second adjustment voltage VH2 to the driving transistor Md in the second holding frame T2, which can also improve the difference between the bias state of the driving transistor Md in the first holding frame T2 and the second holding frame T3 and the bias state in the writing frame at the same refresh frequency, thereby reducing the brightness difference between the writing frame T1 and each holding frame, which is beneficial to improving the brightness uniformity of the display panel 01 in a display frame. It is further beneficial to enable the display panel 01 to maintain good brightness uniformity at each refresh frequency, and improve the flicker problem of the display panel 01 at a fixed frequency.

[0055] Optionally, the difference between the first adjustment voltage VH1 and the second adjustment voltage VH2 is not greater than 1 V. In this way, while ensuring that the brightness of the first holding frame T2 can be reduced, the brightness of the first holding frame T2 can be prevented from being too low, which is conducive to ensuring the brightness uniformity of the display panel 01 in a display frame.

[0056] Please continue to combine Figure 2 and Figure 3 In one implementation of the present application, in the writing frame T1, the first transistor M1 is used to transmit the data voltage Vdata to the driving transistor Md.

[0057] Exemplarily, a first electrode of the first transistor M1 is electrically connected to the data signal line DL1 , a second electrode is electrically connected to the first electrode of the driving transistor Md, and a gate is electrically connected to the first control signal line SP.

[0058] In the writing frame T1 , the data signal line DL1 transmits the data voltage Vdata, the first control signal line SP transmits an enable signal (such as a low level signal) to control the first transistor M1 to turn on, and the first transistor M1 transmits the data voltage Vdata to the driving transistor Md.

[0059] In the first holding frame T2 , the data signal line DL1 transmits the first regulated voltage VH1 , the first control signal line SP transmits an enable signal (eg, a low level signal) to control the first transistor M1 to turn on, and the first transistor M1 transmits the first regulated voltage VH1 to the driving transistor Md.

[0060] In the second holding frame T2 , the data signal line DL1 transmits the second regulation voltage VH2 , the first control signal line SP transmits an enable signal (eg, a low level signal) to control the first transistor M1 to turn on, and the first transistor M1 transmits the second regulation voltage VH2 to the driving transistor Md.

[0061] In this implementation, the first transistor M1 is used to transmit the data voltage Vdata and the regulating voltage, which is beneficial to reducing the number of transistors in the pixel circuit 11 and reducing the structural complexity of the pixel circuit 11 .

[0062] Figure 5B for Figure 2 Another timing diagram of the pixel circuit shown.

[0063] In one embodiment of the present application, Figure 2 and Figure 5B As shown, the pixel circuit 11 further includes a second transistor M2, which is electrically connected to the first electrode of the light emitting device 12, and is used to transmit the first reset voltage Vref1 to the first electrode of the light emitting device 12 in the first hold frame T2, and is used to transmit the second reset voltage Vref2 to the first electrode of the light emitting device 12 in the second hold frame T3. The first electrode of the light emitting device 12 may be its anode.

[0064] The second reset voltage Vref2 is greater than the first reset voltage Vref1.

[0065] Exemplarily, the second reset voltage Vref2 and the first reset voltage Vref1 are both negative values, and the absolute value of the second reset voltage Vref2 is smaller than the absolute value of the first reset voltage Vref1.

[0066] In the embodiment of the present application, the second reset voltage Vref2 is set to be greater than the first reset voltage Vref1, that is, the first reset voltage Vref1 is more negative than the second reset voltage Vref2, which can reduce the charging speed of the light emitting device 12 in the first holding frame T2, which is conducive to further reducing the brightness of the first holding frame T2. In the case where the display panel 01 can execute multiple low-frequency refresh frequencies, it is conducive to further avoiding the problem of excessive brightness at low-frequency refresh frequencies, thereby further improving the problem of frequency switching flicker of the display panel 01 and improving user experience.

[0067] For example, Figure 5BAs shown, by making the first reset voltage Vref1 in the first hold frame T2 more negative, the brightness of the first hold frame T2 can be further reduced, which is beneficial to further avoid excessive brightness of the display panel 01 at a refresh rate of 60HZ, thereby helping to further improve the flicker problem of the display panel 01 when the frequency switches from 120HZ to 60HZ.

[0068] Optionally, the difference between the second reset voltage Vref2 and the first reset voltage Vref1 is not greater than 1 V. In this way, while further ensuring that the brightness of the first hold frame T2 can be reduced, the brightness of the first hold frame T2 can be prevented from being too low, which is conducive to ensuring the brightness uniformity of the display panel 01 in a display frame.

[0069] Please continue to combine Figure 2 and Figure 5B In one embodiment of the present application, in the writing frame T1, the second transistor M2 is also used to transmit a first initialization voltage Vrefx to the first electrode of the light emitting device 12, and the first initialization voltage Vrefx is greater than the second reset voltage Vref2.

[0070] Exemplarily, the first initialization voltage Vrefx is a negative value, and the first initialization voltage Vrefx is more positive than the second reset voltage Vref2.

[0071] Of course, since the second reset voltage Vref2 is greater than the first reset voltage Vref1 , the first initialization voltage Vrefx is also greater than the first reset voltage Vref1 .

[0072] Optional, such as Figure 2 As shown, the first electrode of the second transistor M2 is electrically connected to the first initialization signal line SL1 , the second electrode is electrically connected to the first electrode of the light emitting device 12 , and the gate is electrically connected to the first control signal line SP.

[0073] In the writing frame T1 , the first initialization signal line SL1 transmits the first initialization voltage Vrefx, the first control signal line SP transmits an enable signal (such as a low level signal) to control the second transistor M2 to turn on, and the second transistor M2 transmits the first initialization voltage Vrefx to the first electrode of the light emitting device 12 .

[0074] In the first holding frame T2 , the first initialization signal line SL1 transmits the first reset voltage Vref1 , the first control signal line SP transmits an enable signal (such as a low level signal) to control the second transistor M2 to turn on, and the second transistor M2 transmits the first reset voltage Vref1 to the first electrode of the light emitting device 12 .

[0075] In the second holding frame T2 , the first initialization signal line SL1 transmits the second reset voltage Vref2 , the first control signal line SP transmits an enable signal (such as a low level signal) to control the second transistor M2 to turn on, and the second transistor M2 transmits the second reset voltage Vref2 to the first electrode of the light emitting device 12 .

[0076] The inventors of the present application have found through research that when the display panel displays at a low frequency and at a low grayscale, due to the capacitance effect of the light-emitting device, the charging and discharging time is long, which can easily lead to insufficient resetting and increase the brightness of the display frame.

[0077] Therefore, in the embodiment of the present application, the second reset voltage Vref2 and the first reset voltage Vref1 are both smaller than the first initialization voltage Vrefx, that is, the second reset voltage Vref2 and the first reset voltage Vref1 are more negative than the first initialization voltage Vrefx, which is beneficial to reduce the charging speed of the light-emitting device 12 in the holding frame, thereby helping to reduce the brightness of the holding frame and improving the problem of increased display brightness of the display panel 01 at low grayscale.

[0078] It should be noted that the grayscale is divided based on the brightness of the light-emitting device, and the larger the grayscale, the higher the brightness. The low grayscale and high grayscale in this application can be understood as relative concepts, for example, the brightness of the light-emitting device represented by the low grayscale is lower than the brightness of the light-emitting device represented by the high grayscale. The low grayscale and high grayscale in this application can also be understood as absolute concepts, for example, taking 256 grayscales as an example, grayscales greater than 127 grayscales are considered to be high grayscales, and grayscales less than or equal to 127 are considered to be low grayscales, or grayscales greater than 63 grayscales are considered to be high grayscales, and grayscales less than or equal to 63 are considered to be low grayscales. Optionally, the second transistor M2 has the same opening period as the first transistor M1. In this way, the channel types of the first transistor M1 and the second transistor M2 are the same, then the gate of the first transistor M1 and the gate of the second transistor M2 can be connected to the same first control signal line SP, which is conducive to reducing the driving complexity of the pixel circuit 11.

[0079] Figure 6 for Figure 2 Another timing diagram of the pixel circuit shown.

[0080] In one embodiment of the present application, Figure 2 and Figure 6 As shown, the display frame of the first driving mode also includes a third holding frame T4, and the third holding frame T4 is performed after the second holding frame T3. In this embodiment, the first driving mode of the display panel 01 can be a mode of performing a 30 Hz refresh frequency.

[0081] In the third holding frame T4, the first transistor M1 is used to transmit the third regulation voltage VH3 to the driving transistor Md, and the third regulation voltage VH3 is lower than the first regulation voltage VH1.

[0082] Exemplarily, the third regulation voltage VH3 is a positive value, and the first regulation voltage VH1 is more positive than the third regulation voltage.

[0083] In an embodiment of the present application, transmitting the third adjustment voltage VH3 to the driving transistor Md in the third holding frame T4 can improve the difference between the bias state of the driving transistor Md in the third holding frame T4 and the bias state of the driving transistor Md in the writing frame T1, which is beneficial to further ensure the brightness uniformity of the display panel 01 in a display frame.

[0084] Moreover, it can be known from the above analysis that by making the third adjustment voltage VH3 smaller than the first adjustment voltage VH1, the brightness of the first holding frame T2 can be reduced and the brightness of the third holding frame T4 can be increased while ensuring that the brightness in a display frame is relatively uniform. While ensuring that the brightness of the display frame including only the writing frame T1 and the first holding frame T2 is not too large, the brightness of the display frame in the first driving mode can be avoided to be too small, which is conducive to further improving the flicker problem when the display panel 01 switches the frequency.

[0085] For example, Figure 6 As shown, the display panel 01 can execute the refresh frequency of 120HZ, 60HZ, and 30HZ. At the refresh frequency of 120HZ, one display frame of the display panel 01 includes the write frame T1 and does not include the hold frame. At the refresh frequency of 60HZ, one display frame of the display panel 01 includes the write frame T1 and the first hold frame T2 performed in sequence. At the refresh frequency of 30HZ, one display frame of the display panel includes the write frame T1, the first hold frame T2, the second hold frame T3, and the third hold frame T3 performed in sequence.

[0086] When adjusting the light-emitting duration in each hold frame based on the 30HZ refresh rate, the brightness of a display frame at a 60HZ refresh rate is usually greater than the brightness of a display frame at a 120HZ refresh rate. The brightness of a display frame at a 30HZ refresh rate is usually less than the brightness of a display frame at a 120HZ refresh rate.

[0087] By making the first adjustment voltage VH1 in the first hold frame T2 larger, the brightness of the first hold frame T2 can be reduced to avoid excessive brightness of the display panel 01 at a refresh rate of 60HZ, thereby helping to improve the flicker problem when the display panel 01 switches from 120HZ to 60HZ.

[0088] By making the third adjustment voltage VH3 in the third hold frame T4 larger, the brightness of the third hold frame T4 can be increased, and the brightness of the display panel 01 at a refresh rate of 30HZ can be improved, which is beneficial to improving the flicker problem of the display panel 01 when the frequency switches from 120HZ to 30HZ.

[0089] Optional, such as Figure 7 As shown, Figure 7 for Figure 2 In another timing diagram of the pixel circuit shown in FIG. 1 , the third regulation voltage VH3 is smaller than the second regulation voltage VH2 .

[0090] Exemplarily, the difference between the third regulation voltage VH3 and the second regulation voltage VH2 is not greater than 1V.

[0091] Since the second regulating voltage VH2 is smaller than the first regulating voltage VH1, the third regulating voltage VH3 is made smaller than the second regulating voltage VH2. On the one hand, the brightness change amplitude of the second holding frame T3 can be between the brightness change amplitude of the third holding frame T4 and the brightness change amplitude of the first holding frame T2, which is beneficial to gradually change the brightness of the first holding frame T2, the second holding frame T3 and the third holding frame T4, thereby further improving the brightness uniformity of the display panel 01 in a display frame.

[0092] On the other hand, more targeted compensation can be performed on the brightness of display frames at different refresh frequencies, which is conducive to making the brightness of the display panel 01 tend to be consistent at different refresh frequencies, and further improving the flicker problem when the display panel 01 switches frequency.

[0093] Optional, such as Figure 6 As shown, the third adjustment voltage VH3 is equal to the second adjustment voltage VH2. Based on this configuration, it is helpful to reduce the design complexity of the display panel 01 and reduce the driving difficulty of the display panel 01.

[0094] Figure 8 for Figure 2 Another timing diagram of the pixel circuit shown.

[0095] In one embodiment of the present application, Figure 2 and Figure 8 As shown, the display frame T of the first driving mode also includes a third holding frame T4, and the third holding frame T4 is performed after the second holding frame T3. In this embodiment, the first driving mode of the display panel 01 can be a mode of performing a 30 Hz refresh rate.

[0096] In the third holding frame T4, the second transistor M2 is used to transmit the third reset voltage Vref3 to the first electrode of the light emitting device 12, and the third reset voltage Vref3 is greater than the first reset voltage Vref1.

[0097] Exemplarily, the third reset voltage Vref3 is a negative value, and the third reset voltage Vref3 is more positive than the first reset voltage Vref1 .

[0098] In an embodiment of the present application, transmitting the third reset voltage Vref3 to the first electrode of the light-emitting device 12 in the third holding frame T4 can improve the difference between the charging speed of the light-emitting device 12 in the third holding frame T4 and the charging speed of the light-emitting device 12 in the writing frame T1, which is beneficial to further ensure the brightness uniformity of the display panel 01 in a display frame.

[0099] Moreover, it can be known from the above analysis that the third reset voltage Vref3 is biased positive compared to the first reset voltage Vref1, while ensuring that the brightness in a display frame is relatively uniform, the brightness of the first hold frame T2 can be reduced, and the brightness of the third hold frame T4 can be increased. While ensuring that the brightness of the display frame including only the write frame T1 and the first hold frame T2 is not too large, the brightness of the display frame in the first driving mode can be avoided to be too small, which is conducive to further improving the flicker problem when the display panel 01 switches the frequency.

[0100] For example, Figure 8 As shown, when the luminous duration in each hold frame is adjusted based on the 30HZ refresh frequency, the brightness of a display frame at a 60HZ refresh frequency is usually greater than the brightness of a display frame at a 120HZ refresh frequency. The brightness of a display frame at a 30HZ refresh frequency is usually less than the brightness of a display frame at a 120HZ refresh frequency.

[0101] By making the first reset voltage Vref1 in the first hold frame T2 smaller, the brightness of the first hold frame T2 can be reduced to avoid excessive brightness of the display panel 01 at a refresh rate of 60 Hz, thereby helping to improve the flicker problem when the display panel 01 switches from 120 Hz to 60 Hz.

[0102] By making the third reset voltage Vref3 in the third hold frame T4 larger, the brightness of the third hold frame T4 can be increased, and the brightness of the display panel 01 at a refresh rate of 30 Hz can be improved, which is beneficial to improving the flicker problem when the display panel 01 switches from 120 Hz to 30 Hz.

[0103] Optional, such as Fig. 9 As shown, Fig. 9 for Figure 2 In another timing diagram of the pixel circuit shown in FIG. 1 , the third reset voltage Vref3 is greater than the second reset voltage Vref2 . The third reset voltage Vref3 is more positive than the second reset voltage Vref2 .

[0104] Exemplarily, the difference between the third reset voltage Vref3 and the second reset voltage Vref2 is not greater than 1V.

[0105] Since the second reset voltage Vref2 is biased positive compared to the first reset voltage Vref1, the third reset voltage Vref3 is biased positive compared to the second reset voltage Vref2. On the one hand, the brightness change amplitude of the second holding frame T3 can be between the brightness change amplitude of the third holding frame T4 and the brightness change amplitude of the first holding frame T2, which is beneficial to gradually change the brightness of the first holding frame T2, the second holding frame T3, and the third holding frame T4, which is beneficial to further improve the brightness uniformity of the display panel 01 in a display frame.

[0106] On the other hand, more targeted compensation can be performed on the brightness of display frames at different refresh frequencies, which is conducive to making the brightness of the display panel 01 tend to be consistent at different refresh frequencies, and further improving the flicker problem when the display panel 01 switches frequency.

[0107] Optional, such as Figure 8 As shown, the third reset voltage Vref3 is equal to the second reset voltage Vref2. Based on this configuration, it is helpful to reduce the design complexity of the display panel 01 and reduce the driving difficulty of the display panel 01.

[0108] In one embodiment of the present application, please continue to refer to Figure 8 The third reset voltage Vref3 is less than the first initialization voltage Vrefx, and the third reset voltage Vref3 is more negative than the first initialization voltage Vrefx.

[0109] From the above analysis, it can be seen that when the display panel is displayed at a low frequency, the display frame brightness is prone to increase at low grayscale. In the embodiment of the present application, the third reset voltage Vref3 is made more negative than the first initialization voltage Vrefx, which is beneficial to reduce the charging speed of the light emitting device 12 in the third holding frame T4, thereby helping to reduce the brightness of the third holding frame T4, and further improving the problem of the display brightness increase of the display panel 01 at low grayscale.

[0110] Fig.10 for Figure 2 Another timing diagram of the pixel circuit shown.

[0111] Combination Figure 2 and Fig.10 As shown, in one embodiment of the present application, the display panel 01 also includes a second driving mode, and the second driving mode can be a mode in which the display panel 01 executes a 60 Hz refresh frequency.

[0112] The display frame T of the second driving module includes a writing frame T1 and a first holding frame T2. The display frame T of the second driving mode and the display frame T of the first driving mode can share the writing frame T1 and the first holding frame T2.

[0113] The pixel circuit 11 also includes a second transistor M2, which is electrically connected to the first electrode of the light-emitting device 12. The second transistor M2 is used to transmit the first initialization voltage Vrefx to the first electrode of the light-emitting device 12 in the write frame T1, and is used to transmit the first reset voltage Vref1 to the first electrode of the light-emitting device 12 in the first hold frame T2.

[0114] For example, Figure 2 As shown, the first electrode of the second transistor M2 is electrically connected to the first initialization signal line SL1 , the second electrode is electrically connected to the first electrode of the light emitting device 12 , and the gate is electrically connected to the first control signal line SP.

[0115] In the writing frame T1 , the first initialization signal line SL1 transmits the first initialization voltage Vrefx, the first control signal line SP transmits an enable signal (such as a low level signal) to control the second transistor M2 to turn on, and the second transistor M2 transmits the first initialization voltage Vrefx to the first electrode of the light emitting device 12 .

[0116] In the first holding frame T2 , the first initialization signal line SL1 transmits the first reset voltage Vref1 , the first control signal line SP transmits an enable signal (such as a low level signal) to control the second transistor M2 to turn on, and the second transistor M2 transmits the first reset voltage Vref1 to the first electrode of the light emitting device 12 .

[0117] The first reset voltage Vref1 is less than the first initialization voltage Vrefx.

[0118] Exemplarily, the first initialization voltage Vrefx and the first reset voltage Vref1 are both negative values, and the first initialization voltage Vrefx is more positive than the first reset voltage Vref1 .

[0119] From the above analysis, it can be seen that when the display panel 01 is displayed at a low frequency, the display frame brightness is prone to increase at low grayscale. Therefore, in the embodiment of the present application, the first reset voltage Vref1 is set to be less than the first initialization voltage Vrefx, that is, the first reset voltage Vref1 is more negative than the first initialization voltage Vrefx, which is beneficial to reduce the charging speed of the light-emitting device 12 in the first holding frame T2, thereby helping to reduce the brightness of the first holding frame T2, and improving the problem of the display brightness increasing at low grayscale in the second driving mode of the display panel 01.

[0120] Optionally, the difference between the first initialization voltage Vrefx and the first reset voltage Vref1 is not greater than 1 V. In this way, while improving the problem of the brightness increase of the display panel at low gray scales, excessive reduction of the brightness of the first guarantee frame T2 can be avoided, which is conducive to ensuring the brightness uniformity of the display panel 01 in a display frame.

[0121] It should be noted that, in the present application, the first driving mode and the second driving mode may have the same basic frequency, and the first driving mode and the second driving mode are realized by reducing the frequency of the same basic frequency. A display frame of the display panel 01 at the basic frequency may only include the writing frame T1. In the above embodiment, the basic frequency may be 120HZ.

[0122] To facilitate the understanding of this technical solution, Figure 3 and Figure 2 ,right Figure 2 The working process of the pixel circuit 11 is described below.

[0123] like Figure 2 As shown, the pixel circuit 11 further includes a third transistor M3, a fourth transistor M4, a fifth transistor M5 and a sixth transistor M6. The first electrode of the third transistor M3 is electrically connected to the second initialization signal line SL2, the second electrode is electrically connected to the gate of the driving transistor Md, and the gate is electrically connected to the second control signal line SN1. The second initialization signal line SL2 transmits the second initialization voltage Vrefm. The first electrode of the fourth transistor M4 is electrically connected to the second electrode of the driving transistor Md, the second electrode is electrically connected to the gate of the driving transistor Md, and the gate is electrically connected to the third control signal line SN2. The first electrode of the fifth transistor M5 is electrically connected to the power signal line DL2, the second electrode is electrically connected to the first electrode of the driving transistor Md, and the gate is electrically connected to the light-emitting control signal line EM. The power signal line DL2 transmits the power supply voltage PVDD. The first electrode of the sixth transistor M6 is electrically connected to the second electrode of the driving transistor Md, the second electrode is electrically connected to the first electrode of the light-emitting device 12, and the gate is electrically connected to the light-emitting control signal line EM.

[0124] In the writing frame T1, the working process of the pixel circuit 11 includes the reset phase Z1, the data signal writing phase Z2, and the light emitting phase Z3 performed in sequence. In the holding frame (including the first holding frame T2 and the second holding frame T3), the working process of the pixel circuit 11 includes the adjustment phase Z4 and the light emitting phase Z3 performed in sequence.

[0125] Combination Figure 3As shown, in the reset phase Z1, the second control signal line SN1 transmits an enable signal (such as a low-level signal), and the third transistor M3 is turned on. The first control signal line SP, the third control signal line SN2, and the light-emitting control signal line EM transmit a non-enable signal (such as a high-level signal), the first transistor M1, the second transistor M2, the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6 are turned off, and the second initialization voltage Vrefm is transmitted to the gate of the driving transistor Md through the turned-on third transistor M3, and the gate of the driving transistor Md is reset. This ensures that the display panel can write an accurate data voltage Vdata to the gate of the driving transistor Md when executing a write frame.

[0126] In the data signal writing phase Z2, the first control signal line SP and the third control signal line SN2 both transmit enable signals (such as low-level signals), and the first transistor M1, the second transistor M2, and the fourth transistor M4 are turned on. The second control signal line SN1 and the light-emitting control signal line EM transmit non-enable signals (such as high-level signals), and the third transistor M3, the fifth transistor M5, and the sixth transistor M6 are turned off. The data voltage Vdata is transmitted to the first electrode of the driving transistor Md through the turned-on first transistor M1, and the driving transistor Md is turned on. The data voltage Vdata is transmitted to the gate of the driving transistor Md through the turned-on driving transistor Md and the fourth transistor M4.

[0127] At the same time, the first initialization voltage Vrefx is transmitted to the first electrode of the light emitting device 12 through the turned-on second transistor M2 , so as to reset the first electrode of the light emitting device 12 .

[0128] In the light-emitting stage Z3, the first control signal line SP, the second control signal line SN1 and the third control signal line SN2 all transmit a non-enable signal (such as a high-level signal), and the first transistor M1, the second transistor M2, the third transistor M3 and the fourth transistor M4 are turned off. The light-emitting control signal line EM transmits an enable signal (such as a low-level signal), the fifth transistor M5 and the sixth transistor M6 are turned on, and the driving transistor Md generates a light-emitting driving current and transmits it to the light-emitting device 12, driving the light-emitting device 12 to emit light.

[0129] In the adjustment stage Z4, the first control signal line SP transmits an enable signal (such as a low-level signal), and the first transistor M1 and the second transistor M2 are turned on. The second control signal line SN1, the third control signal line SN2, and the light-emitting control signal line EM transmit a non-enable signal (such as a high-level signal), and the third transistor M3, the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6 are turned off. The adjustment voltage (including the first adjustment voltage VH1 and the second adjustment voltage VH2) is transmitted to the first electrode of the driving transistor Md through the turned-on first transistor M1 to adjust the bias state of the driving transistor Md.

[0130] At the same time, the reset voltage (including the first reset voltage Vref1 and the second reset voltage Vref2 ) resets the first electrode of the light emitting device 12 through the turned-on second transistor M2 .

[0131] Fig.11 A flowchart of a driving method provided in an embodiment of the present application.

[0132] The embodiment of the present application further provides a method for driving a display panel, which is used to drive the display panel 01 provided in the above embodiment. The method includes: Step B1: In the first holding frame T2, the first transistor M1 transmits the first regulating voltage VH1 to the driving transistor Md.

[0133] Step B2: In the second holding frame T3, the first transistor M1 transmits the second regulating voltage VH2 to the driving transistor Md.

[0134] The first regulating voltage VH1 is greater than the second regulating voltage VH2.

[0135] In the embodiment of the present application, the first regulating voltage VH1 is set to be greater than the second regulating voltage VH2. The larger first regulating voltage VH1 can make the threshold voltage of the driving transistor Md in the first holding frame T2 more negative, which is beneficial to reducing the light-emitting driving current generated by the driving transistor Md in the first holding frame T2, thereby helping to reduce the brightness of the first holding frame T2.

[0136] When the display panel 01 can execute multiple low-frequency refresh frequencies, it is helpful to neutralize the increase in brightness of the first holding frame T2 caused by over-compensation of the luminous duration of the first holding frame T2 at a higher refresh frequency due to compensation of the luminous duration of the first holding frame T2 based on the lower refresh frequency. This is helpful to avoid the problem that the display frame brightness of the display panel 01 is greater than the display frame brightness at the basic frequency at these low refresh frequencies, and is helpful to improve the flickering problem when the display panel 01 switches from the basic frequency to the low refresh frequency, thereby improving the user experience.

[0137] Moreover, by allowing the first transistor M1 to transmit the first adjustment voltage VH1 to the driving transistor Md in the first holding frame T2 and transmit the second adjustment voltage VH2 to the driving transistor Md in the second holding frame T2, the difference between the bias state of the driving transistor Md in the first holding frame T2 and the second holding frame T3 and its bias state in the writing frame under the same refresh frequency can be improved, thereby reducing the brightness difference between the writing frame T1 and each holding frame, which is beneficial to improving the brightness uniformity of the display panel 01 in a display frame, and further beneficial to enabling the display panel 01 to maintain good brightness uniformity at each refresh frequency, thereby improving the flicker problem of the display panel 01 under a fixed frequency.

[0138] In one embodiment of the present application, Figure 2 As shown, the pixel circuit 11 further includes a second transistor M2, and the second transistor M2 is electrically connected to the first electrode of the light emitting device 12. The driving method further includes: Step B3: In the first holding frame T2 , the second transistor M2 transmits the first reset voltage Vref1 to the first electrode of the light emitting device 12 .

[0139] Step B4: In the second holding frame T3 , the second transistor M3 transmits the second reset voltage Vref2 to the first electrode of the light emitting device 12 .

[0140] The second reset voltage Vref2 is greater than the first reset voltage Vref1.

[0141] Exemplarily, the second reset voltage Vref2 and the first reset voltage Vref1 are both negative values, and the absolute value of the second reset voltage Vref2 is smaller than the absolute value of the first reset voltage Vref1.

[0142] In the embodiment of the present application, the second reset voltage Vref2 is set to be greater than the first reset voltage Vref1, that is, the first reset voltage Vref1 is more negative than the second reset voltage Vref2, which can reduce the charging speed of the light emitting device 12 in the first holding frame T2, which is conducive to further reducing the brightness of the first holding frame T2. In the case where the display panel 01 can execute multiple low-frequency refresh frequencies, it is conducive to further avoiding the problem of excessive brightness of the display panel 01 at a low-frequency refresh frequency, thereby further improving the problem of frequency switching flicker of the display panel 01 and improving the user experience.

[0143] Fig.12 A schematic diagram of a display device provided in an embodiment of the present application.

[0144] The present application embodiment provides a display device 02, such as Fig.12 As shown, the display device 02 includes the display panel 01 provided in the above embodiment. Exemplarily, the display device 02 is an electronic device such as a mobile phone, a computer, a television, a car display, a wearable display, etc., which is not specifically limited in this application.

[0145] In the display device 02, the first regulating voltage VH1 is set to be greater than the second regulating voltage VH2. The larger first regulating voltage VH1 can make the threshold voltage of the driving transistor Md in the first holding frame T2 more negative, which is beneficial to reducing the light-emitting driving current generated by the driving transistor Md in the first holding frame T2, thereby helping to reduce the brightness of the first holding frame T2.

[0146] When the display panel 01 can execute multiple low-frequency refresh frequencies, it is helpful to neutralize the increase in brightness of the first holding frame T2 caused by over-compensation of the luminous duration of the first holding frame T2 at a higher refresh frequency due to compensation of the luminous duration of the first holding frame T2 based on the lower refresh frequency. This is helpful to avoid the problem that the display frame brightness of the display panel 01 is greater than the display frame brightness at the basic frequency at these low refresh frequencies, and is helpful to improve the flickering problem when the display panel 01 switches from the basic frequency to the low refresh frequency, thereby improving the user experience.

[0147] Moreover, by allowing the first transistor M1 to transmit the first adjustment voltage VH1 to the driving transistor Md in the first holding frame T2 and transmit the second adjustment voltage VH2 to the driving transistor Md in the second holding frame T2, the difference between the bias state of the driving transistor Md in the first holding frame T2 and the second holding frame T3 and its bias state in the writing frame under the same refresh frequency can be improved, thereby reducing the brightness difference between the writing frame T1 and each holding frame, which is beneficial to improving the brightness uniformity of the display panel 01 in a display frame, and further beneficial to enabling the display panel 01 to maintain good brightness uniformity at each refresh frequency, thereby improving the flicker problem of the display panel 01 under a fixed frequency.

[0148] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A display panel, characterized in that: The method comprises a first driving mode, wherein a display frame of the first driving mode comprises a writing frame and a first holding frame and a second holding frame performed after the writing frame, wherein the first holding frame is located between the writing frame and the second holding frame; The display panel includes a plurality of sub-pixels, each of which includes a pixel circuit and a light-emitting device electrically connected to each other; The pixel circuit comprises: A driving transistor for generating a light-emitting driving current; a first transistor electrically connected to the driving transistor, the first transistor being used to transmit a first regulating voltage to the driving transistor in the first holding frame, and being used to transmit a second regulating voltage to the driving transistor in the second holding frame; Wherein, the first regulating voltage is greater than the second regulating voltage.

2. The display panel according to claim 1, characterized in that: In the writing frame, the first transistor is used to transmit a data voltage to the driving transistor.

3. The display panel according to claim 2, characterized in that: The first transistor has a first electrode electrically connected to the data signal line, a second electrode electrically connected to the first electrode of the driving transistor, and a gate electrically connected to the first control signal line.

4. The display panel according to claim 1, characterized in that: The difference between the first regulation voltage and the second regulation voltage is not greater than 1V.

5. The display panel according to claim 1, characterized in that: The pixel circuit further includes a second transistor, the second transistor being electrically connected to the first electrode of the light emitting device, the second transistor being used to transmit a first reset voltage to the first electrode of the light emitting device in the first holding frame, and being used to transmit a second reset voltage to the first electrode of the light emitting device in the second holding frame; The second reset voltage is greater than the first reset voltage.

6. The display panel according to claim 5, characterized in that: In the writing frame, the second transistor is used to transmit a first initialization voltage to the first electrode of the light-emitting device, and the first initialization voltage is greater than the second reset voltage.

7. The display panel according to claim 6, characterized in that: The first electrode of the second transistor is electrically connected to the first initialization signal line, the second electrode is electrically connected to the first electrode of the light emitting device, and the gate is electrically connected to the first control signal line.

8. The display panel according to claim 5, characterized in that: The second transistor has the same turn-on period as the first transistor.

9. The display panel according to claim 5, characterized in that: The difference between the second reset voltage and the first reset voltage is not greater than 1V.

10. The display panel according to claim 1, characterized in that: The display frame of the first driving mode further includes a third holding frame, and the third holding frame is performed after the second holding frame; In the third holding frame, the first transistor is used to transmit a third regulation voltage to the driving transistor, and the third regulation voltage is less than the first regulation voltage.

11. The display panel according to claim 10, characterized in that: The third regulation voltage is equal to the second regulation voltage.

12. The display panel according to claim 10, characterized in that: The third regulation voltage is less than the second regulation voltage.

13. The display panel according to claim 5, characterized in that: The display frame of the first driving mode further includes a third holding frame, and the third holding frame is performed after the second holding frame; In the third holding frame, the second transistor is used to transmit a third reset voltage to the first electrode of the light emitting device, and the third reset voltage is greater than the first reset voltage.

14. The display panel according to claim 13, characterized in that: The third reset voltage is equal to the second reset voltage.

15. The display panel according to claim 13, characterized in that: The third reset voltage is greater than the second reset voltage.

16. The display panel according to claim 1, characterized in that: The display panel further includes a second driving mode, and a display frame of the second driving mode includes the writing frame and the first holding frame; The pixel circuit further includes a second transistor, the second transistor being electrically connected to the first electrode of the light emitting device, the second transistor being used to transmit a first initialization voltage to the first electrode of the light emitting device in the writing frame, and being used to transmit a first reset voltage to the first electrode of the light emitting device in the first holding frame; The first reset voltage is lower than the first initialization voltage.

17. The display panel according to claim 16, characterized in that: A difference between the first reset voltage and the first initialization voltage is not greater than 1V.

18. A method for driving a display panel, characterized in that: Used to drive the display panel according to any one of claims 1 to 17; the method comprising: In the first hold frame, the first transistor transmits a first regulation voltage to the drive transistor; In the second hold frame, the first transistor transmits a second regulation voltage to the driving transistor; Wherein, the first regulating voltage is greater than the second regulating voltage.

19. The driving method according to claim 18, characterized in that: The pixel circuit further includes a second transistor, and the second transistor is electrically connected to the first electrode of the light emitting device; and the driving method further includes: In the first holding frame, the second transistor transmits a first reset voltage to the first electrode of the light emitting device; In the second holding frame, the second transistor transmits a second reset voltage to the first electrode of the light emitting device; Wherein, the second reset voltage is greater than the first reset voltage.

20. A display device, characterized in that: Comprising a display panel as described in any one of claims 1-17.

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