Chip-to-chip waveguide and contactless chip-to-chip communication

Abstract

A wireless chip-to-chip device includes a first semiconductor substrate including a first antenna configured to transmit a radio frequency signal; a second semiconductor substrate including a second antenna and configured to receive a radio frequency signal; and a waveguide positioned between the first semiconductor substrate and the second semiconductor substrate.

Description

Technical Field

[0001] Various aspects of the present disclosure generally relate to waveguides for contactless chip-to-chip communications. Background Art

[0002] Products developed via three-dimensional (3D) heterogeneous core integration are becoming more and more common because they can provide improved performance and cost efficiency compared to monolithic integration. However, this 3D heterogeneous core integration traditionally relies on wired interposers or wired bridges to electrically connect multiple cores. Although interposers allow high interconnection density, they can be expensive and cannot be well scaled for large-scale 3D integration. In addition, their data rates may be limited to a range of 2Gbps to 10Gbps. In implementations where, for example, it is desired to create aggregate data transmission of 1Tbps or more between cores, interposers require 100 to 500 transmission lines with extremely fine spacing. This not only increases design complexity and cost, but also reduces yield.

[0003] Wireless chip-to-chip connections can simplify designs because they eliminate some or all of the need for chip-to-chip wire connections. Unfortunately, wireless chip-to-chip connections often result in crosstalk and interference, which can increase communication complexity and / or reduce data rates. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] In the accompanying drawings, similar reference numerals generally refer to the same parts throughout the different views. The drawings are not necessarily to scale, and emphasis is generally placed on illustrating the exemplary principles of the present disclosure. In the following description, various exemplary embodiments of the present disclosure are described with reference to the following drawings, in which:

[0005] Figure 1 A wireless chip-to-chip arrangement with crosstalk interference is depicted;

[0006] Figure 2 The noise power in the real domain is depicted;

[0007] Figure 3 Depicts at least 30 dB of stream-to-stream isolation in the transmit channel;

[0008] Figure 4 A wireless chip-to-chip device is depicted;

[0009] Figure 5 Various exemplary configurations of a plurality of first reflectors and a plurality of second reflectors are depicted;

[0010] Figure 6 depicts a multi-port package for a chip-to-chip device;

[0011] Figure 7The simulated electric field distribution of four pseudo-independent channels using the waveguide structure is depicted;

[0012] Figure 8 Depicts a system with four simultaneously active channels Figure 7 structure;

[0013] Fig. 9 depicts an alternative structure utilizing multiple through-holes to construct a single reflector element;

[0014] Fig.10 depicts a chip-to-chip structure with monolithic die and non-monolithic die;

[0015] Fig.11 depicts a configuration with optional conductive connections between chips;

[0016] Fig.12 depicts a multi-die stack for a die-to-die arrangement;

[0017] Fig.13 depicts an alternative configuration in which a waveguide is coupled to an integrated heat sink; and

[0018] Fig.14 An optional configuration is depicted in which the waveguides are configured as a 1-to-2 waveguide. DETAILED DESCRIPTION

[0019] The following detailed description refers to the accompanying drawings that show, by way of illustration, exemplary details and embodiments in which aspects of the disclosure may be practiced.

[0020] The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any embodiment or design described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments or designs.

[0021] Throughout the drawings, it should be noted that like reference numbers are used to depict the same or similar elements, features, and structures, unless otherwise noted.

[0022] The phrases "at least one" and "one or more" may be understood to include numerical quantities greater than or equal to one (e.g., one, two, three, four, [...], etc.). The phrase "at least one of" with respect to a set of elements may be used herein to mean at least one element from the group consisting of the elements. For example, the phrase "at least one of" with respect to a set of elements may be used herein to mean a selection of: one of the listed elements, one of a plurality of the listed elements, a plurality of individual listed elements, or a plurality of elements from a plurality of individual listed elements.

[0023] The words "plurality" and "multiple" in the specification and claims clearly refer to quantities greater than one. Therefore, any phrase that explicitly invokes the above words to refer to a quantity of elements (e.g., "plurality (elements)", "multiple (elements)") clearly refers to more than one of the elements. For example, the phrase "plurality" can be understood to include a numerical quantity greater than or equal to two (e.g., two, three, four, five, [...], etc.).

[0024] The phrases "group", "set", "collection", "series", "sequence", "grouping", etc. in the specification and claims, if any, refer to a number equal to or greater than one, that is, one or more. The terms "proper subset", "reduced subset" and "smaller subset" refer to a subset of a set that is not equal to the set, and as an example, refer to a subset of a set that contains fewer elements than the set.

[0025] The term "data" when used herein may be understood to include information in any suitable analog or digital form, for example, information provided in the form of a file, a portion of a file, a group of files, a signal or stream, a portion of a signal or stream, a group of signals or streams, or the like. In addition, the term "data" may also be used to refer to a reference to information, for example, in the form of a pointer. However, the term "data" is not limited to the above examples, but may take various forms and represent any information understood in the art.

[0026] For example, the term "processor" or "controller" used herein may be understood as any kind of technical entity that allows the handling of data. Data may be handled according to one or more specific functions performed by a processor or controller. In addition, a processor or controller used herein may be understood as any kind of circuit, for example, any kind of analog or digital circuit. A processor or controller may thus be or may include an analog circuit, a digital circuit, a mixed signal circuit, a logic circuit, a processor, a microprocessor, a central processing unit (CPU), a graphics processing unit (GPU), a digital signal processor (DSP), a field programmable gate array (FPGA), an integrated circuit, an application specific integrated circuit (ASIC), etc., or any combination of these. Any other kind of implementation of each function described in more detail below may also be understood as a processor, a controller or a logic circuit. It is to be understood that any two (or more) of the processors, controllers, or logic circuits detailed herein may be implemented as a single entity having equivalent functionality, and conversely, any single processor, controller, or logic circuitry detailed herein may be implemented as two (or more) separate entities having equivalent functionality.

[0027] As used herein, "memory" is understood to be a computer-readable medium (e.g., a non-transitory computer-readable medium) in which data or information can be stored for retrieval. References to "memory" included herein may be understood to refer to volatile or non-volatile memory, including random access memory (RAM), read-only memory (ROM), flash memory, solid-state storage device, tape, hard drive, optical drive, 3DXPointTM, etc., or any combination of these. Registers, shift registers, processor registers, data buffers, etc. are also encompassed by the term memory in this article. The term "software" refers to any type of executable instructions, including firmware.

[0028] Unless explicitly stated, the term "send" covers both direct transmission (point to point) and indirect transmission (via one or more intermediate points). Similarly, the term "receive" covers both direct reception and indirect reception. In addition, the terms "send", "receive", "communication" and other similar terms cover both physical transmission (e.g., transmission of radio signals) and logical transmission (e.g., transmission of digital data connected via logical software level). For example, a processor or controller can send or receive data in the form of radio signals with another processor or controller via a software level connection, wherein the physical transmission and reception are handled by radio layer components such as RF transceivers and antennas, and the logical transmission and reception via software level connection is performed by the processor or controller. The term "communication" covers one or both of transmission and reception, i.e., unidirectional or bidirectional communication in one or both of the incoming and outgoing directions. The term "computation" covers both "direct" calculations via mathematical expressions / formulas / relationships and "indirect" calculations via lookups or hash tables and other array indexing or search operations.

[0029] The term "adjacent" is intended to mean "beside" but is not necessarily intended to indicate "in contact". That is, two objects may be described as being "adjacent" to each other, but this is not necessarily to be understood as indicating that the two objects are in physical contact with each other. For example, two waveguides that are adjacent should be understood to be beside each other, but not necessarily in contact with each other. A substrate and waveguide that are described as being adjacent may be beside each other by having a small gap between them.

[0030] Figure 1 A wireless chip-to-chip arrangement with crosstalk interference is depicted. In this example, a first chip 102 has four communication ports (port 1 is labeled 106 and port 2 is labeled 108). A second chip 104 also has 4 communication ports (port 5 is labeled 110). The first chip 102 attempts to communicate from port 1 106 to port 5 110 by sending a first electromagnetic signal 112. The first chip 102 simultaneously sends a second electromagnetic signal 114 from port 2 108 to port 6 (not labeled, but directly below port 5 110). The second electromagnetic signal 114 is partially transmitted through and / or around a waveguide 116, but in the absence of sufficient isolation between the waveguide 116 and adjacent waveguides, the second electromagnetic signal 114 interferes with the first electromagnetic signal 112.

[0031] Additional isolation between transmission channels represents a trade-off, as increased isolation is necessary for some high-speed communications, but it also increases cost and design complexity. Therefore, it is necessary to determine the preferred degree of isolation between channels.

[0032] Considering grayscale coded 16 quadrature amplitude modulation (QAM) on an additive white Gaussian noise (AWGN) channel, the exact bit error rate (BER) is given by:

[0033]

[0034] where d min is the distance between two constellation points, and is the error power in the real domain. The average transmitted symbol power E s You can press d min writing:

[0035]

[0036] The error vector magnitude (EVM) is then given by:

[0037]

[0038] The bit error rate (BER) expressed in terms of EVM is as follows:

[0039]

[0040] However, this example channel does not have AWGN. Rather, it has distortion due to interference from the cross links. Therefore, it is necessary to calculate the real domain error power with the distortion The real noise power with distortion is expressed as The EVM with distortion can then be shown as:

[0041]

[0042] Figure 2 The noise power for all constellations in the real domain is plotted (depicted by arrows). The maximum power is selected and the BER and EVM are calculated with distortion. It is worth noting that the main errors here come from the corner points. There is also some maximization bias due to the worst-case distortion scenario. Thus, it can be considered that the 4×10 -12 BER is equal to 10 -12 BER, equivalent to -23.8dB EVM d .

[0043] By varying the isolation level difference between direct and cross channels, it was observed that at least 30-dB stream-to-stream isolation was achieved with the target -23.8dB EVM. d ,like Figure 3 Thus, with -23.8dB EVM d A single channel can achieve 186.7 Gb / s with 16QAM modulation without additional framing and coding overhead. Therefore, channels with more than 30-dB stream-to-stream isolation can be treated as pseudo-independent channels, and the throughput of these channels can be aggregated. For example, supporting 1+Tbps aggregate throughput in the 110-170 GHz frequency range would require an array of seven contactless waveguides.

[0044] In addition to channel isolation, it is also necessary to select the appropriate antenna configuration for data transmission. Vertically polarized couplers allow for improved operating bandwidth and higher efficiency compared to horizontally polarized couplers; however, mounting vertically polarized couplers into the die presents significant challenges given that the metal layer thickness is typically less than 20μm. Given the trade-off between Sub-THz coupler height and performance, the theoretical minimum height of a Sub-THz coupler is approximately 100μm, but in practice will need to be higher than 100μm as the performance of typical coupler designs (patches, PIFAs, dipole couplers) may be well below the theoretical limit curve. In addition, additional losses from materials near the coupler must also be considered.

[0045] Given the height requirements of such vertically polarized couplers (>100 μm), it may be desirable to implement the antenna within the substrate. The coupler may be implemented using a through-substrate antenna inside the substrate to meet maximum channel loss requirements. According to one aspect of the present disclosure, the through-substrate antenna may be configured as a through-hole (e.g., a through-silicon via).

[0046] Figure 4 A wireless chip-to-chip device with a substrate-implemented antenna and waveguide according to an aspect of the present disclosure is depicted. The wireless chip-to-chip device may include a packaging substrate 402. The wireless chip-to-chip device includes a first substrate 404a and a second substrate 404b. Each of the first substrate 404a and the second substrate 404b may be made of or include silicon, metal oxides, glass, III-V materials (GaN, InP, GaAs), or any combination thereof.

[0047] The first substrate 404a may include a first antenna 412 configured to transmit radio frequency signals; the second substrate 404b may include a second antenna 414, which may be configured to receive radio frequency signals.

[0048] The wireless chip-to-chip device may also include a waveguide 416, positioned between the first silicon substrate 404a and the second silicon substrate 404b. That is, the waveguide may be located between the tube cores, with a small gap (typically <150μm or less than the bump pitch) between the edge of the tube core and the edge of the waveguide. The waveguide can optionally be loaded with material (relative dielectric constant εr≥1 and / or relative magnetic permeability μr≥1). The waveguide may be hollow, for example, the waveguide is filled with air (e.g., an air medium). The small gap between each tube core and the waveguide may be a space gap or a hollow gap (e.g., filled with air), or may be filled with a bottom fill material. Such a bottom fill material may optionally be or include one or more magnetic dielectric materials. For the purposes of the present disclosure, a magnetic dielectric material may be understood as a material having a relative magnetic permeability and a dielectric constant both>1, while a dielectric material exhibits a dielectric constant>1 and a relative magnetic permeability=1. The relative dielectric constant and magnetic permeability exhibited by the air medium are both 1.

[0049] In one configuration, the waveguide 416 can be configured to be excited with the fundamental TE mode as the dominant mode. In this way, the cutoff frequency is mainly limited by the width of the waveguide, rather than the height, which may be advantageous. Dielectric materials can be selected to load the waveguide, but material discontinuities may increase the difficulty of broadband operation. This may be particularly the case when the gap is not filled with an underfill material that matches the waveguide loading material. Thus, a magneto-dielectric material (relative dielectric constant ε ) can be used. r = relative magnetic permeability μ r ) to alleviate the discontinuity problem and minimize the size of the waveguide.

[0050] Arrays of waveguides can be formed in horizontal (xy; side-to-side placement) and / or vertical (z: top-to-bottom placement; stacked) planes to increase aggregate throughput, resulting in a stream-to-stream isolation of at least 30 dB between waveguides. These high isolation waveguides form pseudo-independent channels, reducing crosstalk / interference and improving BER.

[0051] According to one aspect of the present disclosure, the waveguide structure can be manufactured using multiple layers of low temperature co-fired ceramic (LTCC) or high temperature co-fired ceramic (HTCC). Alternatively, the waveguide can be formed by selectively metallizing various substrates (e.g., quartz, glass, etc.). The waveguide loading material can be the same as the material of the main substrate, or it can also be made hollow and filled with another dissimilar material.

[0052] The wireless chip-to-chip device may optionally further include a first magnetic dielectric material 419 between the first silicon substrate 404a and the waveguide 416 and / or a second magnetic dielectric material 420 between the second silicon substrate 404b and the waveguide 416. The wireless chip-to-chip device may be configured to propagate a wireless signal 418 from the first antenna 412 to the second antenna 414 through the waveguide 416.

[0053] According to an aspect of the present disclosure, the first antenna 412 and the second antenna 414 may be polarized along an axis perpendicular to an axis passing through the first silicon substrate 404a, the waveguide 416, and the second silicon substrate 404b. That is, the first antenna 412 and the second antenna 414 may be vertically polarized.

[0054] In an exemplary configuration, the first antenna 412 and the second antenna 414 may be parallel to each other. That is, they may be arranged to have the same polarization, thereby improving the transmission and reception of corresponding electromagnetic signals.

[0055] According to one aspect of the present disclosure, the outer portion of the waveguide 416 may include a metal layer. In one exemplary configuration, the metal may be copper. However, the metal is not limited to copper, but may be any metal. The addition of the metal layer may further electromagnetically isolate the waveguide from adjacent waveguides, thereby preventing or reducing crosstalk or interference.

[0056] According to one aspect of the present disclosure, the interior portion of the waveguide may include a dielectric material. In an exemplary configuration, the dielectric material may be air. Alternatively, other dielectric materials may be used. A non-exhaustive list of such potential dielectric materials includes glass, lithium niobate (LiNbO3), indium gallium arsenic phosphide / indium phosphide (InGaAsP / InP), aluminum gallium arsenide / gallium arsenide (AlGaAs / GaAs), and silicon dioxide.

[0057] According to an aspect of the present disclosure, the first silicon substrate 404a may further include a plurality of first reflectors 410; wherein at least one of the plurality of first reflectors is positioned opposite the waveguide 416 relative to the first antenna 412. That is, the first antenna 412 is positioned between at least one (e.g., possibly more than one, or possibly all) first reflectors 410 and the waveguide. In an exemplary configuration, the plurality of first reflectors 410 may be a plurality of through-holes (e.g., metal through-holes, through-silicon through-holes, through-substrate through-holes, etc.).

[0058] Similarly, the second silicon substrate 404b may also include a plurality of second reflectors 411; wherein at least one of the plurality of second reflectors is positioned opposite the waveguide 416 relative to the second antenna 414. That is, the second antenna 414 is positioned between at least one (e.g., possibly more than one, or possibly all) second reflectors 411 and the waveguide. In an exemplary configuration, the plurality of second reflectors 411 may be a plurality of through-holes (e.g., metal through-holes, through-silicon through-holes, through-substrate through-holes, etc.).

[0059] Various arrangements of the plurality of first reflectors and the plurality of second reflectors are possible. In principle, the arrangement of the plurality of first reflectors in the plurality of second reflectors can be selected to reflect the radio frequency signal from the first antenna toward the waveguide and / or to reflect the radio frequency signal from the waveguide toward the second antenna.

[0060] Figure 5Various exemplary configurations of a plurality of first reflectors 410 and a plurality of second reflectors 411 are depicted. In a first exemplary configuration, each of the plurality of first reflectors 410 and the plurality of second reflectors 411 may be arranged along an axis perpendicular to the longitudinal axis of the waveguide, as depicted in 502. In a second exemplary configuration, the plurality of first reflectors includes a first subgroup of first reflectors and a second subgroup of first reflectors; wherein the first subgroup of first reflectors is arranged along a first axis; wherein the second subgroup of first reflectors is arranged along a second axis; and wherein each of the first axis and the second axis is at an angle of less than 90 degrees relative to the longitudinal axis of the waveguide, as depicted in 504. In a third exemplary configuration, the plurality of first reflectors includes a first subgroup of first reflectors, a second subgroup of first reflectors, and a third subgroup of first reflectors; wherein the first subgroup of first reflectors is arranged along a first axis perpendicular to the longitudinal axis of the waveguide; and wherein the second subgroup of first reflectors and the third subgroup of first reflectors are each arranged along an axis parallel to the longitudinal axis of the waveguide, as depicted in 506. In a fourth exemplary configuration, the plurality of first reflectors include a first subgroup of first reflectors, a second subgroup of first reflectors, and a third subgroup of first reflectors; wherein the first subgroup of first reflectors is arranged along a first axis perpendicular to the longitudinal axis of the waveguide; and wherein each of the second subgroup of first reflectors and the third subgroup of first reflectors is arranged along a curve such that the distance between the reflectors of the second subgroup of first reflectors or the third subgroup of first reflectors and the longitudinal axis of the waveguide increases as the distance between the reflectors and the waveguide decreases, as depicted in 508. The exemplary configurations of reflectors listed above are intended as a non-exhaustive list, and other arrangements may also be selected for a given implementation. In other words, a non-exhaustive list of potential shapes includes a "flat" shape 502, a rotated "V" shape 504, a rotated "U" shape 506, or other polygonal shapes (e.g., as in 508). The polygonal shape in 508 represents an optional shape in which the spacing between the reflectors and the reflector through-holes has been optimized to broaden the operating bandwidth and isolation between adjacent couplers. Other shapes not depicted herein may be used. One skilled in the art may use one or more optimization algorithms, such as genetic algorithms, particle swarm optimization, covariance matrix adaptation evolution strategy (CMAES), or other algorithms to derive alternative shapes.

[0061] Figure 6A multi-port package of a chip-to-chip device according to an aspect of the present disclosure is depicted. In this multi-port package, a wireless chip-to-chip device is depicted as having a first chip with ports P1, P2, P3, and P4, and a second chip with ports P5, P6, P7, and P8. Four pseudo-isolated channels are created using the waveguide structure disclosed herein, such that each of a first channel between P1 and P5, a second channel between P2 and P6, a third channel between P3 and P7, and a fourth channel between P4 and P8 is isolated from its adjacent channels (e.g., pseudo-isolated, with at least 30 dB of isolation).

[0062] Figure 7 Depicted are the simulated electric field distributions for four pseudo-independent channels using the waveguide structure disclosed herein. Figure 7 In the example, only channel 2 (eg, including P2 and P6) is activated. It can be seen that the isolation between this channel and its adjacent channels is greater than 30 dB. Figure 8 The same structure is depicted, but with each of channels 1 (P1 and P5), 2 (P2 and P6), 3 (P3 and P7), and 4 (P4 and P8) activated. It can be seen that adjacent channels are isolated from each other and there is essentially no crosstalk / interference from adjacent channels. Figure 8 In the simulation of the 4-channel waveguide model shown, when operating in the frequency range of 110-170 GHz, and where the waveguide is filled with an underfill material (ε r =3.38 and tanδδ=0.016), the conductivity of the silicon substrate is assumed to be 10S / m, and the reflection coefficient at the coupler excitation port is less than -10dB for the entire D-band (110-170GHz). The direct link signal level between the dies with a 1-mm separation distance is about -8dB on average. The stream-to-stream isolation (amplitude difference between the direct link and the cross link) is higher than 40dB.

[0063] The interference between adjacent waveguide channels is low enough that the waveguide structure disclosed herein essentially creates pseudo-independent channels. Figure 8 This is demonstrated by simulations of the electric field distribution in . The data throughput of these channels can be seamlessly aggregated, and the number of pseudo-independent channels can be scaled in all 3-dimensional directions (i.e., x, y, and z directions) to achieve heterogeneous core particle integration.

[0064] Fig. 9An alternative structure for constructing a single reflector element using multiple through-holes is depicted. In this figure, each of the first substrate and the second substrate includes multiple reflectors as disclosed above. In this exemplary configuration, the reflector is / includes a through-hole (e.g., a through-silicon via). A portion of the reflector structure is arbitrarily selected, and an exploded view of this reflector structure is indicated by an arrow. It can be seen that this reflector structure includes multiple through-holes that are placed sufficiently close together to be equivalent to creating a single structure. Since there are techniques for placing through-holes within a substrate with a high degree of accuracy, in some implementations, it may be desirable to group multiple through-holes together in close proximity to create a reflector structure. It is worth noting that although this technology is described herein with respect to through-holes, it can also be used alternatively for any other metal structure, such as a wire, a column, a metal trace, or others.

[0065] Fig.10 A chip-to-chip structure as described above with a monolithic die and a non-monolithic die is depicted. In this figure, the chip-to-chip device includes a first silicon substrate 1004 as part of a monolithic die as described above. Instead of a second substrate as described above, the chip-to-chip device may include two or more layers, as shown at 1010 and 1012. In this case, 1010 may be a silicon, glass, or organic substrate, and 1012 may be a silicon substrate. Each of 1010 and 1012 may include an antenna (e.g., a through hole, etc.). These antennas may be connected at the interface of 1010 and 1012 using a bond 1008. Bond 1008 may be or include a hybrid bond, a direct bond, or any other bonding method.

[0066] Fig.11 A configuration with optional conductive connections between chips is depicted. In such a configuration, a contactless chip-to-chip arrangement as described herein may be supplemented or enhanced with wired connections 1102, such as embedded multi-die interconnect bridges. In certain configurations, one or more chips (e.g., Fig.11The chip to the right of the waveguide in the multi-chip structure (e.g., the chip to the right of the waveguide in the multi-chip structure) may be able to connect to one or more chips via the waveguide disclosed herein, but also requires connection to one or more additional chips for which waveguide connection is not feasible or desirable. In this exemplary configuration, the multi-chip structure includes a first DRAM die 1104, a second DRAM die 1106, and a computing die 1108. Each of 1104, 1106, and 1108 is connected to a wired interconnect 1102, such as by face-to-face microbumps 1110. In this configuration, in addition to the contactless chip-to-chip communication described elsewhere herein (e.g., on the left and right sides of the waveguide), each of 1104, 1106, and 1108 also sends and / or receives signals to other chips (e.g., the chip depicted to the right of the waveguide) via the wired interconnect 1102.

[0067] Fig.12 A multi-chip stack of a chip-to-chip arrangement connected with multiple waveguides and optional couplers (the waveguides and optional couplers are depicted as 1201) according to one aspect of the present disclosure is depicted. In this example, the multi-chip stack includes two vertical columns of chips. For illustrative purposes, the number of chips in each column is three, but any number of chips in the stack is contemplated. According to the principles and methods disclosed herein, there are three contactless communication channels, such that 1206 and 1212 share an isolated contactless channel through a first waveguide; 1204 and 1210 share an isolated contactless channel through a second waveguide; and 1202 and 1208 share an isolated contactless channel through a third waveguide. In addition, the chips are optionally connected through Fig.11 The chip may optionally include an integrated heat sink 1216, which may optionally be connected to the chip stack via a thermal interface material 1218.

[0068] Of course, the waveguide does not have to be placed on the package substrate, but can be placed along or against one or more other package surfaces. Fig.13 An alternative configuration of waveguide coupling with an integrated heat sink is depicted. In this manner, chips 1302 and 1304 share an isolated contactless channel via waveguide 1306 , which is connected to integrated heat sink 1216 , optionally via thermal interface material 1218 , for example.

[0069] Fig.14An optional configuration is depicted in which the waveguides are configured as 1-to-2 waveguides. In this configuration, the 1-to-2 waveguide 1402 connects the chip 1404 on the left with the chips 1406 and 1408 on the right. In this way, transmissions from 1404 can be received by 1406 and 1408. Conversely, transmissions from either 1408 or 1406 are received by 1404. In such a design, it may be desirable to include one or more communication protocols to establish the intended recipient of the communication. For example, an identifier of the intended chip recipient may be included in the package header. As with other configurations, some or all chips may be additionally connected via wired interconnect 1410. The 1-to-2 waveguide configuration may include a third silicon substrate above or below the second silicon substrate and a third magnetic dielectric material adjacent to the third silicon substrate; and wherein the waveguide has a first opening adjacent to the first magnetic dielectric material, a second opening adjacent to the second magnetic dielectric material, and a third opening adjacent to the third magnetic dielectric material. Further, the 1-to-2 waveguide concept can be extended to reflect the n-to-m waveguide concept, where n and m are integers and n≠m. In this way, 1-to-3, 1-to-4, 1-to-5, etc. waveguides can be realized. Similarly, any of the above waveguide configurations can be reversed so that a 1-to-2 waveguide becomes a 2-to-1 waveguide, and so on.

[0070] Further aspects of the present disclosure will now be demonstrated by way of examples.

[0071] In Example 1, a wireless chip-to-chip device includes: a first silicon substrate, which includes a first antenna, which is configured to transmit a radio frequency signal; a second silicon substrate, which includes a second antenna and is configured to receive the radio frequency signal; and a waveguide positioned between the first silicon substrate and the second silicon substrate.

[0072] In Example 2, the wireless chip-to-chip device of Example 1 further includes a first magnetic dielectric material between the first silicon substrate and the waveguide; and a second magnetic dielectric material between the second silicon substrate and the waveguide.

[0073] In Example 3, the wireless chip-to-chip device of Example 1 or 2, wherein the first antenna and the second antenna are polarized along an axis that is perpendicular to an axis passing through the first silicon substrate, the waveguide, and the second silicon substrate.

[0074] In Example 4, the wireless chip-to-chip device of any of Examples 1 to 3, wherein the outer portion of the waveguide includes a metal layer.

[0075] In Example 5, the wireless chip-to-chip device of any of Examples 1 to 4, wherein the inner portion of the waveguide includes a dielectric material.

[0076] In Example 6, the wireless chip-to-chip device as described in any one of Examples 1 to 5, wherein the first silicon substrate also includes a plurality of first reflectors; wherein at least one of the plurality of first reflectors is positioned opposite the waveguide relative to the first antenna.

[0077] In Example 7, the wireless chip-to-chip device of Example 6, wherein the plurality of first reflectors are a plurality of through-holes.

[0078] In Example 8, the wireless chip-to-chip device of Example 6 or 7, wherein the plurality of first reflectors are arranged to reflect the radio frequency signal of the first antenna toward the waveguide.

[0079] In Example 9, the wireless chip-to-chip device as described in any one of Examples 1 to 8, wherein the second silicon substrate further includes a plurality of second reflectors; wherein at least one of the second reflectors is positioned opposite the waveguide relative to the second antenna.

[0080] In Example 10, the wireless chip-to-chip device of Example 9, wherein the plurality of second reflectors are a plurality of through-holes.

[0081] In Example 11, the wireless chip-to-chip device of Example 9 or 10, wherein the plurality of second reflectors are arranged to reflect the radio frequency signal of the second antenna toward the waveguide.

[0082] In Example 12, the wireless chip-to-chip device of any one of Examples 1 to 11, wherein the first antenna and the second antenna are parallel to each other.

[0083] In Example 13, the wireless chip-to-chip device of any one of Examples 6 to 12, wherein each of the plurality of first reflectors and the plurality of second reflectors is arranged along an axis perpendicular to a longitudinal axis of the waveguide.

[0084] In Example 14, a wireless chip-to-chip device as described in any one of Examples 6 to 12, wherein the plurality of first reflectors include a first subgroup of first reflectors and a second subgroup of first reflectors; wherein the first subgroup of the first reflectors is arranged along a first axis; wherein the second subgroup of the first reflectors is arranged along a second axis; and wherein each of the first axis and the second axis is at an angle less than 90 degrees relative to a longitudinal axis of the waveguide.

[0085] In Example 15, a wireless chip-to-chip device as described in any one of Examples 6 to 12, wherein the plurality of first reflectors include a first subgroup of first reflectors, a second subgroup of first reflectors, and a third subgroup of first reflectors; wherein the first subgroup of first reflectors is arranged along a first axis perpendicular to the longitudinal axis of the waveguide; and wherein the second subgroup of first reflectors and the third subgroup of first reflectors are each arranged along an axis parallel to the longitudinal axis of the waveguide.

[0086] In Example 16, a wireless chip-to-chip device as described in any one of Examples 6 to 12, wherein the plurality of first reflectors include a first subgroup of first reflectors, a second subgroup of first reflectors, and a third subgroup of first reflectors; wherein the first subgroup of first reflectors is arranged along a first axis perpendicular to the longitudinal axis of the waveguide; and wherein each of the second subgroup of first reflectors and the third subgroup of first reflectors is arranged along a curve so that a distance between a reflector of the second subgroup of first reflectors or the third subgroup of first reflectors and the longitudinal axis of the waveguide increases as the distance between the reflector and the waveguide decreases.

[0087] In Example 17, the wireless chip-to-chip device as described in any one of Examples 1 to 16 further includes a third silicon substrate above or below the second silicon substrate and a third magnetic dielectric material adjacent to the third silicon substrate; and wherein the waveguide has a first opening adjacent to the first magnetic dielectric material, a second opening adjacent to the second magnetic dielectric material, and a third opening adjacent to the third magnetic dielectric material.

[0088] In Example 18, the wireless chip-to-chip device of any one of Examples 1 to 17 further includes one or more conductive connections between the first silicon substrate and the second silicon substrate.

[0089] In Example 19, the wireless chip-to-chip device of any one of Examples 1 to 18 further includes a metal layer on the waveguide.

[0090] In Example 20, the wireless chip-to-chip device of any one of Examples 1 to 19 further includes a groove on an outer surface of the waveguide.

[0091] In Example 21, a multi-chip package includes the first wireless chip-to-chip arrangement according to any one of Examples 1 to 20, and the second wireless chip-to-chip arrangement according to any one of Examples 1 to 20.

[0092] In Example 22, the multi-chip package of Example 21 further includes a substrate, wherein the first wireless chip-to-chip device and the second wireless chip-to-chip device are each mounted on the substrate.

[0093] In Example 23, the multi-chip package of Example 21 or 22, wherein the first wireless chip-to-chip arrangement includes a first material, and wherein the second wireless chip-to-chip arrangement includes a second material that is different from the first material.

[0094] In Example 24, a multi-chip package as described in any one of Examples 21 to 23, wherein the first wireless chip-to-chip device includes a first material between the first silicon substrate and the waveguide or between the second silicon substrate and the waveguide, wherein the second wireless chip-to-chip device includes a first material between the first silicon substrate and the waveguide or between the second silicon substrate and the waveguide; wherein the first material and the second material are different.

[0095] In Example 25, a wireless chip-to-chip device includes a first silicon substrate, which includes a first transmitting device for transmitting a radio frequency signal; a second silicon substrate, which includes a receiving device for receiving the radio frequency signal; and a waveguide device for guiding an electromagnetic signal from the first transmitting device to the second transmitting device.

[0096] In Example 26, the wireless chip-to-chip device as described in Example 25 further includes a first magnetic dielectric material between the first silicon substrate and the waveguide device; and a second magnetic dielectric material between the second silicon substrate and the waveguide device.

[0097] In Example 27, the wireless chip-to-chip device as described in Example 25 or 26, wherein the transmitting device and the receiving device are polarized along the following axis: the axis is perpendicular to the axis passing through the first silicon substrate, the waveguide device and the second silicon substrate.

[0098] In Example 28, the wireless chip-to-chip device of any one of Examples 25 to 27, wherein the outer portion of the waveguide device includes a metal layer.

[0099] In Example 29, the wireless chip-to-chip device of any one of Examples 25 to 28, wherein the inner portion of the waveguide device includes a dielectric material.

[0100] In Example 30, a wireless chip-to-chip device as described in any one of Examples 25 to 29, wherein the first silicon substrate also includes a plurality of first signal reflecting devices; wherein at least one of the plurality of first signal reflecting devices is positioned opposite the waveguide device relative to the transmitting device.

[0101] In Example 31, the wireless chip-to-chip device of Example 30, wherein the plurality of first signal reflecting devices are a plurality of through-vias.

[0102] In Example 32, the wireless chip-to-chip device as described in Example 30 or 31, wherein the plurality of first signal reflecting devices are arranged to reflect the radio frequency signal of the transmitting device toward the waveguide device.

[0103] In Example 33, a wireless chip-to-chip device as described in any one of Examples 25 to 32, wherein the second silicon substrate also includes a plurality of second signal reflecting devices; wherein at least one of the plurality of second signal reflecting devices is positioned opposite the waveguide device relative to the receiving device.

[0104] In Example 34, the wireless chip-to-chip device of Example 33, wherein the plurality of second signal reflecting devices are a plurality of through-vias.

[0105] In Example 35, the wireless chip-to-chip device as described in Example 33 or 34, wherein the plurality of second signal reflecting devices are arranged to reflect the radio frequency signal of the receiving device toward the waveguide device.

[0106] In Example 36, the wireless chip-to-chip device of any one of Examples 25 to 35, wherein the transmitting device and the receiving device are parallel to each other.

[0107] In Example 37, a wireless chip-to-chip device as described in any one of Examples 30 to 36, wherein each of the plurality of first signal reflecting devices and the plurality of second signal reflecting devices is arranged along an axis perpendicular to the longitudinal axis of the waveguide device.

[0108] In Example 38, a wireless chip-to-chip device as described in any one of Examples 30 to 36, wherein the plurality of first signal reflecting devices include a first subgroup of first signal reflecting devices and a second subgroup of first signal reflecting devices; wherein the first subgroup of the first signal reflecting devices is arranged along a first axis; wherein the second subgroup of the first signal reflecting devices is arranged along a second axis; and wherein each of the first axis and the second axis is at an angle less than 90 degrees relative to a longitudinal axis of the waveguide device.

[0109] In Example 39, a wireless chip-to-chip device as described in any one of Examples 30 to 36, wherein the plurality of first signal reflecting devices include a first subgroup of first signal reflecting devices, a second subgroup of first signal reflecting devices, and a third subgroup of first signal reflecting devices; wherein the first subgroup of the first signal reflecting devices is arranged along a first axis perpendicular to the longitudinal axis of the waveguide device; and wherein the second subgroup of the first signal reflecting devices and the third subgroup of the first signal reflecting devices are each arranged along an axis parallel to the longitudinal axis of the waveguide device.

[0110] In Example 40, a wireless chip-to-chip device as described in any one of Examples 30 to 36, wherein the plurality of first signal reflecting devices include a first subgroup of first signal reflecting devices, a second subgroup of first signal reflecting devices, and a third subgroup of first signal reflecting devices; wherein the first subgroup of the first signal reflecting devices is arranged along a first axis perpendicular to the longitudinal axis of the waveguide device; and wherein each of the second subgroup of the first signal reflecting devices and the third subgroup of the first signal reflecting devices is arranged along a curve so that the distance between a reflector of the second subgroup of the first signal reflecting devices or the third subgroup of the first signal reflecting devices and the longitudinal axis of the waveguide device increases as the distance between the reflector and the waveguide device decreases.

[0111] In Example 41, the wireless chip-to-chip device as described in any one of Examples 25 to 40 further includes a third silicon substrate above or below the second silicon substrate and a third magnetic dielectric material adjacent to the third silicon substrate; and wherein the waveguide device has a first opening adjacent to the first magnetic dielectric material, a second opening adjacent to the second magnetic dielectric material, and a third opening adjacent to the third magnetic dielectric material.

[0112] In Example 42, the wireless chip-to-chip device of any one of Examples 25 to 41 further includes one or more conductive connections between the first silicon substrate and the second silicon substrate.

[0113] In Example 43, the wireless chip-to-chip device of any one of Examples 25 to 42 further includes a metal layer on the waveguide device.

[0114] In Example 44, the wireless chip-to-chip device of any one of Examples 25 to 43 further includes a groove on an outer surface of the waveguide device.

[0115] In Example 45, a multi-chip package includes the first wireless chip-to-chip arrangement according to any one of Examples 1 to 44, and the second wireless chip-to-chip arrangement according to any one of Examples 1 to 44.

[0116] In Example 46, the multi-chip package of Example 45 further includes a substrate, wherein the first wireless chip-to-chip device and the second wireless chip-to-chip device are each mounted on the substrate.

[0117] In Example 47, the multi-chip package of Example 45 or 46, wherein the first wireless chip-to-chip arrangement comprises a first material, and wherein the second wireless chip-to-chip arrangement comprises a second material that is different from the first material.

[0118] In Example 48, a multi-chip package as described in any one of Examples 45 to 47, wherein the first wireless chip-to-chip device includes a first material between the first silicon substrate and the waveguide device or between the second silicon substrate and the waveguide device, wherein the second wireless chip-to-chip device includes a first material between the first silicon substrate and the waveguide device or between the second silicon substrate and the waveguide device; wherein the first material and the second material are different.

[0119] In Example 49, a method for manufacturing a wireless chip-to-chip device includes arranging a first antenna in a first silicon substrate, wherein the first antenna is configured to transmit a radio frequency signal; arranging a second antenna in a second silicon substrate, wherein the second antenna is configured to receive a radio frequency signal; and arranging a waveguide between the first silicon substrate and the second silicon substrate.

[0120] In Example 50, the method of claim 49 further includes disposing a first magnetic dielectric material between the first silicon substrate and the waveguide; and disposing a second magnetic dielectric material between the second silicon substrate and the waveguide.

[0121] In Example 51, the method of claim 49 or 50, wherein the first antenna and the second antenna are polarized along an axis that is perpendicular to an axis passing through the first silicon substrate, the waveguide, and the second silicon substrate.

[0122] In Example 52, the method of any one of claims 49 to 51 further includes disposing a metal layer on an outer portion of the waveguide.

[0123] In Example 53, the method of any one of claims 49 to 52 further includes arranging a dielectric material in an interior portion of the waveguide.

[0124] In Example 54, the method of any one of claims 49 to 53 further includes arranging a plurality of first reflectors in the first silicon substrate; wherein at least one of the plurality of first reflectors is positioned opposite the waveguide relative to the first antenna.

[0125] In Example 55, the method of claim 54, wherein the plurality of first reflectors are a plurality of through holes.

[0126] In Example 56, the method of claim 54 or 55, wherein the plurality of first reflectors are arranged to reflect the radio frequency signal of the first antenna toward the waveguide.

[0127] In Example 57, the method of any one of claims 49 to 56 further includes arranging a plurality of second reflectors in the second silicon substrate; wherein at least one of the second reflectors is positioned opposite the waveguide relative to the second antenna.

[0128] In Example 58, the method of claim 57, wherein the plurality of second reflectors are a plurality of through holes.

[0129] In Example 59, the method of claim 57 or 58 further includes arranging the plurality of second reflectors to reflect the radio frequency signal of the second antenna toward the waveguide.

[0130] In Example 60, the method of any one of claims 49 to 59, wherein the first antenna and the second antenna are parallel to each other.

[0131] In Example 61, the method of any one of claims 54 to 60 further includes arranging each of the plurality of first reflectors and the plurality of second reflectors along an axis perpendicular to the longitudinal axis of the waveguide.

[0132] In Example 62, the method of any one of claims 54 to 60, wherein the plurality of first reflectors includes a first subgroup of first reflectors and a second subgroup of first reflectors; wherein the first subgroup of first reflectors is arranged along a first axis; wherein the second subgroup of first reflectors is arranged along a second axis; and wherein each of the first axis and the second axis is at an angle less than 90 degrees relative to a longitudinal axis of the waveguide.

[0133] In Example 63, the method of any one of claims 54 to 60, wherein the plurality of first reflectors include a first subgroup of first reflectors, a second subgroup of first reflectors, and a third subgroup of first reflectors; wherein the first subgroup of first reflectors is arranged along a first axis perpendicular to the longitudinal axis of the waveguide; and wherein the second subgroup of first reflectors and the third subgroup of first reflectors are each arranged along an axis parallel to the longitudinal axis of the waveguide.

[0134] In Example 64, the method of any one of claims 54 to 60, wherein the plurality of first reflectors include a first subgroup of first reflectors, a second subgroup of first reflectors, and a third subgroup of first reflectors; wherein the first subgroup of first reflectors is arranged along a first axis perpendicular to the longitudinal axis of the waveguide; and wherein each of the second subgroup of first reflectors and the third subgroup of first reflectors is arranged along a curve so that the distance between a reflector of the second subgroup of first reflectors or the third subgroup of first reflectors and the longitudinal axis of the waveguide increases as the distance between the reflector and the waveguide decreases.

[0135] In Example 65, the method as described in any one of claims 49 to 64 further includes arranging a third silicon substrate above or below the second silicon substrate and arranging a third magnetic dielectric material adjacent to the third silicon substrate; and wherein the waveguide has a first opening adjacent to the first magnetic dielectric material, a second opening adjacent to the second magnetic dielectric material, and a third opening adjacent to the third magnetic dielectric material.

[0136] In Example 66, the method of any one of claims 49 to 65 further includes arranging one or more conductive connections between the first silicon substrate and the second silicon substrate.

[0137] In Example 67, the wireless chip-to-chip device of any one of Examples 1 to 44 further includes a heat sink, wherein the waveguide is disposed on the heat sink.

[0138] Although the above description and the associated drawings may depict components as separate elements, those skilled in the art will appreciate the various possibilities of combining or integrating discrete components into a single component. This may include combining two or more circuits to form a single circuit, mounting two or more circuits onto a common chip or housing to form an integrated element, executing discrete software components on a common processor core, etc. Conversely, those skilled in the art will recognize the possibility of separating a single element into two or more discrete elements, such as splitting a single circuit into two or more separate circuits, separating a chip or housing into discrete elements originally provided thereon, separating a software component into two or more parts and executing each part on a separate processor core, etc.

[0139] It is to be understood that the implementation of the method detailed herein is illustrative and thus is understood to be implemented in the corresponding device. Similarly, it is to be understood that the implementation of the device detailed herein is understood to be implemented as the corresponding method. It is thus to be understood that the device corresponding to the method detailed herein may include one or more components configured to perform each aspect of the related method.

[0140] All abbreviations defined in the above description also apply in all claims included herein.

Claims

1. A wireless chip-to-chip device, comprising: a first substrate including a first antenna configured to transmit a radio frequency signal; a second substrate comprising a second antenna configured to receive the radio frequency signal; as well as A waveguide is positioned between the first substrate and the second substrate.

2. The wireless chip-to-chip device of claim 1, wherein: Each of the first substrate and the second substrate includes any one of the following: silicon, metal oxide, glass, gallium nitride, indium phosphide, or gallium arsenide.

3. The wireless chip-to-chip device of claim 1 , further comprising: A first gap is defined between the first silicon substrate and the waveguide, and a second gap is defined between the second silicone substrate and the waveguide.

4. The wireless chip-to-chip device of claim 3, further comprising: a first magnetic dielectric material in the first gap; and a second magnetic dielectric material in the second gap.

5. The wireless chip-to-chip device of claim 1, wherein: The first antenna and the second antenna are polarized along an axis that is perpendicular to an axis passing through the first silicon substrate, the waveguide, and the second silicon substrate.

6. The wireless chip-to-chip device of claim 1, wherein: An outer portion of the waveguide includes a metal layer.

7. The wireless chip-to-chip device of claim 1, wherein: An inner portion of the waveguide includes a dielectric material.

8. The wireless chip-to-chip device according to any one of claims 1 to 7, wherein: The first silicon substrate further includes a plurality of first reflectors; wherein at least one of the plurality of first reflectors is positioned opposite the waveguide relative to the first antenna.

9. The wireless chip-to-chip device of claim 8, wherein: The plurality of first reflectors are a plurality of through holes.

10. The wireless chip-to-chip device of claim 8, wherein: The plurality of first reflectors are arranged to reflect the radio frequency signal of the first antenna toward the waveguide.

11. The wireless chip-to-chip device according to any one of claims 1 to 7, wherein: The second silicon substrate also includes a plurality of second reflectors; wherein at least one of the second reflectors is positioned opposite the waveguide relative to the second antenna.

12. The wireless chip-to-chip device of claim 11, wherein: The plurality of second reflectors are a plurality of through holes.

13. The wireless chip-to-chip device of claim 11, wherein: The plurality of second reflectors are arranged to reflect the radio frequency signal of the second antenna toward the waveguide.

14. The wireless chip-to-chip device of claim 7, wherein: Each of the plurality of first reflectors and the plurality of second reflectors is arranged along an axis perpendicular to a longitudinal axis of the waveguide.

15. The wireless chip-to-chip device of claim 7, wherein: The plurality of first reflectors include a first subgroup of first reflectors and a second subgroup of first reflectors; wherein the first subgroup of first reflectors is arranged along a first axis; wherein the second subgroup of first reflectors is arranged along a second axis; and wherein each of the first axis and the second axis is at an angle equal to or less than 90 degrees relative to the longitudinal axis of the waveguide.

16. The wireless chip-to-chip device of claim 7, wherein: The plurality of first reflectors include a first subgroup of first reflectors, a second subgroup of first reflectors, and a third subgroup of first reflectors; wherein the first subgroup of first reflectors is arranged along a first axis perpendicular to the longitudinal axis of the waveguide; and wherein the second subgroup of first reflectors and the third subgroup of first reflectors are each arranged along an axis parallel to the longitudinal axis of the waveguide.

17. The wireless chip-to-chip device of claim 7, wherein: The plurality of first reflectors include a first subgroup of first reflectors, a second subgroup of first reflectors, and a third subgroup of first reflectors; wherein the first subgroup of first reflectors is arranged along a first axis perpendicular to the longitudinal axis of the waveguide; and wherein each of the second subgroup of first reflectors and the third subgroup of first reflectors is arranged along a curve so that a distance between a reflector of the second subgroup of first reflectors or the third subgroup of first reflectors and the longitudinal axis of the waveguide increases as the distance between the reflector and the waveguide decreases.

18. The wireless chip-to-chip device according to any one of claims 1 to 7, further comprising: A third silicon substrate is disposed above or below the second silicon substrate; wherein the waveguide has a first opening adjacent to the first substrate, a second opening adjacent to the second substrate, and a third opening adjacent to the third substrate.

19. The wireless chip-to-chip device according to any one of claims 1 to 7, further comprising: One or more conductive connections between the first silicon substrate and the second silicon substrate.

20. The wireless chip-to-chip device according to any one of claims 1 to 7, further comprising: A metal layer on the waveguide.

21. The wireless chip-to-chip device according to any one of claims 1 to 7, further comprising: grooves on the outer surface of the waveguide.

22. A multi-chip package, comprising: A first wireless chip-to-chip arrangement according to any one of claims 1 to 7, and a second wireless chip-to-chip arrangement according to any one of claims 1 to 7.

23. The multi-chip package of claim 22, further comprising: A substrate, wherein the first wireless chip-to-chip device and the second wireless chip-to-chip device are each mounted on the substrate.

24. The multi-chip package of claim 22, wherein: The first waveguide has a first shape and the second waveguide has a second shape, the second shape being different from the first shape; or, wherein the first waveguide is made of a first material and wherein the second waveguide is made of a second material, the second material being different from the first material.

25. The multi-chip package of claim 22, wherein: The first wireless chip-to-chip device includes a first material between the first silicon substrate and the waveguide or between the second silicon substrate and the waveguide, wherein the second wireless chip-to-chip device includes a first material between the first silicon substrate and the waveguide or between the second silicon substrate and the waveguide; wherein the first material and the second material are different.

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