Fractional order circuit and method for adjusting parameters of fractional order circuit

Abstract

The invention discloses a fractional order circuit and a method for adjusting parameters of the fractional order circuit. The fractional order circuit comprises a signal processing circuit module, a negative voltage current source circuit module and a current sampling and displaying circuit module. The signal processing circuit module is used for receiving the adjusted bias current signal; the signal processing circuit module is also used for adjusting bias current values input into the N groups of operational amplifier circuits according to the adjusted bias current signals so as to adjust zero point values and pole point values of the N groups of operational amplifier circuits, so that the frequency range capable of meeting the fractional order property is enlarged; and / or, adjusting the proportion of the bias current values input into the N groups of operational amplifier circuits according to the adjusted bias current signals so as to adjust the amplitudes of the N groups of operational amplifier circuits, the supported external signal voltage range is enlarged; and the signal processing circuit module is also used for processing an external input signal according to the adjusted N groups of operational amplifier circuits to obtain an output signal, and the output signal is a signal meeting the fractional order property.

Description

Technical Field

[0001] The present application relates to the technical field of signal processing, and in particular to a fractional-order circuit and a method for adjusting parameters of the fractional-order circuit. Background Art

[0002] In the field of signal processing, frequency response curves are usually used to analyze signal quality. The various circuits used in the analysis process are generally classified as integer-order circuits. However, most studies have shown that fractional-order circuits can better reflect circuit characteristics than integer-order circuits. If fractional-order circuits are used in the analysis process, the required signals can be processed more accurately.

[0003] However, fractional-order circuits with independent structures do not exist in reality, and fractional-order circuits are generally approximated by circuit combinations.

[0004] There are many circuits that can meet the fractional-order property in current research. However, the circuits that can meet the fractional-order property in the prior art have a small frequency range in which the overall circuit can meet the fractional-order property. Although the frequency range can be increased by increasing the number of circuit combinations, the complexity of the overall circuit is relatively large. In addition, when the voltage value of the external input signal is large, the output signal of the circuit will be distorted, and the voltage range of the external input signal that the overall circuit can support is relatively small. Therefore, there is an urgent need for a fractional-order circuit with lower complexity, which can not only increase the frequency range in which the overall circuit can meet the fractional-order property, but also increase the voltage range of the external input signal that the overall circuit can support. Summary of the invention

[0005] The present application provides a fractional-order circuit and a method for adjusting the parameters of a fractional-order circuit, which can ensure low circuit complexity while increasing the frequency range in which the overall circuit can satisfy the fractional-order properties, and increasing the voltage range of the external input signal that the overall circuit can support.

[0006] In a first aspect, the present application provides a fractional-order circuit, comprising:

[0007] A signal processing circuit module, a negative voltage current source circuit module and a current sampling and display circuit module; wherein the signal processing circuit module includes N groups of operational amplifier circuits, and N is a positive integer; the negative voltage current source circuit module is connected to the bias current input port of the operational amplifier circuit in the signal processing circuit module;

[0008] The signal processing circuit module is used to receive an external input signal;

[0009] The negative voltage current source circuit module is used to divide the negative power supply to obtain a bias current signal;

[0010] The current sampling and display circuit module is used to sample the bias current signal in real time, and send a control signal to the negative voltage current source circuit module according to the preset bias current parameter, wherein the control signal is used to adjust the bias current signal;

[0011] The negative voltage current source circuit module is further used to output the adjusted bias current signal to the signal processing circuit module;

[0012] The signal processing circuit module is further used to receive the adjusted bias current signal;

[0013] The signal processing circuit module is further used to adjust the bias current value input to the N groups of operational amplifier circuits according to the adjusted bias current signal, so as to adjust the zero value and the pole value of the N groups of operational amplifier circuits, and / or, to adjust the ratio of the bias current value input to the N groups of operational amplifier circuits according to the adjusted bias current signal, so as to adjust the amplitude of the N groups of operational amplifier circuits;

[0014] The signal processing circuit module is further used to process the external input signal according to the adjusted N groups of operational amplifier circuits to obtain an output signal, and the output signal is a signal that satisfies the fractional order property.

[0015] Optionally, the signal processing circuit module includes a first operational amplifier circuit, a second operational amplifier circuit and a third operational amplifier circuit; the output port of the first operational amplifier circuit is connected to the input port of the second operational amplifier circuit; the output port of the second operational amplifier circuit is connected to the input port of the third operational amplifier circuit; the input interface of the first operational amplifier circuit is used to receive the external input signal; and the output port of the third operational amplifier circuit is used to obtain the output signal.

[0016] Optionally, the negative voltage current source circuit module includes a negative voltage current source circuit, and the negative voltage current source circuit includes a negative voltage power supply and a voltage dividing resistor;

[0017] The negative voltage power supply is used to provide a negative DC voltage;

[0018] The voltage-dividing resistor is used to divide the negative DC voltage to obtain the bias current.

[0019] Optionally, the current sampling and display circuit module is further used for:

[0020] When the bias current value of the bias current reaches the preset bias current parameter, the bias current value is displayed.

[0021] Optionally, the current sampling and display circuit module includes a current sampling circuit, a core MCU circuit and a digital display circuit, the current sampling circuit is connected to the core MCU circuit, and the core MCU circuit is connected to the digital display circuit;

[0022] The current sampling circuit is used to collect the bias current signal, convert the bias current signal into a voltage signal; and input the voltage signal into the core MCU circuit;

[0023] The core MCU circuit is used to adjust the bias current signal according to the voltage signal to obtain an adjusted bias current signal;

[0024] The digital display circuit is used to display the bias current value corresponding to the bias current signal in real time.

[0025] Optionally, the current sampling circuit includes: a current-to-voltage circuit; the current-to-voltage circuit is connected to the core MCU circuit;

[0026] The current-to-voltage circuit is used to convert the bias current signal to obtain the voltage signal.

[0027] Optionally, the current-to-voltage circuit includes: a conversion chip and an external sampling resistor;

[0028] The conversion chip is used to convert the bias current signal into the voltage signal;

[0029] The external sampling resistor is used to control the voltage value of the voltage signal during the process of converting the bias current signal into the voltage signal.

[0030] Optionally, the core MCU circuit includes a sampling signal unit, an MCU, a parameter preset unit, and a gear preset unit; the MCU is connected to the sampling signal unit, the parameter preset unit, and the gear preset unit respectively;

[0031] The sampling signal unit is used to sample the voltage signal to obtain a digital signal;

[0032] The parameter preset unit is used to set the preset bias current parameter; the gear preset unit is used to set the preset gear parameter;

[0033] The MCU is used to send a display instruction to the digital display unit when the digital signal indicates that the bias current reaches the preset bias current parameter;

[0034] The digital display circuit is used to display the bias current value of the bias current.

[0035] In a second aspect, the present application further provides a method for adjusting parameters of a fractional-order circuit, which is applied to the fractional-order circuit described in the first aspect above, and the method comprises:

[0036] receiving an adjusted bias current signal;

[0037] Adjusting the bias current value input to N groups of operational amplifier circuits according to the adjusted bias current signal to adjust the zero point value and the pole value of the N groups of operational amplifier circuits, where N is a positive integer;

[0038] Adjusting the bias current values ​​input to the N groups of operational amplifier circuits according to the adjusted bias current signals to adjust the zero point values ​​and pole point values ​​of the N groups of operational amplifier circuits;

[0039] The external input signal is processed according to the adjusted N groups of operational amplifier circuits to obtain an output signal, and the output signal is a signal that satisfies the fractional order property.

[0040] In a third aspect, the present application further provides a method for adjusting parameters of a fractional-order circuit, which is applied to the fractional-order circuit described in the first aspect above, and the method comprises:

[0041] receiving an adjusted bias current signal;

[0042] Adjusting the bias current value input to N groups of operational amplifier circuits according to the adjusted bias current signal to adjust the zero point value and the pole value of the N groups of operational amplifier circuits, where N is a positive integer;

[0043] Adjusting the ratio of bias current values ​​input to the N groups of operational amplifier circuits according to the adjusted bias current signal to adjust the amplitudes of the N groups of operational amplifier circuits;

[0044] The external input signal is processed according to the adjusted N groups of operational amplifier circuits to obtain an output signal, and the output signal is a signal that satisfies the fractional order property.

[0045] It can be seen that this application has the following beneficial effects:

[0046] The present application provides a fractional-order circuit and a method for adjusting parameters of a fractional-order circuit. The fractional-order circuit comprises: a signal processing circuit module, a negative voltage current source circuit module and a current sampling and display circuit module; wherein the signal processing circuit module comprises N groups of operational amplifier circuits, N being a positive integer; the N groups of operational amplifier circuits are connected in sequence; the negative voltage current source circuit module is connected to the bias current input port of the operational amplifier circuit in the signal processing circuit module; the signal processing circuit module is used to receive an external input signal; the negative voltage current source circuit module is used to divide the negative power supply to obtain a bias current signal; the current sampling and display circuit module is used to sample the bias current signal in real time, and send a control signal to the negative voltage current source circuit module according to a preset bias current parameter. The control signal is used to adjust the bias current signal; the negative voltage current source circuit module is also used to output the adjusted bias current signal to the signal processing circuit module; the signal processing circuit module is also used to receive the adjusted bias current signal; the signal processing circuit module is also used to adjust the bias current value input to the N groups of operational amplifier circuits according to the adjusted bias current signal to adjust the zero point value and the pole value of the N groups of operational amplifier circuits, and / or, according to the adjusted bias current signal, adjust the ratio of the bias current value input to the N groups of operational amplifier circuits to adjust the amplitude of the N groups of operational amplifier circuits; the signal processing circuit module is also used to process the external input signal according to the adjusted N groups of operational amplifier circuits to obtain an output signal, and the output signal is a signal that satisfies the fractional order property. Thus, in the embodiment of the present application, on the one hand, by adjusting the zero-pole values ​​of N groups of op amp circuits, the transfer function of each group of op amp circuits is optimized, so that the frequency range in which the fractional-order circuit can satisfy the fractional-order property becomes larger; on the other hand, by adjusting the ratio of the bias current values ​​between the op amp circuits, the N groups of op amp circuits can adjust the amplitude separately without changing the phase value, and utilize the adjustable amplitude characteristic when the phase value remains unchanged, and by controlling the amplitude of the N groups of op amp circuits, the frequency response curve of the fractional-order circuit is controlled to remain unchanged, thereby increasing the external signal voltage range that the entire circuit can support. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present application. For ordinary technicians in this field, other drawings can also be obtained based on these drawings.

[0048] Figure 1 A schematic diagram of the structure of a fractional-order circuit provided in an embodiment of the present application;

[0049] Figure 2 A schematic diagram of the structure of a signal processing circuit module 1 provided in an embodiment of the present application;

[0050] Figure 3A schematic diagram of the structure of an operational amplifier circuit 10 provided in an embodiment of the present application;

[0051] Figure 4 A schematic diagram of the structure of an operational amplifier device 100 provided in an embodiment of the present application;

[0052] Figure 5 A schematic diagram of the structure of a negative voltage current source circuit module 2 provided in an embodiment of the present application;

[0053] Figure 6 A schematic diagram of the structure of the current sampling and display circuit module 3 provided in an embodiment of the present application;

[0054] Figure 7 A schematic diagram of the structure of a current sampling circuit 30 provided in an embodiment of the present application;

[0055] Figure 8 A schematic diagram of the structure of a current-to-voltage circuit 301 provided in an embodiment of the present application;

[0056] Fig. 9 A schematic diagram of the structure of the core MCU circuit 31a and the digital display circuit 31b provided in an embodiment of the present application;

[0057] Fig.10 A diagram showing the circuit frequency response results before and after adjusting the effective frequency range provided in an embodiment of the present application;

[0058] Fig.11 A comparison diagram of the amplitude adjustable characteristics before and after parameter adjustment provided in the embodiment of the present application;

[0059] Fig.12 This is a comparison chart of results under high external input signal voltage before and after parameter adjustment provided in an embodiment of the present application. DETAILED DESCRIPTION

[0060] The multiple involved in the embodiments of the present application means greater than or equal to two. It should be noted that in the description of the embodiments of the present application, the words "first", "second", etc. are only used for the purpose of distinguishing the description, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying an order.

[0061] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the embodiments of the present application are further described in detail below in conjunction with the accompanying drawings and specific implementation methods. It is understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application. In addition, it should be noted that, for ease of description, only the parts related to the present application are shown in the accompanying drawings, not all structures.

[0062] The applicant has found that, on the one hand, the frequency range that most circuits can meet the fractional-order property is small. Although the frequency range can be increased by increasing the number of circuit combinations, the complexity of the overall circuit is relatively large. On the other hand, most circuits cannot adjust the amplitude curve without changing the phase value. When the voltage value of the external input signal is large, the output signal of the circuit will be distorted, and the voltage range of the external input signal that the overall circuit can support is small. Therefore, there is an urgent need for a fractional-order circuit with lower complexity, which can not only increase the frequency range that the overall circuit can meet the fractional-order property, but also increase the voltage range of the external input signal that the overall circuit can support.

[0063] The present application provides a fractional-order circuit and a method for adjusting parameters of a fractional-order circuit. The fractional-order circuit comprises: a signal processing circuit module, a negative voltage current source circuit module and a current sampling and display circuit module; wherein the signal processing circuit module comprises N groups of operational amplifier circuits, N being a positive integer; the N groups of operational amplifier circuits are connected in sequence; the negative voltage current source circuit module is connected to the bias current input port of the operational amplifier circuit in the signal processing circuit module; the signal processing circuit module is used to receive an external input signal; the negative voltage current source circuit module is used to divide the negative power supply to obtain a bias current signal; the current sampling and display circuit module is used to sample the bias current signal in real time, and send a control signal to the negative voltage current source circuit module according to a preset bias current parameter. The control signal is used to adjust the bias current signal; the negative voltage current source circuit module is also used to output the adjusted bias current signal to the signal processing circuit module; the signal processing circuit module is also used to receive the adjusted bias current signal; the signal processing circuit module is also used to adjust the bias current value input to the N groups of operational amplifier circuits according to the adjusted bias current signal to adjust the zero point value and the pole value of the N groups of operational amplifier circuits, and / or, according to the adjusted bias current signal, adjust the ratio of the bias current value input to the N groups of operational amplifier circuits to adjust the amplitude of the N groups of operational amplifier circuits; the signal processing circuit module is also used to process the external input signal according to the adjusted N groups of operational amplifier circuits to obtain an output signal, and the output signal is a signal that satisfies the fractional order property.

[0064] Thus, in the embodiment of the present application, on the one hand, by adjusting the zero-pole values ​​of N groups of op amp circuits, the transfer function of each group of op amp circuits is optimized, so that the frequency range in which the fractional-order circuit can satisfy the fractional-order property becomes larger; on the other hand, by adjusting the ratio of the bias current values ​​between the op amp circuits, the N groups of op amp circuits can adjust the amplitude separately without changing the phase value, and utilize the adjustable amplitude characteristic when the phase value remains unchanged, and by controlling the amplitude of the N groups of op amp circuits, the frequency response curve of the fractional-order circuit is controlled to remain unchanged, thereby increasing the external signal voltage range that the entire circuit can support.

[0065] To facilitate understanding of the specific implementation of the fractional-order circuit provided in the embodiments of the present application, an explanation will be given below with reference to the accompanying drawings.

[0066] See also Figure 1 , a structural schematic diagram of a fractional-order circuit structure is provided, the fractional-order circuit structure comprises: a signal processing circuit module 1, a negative voltage current source circuit module 2 and a current sampling and display circuit module 3; the negative voltage current source circuit module 2 is connected to the bias current input port of the operational amplifier circuit in the signal processing circuit module 1, and the negative voltage current source circuit 2 is connected to the current sampling circuit and display circuit 3;

[0067] The signal processing circuit module 1 is used to receive an external input signal;

[0068] The negative voltage current source circuit module 2 is used to divide the negative power supply to obtain a bias current signal;

[0069] The current sampling and display circuit module 3 is used to sample the bias current signal in real time and send a control signal to the negative voltage current source circuit module according to the preset bias current parameter, and the control signal is used to adjust the bias current signal;

[0070] The negative voltage current source circuit module 2 is also used to output the adjusted bias current signal to the signal processing circuit module;

[0071] The signal processing circuit module 1 is also used to receive the adjusted bias current signal;

[0072] The signal processing circuit module 1 is further used to adjust the bias current value input to the N groups of operational amplifier circuits according to the adjusted bias current signal to adjust the zero value and the pole value of the N groups of operational amplifier circuits, and / or to adjust the ratio of the bias current value input to the N groups of operational amplifier circuits according to the adjusted bias current signal to adjust the amplitude of the N groups of operational amplifier circuits;

[0073] The signal processing circuit module 1 is also used to process the external input signal according to the adjusted N groups of operational amplifier circuits to obtain an output signal, and the output signal is a signal that satisfies the fractional order property.

[0074] In the specific implementation process, the current sampling circuit and the display circuit 3 are connected to the output loop of the negative voltage current source circuit 2 .

[0075] It should be noted that signal distortion is a common problem in signal processing systems. Increasing the voltage range of the input signal can reduce signal distortion during transmission, making the signal clearer and more accurate. Because the higher the amplitude, the higher the output under the same input, the high output may exceed the optimal operating voltage range of the op amp. In the embodiment of the present application, the input voltage can be higher by lowering the amplitude, and the output is not distorted at a higher input voltage, thereby increasing the voltage range of the external input signal.

[0076] In the embodiment of the present application, the properties of the fractional-order circuit are first satisfied, and the external signal input is connected to the signal processing circuit 1, and the signal processing circuit 1 makes the transfer function between the input signal and the output signal satisfy the properties of the fractional-order circuit; and, by adjusting the zero-pole values ​​of the N groups of operational amplifier circuits, the transfer function of each group of operational amplifier circuits is optimized, so that the frequency range in which the fractional-order circuit can satisfy the fractional-order properties becomes larger; in addition, by adjusting the ratio of the bias current values ​​between the operational amplifier circuits, the N groups of operational amplifier circuits can adjust the amplitudes separately without changing the phase values, and utilize the adjustable amplitude characteristic when the phase value remains unchanged, and by controlling the amplitudes of the N groups of operational amplifier circuits, the frequency response curve of the fractional-order circuit is controlled to remain unchanged, thereby increasing the external signal voltage range that the entire circuit can support.

[0077] It should be noted that the signal processing circuit module 1 includes N groups of operational amplifier circuits; wherein N is a positive integer; the applicant has found through experimental tests that when N=3 or N=5, the accuracy of the entire fractional-order circuit is higher, so in order to facilitate understanding of the embodiments of the present application, the following description is based on N=3, that is, the signal processing circuit module 1 includes 3 groups of operational amplifier circuits.

[0078] In the embodiment of the present application, the signal processing circuit module 1 includes a first operational amplifier circuit 10, a second operational amplifier circuit 11 and a third operational amplifier circuit 12; each operational amplifier circuit includes an input port VIN and an output port VOUT; an external input signal is input to the input port VIN of the first operational amplifier circuit 10, and the output port VOUT of the first operational amplifier circuit 10 is connected to the input port VIN of the second operational amplifier circuit 11; the output port VOUT of the second operational amplifier circuit 11 is connected to the input port VIN of the third operational amplifier circuit 11; and the output port VOUT of the third operational amplifier circuit 12 outputs a signal.

[0079] See Figure 2 , Figure 2 This is a structural schematic diagram of the signal processing circuit module 1 in an embodiment of the present application, including three groups of operational amplifier circuits with the same structure, namely a first operational amplifier circuit 10, a second operational amplifier circuit 11, and a third operational amplifier circuit 12. An external signal is input to the input port of the first operational amplifier circuit, the output port of the first operational amplifier circuit is connected to the input port of the second operational amplifier circuit, the output port of the second operational amplifier circuit is connected to the input port of the third operational amplifier circuit, and the output port of the third group of operational amplifier circuits is the output port of the final signal.

[0080] It should be noted that, in the embodiment of the present application, N=3, then, by controlling, the amplitude of the first operational amplifier circuit 10 connected to the external input signal can be increased, and the amplitude of the second operational amplifier circuit 11 and the third operational amplifier circuit 12 can be decreased, so that the frequency response curve of the fractional-order circuit remains unchanged, but the voltage range of the external signal that can be supported becomes larger. That is to say, in the embodiment of the present application, by adjusting the ratio of the bias current values ​​between the operational amplifier circuits, the amplitude adjustable characteristic of the fractional-order circuit when the phase value remains unchanged under the frequency response is realized, and the amplitude adjustable characteristic is applied to each group of operational amplifier circuits, so that the voltage range of the supported external input signal becomes larger.

[0081] See also Figure 3 , Figure 3 Schematic diagram of a group of operational amplifier circuits 10 in the signal processing circuit module 1.

[0082] First of all, Figure 3 The signal port identification is explained, Vi represents the input port of a group of operational amplifier circuits, and the input port Vi includes a positive signal input port Vi+ and a negative signal input port Vi-; Iset represents the bias current input port, wherein the identification Iset is only used as a schematic symbol of the bias current circuit, and Vo represents the output port of a group of operational amplifier circuits.

[0083] It should be noted that Figure 3 Ports with the same symbolic name in the table are connected, such as Figure 3 The two places with the same sign Vi- are connected to each other, and the two places with the same sign Vi+ are connected to each other, that is, the positive signal input port Vi+ of the operational amplifier device 101 is connected to the positive signal input port Vi+ of the operational amplifier device 103, and the negative signal input port Vi- of the operational amplifier device 101 is connected to the negative signal input port Vi- of the operational amplifier device 103. The operational amplifier device 104 is used as an output port to output a signal, and the output port output signal is connected to the negative signal port of the operational amplifier device 100 and the common output of the operational amplifier device 102 and the operational amplifier device 103.

[0084] It should be noted that the operational amplifier circuit 10 may include five operational amplifier devices and one non-polar capacitor element 105, the five operational amplifier devices are respectively operational amplifier device 100, operational amplifier device 101, operational amplifier device 102, operational amplifier device 103, and operational amplifier device 104, each operational amplifier device is configured with a configuration current signal Iset, wherein a group of operational amplifier circuits can be divided into two parts, the front part is the operational amplifier device 100, the operational amplifier device 101, and the capacitor element 105, and the rear part is the operational amplifier device 102, the operational amplifier device 103, and the operational amplifier device 104; the operational amplifier device 101 01 and operational amplifier device 103 are external input ports of the signal processing circuit module 1, which can be connected to differential signals; the first end of the capacitor Cu is respectively connected to the output port of the operational amplifier device 100 and the output port of the operational amplifier device 101, and is commonly connected to the positive signal port of the operational amplifier device 102, the second end of the capacitor Cu is connected to the ground plane, the negative signal port of the operational amplifier device 102 is connected to the ground plane, the output port of the operational amplifier device 102 and the output port of the operational amplifier device 103 are commonly connected to the negative signal port of the operational amplifier device 104, and the positive signal port of the operational amplifier device 104 is connected to the ground plane.

[0085] It should be noted that different operational amplifier devices need to be configured with different bias current values ​​according to the fractional-order circuit parameters, and each bias current needs to be configured separately and independently of each other.

[0086] See also Figure 4 , is a schematic diagram of the specific structure of an operational amplifier device in an embodiment of the present application, the operational amplifier device includes a programmable operational amplifier 100a, an internal current matching resistor 100b, a positive power supply 100c and a negative power supply 100d. The operational amplifier device is powered by a dual power supply, and the positive and negative power supplies are +12V and -12V. -IN represents the negative signal input port of the operational amplifier device, +IN represents the positive signal input port of the operational amplifier device, Iset represents the bias current input port, and Iout represents the signal output port of the operational amplifier device.

[0087] The Iout signal output port is connected to the matching resistor R0, and the resistance of the matching resistor R0 is 10 ohms. It is used to limit the voltage value of the output signal to avoid the situation where the programmable operational amplifier device is damaged due to a large voltage when connected to the input port of other operational amplifier devices.

[0088] Figure 4 The operational amplifier device in the embodiment of the present invention takes the operational amplifier device 100 as an example. It should be noted that Figure 3 The specific structure of the operational amplifier device shown in the figure can be found in Figure 4 The specific structural diagram of the operational amplifier device shown in FIG. 1 includes operational amplifier device 100, operational amplifier device 101, operational amplifier device 102, operational amplifier device 103, and operational amplifier device 104. The above-mentioned operational amplifier devices are Figure 3 Connect according to the specific structural schematic diagram shown.

[0089] In a possible implementation, the negative voltage current source circuit module 2 includes a negative voltage current source circuit, and the negative voltage current source circuit includes a negative voltage power supply and a voltage dividing resistor;

[0090] A negative voltage power supply, used for providing a negative DC voltage;

[0091] The voltage divider resistor is used to divide the negative DC voltage to obtain the bias current.

[0092] See Figure 5 , which is a structural schematic diagram of a group of negative voltage current source circuits in the negative voltage current source circuit module 2 provided in an embodiment of the present application; wherein, the negative voltage current source circuit includes a negative voltage power supply 20, a resistor element 21, a resistor element 22, and a resistor element 23; the negative voltage power supply 20 is connected to the first end of the resistor element 21, the second end of the resistor element 21 is connected to the first end of the resistor element 22, the second end of the resistor element 22 is connected to the ground plane, the first end of the resistor element 23 is connected to the second end of the resistor element 21 (that is, the first end of the resistor element 23 is connected to the common end between the resistor element 21 and the resistor element 22), the second end of the resistor element 23 is connected to the bias current input port 24 of the operational amplifier device in the remote circuit, and the bias current is input to the operational amplifier device through the bias current input port 24; the negative voltage power supply 20 is used to provide a negative DC voltage; the resistor element 21, the resistor element 22 and the resistor element 23 are used to divide the negative DC voltage.

[0093] In the specific implementation process, R1 can be used to represent the resistor element 21, R2 can represent the resistor element 22, and R3 can represent the resistor element 23; the negative voltage power supply 20 can be a -12V negative voltage power supply, providing a -12V DC voltage value, R1, R2 and R3 divide the -12V negative voltage power supply to output a bias current.

[0094] It should be noted that the maximum bias current value supported by the operational amplifier device is 1000UA, so the resistance value of each resistor element in the negative voltage current source circuit can be set as: R1 = 1.24KΩ (kilo-ohm), R2 = 6.19KΩ, R3 = 10KΩ, so that the bias current value output by the negative voltage current source circuit is 110UA, and multiple groups of negative voltage resistors use one negative voltage power supply.

[0095] It should be noted that Figure 5 Only an exemplary structural diagram of a group of negative voltage current source circuits in the negative voltage current source circuit module 2 is given. In the embodiment of the present application, the number of negative voltage current source circuits in the negative voltage current source circuit module 2 must be the same as the number of operational amplifier devices in the signal processing circuit module 1.

[0096] In the embodiment of the present application, the negative voltage current source circuit module 2 outputs a bias current signal after voltage division by three resistor elements. The bias current signal is input to the bias current port of the operational amplifier device. By adjusting the ratio of the bias current values ​​between the specified operational amplifier devices, the amplitude curve of the circuit under the frequency response can be adjusted while keeping the phase value unchanged. In addition, the operational amplifier circuit under different bias current parameters can realize fractional-order circuits of different properties, specifically changing the order of the fractional-order circuit.

[0097] In a possible implementation, the current sampling and display circuit module 3 includes a current sampling circuit 30, a core MCU circuit 31a and a digital display circuit 31b, wherein the current sampling circuit 30 is connected to the core MCU circuit 31a, and the core MCU circuit 31a is connected to the digital display circuit 31b;

[0098] The current sampling circuit 30 is used to collect the bias current signal, convert the bias current signal into a voltage signal, and input the voltage signal into the core MCU circuit;

[0099] The core MCU circuit 31a is used to adjust the bias current signal according to the voltage signal to obtain the adjusted bias current signal;

[0100] The digital display circuit 31b is used to display the bias current value corresponding to the bias current signal in real time.

[0101] See Figure 6 , Figure 6 It is a structural diagram of the current sampling and display circuit module 3, including a current sampling circuit 30, a core MCU circuit 31a and a digital display circuit 31b; the current sampling circuit 30 processes the bias current through a conversion chip, and the converted output voltage port is connected to the core MCU circuit 31a, the core MCU circuit 31a samples the signal, and the core MCU circuit 31a is connected to the digital display circuit 31b to display the bias current data obtained by current sampling in real time.

[0102] It should be noted that the core MCU circuit 31a has an analog digital converter (ADC) function. In the specific implementation process, the voltage signal is sampled using the ADC function inside the core MCU circuit 31a to obtain a digital signal.

[0103] In a possible implementation, the current sampling circuit 30 includes: a current-to-voltage circuit 301; the current-to-voltage circuit 301 is connected to a core MCU circuit 31a;

[0104] The current-to-voltage circuit 301 is used to convert the bias current signal to obtain a voltage signal.

[0105] See Figure 7 , is a schematic diagram of the structure of the current sampling circuit in the embodiment of the present application, the current signal (ie, the bias current signal) 300 is input into the current-to-voltage circuit 301, the current-to-voltage circuit 301 is connected to the core MCU circuit 31a, and the current signal is the bias current signal.

[0106] It should be noted that the bias current signal is connected to each operational amplifier device, the bias current signal of each part needs to be sampled independently, each current sampling circuit needs to include a separate current-to-voltage circuit, and the bias current signal is obtained by a negative voltage current source.

[0107] In a possible implementation, the current-to-voltage circuit 301 includes: a conversion chip and an external sampling resistor;

[0108] A conversion chip, used for converting a bias current signal into a voltage signal;

[0109] The external sampling resistor is used to control the voltage value of the voltage signal during the process of converting the bias current signal into a voltage signal.

[0110] See Figure 8 , is a structural schematic diagram of a current-to-voltage circuit provided in an embodiment of the present application, including a conversion chip 301b, a power supply 301a of the conversion chip, an external sampling resistor element 301c, a sampling current positive input port 301d, a sampling current reverse input port 301e, and a converted voltage output port 301f; the conversion chip selects a current-to-voltage chip, which is used to convert a bias current signal to obtain a voltage signal.

[0111] It should be noted that the conversion chip is powered by a +12V power supply, and the external sampling resistor element is used to adjust the output voltage value after conversion. The larger the resistance of the external sampling resistor element, the larger the output voltage value. The external sampling resistor element can be selected based on the maximum voltage range supported by the ADC interface in the sampling circuit unit of the MCU; the conversion circuit reserves the input and output ports for current sampling, which are connected to the input and output loop of the bias current.

[0112] In a possible implementation, the core MCU circuit 31a includes a sampling signal 310, an MCU 311, a parameter preset unit 313, and a gear preset unit 314; the MCU 311 is connected to the sampling signal unit 310, the parameter preset unit 313, and the gear preset unit 314 respectively;

[0113] The sampling signal unit 310 is used to sample the voltage signal to obtain a digital signal;

[0114] The parameter preset unit 313 is used to set the preset bias current parameters; the gear preset unit 314 is used to set the preset gear parameters;

[0115] MCU311, used for sending a display instruction to the digital display unit 31b when the bias current represented by the digital signal reaches the preset bias current parameter;

[0116] The digital display circuit 31b is used to display the bias current value of the bias current.

[0117] See Fig. 9 , is a structural diagram of a core MCU circuit 31a and a digital display circuit 31b provided in an embodiment of the present application, wherein the core MCU circuit 31a and the digital display circuit 31b belong together to 31; MCU311 is connected to the digital display circuit 31b, and the digital display circuit 31b includes a screen display circuit 316 and an LED display circuit 317; wherein a 3.3V power supply 312 supplies power to the MCU311;

[0118] The MCU 311 is provided with a parameter preset unit 313 and a gear preset unit 314; the parameter preset is used to adjust the bias current to the preset bias current parameter, wherein the gear preset is used to grade the voltage range of the external input signal to cooperate with the parameter optimization method.

[0119] In the specific implementation process, MCU311 is the core control chip of the overall circuit. The circuit parameter preset and gear preset can be performed inside MCU311. The parameter preset is used for screen display and LED display after the bias current value reaches the specified parameter. The gear preset is used to increase the voltage range of the external input signal supported by the signal processing circuit, which can be divided into three different external input signal voltage input gears.

[0120] In the embodiment of the present application, the voltage signal 310 after bias current sampling is connected to the ADC sampling function interface of the sampling signal unit 310 of the MCU311, the current-to-voltage circuit is composed of a conversion chip, and the converted voltage signal is sampled and processed by the ADC function of the sampling electrical signal unit inside the core MCU circuit, and the obtained sampling data can be used for screen display and LED indication. Parameters and gears are preset inside the MCU, and after the bias current value is adjusted to reach the parameter preset value, it can be indicated in real time by the digital display circuit.

[0121] The following is a theoretical explanation of the parameter optimization method of this application;

[0122] Figure 3 The transmission function between the signal input Vi and the signal output Vo is shown in the following formula (1):

[0123]

[0124] Among them, g 100represents the transconductance parameter of the operational amplifier device 100. Similarly, g 101 represents the transconductance parameter of the operational amplifier device 101, g 102 represents the transconductance parameter of the operational amplifier device 102, g 103 represents the transconductance parameter of the operational amplifier device 103, g 104 represents the transconductance parameter of the operational amplifier device 104, C i is the capacitance of the capacitor element 105, s represents the complex frequency domain after Laplace transformation, the transconductance value of the operational amplifier device of the operational amplifier circuit in the embodiment of the present application = 10×bias current value, and the transconductance value of the operational amplifier device and the bias current value are in a linear relationship.

[0125] It should be noted that the transmission formulas of the three groups of op amp circuits are the same. The combination principle between the three groups of op amp circuits is obtained by the following fractional-order circuit theory formula (2), where α is the fractional order, K is the amplitude gain; n is the number of op amp circuit groups, z i is the zero value, p i is the extreme value, s.

[0126]

[0127] From the above formula (2), it can be seen that fractional-order circuits of different orders can be adjusted by changing the zero-pole values. The formula between the zero-pole value of the op amp circuit and the bias current value and capacitance value of the op amp circuit is as follows:

[0128] z i =(g 102 / C i )·(g 101 / g 103 ) Formula (3)

[0129] p i =(g 102 / C i )·(g 100 / g 104 ) Formula (4)

[0130] It should be noted that the above fractional-order theoretical formula and circuit zero-pole formula are applicable to each group of operational amplifier circuits.

[0131] First, in order to increase the frequency range in which the overall fractional-order circuit can satisfy the fractional-order property, the effective frequency range of the fractional-order circuit is increased by changing the zero-pole values ​​of the operational amplifier circuit and optimizing the bias current parameters in the operational amplifier circuit.

[0132] There are two types of zero-pole optimization formulas, which are used to adjust the frequency response curve of a group of op amp circuits, and to shift and expand the frequency response curve respectively. The zero-pole optimization formulas are shown in the following formulas (5)-(6), where r, m, t are constants, and zinew 、p inew are the optimized zero-pole values.

[0133] The curve translation formula is:

[0134]

[0135] The curve expansion formula is:

[0136]

[0137] In the embodiment of the present application,

[0138]

[0139] Among them, constants r, m, and t are explained. The larger the constant r value is, the larger the overall translation range of the frequency response curve is. The r value can be positive or negative. A positive value causes the curve to shift to the right as a whole, that is, to a higher frequency. Constant t causes the curve to expand upward and downward with the frequency center. The larger the t value is, the larger the expansion range is. When t is a positive value, the curve expands upward. Constant m causes the curve to expand while shifting, and the high-frequency amplitude of the curve remains unchanged during the expansion process. Constants m and t are used to adjust and optimize the effective frequency range of the fractional-order circuit. The adjustment and optimization results are shown in Fig.10 .

[0140] The optimization principle of the frequency range is as follows, and this frequency range is referred to as the effective frequency range below.

[0141] From the perspective of transfer function, the three groups of operational amplifier circuits in the signal processing circuit module 1 are all first-order transfer functions, including a pair of zero poles; the optimization principle of the effective frequency range is to adjust the zero-pole values ​​of the operational amplifier circuit, and the circuit transfer function after adjusting the zero-pole values ​​is optimized, so that the frequency response curves of the first group of operational amplifier circuits and the third group of operational amplifier circuits are shifted, and the frequency response curve of the second group of operational amplifier circuits is expanded. From the frequency response curve, the fractional-order circuit composed of the operational amplifier circuits is expressed as the superposition of the frequency response curves of the three groups of operational amplifier circuits; the effective frequency range of the fractional-order circuit after the zero-pole value is adjusted is optimized, and the frequency range is increased.

[0142] Secondly, a circuit theory explanation is given for increasing the external signal input voltage range of the overall step-by-step circuit.

[0143] It should be noted that the optimization of the external signal input voltage range is achieved by utilizing the adjustable amplitude characteristic of the fractional-order circuit provided in the embodiment of the present application, which can shift the amplitude curve in the frequency response curve up and down without changing the phase value.

[0144] like Figure 3The illustrated set of operational amplifier circuit structures can shift the amplitude curve and maintain the phase value by adjusting the bias current value ratio between operational amplifier device 100 and operational amplifier device 101 while keeping the zero-pole value of the operational amplifier circuit unchanged; adjusting the parameters g100 / g101, when the order of the fractional-order circuit is positive, the larger the parameters g100 / g101 are, the greater the range of the amplitude curve shifting downward; when the order of the fractional-order circuit is negative, the larger the parameters g100 / g101 are, the greater the range of the amplitude curve shifting downward.

[0145] The fractional-order circuit under the embodiment of the present application can be obtained by combining three groups of operational amplifier circuits, and each group of operational amplifier circuits can use the adjustable amplitude characteristic. By shifting up the amplitude curve of the first group of operational amplifier circuits connected to the external input signal and shifting down the amplitude curves of the other two groups of operational amplifier circuits, the supported external input signal voltage range can be increased while keeping the overall fractional-order circuit frequency response curve unchanged. It should be noted that in the process of adjusting the parameters g100 / g101 to shift the amplitude curve, the bias current parameters of the other operational amplifier devices are adjusted to keep the zero-pole values ​​of the operational amplifier circuit unchanged.

[0146] In the embodiment of the present application, this is achieved by controlling the sum of the amplitudes of the three groups of op amp circuits to remain unchanged, and the amplitude curve of the first op amp circuit is controlled to move upward because the external input signal is only input from the first op amp circuit, and the voltage value of the external input signal is generally small, so the amplitude of the first group of op amp circuits can be moved upward.

[0147] The increase in the voltage range of the external input signal is represented by: when a sine wave is input, at a higher input voltage value, the output sine wave curve obtained by the original fractional-order circuit is distorted, and the output sine wave curve obtained by the fractional-order circuit after parameter optimization is not distorted.

[0148] It should be noted that the three groups of operational amplifier circuits with the same structure in the signal processing circuit can adjust the amplitude independently without changing the phase value. Therefore, the amplitude of the first group of operational amplifier circuits connected to the external input signal is increased, and the amplitudes of the other two groups of operational amplifier circuits are reduced. The result is that the frequency response curve of the fractional-order circuit remains unchanged, and the external signal voltage range that can be supported becomes larger.

[0149] It should be noted that the fractional-order circuit is analyzed under frequency response. According to the above-mentioned theoretical formula of the fractional-order circuit, the bias current parameters that satisfy the fractional-order circuit formula and the preset conditions can be calculated, so that the transfer function formula between the external input signal and the output signal of the signal processing circuit satisfies the theoretical formula; from the analysis of the frequency response curve, the frequency response curve obtained by the transfer function of the signal processing circuit conforms to the theoretical curve of the fractional-order circuit, the phase value = order × 90, the slope of the amplitude curve is the fractional order, the order of the fractional-order circuit is greater than or equal to 0.1 and the order is less than or equal to 0.9, or, the order is greater than or equal to -0.9 and the order is less than or equal to -0.1. That is to say, the order range is [-0.9, -0.1], [+0.1, +0.9].

[0150] Based on the above principles, an embodiment of the present application further provides a method for adjusting the parameters of a fractional-order circuit to increase the effective frequency range of the fractional-order circuit, which is applied to the fractional-order circuit in any of the above embodiments; the method comprises:

[0151] S11, receiving an adjusted bias current signal;

[0152] S12, adjusting the bias current value input to N groups of operational amplifier circuits according to the adjusted bias current signal to adjust the zero point value and the pole value of the N groups of operational amplifier circuits, wherein N is a positive integer and the N groups of operational amplifier circuits are connected in sequence;

[0153] S13, adjusting the bias current value input to the N groups of operational amplifier circuits according to the adjusted bias current signal, so as to adjust the zero point value and the pole value of the N groups of operational amplifier circuits;

[0154] S14, processing the external input signal according to the adjusted N groups of operational amplifier circuits to obtain an output signal, wherein the output signal is a signal satisfying a fractional order property.

[0155] In the embodiment of the present application,

[0156] Based on the above principles, an embodiment of the present application further provides a method for adjusting the parameters of a fractional-order circuit to increase the voltage range of the supported external input signal, which is applied to the fractional-order circuit in any of the above embodiments; the method comprises:

[0157] S21, receiving an adjusted bias current signal;

[0158] S22, adjusting the bias current value input to N groups of operational amplifier circuits according to the adjusted bias current signal to adjust the zero point value and the pole value of the N groups of operational amplifier circuits, wherein N is a positive integer and the N groups of operational amplifier circuits are connected in sequence;

[0159] S23, adjusting the ratio of bias current values ​​input to the N groups of operational amplifier circuits according to the adjusted bias current signal, so as to adjust the amplitudes of the N groups of operational amplifier circuits;

[0160] S24, processing the external input signal according to the adjusted N groups of operational amplifier circuits to obtain an output signal, wherein the output signal is a signal satisfying a fractional order property.

[0161] According to the method for adjusting the parameters of a fractional-order circuit provided above, by adjusting the bias current value ratio between the operational amplifier devices, for example, adjusting the parameter g100 / g101, the amplitude adjustable characteristic of the fractional-order circuit is realized when the phase value remains unchanged. The amplitude adjustable characteristic is applied to each group of operational amplifier circuits, so that the voltage range of the supported external input signal becomes larger; by adjusting the zero-pole values ​​of each group of operational amplifier circuits, the transfer function of each group of circuits is adjusted, so that the effective frequency range of the fractional-order circuit becomes larger.

[0162] It should be noted that if you want to simultaneously increase the voltage range of the external input signal and the effective range of the data decomposition circuit, you can first execute S11 to S14 and then execute S21 to S24, that is, first increase the frequency range and then increase the input voltage range.

[0163] It should be noted that the method for adjusting the parameters of a fractional-order circuit provided in the embodiment of the present application has a parameter optimization result such as Fig.10 , 11 , as shown in 12;

[0164] in, Fig.10 This is the circuit frequency response result diagram before and after the effective frequency range is optimized; after the parameters are optimized, the amplitude curve of the circuit has also changed, which is Fig.10 The curve in the figure above is before and after the amplitude changes. From the frequency response point of view, the frequency range that can meet the fractional order property of the circuit after the parameters are optimized will become larger. Fig.10 The frequency range of the curve in the lower figure is closer to 45 phase values.

[0165] Fig.11 This is a comparison chart of the amplitude adjustable characteristics before and after parameter adjustment, combined with Fig.10 Come and see, Fig.11 The amplitude curve was adjusted. Fig.11 The figure below is the phase curve, which overlaps before and after adjustment, indicating that during the process of adjusting the amplitude, the amplitude curve can be adjusted so that the amplitude curve can be shifted up and down as a whole, and the phase curve remains unchanged. Fig.12This is a comparison chart of the results under higher external input signal voltages before and after parameter optimization; it can be seen that the external input signal voltage range supported by the optimized signal processing circuit becomes larger, which verifies the feasibility and accuracy of the fractional-order circuit provided in the embodiment of the present application from the perspective of actual results.

[0166] Through the description of the above implementation methods, it can be known that those skilled in the art can clearly understand that all or part of the steps in the above-mentioned embodiment method can be implemented by means of software plus a general hardware platform. Based on such an understanding, the technical solution of the present application can be embodied in the form of a software product, which can be stored in a storage medium, such as a read-only memory (ROM) / RAM, a magnetic disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network communication device such as a router) to execute the methods described in each embodiment of the present application or some parts of the embodiments.

[0167] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment. The device embodiment described above is only schematic, in which the modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical modules, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules can be selected according to actual needs to achieve the goals of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative work.

[0168] The above is only a preferred embodiment of the present application and is not intended to limit the protection scope of the present application. It should be noted that, for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the present application, and these improvements and modifications should also be regarded as the protection scope of the present application.

Claims

1. A fractional-order circuit, characterized in that: include: A signal processing circuit module, a negative voltage current source circuit module and a current sampling and display circuit module; wherein the signal processing circuit module includes N groups of operational amplifier circuits, and N is a positive integer; the negative voltage current source circuit module is connected to the bias current input port of the operational amplifier circuit in the signal processing circuit module; The signal processing circuit module is used to receive an external input signal; The negative voltage current source circuit module is used to divide the negative power supply to obtain a bias current signal; The current sampling and display circuit module is used to sample the bias current signal in real time, and send a control signal to the negative voltage current source circuit module according to the preset bias current parameter, wherein the control signal is used to adjust the bias current signal; The negative voltage current source circuit module is further used to output the adjusted bias current signal to the signal processing circuit module; The signal processing circuit module is further used to receive the adjusted bias current signal; The signal processing circuit module is further used to adjust the bias current value input to the N groups of operational amplifier circuits according to the adjusted bias current signal, so as to adjust the zero value and the pole value of the N groups of operational amplifier circuits, and / or, to adjust the ratio of the bias current value input to the N groups of operational amplifier circuits according to the adjusted bias current signal, so as to adjust the amplitude of the N groups of operational amplifier circuits; The signal processing circuit module is further used to process the external input signal according to the adjusted N groups of operational amplifier circuits to obtain an output signal, and the output signal is a signal that satisfies the fractional order property.

2. The circuit according to claim 1, characterized in that The signal processing circuit module includes a first operational amplifier circuit, a second operational amplifier circuit and a third operational amplifier circuit; the output port of the first operational amplifier circuit is connected to the input port of the second operational amplifier circuit; the output port of the second operational amplifier circuit is connected to the input port of the third operational amplifier circuit; the input interface of the first operational amplifier circuit is used to receive the external input signal; the output port of the third operational amplifier circuit is used to obtain the output signal.

3. The circuit according to claim 1, characterized in that The negative voltage current source circuit module comprises a negative voltage current source circuit, and the negative voltage current source circuit comprises a negative voltage power supply and a voltage dividing resistor; The negative voltage power supply is used to provide a negative DC voltage; The voltage-dividing resistor is used to divide the negative DC voltage to obtain the bias current.

4. The circuit according to claim 1, characterized in that The current sampling and display circuit module is also used for: When the bias current value of the bias current reaches the preset bias current parameter, the bias current value is displayed.

5. The circuit according to claim 1, characterized in that The current sampling and display circuit module comprises a current sampling circuit, a core MCU circuit and a digital display circuit, wherein the current sampling circuit is connected to the core MCU circuit, and the core MCU circuit is connected to the digital display circuit; The current sampling circuit is used to collect the bias current signal, convert the bias current signal into a voltage signal; and input the voltage signal into the core MCU circuit; The core MCU circuit is used to adjust the bias current signal according to the voltage signal to obtain an adjusted bias current signal; The digital display circuit is used to display the bias current value corresponding to the bias current signal in real time.

6. The circuit according to claim 5, characterized in that The current sampling circuit comprises: a current-to-voltage circuit; the current-to-voltage circuit is connected to the core MCU circuit; The current-to-voltage circuit is used to convert the bias current signal to obtain the voltage signal.

7. The circuit according to claim 6, characterized in that The current-to-voltage circuit comprises: a conversion chip and an external sampling resistor; The conversion chip is used to convert the bias current signal into the voltage signal; The external sampling resistor is used to control the voltage value of the voltage signal during the process of converting the bias current signal into the voltage signal.

8. The circuit according to claim 5, characterized in that The core MCU circuit includes a sampling signal unit, an MCU, a parameter preset unit, and a gear preset unit; the MCU is connected to the sampling signal unit, the parameter preset unit, and the gear preset unit respectively; The sampling signal unit is used to sample the voltage signal to obtain a digital signal; The parameter preset unit is used to set a preset bias current parameter; The gear preset unit is used to set preset gear parameters; The MCU is used to send a display instruction to the digital display unit when the digital signal indicates that the bias current reaches the preset bias current parameter; The digital display circuit is used to display the bias current value of the bias current.

9. A method for adjusting parameters of a fractional-order circuit, characterized in that: Applied to the fractional-order circuit according to any one of claims 1 to 8, the method comprises: receiving an adjusted bias current signal; Adjusting the bias current value input to N groups of operational amplifier circuits according to the adjusted bias current signal to adjust the zero point value and the pole value of the N groups of operational amplifier circuits, where N is a positive integer; Adjusting the bias current values ​​input to the N groups of operational amplifier circuits according to the adjusted bias current signals to adjust the zero point values ​​and pole point values ​​of the N groups of operational amplifier circuits; The external input signal is processed according to the adjusted N groups of operational amplifier circuits to obtain an output signal, and the output signal is a signal that satisfies the fractional order property.

10. A method for adjusting parameters of a fractional-order circuit, characterized in that: Applied to the fractional-order circuit according to any one of claims 1 to 8, the method comprises: receiving an adjusted bias current signal; Adjusting the bias current value input to N groups of operational amplifier circuits according to the adjusted bias current signal to adjust the zero point value and the pole value of the N groups of operational amplifier circuits, where N is a positive integer; Adjusting the ratio of bias current values ​​input to the N groups of operational amplifier circuits according to the adjusted bias current signal to adjust the amplitudes of the N groups of operational amplifier circuits; The external input signal is processed according to the adjusted N groups of operational amplifier circuits to obtain an output signal, and the output signal is a signal that satisfies the fractional order property.

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