Page migration method and device, equipment and medium

By obtaining and judging the memory page table information, context information and processor information of the target page, and combining preset rules to determine whether the target process is allowed to access the target page, the frequent page migration problem caused by Hint-faulting optimization technology is solved, and system performance and efficiency are improved.

CN119621324APending Publication Date: 2025-03-14INSPUR SUZHOU INTELLIGENT TECH CO LTD
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Patent Information

Application Number
CN202411710253.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-27
Publication Date
2025-03-14

AI Technical Summary

Technical Problem

Hint-faulting optimization technology leads to frequent page migration, increasing memory bandwidth consumption, and ineffective migration and memory fragmentation, affecting system performance.

Method used

By obtaining the memory page table information of the target page, the context information of the target process and the processor information, combining preset rules to determine whether the target process is allowed to access the target page, and dynamically decide whether to perform page migration.

Benefits of technology

It avoids the additional performance overhead caused by frequent page migration, improves the overall performance and efficiency of the system, and adapts to various performance requirements scenarios.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a page migration method and device, equipment and a medium, and relates to the technical field of computers. A NUMA automatic balancing mechanism optimization scheme is provided, when the access of a target process to a target page triggers a page error, page migration is not directly carried out, and whether the target process is allowed to access the target page or not is judged according to memory page table information, context information, processor information and a preset rule; the migration strategy is dynamically judged and optimized according to a preset rule, so that various different performance requirement scenes can be better adapted; according to the page table item migration method and device, page table item migration of the target page is carried out only when it is confirmed that the target process is allowed to access the target page through the information and the preset rule, additional performance overhead caused by frequent page migration is avoided, and the overall performance and efficiency of a system are improved.
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Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a page migration method, device, equipment and medium. Background Art

[0002] Non-Uniform Memory Access (NUMA) technology emerged in the development of multi-processor systems. By equipping each processor or processor group with a local memory node, it significantly reduces memory access latency and improves system performance. Hint-faulting technology, as a kernel optimization technology for NUMA systems, optimizes memory access by periodically scanning the process address space, deciding to migrate pages when page faults occur, and possibly migrating pages to slower nodes when memory is recycled.

[0003] However, the Hint-faulting mechanism may cause frequent page migration, increase memory bandwidth consumption and CPU overhead, especially when the access pattern is unstable. It may not accurately predict future access patterns, resulting in invalid migrations, and it relies on fixed thresholds to determine the timing of migration, which may not be suitable for all scenarios, thus affecting performance. Excessive migration may also cause memory fragmentation and reduce memory utilization.

[0004] In view of the above problems, how to solve the problem that the current Hint-faulting optimization technology will cause frequent page migration, increase memory bandwidth consumption, and at the same time there will be invalid migration and memory fragmentation, affecting system performance, is an urgent problem that needs to be solved by technical personnel in this field. Summary of the invention

[0005] The purpose of the present invention is to provide a page migration method, device, equipment and medium to solve the problem that the current Hint-faulting optimization technology will cause frequent page migration, increase memory bandwidth consumption, and have invalid migration and memory fragmentation, which affects system performance.

[0006] In order to solve the above technical problems, the present invention provides a page migration method, comprising:

[0007] When a target process accesses a target page and triggers a page fault, memory page table information of the target page is obtained, and context information of the target process and processor information of a processor where the target process is located are obtained;

[0008] According to the memory page table information, the context information, the processor information and the preset rule, determining whether the target process is allowed to access the target page; wherein the preset rule is a memory migration optimization rule generated according to the node information, the memory information, the processor information and the process information;

[0009] If yes, migrating the page table entry of the target page to the node where the processor is located, so that the target process can access the target page;

[0010] If not, the current state of the target page is maintained to deny the target process access to the target page.

[0011] On the one hand, obtaining the context information of the target process and the processor information of the processor where the target process is located includes:

[0012] When the page fault is triggered, a page fault exception handling function is executed;

[0013] Obtaining a register status pointer of the page fault exception handling function; wherein the register status pointer is a pointer pointing to a status register of the processor;

[0014] The context information and the processor information are acquired according to the register state pointer.

[0015] On the other hand, acquiring the context information and the processor information according to the register state pointer includes:

[0016] When the page fault exception handling function is executed, an extended Berkeley packet filter function mounted on the page fault exception handling function is triggered;

[0017] Acquire the context information and the processor information by using the register state pointer through the extended Berkeley packet filter function;

[0018] Integrate and record the context information and the processor information through the extended Berkeley packet filter function to generate an extended Berkeley packet filter map;

[0019] Correspondingly, judging whether to allow the target process to access the target page according to the memory page table information, the context information, the processor information and a preset rule includes:

[0020] Through the extended Berkeley packet filter function, the memory page table information, the context information, the processor information and a preset rule are used to determine whether the target process is allowed to access the target page.

[0021] On the other hand, the configuration process of the preset rule includes:

[0022] Set the process that is allowed to perform page table entry migration;

[0023] Configure the affinity node corresponding to the process;

[0024] Configure the migration rules of page table entries in memory access mode;

[0025] The memory access mode includes a read mode and a write mode, and the migration rule includes allowing migration and prohibiting migration.

[0026] On the other hand, judging whether to allow the target process to access the target page according to the memory page table information, the context information, the processor information and a preset rule includes:

[0027] Determine the process name, process path and process identifier according to the context information, and determine the corresponding memory access mode and target affinity node;

[0028] According to the process name, the process path and the process identifier, determining whether the target process is a process that allows page table entry migration, determining whether the target affinity node is a pre-configured affinity node corresponding to the target process, and determining whether the migration rule of the page table entry under the memory access mode allows migration;

[0029] If it is confirmed that the target process is a process that is allowed to execute page table entry migration, the target affinity node is a pre-configured affinity node corresponding to the target process, and the migration rule of the page table entry under the memory access mode is to allow migration, then it is confirmed that the target process is allowed to access the target page; otherwise, it is confirmed that the target process is not allowed to access the target page.

[0030] On the other hand, judging whether to allow the target process to access the target page according to the memory page table information, the context information, the processor information and a preset rule includes:

[0031] Determine the page table entry access frequency and the page table entry size according to the memory page table information;

[0032] Determine the memory usage rate of the node where the processor is located according to the current memory usage and the total memory capacity of the node where the processor is located;

[0033] Determine an affinity task set of the node where the processor is located; wherein the affinity task set includes all affinity tasks of the node where the processor is located;

[0034] Determine a migration score according to the page table entry access frequency, the page table entry size and the memory usage rate;

[0035] Determine whether the migration score is greater than 0, and the target process belongs to the affinity task set;

[0036] If it is confirmed that the migration score is greater than 0 and the target process belongs to the affinity task set, the target process is allowed to access the target page;

[0037] If it is confirmed that the migration score is not greater than 0, and / or the target process does not belong to the affinity task set, the target process is not allowed to access the target page.

[0038] On the other hand, after migrating the page table entry of the target page to the node where the processor is located, the method further includes:

[0039] The extended Berkeley packet filter map generated by the extended Berkeley packet filter function is deleted.

[0040] In order to solve the above technical problems, the present invention further provides a page migration device, comprising:

[0041] An acquisition module, used for acquiring memory page table information of the target page when a target process accesses a target page and triggers a page fault, and acquiring context information of the target process and processor information of the processor where the target process is located;

[0042] A judgment module, used to judge whether the target process is allowed to access the target page according to the memory page table information, the context information, the processor information and a preset rule; wherein the preset rule is a memory migration optimization rule generated according to the node information, the memory information, the processor information and the process information; if yes, the migration module is triggered; if no, the retention module is triggered;

[0043] The migration module is used to migrate the page table entry of the target page to the node where the processor is located, so that the target process can access the target page;

[0044] The maintaining module is used to maintain the current state of the target page to deny the target process from accessing the target page.

[0045] In order to solve the above technical problems, the present invention further provides a page migration device, comprising:

[0046] Memory for storing computer programs;

[0047] The processor is used to implement the steps of the above-mentioned page migration method when executing the computer program.

[0048] In order to solve the above technical problem, the present invention further provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the above page migration method are implemented.

[0049] The page migration method provided by the present invention specifically obtains the memory page table information of the target page, and obtains the context information of the target process and the processor information of the processor where the target process is located when a page error is triggered by the target process accessing the target page; based on the memory page table information, the context information, the processor information and the preset rules, it is judged whether the target process is allowed to access the target page; wherein the preset rules are memory migration optimization rules generated based on the node information, the memory information, the processor information and the process information; if so, the page table entry of the target page is migrated to the node where the processor is located to facilitate the target process to access the target page; if not, the current state of the target page is maintained to deny the target process access to the target page.

[0050] The beneficial effect of the present invention is that a method for optimizing the NUMA automatic balancing mechanism is provided. When a target process triggers a page error when accessing a target page, page migration is not performed directly. Instead, whether the target process is allowed to access the target page is judged based on memory page table information, context information, processor information and preset rules. The migration strategy is dynamically judged and optimized based on the preset rules, which can better adapt to various performance requirement scenarios. Only when it is confirmed through the above information and preset rules that the target process is allowed to access the target page, the page table entry of the target page is migrated, thereby avoiding the additional performance overhead caused by frequent page migration and improving the overall performance and efficiency of the system.

[0051] On the other hand, the present invention specifically executes a page fault exception handling function when a page fault is triggered; obtains the register state pointer of the page fault exception handling function, and realizes the acquisition of context information and processor information according to the register state pointer, so as to facilitate the subsequent use of context information and processor information to judge whether to allow the target process to access the target page. The extended Berkeley packet filter function mounted on the page fault exception handling function executes the acquisition of context information and processor information, and executes the judgment of whether to allow the target process to access the target page, and utilizes the flexibility and efficiency of the extended Berkeley packet filter function to improve the execution efficiency of the method. By setting the established rules composed of process matching rules, node affinity settings and memory access mode configuration, a migration matching check based on preset rules is realized. In addition, a migration matching check based on self-learning matching rules is also realized, which can better adapt to various performance demand scenarios, avoid the additional performance overhead caused by page migration, and improve the overall performance and efficiency of the system.

[0052] In addition, the present invention also provides a page migration device, equipment and medium, which have the same effects as above. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] In order to more clearly illustrate the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0054] Figure 1 A local memory access schematic diagram provided for an embodiment of the present invention;

[0055] Figure 2 A schematic diagram of remote memory access provided by an embodiment of the present invention;

[0056] Figure 3 A flow chart of a page migration method provided by an embodiment of the present invention;

[0057] Figure 4 A schematic diagram of a page migration device provided by an embodiment of the present invention;

[0058] Figure 5 A schematic diagram of a page migration device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0059] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0060] The core of the present invention is to provide a page migration method, device, equipment and medium to solve the problem that the current Hint-faulting optimization technology will cause frequent page migration, increase memory bandwidth consumption, and have invalid migration and memory fragmentation, affecting system performance.

[0061] In order to enable those skilled in the art to better understand the solution of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0062] NUMA technology emerged in the development of multi-processor systems to address the limitations of the Uniform Memory Access (UMA) architecture. As the number of processors increases, the memory access conflicts, competition and scalability issues of the UMA architecture become prominent. The NUMA architecture significantly reduces memory access latency and improves system performance by equipping each processor or processor group with a local memory node. Hint-faulting, as a kernel optimization technology for NUMA systems, optimizes memory access by periodically scanning the process address space, determining page migration when a page fault occurs, and possibly migrating pages to slower nodes when memory is recycled. However, hint-faulting may cause frequent page migrations, increase memory bandwidth consumption and processor overhead, especially when the access pattern is unstable. It may not accurately predict future access patterns, resulting in invalid migrations, and it relies on fixed thresholds to determine the timing of migration, which may not be suitable for all scenarios, thereby affecting performance. Excessive migration may also cause memory fragmentation and reduce memory utilization. Therefore, in order to solve the above problems, the present invention provides a page migration method.

[0063] Figure 1 A schematic diagram of local memory access provided by an embodiment of the present invention. The ideal state in NUMA access is as follows Figure 1 As shown, the memory accessed by the processor is all memory within the same node, also known as local memory. There is no need to perform memory migration, which has high access and processing efficiency. Figure 2 A schematic diagram of remote memory access provided by an embodiment of the present invention. In actual operation, it is not guaranteed that all memory accessed by the processor is local memory, and the following may occur: Figure 2 In the case of cross-node memory access, the NUMA hint-faulting mechanism will migrate the memory after confirming that the remote memory is accessed; Figure 2 As shown, since processor 4 accesses memory 3 across nodes, the data in memory 3 will be migrated to memory 2 to ensure that the processor accesses data in the local memory. The page migration method provided by the present invention is described in detail below:

[0064] Figure 3 A flow chart of a page migration method provided by an embodiment of the present invention. Figure 3 As shown, the method includes:

[0065] S10: When a target process accesses a target page and triggers a page fault, memory page table information of the target page is obtained, and context information of the target process and processor information of the processor where the target process is located are obtained.

[0066] In the specific implementation, the system periodically scans the virtual address space of each process (or thread) to identify the currently unused pages. When unused pages are scanned, the system sets the page table entries of these pages to the PAGE_NONE state.

[0067] It should be noted that the PAGE_NONE state means that the page is not mapped to any physical memory, that is, it has no read, write or execute permissions, but still retains its physical address information. When a process attempts to access a page marked as PAGE_NONE, the hardware will detect an access violation and trigger a page fault.

[0068] Therefore, when a target process accesses a target page and the page table entry of the target page is set to PAGE_NONE, a page fault will be triggered and page migration may be required. In order to determine whether to perform page migration, it is necessary to obtain the memory page table information of the target page, the context information of the target process, and the processor information of the processor where the target process is located.

[0069] It should be noted that the memory page table information is the relevant information of the page table entry of the target page, including the page number, physical block number, valid bit, protection bit, etc. The context information of the target process includes the process control block, register value, memory allocation, file descriptor, and signal processing information. The processor information of the processor includes information such as the processor identifier, physical core identifier, and physical package processor identifier. In this embodiment, the specific method for obtaining the memory page table information, context information, and processor information is not limited and depends on the specific implementation situation.

[0070] S11: According to the memory page table information, context information, processor information and preset rules, determine whether the target process is allowed to access the target page; if so, proceed to step S12; if not, proceed to step S13.

[0071] Among them, the preset rules are memory migration optimization rules generated according to node information, memory information, processor information and process information.

[0072] Further, according to the memory page table information, context information, processor information and preset rules, it is determined whether the target process is allowed to access the target page. It should be noted that the preset rules are memory migration optimization rules generated according to the node information, memory information, processor information and process information, and are used to ultimately determine whether the target process is allowed to access the target page according to the memory page table information, context information and processor information.

[0073] In this embodiment, there is no restriction on the specific method of generating the preset rules, and there is no restriction on the specific process of determining whether to allow the target process to access the target page, which depends on the specific implementation situation.

[0074] S12: Migrate the page table entry of the target page to the node where the processor is located, so that the target process can access the target page.

[0075] S13: Maintain the current state of the target page to deny the target process from accessing the target page.

[0076] Finally, when it is confirmed that the target process is allowed to access the target page, the page table entry of the target page is directly migrated to the node where the processor is located, and the page table entry of the target page is restored from the PAGE_NONE state to the normal state, that is, the normal mapping of the target page to the physical memory is restored to facilitate the target process to access the target page. When it is confirmed that the target process is not allowed to access the target page, the current state of the target page is maintained, that is, the page table entry of the target page continues to be maintained in the PAGE_NONE state, thereby denying the target process access to the target page.

[0077] In this embodiment, a method for optimizing the NUMA automatic balancing mechanism is provided. When a target process triggers a page error when accessing a target page, page migration is not performed directly. Instead, whether the target process is allowed to access the target page is determined based on memory page table information, context information, processor information, and preset rules. The migration strategy is dynamically determined and optimized based on the preset rules, which can better adapt to various performance requirement scenarios. Only when it is confirmed through the above information and preset rules that the target process is allowed to access the target page, the page table entry of the target page is migrated, thereby avoiding the additional performance overhead caused by frequent page migration and improving the overall performance and efficiency of the system.

[0078] Based on the above embodiments, in some embodiments, obtaining the context information of the target process and the processor information of the processor where the target process is located includes:

[0079] S101: When a page fault is triggered, a page fault exception handling function is executed;

[0080] S102: Obtaining a register status pointer of a page fault exception handling function; wherein the register status pointer is a pointer to a status register of a processor;

[0081] S103: Acquire context information and processor information according to the register state pointer.

[0082] In order to obtain the context information of the target process and the processor information of the processor where the target process is located, in a specific implementation, when a page fault is triggered, the page fault exception handling function do_page_fault is first executed.

[0083] It should be noted that the page fault exception (i.e., page error) is triggered by a process trying to access a data page that is not currently in physical memory. In this case, the system will execute the page fault exception handling function do_page_fault to load the missing data page from the auxiliary storage (such as a hard disk) into the physical memory. The page fault exception handling function do_page_fault has a register status pointer struct pt_regs *regs, which is a pointer to the status register of the processor. In this embodiment, the context information and processor information of the target process are obtained specifically according to the register status pointer struct pt_regs *regs.

[0084] In this embodiment, when a page error is triggered, the page fault exception handling function is executed; the register status pointer of the page fault exception handling function is obtained, and the context information and processor information are obtained according to the register status pointer, so as to facilitate the subsequent use of the context information and processor information to determine whether the target process is allowed to access the target page.

[0085] Based on the above embodiments, in some embodiments, obtaining context information and processor information according to the register state pointer includes:

[0086] S104: When the page fault exception handling function is executed, the extended Berkeley packet filter function mounted on the page fault exception handling function is triggered;

[0087] S105: Obtain context information and processor information by using register status pointer through extended Berkeley packet filter function;

[0088] S106: integrating and recording the context information and the processor information through an extended Berkeley packet filter function to generate an extended Berkeley packet filter map;

[0089] In order to improve the flexibility and efficiency of method execution, when obtaining context information and processor information, an extended Berkeley Packet Filter (eBPF) function mounted on the page fault exception handling function is specifically triggered.

[0090] It should be noted that the eBPF function is a sandbox program running in the Linux kernel, which allows users to add new functions to the kernel without modifying the kernel source code or loading kernel modules. The eBPF function can be used for various purposes, including network packet filtering, system performance monitoring, security auditing, etc. By inserting probes at the entrance or exit of the target kernel function, the eBPF function can capture function calls and returned parameters, return values ​​and other information, thereby realizing the monitoring and control of system behavior. In this embodiment, the eBPF function is mainly mounted on the system's page fault exception handling function do_page_fault. When the page fault exception handling function do_page_fault is executed, the eBPF function is triggered.

[0091] Furthermore, in order to obtain context information and processor information, the register state pointer struct pt_regs *regs is used to obtain context information and processor information through the eBPF function; at the same time, the context information and processor information are integrated and recorded through the eBPF function to generate an extended Berkeley packet filter map (eBPF map). The eBPFmap is a main data structure used in the eBPF function for data exchange and information transfer between kernel space and user space. The eBPF map is essentially a data structure stored in the kernel in a key / value manner and can be accessed by any eBPF program that knows them.

[0092] Correspondingly, in this embodiment, based on the memory page table information, context information, processor information and preset rules, it is determined whether the target process is allowed to access the target page. Specifically, the eBPF function is used to determine whether the target process is allowed to access the target page using the memory page table information, context information, processor information and preset rules. Since the context information and processor information are integrated and recorded as an eBPF map by the eBPF function, when the eBPF function executes the judgment process, the eBPF map can be directly called to obtain the context information and processor information therein.

[0093] In this embodiment, the extended Berkeley packet filter function mounted on the page fault exception handling function is used to obtain context information and processor information, and to determine whether the target process is allowed to access the target page. The flexibility and efficiency of the extended Berkeley packet filter function are utilized to improve the execution efficiency of the method.

[0094] It is understandable that this solution aims to dynamically judge and optimize the page migration strategy and decide whether to migrate the page across nodes according to the preset rules. In the specific implementation, the preset rules are divided into two types, one is the existing rules and the other is the self-learning matching rules.

[0095] It should be noted that the existing rules need to be configured in advance before the scheme is executed. Specifically, the process matching rules, node affinity settings and memory access modes are built into the eBPF function. The construction and configuration process of the existing rules is described below in conjunction with a specific embodiment:

[0096] Based on the above embodiments, in some embodiments, the configuration process of the preset rules includes:

[0097] S14: Setting a process that allows execution of page table entry migration;

[0098] S15: Configure the affinity node corresponding to the process;

[0099] S16: configure the migration rules of page table entries in memory access mode;

[0100] The memory access mode includes a read mode and a write mode, and the migration rule includes allowing migration and prohibiting migration.

[0101] Specifically, firstly, a process matching rule is configured to specifically set the processes that are allowed to perform page table entry migration; based on the process matching rule, whether page migration is allowed can be determined according to process information in a subsequent determination process.

[0102] Further node affinity settings are performed to specifically configure affinity nodes corresponding to the process. It can be understood that the affinity node corresponding to the process means binding the process to a specific node so that it runs on the node for as long as possible without being migrated to other nodes to improve system performance. Based on the node affinity settings, in the subsequent judgment process, it can be determined whether to migrate the process when cross-node access occurs based on the node affinity settings of the process.

[0103] Finally, set the migration rules of the page table entries corresponding to the memory access mode, and specifically configure the migration rules of the page table entries under the memory access mode. It should be noted that the memory access mode includes read mode and write mode, and the migration rules include allowing migration and prohibiting migration. In other words, the migration rules for whether to migrate cross-node access in a specific memory access mode (read mode or write mode) are specifically configured, and a judgment is made based on the specific memory access mode when the process accesses the memory.

[0104] In this embodiment, by setting established rules consisting of process matching rules, node affinity settings and memory access mode configurations, migration matching checks based on existing rules are implemented, which can better adapt to various performance requirement scenarios, avoid the additional performance overhead caused by page migration, and improve the overall performance and efficiency of the system.

[0105] Based on the pre-configured established rules, in some embodiments, judging whether to allow the target process to access the target page according to the memory page table information, context information, processor information and preset rules includes:

[0106] S111: Determine the process name, process path, and process identifier according to the context information, and determine the corresponding memory access mode and target affinity node;

[0107] S112: judging whether the target process is a process that allows page table entry migration according to the process name, process path and process identifier, judging whether the target affinity node is a pre-configured affinity node corresponding to the target process, and judging whether the migration rule of the page table entry in the memory access mode allows migration;

[0108] S113: If it is confirmed that the target process is a process that is allowed to execute page table entry migration, the target affinity node is a pre-configured affinity node corresponding to the target process, and the migration rule of the page table entry in the memory access mode is to allow migration, then it is confirmed that the target process is allowed to access the target page, otherwise it is confirmed that the target process is not allowed to access the target page.

[0109] In the specific implementation, in order to determine whether the target process is allowed to access the target page, the eBPF function determines the process name, process path and process identifier according to the context information, and determines the memory access mode and target affinity node corresponding to the target process.

[0110] Furthermore, the eBPF function determines whether the target process is a process that allows page table entry migration based on the process name, process path and process identifier, determines whether the target affinity node is a pre-configured affinity node corresponding to the target process, and determines whether the migration rule of the page table entry in the memory access mode allows migration.

[0111] If it is confirmed that the target process is a process that allows page table entry migration, the target affinity node is a pre-configured affinity node corresponding to the target process, and the migration rule of the page table entry in the memory access mode is to allow migration, then it is confirmed that the target process is allowed to access the target page; if it is confirmed that the target process is not a process that allows page table entry migration, and / or the target affinity node is not a pre-configured affinity node corresponding to the target process, and / or the migration rule of the page table entry in the memory access mode is to prohibit migration, then it is confirmed that the target process is not allowed to access the target page. In this way, a migration matching check based on existing rules is implemented, which can better adapt to various performance requirement scenarios, avoid the additional performance overhead caused by page migration, and improve the overall performance and efficiency of the system.

[0112] The preset rules of this solution also include self-learning matching rules. Under the self-learning matching rules, the eBPF function collects information based on node affinity, page table access frequency, page table block size, etc. for processing. Specifically, based on the above embodiments, in some embodiments, according to the memory page table information, context information, processor information and preset rules, it is determined whether to allow the target process to access the target page, including:

[0113] S114: Determine the page table entry access frequency and page table entry size according to the memory page table information;

[0114] S115: Determine the memory usage rate of the node where the processor is located according to the current memory usage and the total memory capacity of the node where the processor is located;

[0115] S116: Determine an affinity task set of the node where the processor is located; wherein the affinity task set includes all affinity tasks of the node where the processor is located;

[0116] S117: Determine a migration score according to the page table entry access frequency, the page table entry size, and the memory usage rate;

[0117] S118: Determine whether the migration score is greater than 0 and the target process belongs to the affinity task set; if so, proceed to step S119; if not, proceed to step S120;

[0118] S119: Allow the target process to access the target page;

[0119] S120: The target process is not allowed to access the target page.

[0120] In the specific implementation, based on the self-learning matching rules, data collection is first required. Specifically, the page table entry access frequency and page table entry size are determined based on the memory page table information. At the same time, the memory usage rate of the node where the processor is located is determined based on the current memory usage and total memory capacity of the node where the processor is located. The specific formula is as follows:

[0121] U[j]=C[j] / T[j];

[0122] Among them, U[j] is the memory usage of node j, C[j] is the current memory usage of node j, and T[j] is the total memory capacity of node j.

[0123] Furthermore, the affinity task set P[j] of the node where the processor is located is determined. It can be understood that the affinity task of a node refers to scheduling tasks to a specific node to achieve a more flexible and complex scheduling strategy; the affinity task set P[j] includes all affinity tasks of the node j where the processor is located.

[0124] The migration score is determined based on the page table entry access frequency, page table entry size, and memory usage. The formula is as follows:

[0125] Score[i][j]=A[i]×S[i]×(1-U[j]);

[0126] Among them, Score[i][j] is the migration score of page table entry i to node j, A[i] is the page table entry access frequency of page table entry i, S[i] is the page table entry size (block size) of page table entry i, and U[j] is the memory usage of node j.

[0127] Finally, determine whether the migration score is greater than 0 and the target process belongs to the affinity task set. If it is confirmed that the migration score is greater than 0 and the target process belongs to the affinity task set, that is, Score[i][j]>0 and p∈P[j], the target process is allowed to access the target page; M[i][j]=1 is set to indicate that page table entry i is allowed to migrate to node j. If it is confirmed that the migration score is not greater than 0, and / or the target process does not belong to the affinity task set, that is, Score[i][j]≤0 and / or p∉P[j], the target process is not allowed to access the target page; M[i][j]=0 is set to indicate that page table entry i is not allowed to migrate to node j.

[0128] In this way, migration matching checks based on self-learning matching rules are implemented, which can better adapt to various performance requirement scenarios, avoid the additional performance overhead caused by page migration, and improve the overall performance and efficiency of the system.

[0129] In addition, it should be noted that the two preset rules provided by this solution can be applied at the same time, that is, based on both the existing rules and the self-learning matching rules, whether the target process is allowed to access the target page is judged; they can also be applied separately, that is, only based on the existing rules to judge whether the target process is allowed to access the target page, or only based on the self-learning matching rules to judge whether the target process is allowed to access the target page. In addition, considering the differences between different nodes and different processors, in order to improve the efficiency of cross-node access of processes, dedicated preset rules can be specified for specific nodes and / or specific processors and / or specific processes; for example, the preset rules corresponding to process A are set to existing rules, the preset rules corresponding to process B are set to self-learning matching rules, and the preset rules corresponding to process C are set to existing rules and self-learning matching rules, so that when each process needs to access across nodes, the access permission judgment process is executed according to the corresponding preset rules, which can better adapt to various performance demand scenarios and has higher flexibility.

[0130] Based on the above embodiment, in some embodiments, after migrating the page table entry of the target page to the node where the processor is located, the method further includes:

[0131] S17: Delete the extended Berkeley packet filter map generated by the extended Berkeley packet filter function.

[0132] In a specific implementation, after the page table entry of the target page is migrated to the node where the processor is located, the data in the eBPF map recorded by the eBPF function is no longer useful. In order to save storage space, the eBPF map is further deleted. At the same time, after the target process is denied access to the target page, the eBPF map can also be deleted in order to save storage space.

[0133] In the above embodiments, the page migration method is described in detail. The present invention also provides a corresponding embodiment of the page migration device.

[0134] Figure 4 A schematic diagram of a page migration device provided by an embodiment of the present invention. Figure 4 As shown, the device comprises:

[0135] The acquisition module 10 is used to acquire the memory page table information of the target page when the target process accesses the target page and triggers a page fault, and acquire the context information of the target process and the processor information of the processor where the target process is located.

[0136] The judgment module 11 is used to judge whether the target process is allowed to access the target page based on the memory page table information, context information, processor information and preset rules; wherein the preset rules are memory migration optimization rules generated based on the node information, memory information, processor information and process information; if so, the migration module 12 is triggered; if not, the retention module 13 is triggered.

[0137] The migration module 12 is used to migrate the page table entry of the target page to the node where the processor is located, so that the target process can access the target page.

[0138] The maintaining module 13 is used to maintain the current state of the target page to deny the target process from accessing the target page.

[0139] In some embodiments, the acquisition module 10 includes:

[0140] The execution submodule is used to execute the page fault exception handling function when a page fault is triggered;

[0141] A first acquisition submodule is used to acquire a register status pointer of a page fault exception handling function; wherein the register status pointer is a pointer to a status register of a processor;

[0142] The second acquisition submodule is used to acquire context information and processor information according to the register state pointer.

[0143] In some embodiments, the second acquisition submodule includes:

[0144] A trigger submodule is used to trigger the extended Berkeley packet filter function mounted on the page fault exception handling function when the page fault exception handling function is executed;

[0145] A third acquisition submodule is used to acquire context information and processor information by using a register state pointer through an extended Berkeley packet filter function;

[0146] A recording submodule, for integrating and recording the context information and the processor information through the extended Berkeley packet filter function to generate an extended Berkeley packet filter map;

[0147] Correspondingly, the judgment module 11 is specifically used to judge whether to allow the target process to access the target page by extending the Berkeley packet filter function and using the memory page table information, context information, processor information and preset rules.

[0148] In some embodiments, the configuration process of preset rules specifically includes setting processes that are allowed to execute page table entry migration; configuring affinity nodes corresponding to the processes; configuring migration rules for page table entries under memory access mode; wherein the memory access mode includes read mode and write mode, and the migration rules include allowing migration and prohibiting migration.

[0149] In some embodiments, the determination module 11 includes:

[0150] A first determination submodule is used to determine a process name, a process path, and a process identifier according to context information, and to determine a corresponding memory access mode and a target affinity node;

[0151] The first judgment submodule is used to judge whether the target process is a process that allows page table entry migration, judge whether the target affinity node is a pre-configured affinity node corresponding to the target process, and judge whether the migration rule of the page table entry in the memory access mode is to allow migration according to the process name, process path and process identifier; if it is confirmed that the target process is a process that allows page table entry migration, the target affinity node is a pre-configured affinity node corresponding to the target process, and the migration rule of the page table entry in the memory access mode is to allow migration, then it is confirmed that the target process is allowed to access the target page, otherwise it is confirmed that the target process is not allowed to access the target page.

[0152] In some embodiments, the determination module 11 includes:

[0153] A second determination submodule is used to determine the page table entry access frequency and the page table entry size according to the memory page table information;

[0154] The third determination submodule is used to determine the memory usage rate of the node where the processor is located according to the current memory usage and the total memory capacity of the node where the processor is located;

[0155] The fourth determination submodule is used to determine the affinity task set of the node where the processor is located; wherein the affinity task set includes all affinity tasks of the node where the processor is located;

[0156] A fifth determination submodule, used to determine a migration score according to a page table entry access frequency, a page table entry size, and a memory usage rate;

[0157] The second judgment submodule is used to judge whether the migration score is greater than 0 and the target process belongs to the affinity task set; if it is confirmed that the migration score is greater than 0 and the target process belongs to the affinity task set, the target process is allowed to access the target page; if it is confirmed that the migration score is not greater than 0 and / or the target process does not belong to the affinity task set, the target process is not allowed to access the target page.

[0158] In some embodiments, it also includes:

[0159] Remove submodule for removing Extended Berkeley Packet Filter maps generated by the Extended Berkeley Packet Filter functions.

[0160] Since the embodiments of the apparatus part correspond to the embodiments of the method part, please refer to the description of the embodiments of the method part for the embodiments of the apparatus part, which will not be repeated here.

[0161] In addition, the present invention also provides a computer program product, including a computer program or instructions, which implement the steps of the above-mentioned page migration method when executed by a processor.

[0162] Figure 5 A schematic diagram of a page migration device provided by an embodiment of the present invention. Figure 5 As shown, the page migration device includes:

[0163] A memory 20, for storing computer programs;

[0164] The processor 21 is used to implement the steps of the page migration method mentioned in the above embodiment when executing a computer program.

[0165] The page migration device provided in this embodiment may include but is not limited to a smart phone, a tablet computer, a laptop computer, or a desktop computer.

[0166] Among them, the processor 21 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 21 can be implemented in at least one hardware form of a digital signal processor (DSP), a field programmable gate array (FPGA), and a programmable logic array (PLA). The processor 21 may also include a main processor and a coprocessor. The main processor is a processor for processing data in an awake state, also known as a central processing unit (CPU); the coprocessor is a low-power processor for processing data in a standby state. In some embodiments, the processor 21 may be integrated with a graphics processing unit (GPU), and the GPU is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 21 may also include an artificial intelligence (AI) processor, which is used to process computing operations related to machine learning.

[0167] The memory 20 may include one or more computer-readable storage media, which may be non-transitory. The memory 20 may also include a high-speed random access memory, and a non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In this embodiment, the memory 20 is at least used to store the following computer program 201, wherein, after the computer program is loaded and executed by the processor 21, it can implement the relevant steps of the page migration method disclosed in any of the aforementioned embodiments. In addition, the resources stored in the memory 20 may also include an operating system 202 and data 203, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system 202 may include Windows, Unix, Linux, etc. Data 203 may include but is not limited to data involved in the page migration method.

[0168] In some embodiments, the page migration device may further include a display screen 22 , an input / output interface 23 , a communication interface 24 , a power supply 25 , and a communication bus 26 .

[0169] Those skilled in the art will understand that Figure 5 The structure shown in the figure does not constitute a limitation on the page migration device, and may include more or fewer components than those shown in the figure.

[0170] Finally, the present invention also provides an embodiment corresponding to a computer-readable storage medium. The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps recorded in the above method embodiment are implemented.

[0171] It is understandable that if the method in the above embodiment is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium to execute all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk, etc. Various media that can store program codes.

[0172] The above is a detailed introduction to a page migration method, device, equipment and medium provided by the present invention. The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the embodiments can be referenced to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description. It should be pointed out that for ordinary technicians in this technical field, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of protection of the present invention.

[0173] It should also be noted that, in this specification, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

Claims

1. A page migration method, characterized in that: include: When a target process accesses a target page and triggers a page fault, memory page table information of the target page is obtained, and context information of the target process and processor information of a processor where the target process is located are obtained; According to the memory page table information, the context information, the processor information and the preset rule, determining whether the target process is allowed to access the target page; wherein the preset rule is a memory migration optimization rule generated according to the node information, the memory information, the processor information and the process information; If yes, migrating the page table entry of the target page to the node where the processor is located, so that the target process can access the target page; If not, the current state of the target page is maintained to deny the target process access to the target page.

2. The page migration method according to claim 1, characterized in that: Acquiring the context information of the target process and the processor information of the processor where the target process is located, including: When the page fault is triggered, a page fault exception handling function is executed; Obtaining a register status pointer of the page fault exception handling function; wherein the register status pointer is a pointer pointing to a status register of the processor; The context information and the processor information are acquired according to the register state pointer.

3. The page migration method according to claim 2, characterized in that: Acquiring the context information and the processor information according to the register state pointer includes: When the page fault exception handling function is executed, an extended Berkeley packet filter function mounted on the page fault exception handling function is triggered; Acquire the context information and the processor information by using the register state pointer through the extended Berkeley packet filter function; Integrate and record the context information and the processor information through the extended Berkeley packet filter function to generate an extended Berkeley packet filter map; Correspondingly, judging whether to allow the target process to access the target page according to the memory page table information, the context information, the processor information and a preset rule includes: Through the extended Berkeley packet filter function, the memory page table information, the context information, the processor information and a preset rule are used to determine whether the target process is allowed to access the target page.

4. The page migration method according to claim 1, characterized in that: The configuration process of the preset rules includes: Set the process that is allowed to perform page table entry migration; Configure the affinity node corresponding to the process; Configure the migration rules of page table entries in memory access mode; The memory access mode includes a read mode and a write mode, and the migration rule includes allowing migration and prohibiting migration.

5. The page migration method according to claim 4, characterized in that: Judging whether to allow the target process to access the target page according to the memory page table information, the context information, the processor information and a preset rule includes: Determine the process name, process path and process identifier according to the context information, and determine the corresponding memory access mode and target affinity node; According to the process name, the process path and the process identifier, determining whether the target process is a process that allows page table entry migration, determining whether the target affinity node is a pre-configured affinity node corresponding to the target process, and determining whether the migration rule of the page table entry under the memory access mode allows migration; If it is confirmed that the target process is a process that is allowed to execute page table entry migration, the target affinity node is a pre-configured affinity node corresponding to the target process, and the migration rule of the page table entry under the memory access mode is to allow migration, then it is confirmed that the target process is allowed to access the target page; otherwise, it is confirmed that the target process is not allowed to access the target page.

6. The page migration method according to claim 1, characterized in that: Judging whether to allow the target process to access the target page according to the memory page table information, the context information, the processor information and a preset rule includes: Determine the page table entry access frequency and the page table entry size according to the memory page table information; Determine the memory usage rate of the node where the processor is located according to the current memory usage and the total memory capacity of the node where the processor is located; Determine an affinity task set of the node where the processor is located; wherein the affinity task set includes all affinity tasks of the node where the processor is located; Determine a migration score according to the page table entry access frequency, the page table entry size and the memory usage rate; Determine whether the migration score is greater than 0, and the target process belongs to the affinity task set; If it is confirmed that the migration score is greater than 0 and the target process belongs to the affinity task set, the target process is allowed to access the target page; If it is confirmed that the migration score is not greater than 0, and / or the target process does not belong to the affinity task set, the target process is not allowed to access the target page.

7. The page migration method according to claim 3, characterized in that: After migrating the page table entry of the target page to the node where the processor is located, the method further includes: The extended Berkeley packet filter map generated by the extended Berkeley packet filter function is deleted.

8. A page migration device, characterized in that: include: An acquisition module, used for acquiring memory page table information of the target page when a target process accesses a target page and triggers a page fault, and acquiring context information of the target process and processor information of the processor where the target process is located; A judgment module, used to judge whether the target process is allowed to access the target page according to the memory page table information, the context information, the processor information and a preset rule; wherein the preset rule is a memory migration optimization rule generated according to the node information, the memory information, the processor information and the process information; if yes, the migration module is triggered; if no, the retention module is triggered; The migration module is used to migrate the page table entry of the target page to the node where the processor is located, so that the target process can access the target page; The maintaining module is used to maintain the current state of the target page to deny the target process from accessing the target page.

9. A page migration device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the page migration method according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the page migration method according to any one of claims 1 to 7 are implemented.