One-to-one delay adjustment method, electronic device and medium based on key-value database
By using a delay adjustment method based on key-value database in chip design, the delay adjustment module is built, which solves the problem of large workload and low efficiency of chip delay adjustment, and achieves more efficient timing optimization.
Patent Information
- Application Number
- CN202510158568.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-13
- Publication Date
- 2025-04-18
- Estimated Expiration
- 2045-02-13
AI Technical Summary
During the chip design process, directly establishing the connection between the smallest component units based on the logical interconnection relationship will affect the timing performance of the chip, resulting in the need to insert a delay module to optimize the timing, but this leads to the huge workload of chip delay adjustment and low efficiency.
A one-to-one delay adjustment method based on the key-value database is adopted. By inserting the delay adjustment configuration code before the connection definition code of the minimum component unit at the initiator, and a key-value database is constructed based on lexical analysis, and a delay adjustment module is inserted between the minimum component unit at the initiator and the receiving end.
The workload of chip delay adjustment is reduced, the chip delay adjustment efficiency is improved, and more efficient timing optimization is achieved.
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Figure CN119623364B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of chip technology, and in particular to a one-to-one delay adjustment method based on a key-value database, an electronic device and a medium. Background Art
[0002] In the chip design process, it is necessary to first establish the logical interconnection relationship between the chip components, and then establish the physical connection based on the logical interconnection relationship and physical layout and wiring. The chip components are composed of the smallest component units interconnected. In the process from logical interconnection to physical interconnection, the interconnection relationship between the smallest component units remains unchanged. However, due to different layout and wiring methods, the distance and type between different connections may be different. Especially when the distance is too long, directly establishing the connection between the smallest component units in the way of logical interconnection will affect the timing performance of the chip. Therefore, it is usually necessary to insert some delay modules between some interconnected smallest component units to optimize the timing of the chip. Due to the large scale of the chip, if the chip design code is directly parsed to achieve delay adjustment, the workload of chip delay adjustment will be huge and the delay adjustment efficiency will be low. It can be seen from this that how to reduce the workload of chip delay adjustment and improve the efficiency of chip delay adjustment has become a technical problem that needs to be solved urgently. Summary of the invention
[0003] The purpose of the present invention is to provide a one-to-one delay adjustment method, electronic device and medium based on a key-value database, which reduces the workload of chip delay adjustment and improves the efficiency of chip delay adjustment.
[0004] According to a first aspect of the present invention, a one-to-one delay adjustment method based on a key-value database is provided, comprising:
[0005] Step S1, inserting a delay adjustment configuration code before the connection definition code of the minimum component unit of the initiating end, the minimum component unit of the initiating end corresponds to only one minimum component unit of the receiving end that needs delay adjustment;
[0006] Step S2, using the delay adjustment configuration code corresponding to the initiating end minimum component unit as key1, using the connection definition code of the initiating end minimum component unit as value1, and storing the key-value pair consisting of key1 and value1 in a preset key-value database, wherein value1 includes the connection name, the initiating end minimum component unit identifier, the receiving end minimum component unit identifier, and the component module identifiers to which the initiating end minimum component unit and the receiving end minimum component unit belong, the initiating end minimum component unit interface name, and the receiving end minimum component unit interface name;
[0007] Step S3, analyzing key1 by lexical analysis, extracting the delay adjustment configuration parameter key-value pair corresponding to key1 and storing it in a preset key-value database, wherein the delay adjustment configuration parameter includes connection type, direction, clock identifier and delay level;
[0008] Step S4: inserting a delay adjustment module between the initiating end minimum component unit and the receiving end minimum component unit based on the delay adjustment configuration parameter key-value pair corresponding to value1 and key1 in the preset key-value database.
[0009] According to a second aspect of the present invention, there is provided an electronic device, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions to be executed by the at least one processor, the instructions being configured to execute the method described in the first aspect of the present invention.
[0010] According to a third aspect of the present invention, there is provided a computer-readable storage medium storing computer-executable instructions, wherein the computer instructions are used to execute the method described in the first aspect of the present invention.
[0011] Compared with the prior art, the present invention has obvious advantages and beneficial effects. By means of the above technical solution, the one-to-one delay adjustment method based on the key-value database, the electronic device and the medium provided by the present invention can achieve considerable technical advancement and practicality, and has wide industrial utilization value, and has at least the following beneficial effects:
[0012] The present invention inserts a delay adjustment configuration code before the connection definition code of the minimum component unit of the initiating end and constructs a key value database in combination with lexical analysis. Based on the key value database, a delay adjustment module is inserted between the minimum component unit of the initiating end and the minimum component unit of the receiving end, thereby reducing the workload of chip delay adjustment and improving the chip delay adjustment efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0014] Figure 1 A flow chart of a one-to-one delay adjustment method based on a key-value database provided in an embodiment of the present invention. DETAILED DESCRIPTION
[0015] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.
[0016] The embodiment of the present invention provides a one-to-one delay adjustment method based on a key-value database, such as Figure 1 As shown, including:
[0017] Step S1, inserting a delay adjustment configuration code before the connection definition code of the minimum component unit of the initiating end, the minimum component unit of the initiating end corresponds to only one minimum component unit of the receiving end that needs delay adjustment.
[0018] It should be noted that the initiator minimum component unit is the initiator minimum component unit in the chip design, the receiver minimum component unit is the receiver minimum component unit in the chip design, the minimum component unit is the minimum component unit in the chip design, and the component module in the chip design is composed of interconnected minimum components. The initiator minimum component unit and the receiver minimum component unit described in the embodiment of the present invention are the initiator minimum component unit and the receiver minimum component unit that need to adjust the delay of the connection.
[0019] Step S2, using the delay adjustment configuration code corresponding to the initiating end minimum component unit as key1, using the connection definition code of the initiating end minimum component unit as value1, and storing the key-value pair consisting of key1 and value1 in a preset key-value database, wherein value1 includes the connection name, the initiating end minimum component unit identifier, the receiving end minimum component unit identifier, and the component module identifier to which the initiating end minimum component unit and the receiving end minimum component unit belong, the initiating end minimum component unit interface name, and the receiving end minimum component unit interface name.
[0020] Step S3, analyze key1 by lexical analysis, extract the delay adjustment configuration parameter key-value pair corresponding to key1 and store it in a preset key-value database, wherein the delay adjustment configuration parameters include connection type, direction, clock identifier and delay level.
[0021] It should be noted that step S3 does not directly perform syntax analysis on the chip design code, but uses lexical analysis to analyze key1 and extract the delay adjustment configuration parameter key-value pair corresponding to key1, which reduces the workload of delay adjustment configuration parameter extraction and improves the accuracy of adjustment configuration parameter extraction.
[0022] Step S4: inserting a delay adjustment module between the initiating end minimum component unit and the receiving end minimum component unit based on the delay adjustment configuration parameter key-value pair corresponding to value1 and key1 in the preset key-value database.
[0023] It should be noted that the delay adjustment configuration parameter key-value pair corresponding to value1 and key1 in the preset key-value database has recorded all the attribute information of the delay adjustment module between the minimum component unit of the initiating end and the minimum component unit of the receiving end. Therefore, the delay adjustment module can be directly inserted between the minimum component unit of the initiating end and the minimum component unit of the receiving end based on the delay adjustment configuration parameter key-value pair corresponding to value1 and key1 in the preset key-value database.
[0024] As an embodiment, a delay identifier is set at the beginning and the end of the delay adjustment configuration code, and delay adjustment configuration parameter information is set between the two delay identifiers. By setting the delay identifier, it is convenient to extract the delay adjustment configuration code.
[0025] As an embodiment, step S3 includes:
[0026] Step S31: determine the first delay identifier corresponding to key1 as the start delay identifier, and determine the second delay identifier corresponding to key1 as the end delay identifier.
[0027] Step S32, starting from the start delay mark corresponding to key1, analyze each character one by one:
[0028] If the current character belongs to the first character set, the current character is stored in a first stack, and the first stack is initially empty.
[0029] The first character may specifically be a preset letter set and / or number set, etc.
[0030] If the current character belongs to the second character set, the character string in the current first stack is determined as key2, key2 is stored in the preset second stack, and the first stack is cleared, and the initial state of the second stack is empty.
[0031] The second character set may specifically include an equal sign.
[0032] If the current character belongs to the third character set or the analysis reaches the end delay mark, the character string in the current first stack is determined as value2, and the current second stack key2 and value2 are used as a delay adjustment configuration parameter key-value pair corresponding to a key1, stored in the preset key-value database, and the second stack is cleared.
[0033] The second character set may specifically include a semicolon, a comma, a space, etc. It should be noted that the characters in the second character set and the third character set are different.
[0034] As an embodiment, step S4 includes:
[0035] Step S41: Generate a name for a delay adjustment module based on value1 in the preset key-value database and the delay adjustment configuration parameter key value corresponding to key1.
[0036] Among them, the name of the delay adjustment module is unique to avoid name conflicts and facilitate subsequent tracing.
[0037] Step S42: Generate port information of the delay adjustment module based on value1 in the preset key-value database.
[0038] Step S43: Generate a delay adjustment unit in the delay adjustment module and the port information of the delay adjustment unit based on the delay adjustment configuration parameter key value corresponding to key1 and the port information of the delay adjustment module.
[0039] Step S44: establishing interconnection between the delay adjustment units in the adjustment module and interconnection between the delay adjustment module and the minimum component unit of the initiating end and the minimum component unit of the receiving end.
[0040] As an embodiment, the step S41 includes:
[0041] Step S411, obtain the connection name, the initiator minimum component unit identifier, the receiver minimum component unit identifier and the component module identifier to which the initiator minimum component unit and the receiver minimum component unit belong from value1, and obtain the connection type, direction and clock identifier from the delay adjustment configuration parameter key value corresponding to key1.
[0042] The initiator minimum component unit identifier, the receiver minimum component unit identifier, and the component module identifier to which the initiator minimum component unit and the receiver minimum component unit belong specifically refer to the corresponding instance identifier. The connection type includes bus types or signal types of different protocols. Different clock identifiers correspond to clocks in different clock domains.
[0043] Step S422: Concatenate the connection name, the initiating end minimum component unit identifier, the receiving end minimum component unit identifier, the component module identifiers to which the initiating end minimum component unit and the receiving end minimum component unit belong, the connection type, the direction and the clock identifier to generate the name of the delay adjustment module.
[0044] It should be noted that the naming based on the connection name, the minimum component unit identifier of the initiating end, the minimum component unit identifier of the receiving end, the component module identifier to which the minimum component unit of the initiating end and the minimum component unit of the receiving end belong, the connection type, the direction and the clock identifier can ensure the uniqueness of the name of the delay adjustment module, avoid naming conflicts, and facilitate subsequent tracing.
[0045] As an embodiment, step S42 includes:
[0046] Step S421: determine the name of the minimum component unit interface of the initiator in value1 as the input port name of the delay adjustment module.
[0047] It should be noted that, through step S421, the same name is set for the interface name of the minimum component unit of the initiating end and the input port of the delay adjustment module, and the interface name of the minimum component unit of the initiating end is used, which is convenient for interconnection based on ports with the same name, and because the interface name of the minimum component unit of the initiating end contains information related to the minimum component unit of the initiating end, it is convenient for subsequent tracing.
[0048] Step S422: determine the name of the minimum component unit interface of the receiving end in value1 as the output port name of the delay adjustment module.
[0049] It should be noted that, through step S422, the same name is set for the interface name of the minimum component unit of the receiving end and the output port of the delay adjustment module, and the interface name of the minimum component unit of the receiving end is used, which is convenient for interconnection based on ports with the same name, and because the interface name of the minimum component unit of the receiving end contains information related to the minimum component unit of the receiving end, it is convenient for subsequent tracing.
[0050] As an embodiment, the step S43 includes:
[0051] Step S431: Generate a delay adjustment unit {R1, R2, ..., R n ,...,R N}, R n is the nth delay adjustment unit in the delay adjustment module. Each R n The corresponding RTL codes are the same. n The corresponding RTL code is generated based on the connection type, direction and clock identifier. The value of n ranges from 1 to N, where N is the number of delay levels.
[0052] Among them, a type of delay adjustment unit can be determined based on a set of connection types, directions and clock identifiers, the RTL code of the delay adjustment unit can be pre-set, and delay adjustment modules with the same connection type, direction and clock identifier can reuse the same delay adjustment unit, thereby improving the generation efficiency and accuracy of the delay adjustment module. Each level of delay unit corresponds to a delay of one clock.
[0053] Step S432: Set the input port name of R1 to the input port name of the delay adjustment module, and set R N Set the output port name of the delay adjustment module to the output port name of R n The output port names and R n+1 The input port name of is set to the name generated by concatenating the input port name of the delay adjustment module and the nth sequence number.
[0054] Among them, through step S432, the input port name of R1 can be made consistent with the input port name of the delay adjustment module, and R N The output port name of the delay adjustment module is consistent with the output port name of the delay adjustment module. In addition, the ports of the delay adjustment units that need to be interconnected have the same port name, which is convenient for interconnection based on the ports with the same name, and because the delay adjustment unit interface name contains information related to the minimum component unit of the sending end, it is convenient for subsequent tracing.
[0055] It should be noted that some exemplary embodiments are described as processes or methods depicted as flow charts. Although the flow charts describe the steps as sequential processes, many of the steps can be implemented in parallel, concurrently or simultaneously. In addition, the order of the steps can be rearranged. The process can be terminated when its operation is completed, but it can also have additional steps not included in the accompanying drawings. The process can correspond to a method, function, procedure, subroutine, subprogram, etc.
[0056] An embodiment of the present invention also provides an electronic device, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executed by the at least one processor, and the instructions are configured to execute the method described in the embodiment of the present invention.
[0057] The embodiment of the present invention further provides a computer-readable storage medium storing computer-executable instructions, wherein the computer instructions are used to execute the method described in the embodiment of the present invention.
[0058] The embodiment of the present invention inserts the delay adjustment configuration code before the connection definition code of the minimum component unit of the initiating end and constructs a key-value database in combination with lexical analysis. Based on the key-value database, the delay adjustment module is inserted between the minimum component unit of the initiating end and the minimum component unit of the receiving end, thereby reducing the workload of chip delay adjustment and improving the chip delay adjustment efficiency.
[0059] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. Although the present invention has been disclosed as a preferred embodiment as above, it is not used to limit the present invention. Any technician familiar with this profession can make some changes or modifications to equivalent embodiments of equivalent changes using the technical contents disclosed above without departing from the scope of the technical solution of the present invention. However, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of the technical solution of the present invention.
Claims
1. A one-to-one delay adjustment method based on a key-value database, characterized in that: include: Step S1, inserting a delay adjustment configuration code before the connection definition code of the minimum component unit of the initiating end, the minimum component unit of the initiating end corresponds to only one minimum component unit of the receiving end that needs delay adjustment; Step S2, using the delay adjustment configuration code corresponding to the initiating end minimum component unit as key1, using the connection definition code of the initiating end minimum component unit as value1, and storing the key-value pair consisting of key1 and value1 in a preset key-value database, wherein value1 includes the connection name, the initiating end minimum component unit identifier, the receiving end minimum component unit identifier, and the component module identifiers to which the initiating end minimum component unit and the receiving end minimum component unit belong, the initiating end minimum component unit interface name, and the receiving end minimum component unit interface name; Step S3, analyzing key1 by lexical analysis, extracting the delay adjustment configuration parameter key-value pair corresponding to key1 and storing it in a preset key-value database, wherein the delay adjustment configuration parameter includes connection type, direction, clock identifier and delay level; Step S4: inserting a delay adjustment module between the initiating end minimum component unit and the receiving end minimum component unit based on the delay adjustment configuration parameter key-value pair corresponding to value1 and key1 in the preset key-value database.
2. The method according to claim 1, characterized in that The delay adjustment configuration code is provided with delay identifiers at the beginning and the end, and the delay adjustment configuration parameter information is provided between the two delay identifiers.
3. The method according to claim 2, characterized in that The step S3 comprises: Step S31, determining the first delay mark corresponding to key1 as the start delay mark, and determining the second delay mark corresponding to key1 as the end delay mark; Step S32, starting from the start delay mark corresponding to key1, analyze each character one by one: If the current character belongs to the first character set, the current character is stored in a first stack, and the first stack is initially empty; If the current character belongs to the second character set, the character string in the current first stack is determined as key2, key2 is stored in the preset second stack, and the first stack is cleared, and the initial state of the second stack is empty; If the current character belongs to the third character set or the analysis reaches the end delay mark, the character string in the current first stack is determined as value2, and the current second stack key2 and value2 are used as a delay adjustment configuration parameter key-value pair corresponding to a key1, stored in the preset key-value database, and the second stack is cleared.
4. The method according to claim 1, characterized in that: The step S4 comprises: Step S41, generating a name of a delay adjustment module based on value1 in the preset key-value database and the delay adjustment configuration parameter key value corresponding to key1; Step S42: Generate port information of the delay adjustment module based on value1 in the preset key-value database; Step S43, generating a delay adjustment unit in the delay adjustment module and port information of the delay adjustment unit based on the delay adjustment configuration parameter key value corresponding to key1 and the port information of the delay adjustment module; Step S44: establishing interconnection between the delay adjustment units in the adjustment module and interconnection between the delay adjustment module and the initiating end minimum component unit and the receiving end minimum component unit.
5. The method according to claim 4, characterized in that The step S41 comprises: Step S411, obtaining the connection name, the initiator minimum component unit identifier, the receiver minimum component unit identifier, and the component module identifier to which the initiator minimum component unit and the receiver minimum component unit belong from value1, and obtaining the connection type, direction, and clock identifier from the delay adjustment configuration parameter key value corresponding to key1; Step S422: Concatenate the connection name, the initiating end minimum component unit identifier, the receiving end minimum component unit identifier, the component module identifiers to which the initiating end minimum component unit and the receiving end minimum component unit belong, the connection type, the direction and the clock identifier to generate the name of the delay adjustment module.
6. The method according to claim 4, characterized in that Step S42 includes: Step S421, determine the name of the minimum component unit interface of the initiator in value1 as the input port name of the delay adjustment module; Step S422: determine the name of the minimum component unit interface of the receiving end in value1 as the output port name of the delay adjustment module.
7. The method according to claim 4, characterized in that The step S43 comprises: Step S431: Generate a delay adjustment unit {R1, R2, ..., R n ,...,R N }, R n is the nth delay adjustment unit in the delay adjustment module. Each R n The corresponding RTL codes are the same. n The corresponding RTL code is generated based on the connection type, direction and clock identifier. The value of n ranges from 1 to N, where N is the number of delay levels. Step S432: Set the input port name of R1 to the input port name of the delay adjustment module, and set R N Set the output port name of the delay adjustment module to the output port name of the delay adjustment module. n The output port names and R n+1 The input port name of is set to the name generated by concatenating the input port name of the delay adjustment module and the nth sequence number.
8. An electronic device, characterized in that: include: at least one processor; and, a memory communicatively coupled to the at least one processor; The memory stores instructions to be executed by the at least one processor, wherein the instructions are configured to execute the method according to any one of claims 1 to 7.
9. A computer-readable storage medium, characterized in that: Computer executable instructions are stored, and the computer executable instructions are used to execute the method of any one of the preceding claims 1-7.
Citation Information
Patent Citations
Chip bus delay adjustment method based on gated clock, electronic equipment and medium
CN117787198A
Teaching system for remote hydraulic experiments based on combination of virtual and real
US20200320902A1