High-efficiency topcon cell and preparation method thereof

Abstract

This invention provides a high-efficiency TOPCon cell and its fabrication method, relating to the field of solar cell technology. The cell includes a substrate. A first surface of the substrate includes a grid line region and a non-grid line region. An ultrathin amorphous silicon layer is disposed in the grid line region. A tunneling layer is disposed on the ultrathin amorphous silicon layer. A first conductivity type semiconductor region is disposed on the tunneling layer. A first passivation film B is disposed on the first conductivity type semiconductor region. A first electrode passes through the first passivation film B and is connected to the first conductivity type semiconductor region. A first passivation film A and a first passivation film B are disposed on the non-grid line region. A second conductivity type semiconductor region is disposed on the second conductivity type semiconductor region. A second passivation film A and a second passivation film B are disposed on the second passivation film B. In this invention, the non-grid line region of the first surface does not have the first conductivity type semiconductor region, reducing the parasitic absorption loss of the first conductivity type semiconductor region and improving the photoelectric conversion efficiency of the cell.

Description

Technical Field

[0001] This invention relates to the field of solar cell technology, and in particular to a high-efficiency TOPCon cell and its preparation method. Background Technology

[0002] With the continuous advancement of photovoltaic technology, the conversion efficiency of PERC cells is gradually approaching its theoretical limit. On the one hand, the passivation effect on the back of PERC cells is limited, and carrier recombination remains a significant issue. On the other hand, there are difficulties in further improving light absorption and carrier transport due to limitations in their structure and materials. TOPCon cells, as a next-generation battery technology, are gradually replacing PERC cells.

[0003] Chinese Patent CN220672591U discloses a bifacial TOPcon battery structure, belonging to the field of TOPcon battery technology. It includes an N-type monocrystalline silicon wafer. The back side of the N-type monocrystalline silicon wafer is sequentially provided with a back tunneling oxide layer, a P-type doped polycrystalline silicon layer, a back passivation layer, and a back metal electrode. The front side of the N-type monocrystalline silicon wafer includes a metal region and a non-metal region. The metal region is sequentially provided with a front tunneling oxide layer, an N-type doped polycrystalline silicon layer, a front passivation layer, and a front metal electrode, while the non-metal region is provided with a front passivation layer. The back metal electrode on the back side forms an ohmic contact with the P-type doped polycrystalline silicon layer through the back passivation layer; the front metal electrode on the front side forms an ohmic contact with the N-type doped polycrystalline silicon layer through the front passivation layer. The beneficial effect of this application is that by adopting a bifacial TOPcon battery structure and forming a local TOPcon structure in the front metal region, the conversion efficiency is improved compared to single-sided TOPcon batteries and batteries with a TOPcon structure on the front side.

[0004] In a conventional Topcon battery, the carrier transport process on the back side is as follows:

[0005] a. Generation of photogenerated carriers: When sunlight shines on the TOPcon cell, the cell absorbs photon energy and generates electron-hole pairs in the n-type silicon substrate; in the cell's absorption layer, the photogenerated electrons and holes are separated, with electrons moving towards the negative electrode (n-type region) and holes moving towards the positive electrode (p-type region).

[0006] b. Entering the tunneling silicon oxide layer: The quantum tunneling effect allows electrons to pass through the barrier to the other side when the barrier height is greater than the particle energy;

[0007] c. Entry into the phosphorus-doped poly layer: Electrons entering the phosphorus-doped polycrystalline silicon layer transport laterally within the polycrystalline silicon layer. The doping atoms in the polycrystalline silicon layer provide a large number of free electrons, which move towards the electrode contact region of the battery under the influence of an electric field or due to the presence of a concentration gradient;

[0008] d. Collected by metal electrodes: When electrons are transported to the contact area of ​​the metal electrodes on the back of the battery, the metal electrodes collect these electrons to form a current, thus completing the carrier transport process and realizing the conversion from light energy to electrical energy;

[0009] However, poly-doping introduces parasitic absorption losses. Parasitic absorption loss refers to the phenomenon where, during battery operation, photons are not effectively absorbed and converted into electrical energy by the active region (the region that generates photogenerated carriers and contributes to the battery's output current), but are instead absorbed by other non-active materials within the battery, resulting in energy loss. The parasitic absorption of light by the poly-doped layer reduces the number of photons reaching the active region of the battery. Photogenerated carriers are a key factor in current generation; their reduction lowers the battery's short-circuit current. Short-circuit current is one of the key parameters determining the photoelectric conversion efficiency of a solar cell; a decrease in short-circuit current leads to a decline in the battery's photoelectric conversion efficiency. Summary of the Invention

[0010] This invention provides a high-efficiency TOPCon battery and its fabrication method, which solves the technical problem that the parasitic absorption of light by the doped poly layer in current TOPCon batteries reduces the number of photons reaching the active region of the battery, thereby causing a decrease in the photoelectric conversion efficiency of the battery.

[0011] To address the aforementioned technical problems, this invention discloses a high-efficiency TOPCon battery, comprising: a substrate; a first surface of the substrate including a grid line region and a non-grid line region; an ultrathin amorphous silicon layer disposed in the grid line region; a tunneling layer disposed on the ultrathin amorphous silicon layer; a first conductivity type semiconductor region disposed on the tunneling layer; a first passivation film B disposed on the first conductivity type semiconductor region; a first electrode passing through the first passivation film B and connected to the first conductivity type semiconductor region; a first passivation film A disposed on the non-grid line region; a first passivation film B disposed on the first passivation film A; a second conductivity type semiconductor region disposed on the second conductivity type semiconductor region; a second passivation film A disposed on the second passivation film A; a second passivation film B disposed on the second passivation film B; and a second electrode disposed on the second passivation film B, one end of which sequentially passes through the second passivation film B and the second passivation film A and is connected to the second conductivity type semiconductor region.

[0012] Preferably, the width of the semiconductor region of the first conductivity type is 1.2-1.8 times the width of the first electrode.

[0013] Preferably, the thickness of the ultrathin amorphous silicon layer is 0.1-5 nm.

[0014] Preferably, the thickness of the first passivation film A and the second passivation film A is 0.1-6 nm, the thickness of the first passivation film B and the second passivation film B is 40-100 nm, the first passivation film A and the second passivation film A are aluminum oxide layers, and the first passivation film B and the second passivation film B are single-layer films selected from silicon nitride film, hydrogen-containing silicon nitride film, silicon oxide film, silicon oxynitride film, magnesium fluoride MgF2, zinc sulfide ZnS, titanium dioxide TiO2 and cerium oxide CeO2, or multilayer film structures composed of at least two layers of the above materials.

[0015] This application also provides a method for preparing a high-efficiency TOPCon battery, comprising:

[0016] The ultrathin amorphous silicon layer formation operation is performed to form an ultrathin amorphous silicon layer in the gate line region of the first surface of the substrate;

[0017] Tunneling layer formation operation on ultrathin amorphous silicon layer;

[0018] The first conductivity type semiconductor region formation operation on the tunneling layer includes laser processing, which includes either laser oxidation of the gate line region or laser modification of the non-gate line region, and also includes etching and cleaning the first surface of the substrate so that only the tunneling layer and the first conductivity type semiconductor region remain in the gate line region, forming a Poly finger structure.

[0019] The first passivation film A is formed on the first surface of the substrate;

[0020] The first passivation film B is formed on the first passivation film A;

[0021] A first electrode forming operation is performed to form a first electrode that passes through the first passivation film B and the first passivation film A and is connected to the semiconductor region of the first conductivity type.

[0022] The second conductivity type semiconductor region is formed on the second surface of the substrate;

[0023] The second passivation film A is formed on the semiconductor region of the second conductivity type;

[0024] The second passivation film B is formed on the second passivation film A;

[0025] The second electrode formation operation involves forming a second electrode that passes through the second passivation film B and the second passivation film A and is connected to the semiconductor region of the second conductivity type.

[0026] Preferably, the formation operation of the first conductivity type semiconductor region includes either preparing doped amorphous silicon and then annealing and crystallizing it into doped polycrystalline silicon, or preparing undoped polycrystalline silicon and then doping it into doped polycrystalline silicon.

[0027] Preferably, the doping concentration of the intrinsic amorphous silicon on the first surface is 2E20cm⁻¹. -3 ~6E21cm -3 .

[0028] Preferably, the second conductivity type semiconductor region is prepared by a diffusion process.

[0029] Preferably, the diffusion concentration for diffusion into the intrinsic amorphous silicon on the second surface is 1E19cm⁻¹. -3 ~2E21cm -3 .

[0030] Preferably, the laser energy is 30-60W and the laser spot size is 50-150µm.

[0031] The technical solution of this invention has the following advantages: This invention provides a high-efficiency TOPCon cell and its fabrication method, relating to the field of solar cell technology. The TOPCon cell includes a substrate, a first surface of the substrate including a grid line region and a non-grid line region, an ultrathin amorphous silicon layer disposed in the grid line region, a tunneling layer disposed on the ultrathin amorphous silicon layer, a first conductivity type semiconductor region disposed on the tunneling layer, a first passivation film B disposed on the first conductivity type semiconductor region, a first electrode passing through the first passivation film B and connected to the first conductivity type semiconductor region, a first passivation film A disposed on the non-grid line region, a first passivation film B disposed on the first passivation film A, a second conductivity type semiconductor region disposed on the second conductivity type semiconductor region, a second passivation film A disposed on the second passivation film A, a second passivation film B disposed on the second passivation film B, and a second electrode disposed on the second passivation film B. One end of the second electrode passes through the second passivation film B and the second passivation film A sequentially and is connected to the second conductivity type semiconductor region. In this invention, the non-grid line region of the first surface does not have the first conductivity type semiconductor region, reducing the parasitic absorption loss of the first conductivity type semiconductor region and improving the photoelectric conversion efficiency of the TOPCon cell.

[0032] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention may be realized and obtained by means of the means particularly pointed out in the written description and the accompanying drawings.

[0033] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0034] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings:

[0035] Figure 1 This is a schematic diagram of a high-efficiency TOPCon battery structure according to the present invention;

[0036] Figure 2 This is a schematic diagram of the cleaning device structure in the high-efficiency TOPCon battery preparation method of the present invention;

[0037] Figure 3 This is a schematic diagram of the internal structure of the cleaning ring in the high-efficiency TOPCon battery preparation method of the present invention;

[0038] Figure 4 For the present invention Figure 3 Enlarged view of the structure at point A in the middle;

[0039] Figure 5 This is a top view of the support plate in the high-efficiency TOPCon battery fabrication method of the present invention;

[0040] Figure 6 This is a top view of the cleaning ring in a high-efficiency TOPCon battery fabrication method of the present invention.

[0041] In the diagram: 1. Substrate; 2. Ultrathin amorphous silicon layer; 3. First passivation film A; 4. First passivation film B; 5. Tunneling layer; 6. First conductivity type semiconductor region; 7. First electrode; 8. Second conductivity type semiconductor region; 9. Second passivation film A; 10. Second passivation film B; 11. Second electrode; 12. Cleaning tank; 13. Conveyor belt; 14. Liquid collection tank; 15. Liquid inlet pipe; 16. Connector; 17. Delivery pipe; 18. Drive motor; 19. First gear; 20. Second gear; 21. Cleaning ring; 22. Liquid outlet; 23. Connecting pipe; 24. Support plate; 25. Block; 26. Elastic baffle; 27. Sealing ring; 28. Fixing frame; 29. ​​Connecting column; 30. Return spring; 31. Magnetic strip; 32. Gas collection hood; 33. Exhaust fan blade; 34. Gas collection tank; 35. Air inlet pipe. Detailed Implementation

[0042] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.

[0043] Furthermore, in this invention, the use of terms such as "first" and "second" is for descriptive purposes only and does not specifically refer to any order or sequence, nor is it intended to limit the invention. They are merely used to distinguish components or operations described using the same technical terms and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions and features of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. If a combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by this invention.

[0044] This invention provides a high-efficiency TOPCon battery, such as... Figure 1 As shown, it includes: a substrate 1, the first surface of the substrate 1 including a gate line region and a non-gate line region, an ultrathin amorphous silicon layer 2 disposed in the gate line region, a tunneling layer 5 disposed on the ultrathin amorphous silicon layer 2, a first conductive type semiconductor region 6 disposed on the tunneling layer 5, a first passivation film B4 disposed on the first conductive type semiconductor region 6, a first electrode 7 passing through the first passivation film B4 and connected to the first conductive type semiconductor region 6, a first passivation film A3 disposed on the non-gate line region, a first passivation film B4 disposed on the first passivation film A3, a second conductive type semiconductor region 8 disposed on the second conductive type semiconductor region 8, a second passivation film A9 disposed on the second passivation film A9, a second passivation film B10 disposed on the second passivation film A9, a second electrode 11 disposed on the second passivation film B10, one end of the second electrode 11 passing through the second passivation film B10 and the second passivation film A9 in sequence and connected to the second conductive type semiconductor region 8;

[0045] The width of the first conductivity type semiconductor region 6 is 1.2-1.8 times the width of the first electrode 7;

[0046] The thickness of the ultrathin amorphous silicon layer 2 is 0.1-5 nm;

[0047] The thickness of the first passivation film A3 and the second passivation film A9 is 0.1-6 nm, and the thickness of the first passivation film B4 and the second passivation film B10 is 40-100 nm. The first passivation film A3 and the second passivation film A9 are aluminum oxide layers, and the first passivation film B4 and the second passivation film B10 are single-layer films selected from silicon nitride film, hydrogen-containing silicon nitride film, silicon oxide film, silicon oxynitride film, magnesium fluoride MgF2, zinc sulfide ZnS, titanium dioxide TiO2 and cerium oxide CeO2, or multilayer film structures composed of at least two layers of the above materials.

[0048] The working principle and beneficial effects of the above technical solution are as follows: The substrate 1 can be a silicon substrate 1. An ultrathin amorphous silicon layer 2, a first passivation film A3, and a first passivation film B4 are sequentially disposed on the first surface of the substrate 1. The thickness of the ultrathin amorphous silicon layer 2 is 0.1-5 nm. Several openings are formed in the first passivation film A3 and the first passivation film B4. A tunneling layer 5 is disposed in the openings. The tunneling layer 5 is in contact with the ultrathin amorphous silicon layer 2. A first conductive type semiconductor region 6 is disposed on the tunneling layer 5. A first electrode 7 is disposed on the first conductive type semiconductor region 6. The width of the first conductive type semiconductor region 6 is 1.2-1.8 times the width of the first electrode 7. A second conductive type semiconductor region 6 is sequentially disposed on the second surface of the substrate 1. The device comprises a body region 8, a second passivation film A9, and a second passivation film B10. A second electrode 11 is disposed on the second passivation film B10. One end of the second electrode 11 passes through the second passivation film B10 and the second passivation film A9 in sequence and contacts the second conductive semiconductor region 8. The thicknesses of the first passivation film A3 and the second passivation film A9 are 0.1-6 nm, and the thicknesses of the first passivation film B4 and the second passivation film B10 are 40-100 nm. The first conductive semiconductor region 6 is a doped poly layer. In this invention, the non-gateline region of the first surface is not doped with a polysilicon layer, which reduces the parasitic absorption loss of the first conductive semiconductor region 6 and improves the photoelectric conversion efficiency of the TOPCon cell.

[0049] This application also provides a method for preparing a high-efficiency TOPCon battery, comprising:

[0050] The ultrathin amorphous silicon layer 2 is formed in the gate line region of the first surface of the substrate 1.

[0051] The tunneling layer 5 is formed on the ultrathin amorphous silicon layer 2.

[0052] The first conductive type semiconductor region 6 is formed on the tunneling layer 5. The first conductive type semiconductor region 6 formation operation includes laser processing, which includes either laser oxidation of the gate line region or laser modification of the non-gate line region. It also includes etching and cleaning the first surface of the substrate 1 so that only the tunneling layer 5 and the first conductive type semiconductor region 6 remain in the gate line region, forming a Polyfinger structure.

[0053] The first passivation film A3 is formed on the first surface of the substrate 1.

[0054] The first passivation film B4 is formed on the first passivation film A3;

[0055] The first electrode 7 is formed by forming a first electrode 7 that passes through the first passivation film B4 and the first passivation film A3 and is connected to the first conductivity type semiconductor region 6.

[0056] The second conductivity type semiconductor region 8 is formed on the second surface of the substrate 1.

[0057] The second passivation film A9 is formed on the second conductivity type semiconductor region 8;

[0058] The second passivation film B10 is formed on the second passivation film A9;

[0059] The second electrode 11 is formed by forming a second electrode 11 that passes through the second passivation film B10 and the second passivation film A9 and is connected to the second conductivity type semiconductor region 8;

[0060] The formation operation of the first conductivity type semiconductor region 6 includes either one of the following methods: first preparing doped amorphous silicon and then annealing and crystallizing it into doped polycrystalline silicon, or first preparing undoped polycrystalline silicon and then doping it into doped polycrystalline silicon.

[0061] The doping concentration of the intrinsic amorphous silicon on the first surface is 2E20cm⁻¹. -3 ~6E21cm -3 The doping element is any one of nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), and bismuth (Bi);

[0062] The second conductivity type semiconductor region 8 is fabricated by a diffusion process;

[0063] The diffusion concentration for diffusion on the intrinsic amorphous silicon of the second surface is 1E19cm⁻¹. -3 ~2E21cm -3 The diffusion element is any one of boron (B), aluminum (Al), gallium (Ga), indium (In), and thallium (Tl);

[0064] The laser energy is 30–60W, and the laser spot size is 50–150µm.

[0065] The working principle and beneficial effects of the above technical solution are as follows: When preparing a high-efficiency TOPCon battery, a substrate 1 is first prepared, and then an ultrathin amorphous silicon layer 2, a tunneling layer 5, and a first conductivity type semiconductor region 6 are sequentially prepared on the first surface of the substrate 1. The formation operation of the first conductivity type semiconductor region 6 includes either preparing doped amorphous silicon first and then annealing and crystallizing it into doped polycrystalline silicon, or preparing undoped polycrystalline silicon first and then doping it into doped polycrystalline silicon. The doping concentration of the intrinsic amorphous silicon on the first surface is 2E20cm⁻¹. -3 ~6E21cm -3The preferred size is 2E20cm. -3 ~6E20cm -3 The doping element is any one of nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), and bismuth (Bi). Then, the first conductivity type semiconductor region 6 is subjected to laser processing. Laser processing includes either laser oxidation of the gate region or laser modification of the non-gate region. Laser modification of the non-gate region makes the doped poly layer more porous and easier to etch. The laser energy is 30–60 W, and the laser spot size is 50–150 μm. Next, the first surface of the substrate 1 is etched. The cleaning process leaves only the gate line region with the tunneling layer 5 and the first conductivity type semiconductor region 6, forming a Polyfinger structure. Then, the first passivation film A3 and the first passivation film B4 are fabricated, and the first electrode 7 is fabricated in the first conductivity type semiconductor region 6. Finally, a second conductivity type semiconductor region 8, a second passivation film A9, a second passivation film B10, and a second electrode 11 are fabricated on the second surface of the substrate 1. The second conductivity type semiconductor region 8 is fabricated by a diffusion process, and the diffusion concentration of boron diffusion in the intrinsic amorphous silicon of the second surface is 1E19cm⁻¹. -3 ~2E21cm -3 Preferably 1E19cm -3 ~2E20cm -3 The diffusion element is any one of boron (B), aluminum (Al), gallium (Ga), indium (In), and thallium (Tl). In this invention, by removing the doped poly layer and tunneling layer 5 from the non-gateline region of the first surface, the non-gateline region of the first surface is free of the first conductivity type semiconductor region 6, thereby reducing the parasitic absorption loss of the first conductivity type semiconductor region 6 and improving the photoelectric conversion efficiency of the TOPCon cell.

[0066] In one embodiment, such as Figures 2-6 As shown, the first surface is etched and cleaned with an etchant. After the etching and cleaning is completed, the substrate 1 is cleaned with a cleaning device to remove the residual etchant. The cleaning device includes a cleaning tank 12, a conveyor belt 13 is installed inside the cleaning tank 12, and the two ends of the conveyor belt 13 pass through the openings on the left and right sides of the cleaning tank 12 and extend to the outside of the cleaning tank 12 and are driven by a first drive mechanism. A liquid collection tank 14 is installed at the bottom of the cleaning tank 12 and is located below the conveyor belt 13. An inlet pipe 15 is rotatably installed at the upper end of the cleaning tank 12. The upper end of the inlet pipe 15 is connected to the delivery pipe 17 through a connector 16. The lower end of the inlet pipe 15 extends above the conveyor belt 13 and is equipped with a cleaning mechanism. A second drive mechanism is installed on the cleaning tank 12 to drive the inlet pipe 15 to rotate.

[0067] The working principle and beneficial effects of the above technical solution are as follows: After the etchant cleans the first surface, it remains on the first surface, which deteriorates the adhesion and uniformity of the subsequent first passivation film A3, thereby reducing the photoelectric conversion efficiency of the TOPCon cell. Therefore, a cleaning device is needed to clean the substrate 1 to remove the residual etchant. Specifically, the etched substrate 1 is placed on the conveyor belt 13, which moves the substrate 1 to below the cleaning mechanism. The conveyor pipe 17 delivers cleaning solution into the inlet pipe 15 through the connector 16. The cleaning solution is then sprayed out through the cleaning mechanism, which cleans the substrate 1 and removes the residual etchant. The remaining corrosive liquid and impurities flow into the collection tank 14 along with the cleaning liquid for collection. The cleaning liquid is sprayed out by the cleaning mechanism to clean the substrate 1, making the surface of the substrate 1 cleaner and providing a good foundation for subsequent processes. This is beneficial for the subsequent passivation process, thereby improving battery performance and further improving the efficiency of TOPCon batteries. In addition, the second drive mechanism can drive the liquid inlet pipe 15 to rotate, thereby driving the cleaning mechanism to rotate, so that the cleaning liquid can be evenly sprayed onto the surface of the substrate 1, avoiding cleaning dead corners, improving the cleaning effect on the substrate 1, further removing impurities and residual corrosive liquid from the surface of the substrate 1, and improving the cleanliness of the surface of the substrate 1.

[0068] In one embodiment, such as Figure 2 As shown, the second drive mechanism includes a drive motor 18, a first gear 19 and a second gear 20. The drive motor 18 is located on the top of the cleaning tank 12. The first gear 19 is located at the output end of the drive motor 18, and the second gear 20 is located on the liquid inlet pipe 15. The first gear 19 and the second gear 20 mesh.

[0069] The working principle and beneficial effects of the above technical solution are as follows: starting the drive motor 18 can drive the first gear 19 to rotate, the first gear 19 rotates to drive the second gear 20 to rotate, the second gear 20 drives the liquid inlet pipe 15 to rotate at the top of the cleaning tank 12, thereby driving the cleaning mechanism to rotate, so that the cleaning liquid is evenly sprayed onto the surface of the substrate 1, improving the cleaning effect.

[0070] In one embodiment, such as Figure 2 , Figure 3 As shown, the cleaning mechanism includes a cleaning ring 21, which is annular in shape. An inlet chamber is provided inside the cleaning ring 21, and several outlet holes 22 are provided on the bottom wall of the cleaning ring 21. The outlet holes 22 are connected to the inside of the inlet chamber. Several connecting pipes 23 are provided between the inlet pipe 15 and the cleaning ring 21. One end of the connecting pipe 23 is connected to the inlet pipe 15, and the other end of the connecting pipe 23 is connected to the inner side wall of the cleaning ring 21.

[0071] The working principle and beneficial effects of the above technical solution are as follows: the cleaning solution can flow into the connecting pipe 23 through the inlet pipe 15, and then into the inlet chamber of the cleaning ring 21 through the connecting pipe 23. Finally, it flows out from the outlet hole 22 and sprays onto the conveyor belt 13, thereby cleaning the substrate 1 and removing impurities and residual corrosion liquid from the surface of the substrate 1. This is beneficial to the adhesion and uniformity of the first passivation film A3, thereby improving the photoelectric conversion efficiency of the TOPCon cell. The rotation of the inlet pipe 15 can drive the cleaning ring 21 to rotate through the connecting pipe 23. When the cleaning ring 21 rotates, it can cause the outlet hole 22 to rotate, so that the cleaning solution sprayed from the outlet hole 22 is evenly sprayed onto the surface of the substrate 1, avoiding continuous cleaning of a certain position of the substrate 1, improving the cleaning effect, achieving efficient cleaning of the substrate 1, improving cleaning efficiency, and benefiting the improvement of the TOPCon cell fabrication efficiency.

[0072] In one embodiment, such as Figure 2 , Figure 3 As shown, a support plate 24 is provided at the bottom of the cleaning ring 21. The support plate 24 is connected to the inner wall of the cleaning tank 12 through a fixing plate. The support plate 24 is arc-shaped. The upper surface of the support plate 24 is adapted to the bottom wall of the cleaning ring 21. The upper surface of the support plate 24 is slidably connected to the bottom wall of the cleaning ring 21.

[0073] The working principle and beneficial effects of the above technical solution are as follows: In order to avoid repeated cleaning of the substrate 1 and waste of cleaning solution, a support plate 24 is set at the bottom of the cleaning ring 21. The support plate 24 is arc-shaped and the upper surface of the support plate 24 is adapted to the bottom wall of the cleaning ring 21. When the cleaning ring 21 rotates, the support plate 24 blocks the lower surface of the cleaning ring 21, so that the liquid outlet 22 at the blocked position of the cleaning ring 21 cannot spray out the cleaning solution, while the unblocked liquid outlet 22 can spray out the cleaning solution to clean the substrate 1 in one go. While ensuring the cleaning effect, the use of cleaning solution is reduced, and the preparation cost is saved.

[0074] In one embodiment, such as Figures 2-6As shown, a sealing mechanism is provided inside the cleaning ring 21, and the sealing mechanism corresponds one-to-one with the liquid outlet 22. The sealing mechanism includes a blocking block 25, which is made of magnetic material. A through hole is provided in the center of the blocking block 25, and several elastic baffles 26 are provided at the lower position of the through hole. The elastic baffles 26 are used to block the through hole. A sealing groove is provided on the outside of the blocking block 25, and a sealing ring 27 is provided in the sealing groove. A fixing frame 28 is provided on the upper surface of the blocking block 25. The lower end of the fixing frame 28 is connected to the upper surface of the blocking block 25. A sliding hole is provided at the upper end of the fixing frame 28. A connecting post 29 is slidably installed in the sliding hole. The upper end of the connecting post 29 is connected to the top wall of the liquid inlet chamber. The lower end of the connecting post 29 extends to the lower part of the sliding hole and is provided with a limiting plate. A return spring 30 is sleeved on the connecting post 29. One end of the return spring 30 is connected to the top wall of the liquid inlet chamber, and the other end of the return spring 30 is connected to the upper end of the fixing frame 28. A magnetic strip 31 is provided on the upper surface of the support plate 24. The magnetic strip 31 is arc-shaped.

[0075] The working principle and beneficial effects of the above technical solution are as follows: The magnetic strip 31 is magnetic. When the plug 25 rotates above the magnetic strip 31, the plug 25, being made of magnetic material (preferably iron), is attracted by the magnetic strip 31 and moves into the outlet hole 22. The plug 25 drives the fixing bracket 28 to slide downward along the connecting column 29, and the return spring 30 is stretched. The plug 25 can seal the outlet hole 22, preventing the cleaning fluid from flowing out of the outlet hole 22 and reducing the waste of cleaning fluid. A sealing ring 27 is set on the outside of the plug 25, which can improve the sealing performance of the plug 25 and improve the sealing effect on the outlet hole 22. The plug 25 moves along the outlet hole 22. During the downward movement of the inner wall of the hole 22, the residual cleaning fluid in the outlet hole 22 can push the elastic baffle 26 upward, thereby flowing back into the inlet chamber. Then, the elastic baffle 26 returns to its original position under the action of elasticity, thus sealing the through hole. When the plug 25 rotates with the cleaning ring 21 to the outside of the support plate 24, the plug 25 loses the attraction of the magnetic strip 31. Under the action of the reset spring 30, the plug 25 returns to its original position, so that the outlet hole 22 opens. The cleaning fluid in the inlet chamber can be evenly sprayed onto the substrate 1 through the outlet hole 22. While avoiding waste of cleaning fluid, it achieves efficient cleaning of the substrate 1, which is beneficial to improving the efficiency of TOPCon battery fabrication.

[0076] In one embodiment, such as Figure 2 As shown, a gas collecting hood 32 is installed outside the liquid inlet pipe 15. The gas collecting hood 32 is funnel-shaped, and the diameter of the lower end of the gas collecting hood 32 is larger than the diameter of the upper end of the gas collecting hood 32. The outer wall of the lower end of the gas collecting hood 32 is connected to the inner wall of the cleaning tank 12. A gas collecting chamber is formed at the upper end of the gas collecting hood 32. An exhaust fan blade 33 is installed on the outer wall of the liquid inlet pipe 15. The exhaust fan blade 33 is located inside the gas collecting chamber. A gas collecting box 34 is installed on the side wall of the cleaning tank 12. The gas collecting box 34 stores the absorbent liquid. The gas collecting box 34 is connected to the inside of the gas collecting chamber through an air inlet pipe 35. The air inlet pipe 35 is inverted L-shaped, and one end of the air inlet pipe 35 is inserted into the absorbent liquid.

[0077] The working principle and beneficial effects of the above technical solution are as follows: When the liquid inlet pipe 15 rotates, it can drive the exhaust fan blade 33 to rotate. The rotation of the exhaust fan blade 33 can cause the gas below the gas collection hood 32 to flow into the gas collection chamber through the gas collection hood 32, and then flow into the gas collection box 34 through the air inlet pipe 35. Some of the gas can be absorbed by the absorbent liquid, and the other part of the gas is stored in the gas collection box 34. Through the above solution, harmful gases generated during the cleaning process can be removed, and harmful gases can be prevented from flowing into the external working environment, thus protecting the working environment and improving the safety of the staff.

[0078] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0079] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0080] Although embodiments of the present invention have been disclosed above, they are not limited to the applications listed in the specification and embodiments. They can be applied to various fields suitable for the present invention. Other modifications can be easily made by those skilled in the art. Therefore, without departing from the general concept defined by the claims and their equivalents, the present invention is not limited to the specific details and illustrations shown and described herein.

Claims

1. A method for fabricating a high-efficiency TOPCon battery, characterized in that, include: The formation operation of an ultrathin amorphous silicon layer (2) is performed in the gate line region of the first surface of the substrate (1); The tunneling layer (5) is formed on the ultrathin amorphous silicon layer (2). The first conductive type semiconductor region (6) is formed on the tunneling layer (5). The first conductive type semiconductor region (6) formation operation includes laser processing, which includes either laser oxidation of the gate line region or laser modification of the non-gate line region, and also includes etching and cleaning the first surface of the substrate (1) so that only the tunneling layer (5) and the first conductive type semiconductor region (6) remain in the gate line region, forming a Poly finger structure. The first passivation film A (3) is formed on the first surface of the substrate (1) in an operation; The first passivation film B(4) is formed on the first passivation film A(3). The first electrode (7) is formed by forming a first electrode (7) that passes through the first passivation film B (4), the first passivation film A (3) and is connected to the first conductivity type semiconductor region (6); The second conductivity type semiconductor region (8) is formed on the second surface of the substrate (1) in an operation of forming the second conductivity type semiconductor region (8); The second passivation film A (9) is formed on the semiconductor region (8) of the second conductivity type. The second passivation film B (10) is formed on the second passivation film A (9). The second electrode (11) is formed by forming a second electrode (11) that passes through the second passivation film B (10), the second passivation film A (9) and is connected to the second conductivity type semiconductor region (8).

2. The method for fabricating a high-efficiency TOPCon battery according to claim 1, characterized in that, The formation operation of the first conductivity type semiconductor region (6) includes either preparing doped amorphous silicon and then annealing and crystallizing it into doped polycrystalline silicon, or preparing undoped polycrystalline silicon and then doping it into doped polycrystalline silicon.

3. The method for preparing a high-efficiency TOPCon battery according to claim 2, characterized in that, The doping concentration of the intrinsic amorphous silicon on the first surface is 2E20cm⁻¹. -3 ~6E21cm -3 .

4. The method for fabricating a high-efficiency TOPCon battery according to claim 1, characterized in that, The second conductivity type semiconductor region (8) is prepared by diffusion process.

5. The method for preparing a high-efficiency TOPCon battery according to claim 4, characterized in that, The diffusion concentration for diffusion on the intrinsic amorphous silicon of the second surface is 1E19cm⁻¹. -3 ~2E21cm -3 .

6. The method for preparing a high-efficiency TOPCon battery according to claim 1, characterized in that, The laser energy is 30–60W, and the laser spot size is 50–150µm.

7. A high-efficiency TOPCon battery, prepared using the high-efficiency TOPCon battery preparation method as described in any one of claims 1-6, characterized in that, include: The substrate (1) has a first surface including a gate line region and a non-gate line region. An ultrathin amorphous silicon layer (2) is disposed in the gate line region. A tunneling layer (5) is disposed on the ultrathin amorphous silicon layer (2). A first conductive semiconductor region (6) is disposed on the tunneling layer (5). A first passivation film B (4) is disposed on the first conductive semiconductor region (6). A first electrode (7) passes through the first passivation film B (4) and is connected to the first conductive semiconductor region (6). A first passivation film A (3) is disposed on the non-gate line region. A first passivation film B (4) is disposed on a passivation film A (3), a second conductivity type semiconductor region (8) is disposed on the second surface of the substrate (1), a second passivation film A (9) is disposed on the second conductivity type semiconductor region (8), a second passivation film B (10) is disposed on the second passivation film A (9), a second electrode (11) is disposed on the second passivation film B (10), one end of the second electrode (11) passes through the second passivation film B (10) and the second passivation film A (9) in sequence and is connected to the second conductivity type semiconductor region (8).

8. A high-efficiency TOPCon battery according to claim 7, characterized in that, The width of the first conductivity type semiconductor region (6) is 1.2-1.8 times the width of the first electrode (7).

9. A high-efficiency TOPCon battery according to claim 7, characterized in that, The thickness of the ultrathin amorphous silicon layer (2) is 0.1-5nm.

10. A high-efficiency TOPCon battery according to claim 7, characterized in that, The thickness of the first passivation film A (3) and the second passivation film A (9) is 0.1-6 nm, and the thickness of the first passivation film B (4) and the second passivation film B (10) is 40-100 nm. The first passivation film A (3) and the second passivation film A (9) are aluminum oxide layers, and the first passivation film B (4) and the second passivation film B (10) are single-layer films of silicon nitride film, hydrogen-containing silicon nitride film, silicon oxide film, silicon oxynitride film, magnesium fluoride MgF2, zinc sulfide ZnS, titanium dioxide TiO2 and cerium oxide CeO2, or multilayer film structures composed of at least two layers of the above materials.

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