High-voltage test circuit and device

Abstract

The invention provides a high-voltage test circuit and device. The high-voltage test circuit comprises a control module, a full-bridge conversion module, a boosting module, an output module and a sampling module, an initial pulse signal with a basic initial duty ratio corresponding to a preset test voltage is output through a control module, a full-bridge conversion module generates a corresponding low-voltage alternating-current voltage according to the initial pulse signal, and a boosting module boosts the low-voltage alternating-current voltage into a high-voltage alternating-current voltage. The output module converts the high-voltage alternating-current voltage into high-voltage direct-current voltage and outputs the high-voltage direct-current voltage to a test end or directly outputs high-voltage alternating current to a voltage test end; the sampling module samples the output module and outputs a sampling signal to the control module; the control module adjusts the duty ratio of the initial pulse signal according to the sampling signal collected each time until the test voltage of the test end is equal to the preset voltage value, so that a voltage control loop is formed, the voltage is monitored in real time and controlled to be stabilized at the preset voltage, and the accurate test voltage is obtained.

Description

Technical Field

[0001] The present application belongs to the field of testing technology, and specifically relates to a high voltage testing circuit and device. Background Art

[0002] At present, the current high-voltage tester solutions all use autotransformers to adjust the voltage under the 50Hz industrial frequency grid voltage, and upgrade the 50Hz step-up transformer to reach the required voltage of 5KV AC, 10KV AC, etc., so as to provide it to the test end for high-voltage testing of related products or equipment.

[0003] However, since the supply of high voltage at the test end is extremely unstable and changes dynamically by dozens of times with the fluctuation of the grid voltage, the test is inaccurate. For example, if the AC220v alternating current changes by 10% within the specified range, the fluctuation range is AC198v----AC242v. The voltage range supplied to the test end after the high voltage boost, which is originally to be increased to 5KV, is as high as AC4500v----AC5500v. The difference between the voltage at the test end and the voltage required by the product under test is too large, which may cause damage to the product under test. Summary of the invention

[0004] The present application provides a high voltage test circuit and device, in order to improve the accuracy of input voltage and thereby reduce the error caused by voltage boost.

[0005] In a first aspect, the present application provides a high voltage test circuit, comprising:

[0006] A control module, used for outputting an initial pulse signal or a controlled pulse signal according to a preset test voltage, wherein the controlled pulse signal is obtained by adjusting the control module based on a sampling signal corresponding to the initial pulse signal;

[0007] A full-bridge conversion module, used to generate a corresponding low-voltage AC voltage according to the initial pulse signal or the controlled pulse signal;

[0008] A boost module, used to boost the low-voltage AC voltage to obtain a high-voltage AC voltage;

[0009] An output module, used to convert the high-voltage AC voltage into a high-voltage DC voltage, and output the high-voltage DC voltage to the test end; or directly output the high-voltage AC voltage to the test end;

[0010] The test end is used to generate a test voltage according to the high-voltage DC voltage or the high-voltage AC voltage to test the product to be tested;

[0011] A sampling module, used for sampling the high-voltage direct current voltage or the high-voltage alternating current voltage of the output module to obtain the sampling signal, and outputting the sampling signal to the control module;

[0012] The adjustment process of the control module includes: adjusting the duty cycle of the initial pulse signal according to the sampling signal to obtain an adjusted controlled pulse signal; and, when a first voltage value corresponding to the adjusted controlled pulse signal is less than a preset voltage value, continuing to adjust the duty cycle of the controlled pulse signal according to the sampling signal corresponding to the controlled pulse signal until the first voltage value is equal to the preset voltage value; wherein the first voltage value is a voltage value calculated based on the sampling value.

[0013] In a second aspect, the present application provides a high voltage testing device, comprising the high voltage testing circuit described in the first aspect.

[0014] It can be seen that in the present application, the control module first outputs an initial pulse signal with a duty cycle that basically corresponds to the preset test voltage, the full-bridge conversion module generates a corresponding low-voltage AC voltage according to the initial pulse signal, the boost module boosts the low-voltage AC voltage to a high-voltage AC voltage, and the output module converts the high-voltage AC voltage into a high-voltage DC voltage and outputs it to the test end or directly outputs the high-voltage AC to the voltage test end; the sampling module then samples the output module and outputs the sampling signal to the control module; the control module adjusts the duty cycle of the initial pulse signal according to the sampling signal collected each time until the test voltage at the test end is equal to the preset voltage value, thus forming a voltage control loop, which monitors and controls the voltage in real time to stabilize at the preset voltage, so as to obtain a more accurate test voltage and reduce the measurement error. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0016] Figure 1 is a structural schematic diagram of a high voltage test circuit provided in an embodiment of the present application;

[0017] Figure 2 is a schematic diagram of a control chip in a control module provided in an embodiment of the present application;

[0018] Figure 3 is a schematic diagram of a first half-bridge driver chip provided in an embodiment of the present application;

[0019] Figure 4 is a schematic diagram of a second half-bridge driver chip provided in an embodiment of the present application;

[0020] Figure 5is a schematic diagram of a first half-bridge circuit provided in an embodiment of the present application;

[0021] Figure 6 is a schematic diagram of a second half-bridge circuit provided in an embodiment of the present application;

[0022] Figure 7 is a circuit diagram of an output module provided in an embodiment of the present application;

[0023] Figure 8 is a schematic diagram of a voltage sampling circuit provided in an embodiment of the present application;

[0024] Fig. 9 is a schematic diagram of a sampling chip provided in an embodiment of the present application;

[0025] Fig.10 is a schematic diagram of a current sampling circuit provided in an embodiment of the present application;

[0026] Fig.11 It is a structural schematic diagram of a high voltage testing device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0027] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0028] The terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, systems, products or devices.

[0029] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0030] At present, the current high-voltage tester solutions all use autotransformers to adjust the voltage under the 50Hz industrial frequency grid voltage, and upgrade the 50Hz step-up transformer to reach the required voltage of 5KV AC, 10KV AC, etc., so as to provide it to the test end for high-voltage testing of related products or equipment.

[0031] However, since the supply of high voltage at the test end is extremely unstable and changes dynamically by dozens of times with the fluctuation of the grid voltage, the test is inaccurate. For example, if the AC220v alternating current changes by 10% within the specified range, the fluctuation range is AC198v----AC242v. The voltage range supplied to the test end after the high voltage boost, which is originally to be increased to 5KV, is as high as AC4500v----AC5500v. The difference between the voltage at the test end and the voltage required by the product under test is too large, which may cause damage to the product under test.

[0032] To solve the above problems, the embodiment of the present application provides a high-voltage test circuit and device. Among them, the high-voltage test circuit can be applied to the scenario of high-voltage testing. The control module can output an initial pulse signal with a duty cycle that basically corresponds to the preset test voltage, the full-bridge conversion module generates a corresponding low-voltage AC voltage according to the initial pulse signal, the boost module boosts the low-voltage AC voltage to a high-voltage AC voltage, and the output module converts the high-voltage AC voltage into a high-voltage DC voltage and outputs it to the test end or directly outputs the high-voltage AC to the voltage test end; the sampling module then samples the output module and outputs the sampling signal to the control module; the control module adjusts the duty cycle of the initial pulse signal according to the sampling signal collected each time, until the test voltage at the test end is equal to the preset voltage value, thus forming a voltage control loop, real-time monitoring and control of the voltage to stabilize at the preset voltage, so as to obtain a more accurate test voltage and reduce the measurement error. This solution can be applied to a variety of scenarios, including but not limited to the application scenarios mentioned above.

[0033] The following introduces the system architecture involved in the embodiments of the present application.

[0034] See also Figure 1 The present application also provides a high voltage test circuit 10, comprising:

[0035] A control module 11, configured to output an initial pulse signal or a controlled pulse signal according to a preset test voltage, wherein the controlled pulse signal is obtained by adjusting the control module 11 based on a sampling signal corresponding to the initial pulse signal;

[0036] A full-bridge conversion module 13, used to generate a corresponding low-voltage AC voltage according to the initial pulse signal or the controlled pulse signal;

[0037] A boost module 14, used to boost the low voltage AC voltage to obtain a high voltage AC voltage;

[0038] An output module 15, used to convert the high-voltage AC voltage into a high-voltage DC voltage, and output the high-voltage DC voltage to the test end; or directly output the high-voltage AC voltage to the test end;

[0039] The test end is used to generate a test voltage according to the high-voltage DC voltage or the high-voltage AC voltage to test the product to be tested;

[0040] A sampling module 16, used for sampling the high-voltage DC voltage or the high-voltage AC voltage of the output module 15 to obtain a sampling signal, and outputting the sampling signal to the control module 11;

[0041] The adjustment process of the control module 11 includes: adjusting the duty cycle of the initial pulse signal according to the sampling signal to obtain an adjusted controlled pulse signal; and, when a first voltage value corresponding to the adjusted controlled pulse signal is less than a preset voltage value, continuing to adjust the duty cycle of the controlled pulse signal according to the sampling signal corresponding to the controlled pulse signal until the first voltage value is equal to the preset voltage value; wherein the first voltage value is a voltage value calculated based on the sampling value.

[0042] For example, the control module 11 may include a control chip U1, wherein the control chip U1 may include one or more; for example, when only one control chip U1 is used, the control chip U1 outputs the initial pulse signal, the controlled pulse signal and the received sampling signal; when two control chips U1 are used, the initial pulse signal and the controlled pulse signal can be output by one control chip (which can be recorded as the first control chip), and the sampling signal can be received by another control chip (which can be recorded as the second control chip) for calculation, and the calculation result can be synchronized to the control chip U1 that outputs the initial pulse signal and the controlled pulse signal to adjust the duty cycle of the initial pulse signal.

[0043] In the specific implementation, a basically corresponding initial duty cycle is determined according to the preset test voltage; the initial duty cycle is not a completely accurate duty cycle value, but an approximate duty cycle value with a certain error. Then, an initial pulse signal is output according to the initial duty cycle. Both the initial pulse signal and the controlled pulse signal can be PWM square wave signals, and the control module 11 generates a PWM square wave signal, and the square wave duty cycle is modulated according to a 50Hz sine value (in other instances, it can also be modulated by other frequencies, which is not limited here), and the driving module 12 generates a corresponding driving signal according to the PWM square wave signal, so as to drive the full-bridge conversion module 13 to perform full-bridge conversion processing according to the driving signal, and after the full-bridge conversion processing, the boost module 14 is used to boost the voltage to obtain a high-voltage AC voltage, and finally the output module 15 outputs a 50Hz sine wave envelope high-voltage AC voltage to the test end for testing. Finally, the data obtained by the sampling test of the sampling module 16 is fed back to the control module 11 for processing. The control module 11 adjusts the duty cycle of the PWM square wave signal after calculation and other processing until the test voltage (i.e., high-voltage AC voltage or high-voltage DC voltage) at the test end is equal to the preset voltage value, thus forming a voltage control loop, which monitors and controls the voltage to stabilize at the preset voltage in real time, so as to obtain a more accurate test voltage and reduce the measurement error. Finally, the test results are displayed on the display screen, and different beeps are generated according to different test purposes to prompt the user.

[0044] In a possible embodiment, in terms of adjusting the duty cycle of the initial pulse signal according to the sampling signal to obtain an adjusted controlled pulse signal, the control module 11 is used to: determine a first voltage value according to the sampling signal; determine a difference between the first voltage value and a preset voltage value; if the difference is greater than the preset value, reduce the duty cycle of the controlled pulse signal; if the difference is less than the preset value, increase the duty cycle of the controlled pulse signal until the difference is 0 or close to 0.

[0045] In a specific implementation, the voltage value of the output voltage, i.e., the first voltage value, is calculated based on the received sampling signal, and then the first voltage value is compared with the preset voltage value to determine the difference between the target voltage value and the preset voltage value, which is an absolute value. If the difference is greater than the preset value, it means that the test voltage is too large and the duty cycle of the controlled pulse signal needs to be reduced; if the difference is less than the preset value, it means that the test voltage is small and the duty cycle of the controlled pulse signal needs to be increased. The duty cycle is adjusted according to the above two methods until the difference is 0 or close to 0, and a test voltage equal to the preset voltage value is obtained. It can be understood that the sampling signal of the controlled pulse signal is also processed in the same way, which will not be repeated here.

[0046] In one possible embodiment, if the difference is greater than or equal to a preset value, the duty cycle adjustment amplitude is determined based on the difference, and the duty cycle of the initial pulse signal is adjusted based on the duty cycle adjustment amplitude to obtain a controlled pulse signal; if the difference is less than the preset value, the duty cycle of the initial pulse signal is adjusted with the minimum amplitude to obtain a controlled pulse signal.

[0047] In a specific implementation, since the pulse signals output by different duty cycles will obtain different test voltages (i.e., high-voltage AC voltage or high-voltage DC voltage), in order to make the voltage control more precise, when the difference between the actual voltage and the preset voltage is large, the duty cycle can be adjusted with a larger amplitude, so that the difference range can be narrowed more quickly; and when the difference between the actual voltage value and the preset voltage value is small, in order to improve the accuracy of the adjustment, the duty cycle of the first pulse signal can be slowly fine-tuned with the minimum amplitude, so that the error caused by the voltage boost can be reduced.

[0048] Specifically, the voltage value of the output voltage at the first moment, i.e., the first voltage value, is calculated based on the received sampling signal at the first moment, and then the first voltage value is compared with the preset voltage value to determine the difference between the target voltage value and the preset voltage value, which is an absolute value. When the difference is greater than the preset value, the multiple of the difference and the preset value is determined, and the adjustment amplitude of the duty cycle is determined according to the multiple. For example, assuming that the minimum adjustment amplitude is one thousandth and the difference is twice the preset value, the duty cycle is adjusted by two thousandths; if the difference is five times the preset value, the duty cycle is adjusted by five thousandths. When the difference is less than the preset value, the duty cycle is adjusted by one thousandth. It can be understood that the relationship between the multiple and the adjustment amplitude may not be proportional. For example, when the multiple is twice, the adjustment amplitude is two thousandths; when the multiple is five times, the adjustment amplitude can be one percent; it can be adjusted according to the actual situation, and is not limited here.

[0049] In one possible embodiment, see Figure 2-Figure 6, the initial pulse signal includes a first positive pulse signal, a first negative pulse signal, a second positive pulse signal and a second negative pulse signal; the low-voltage AC voltage includes a positive half-cycle low-voltage AC voltage and a negative half-cycle low-voltage AC voltage; the full-bridge conversion module includes a first half-bridge driver module and a second half-bridge driver module; the first half-bridge driver module and the second half-bridge driver module are both connected to the control module 11 and the boost module; when the first half-bridge driver module receives the first positive pulse signal and the second half-bridge driver module receives the second positive pulse signal, the positive half-cycle low-voltage AC voltage is output to the boost module according to the first positive pulse signal and the second positive pulse signal; when the first half-bridge driver module receives the first negative pulse signal and the second half-bridge driver module receives the second negative pulse signal, the negative half-cycle low-voltage AC voltage is output to the boost module according to the first negative pulse signal and the second negative pulse signal.

[0050] In addition, the controlled pulse signal includes a third positive pulse signal, a third negative pulse signal, a fourth positive pulse signal and a fourth negative pulse signal; when the first half-bridge driver module receives the third positive pulse signal and the second half-bridge driver module receives the fourth positive pulse signal, the positive half-cycle low-voltage AC voltage is generated according to the third positive pulse signal and the fourth positive pulse signal; when the first half-bridge driver module receives the third negative pulse signal and the second half-bridge driver module receives the fourth negative pulse signal, the negative half-cycle low-voltage AC voltage is output to the boost module according to the third negative pulse signal and the fourth negative pulse signal.

[0051] In a specific implementation, the full-bridge conversion module is divided into two half-bridge drive sub-modules, each of which is driven by a different drive chip, so that the drive process is more efficient. It can be understood that the controlled pulse signal, like the initial pulse signal, also includes two sub-signals. Among them, the initial pulse signal includes a first control signal and a second control signal, which respectively control the first half-bridge drive chip and the second half-bridge drive chip to output the corresponding first drive signal and the second drive signal, and finally output different test voltages. The controlled pulse signal includes a third control signal and a fourth control signal, which respectively control the first half-bridge drive chip and the second half-bridge drive chip to output the corresponding third drive signal and the fourth drive signal, and finally output different test voltages.

[0052] Specifically, the first half-bridge driver module includes a first half-bridge driver chip and a first half-bridge output unit, and the second half-bridge driver module includes a second half-bridge driver chip and a second half-bridge output unit; the first half-bridge driver chip is connected to the control module 11 and the first half-bridge output unit, and is used to generate a first drive signal according to the first positive pulse signal or the third positive pulse signal when receiving the first positive pulse signal or the third positive pulse signal, and output the first drive signal to the first half-bridge driver unit; and, when receiving the second negative pulse signal or the fourth negative pulse signal, generate a second drive signal according to the second negative pulse signal or the fourth negative pulse signal, and output the second drive signal to the first half-bridge output unit; the second half-bridge driver chip is connected to the control module 11 and the second half-bridge output unit, and is used to generate a second drive signal according to the second negative pulse signal or the fourth negative pulse signal when receiving the second positive pulse signal or the fourth positive pulse signal. When a positive pulse signal is received, a third drive signal is generated according to the second positive pulse signal or the fourth positive pulse signal, and the third drive signal is output to the first half-bridge drive unit; and, when a second negative pulse signal or the third negative pulse signal is received, a fourth drive signal is generated according to the second negative pulse signal or the third negative pulse signal, and the fourth drive signal is output to the first half-bridge output unit; when the first half-bridge output unit receives the first drive signal and the second half-bridge output unit receives the third drive signal, the positive half-cycle low-voltage AC voltage is output to the boost module according to the first drive signal and the third drive signal; when the first half-bridge output unit receives the second drive signal and the second half-bridge output unit receives the fourth drive signal, the positive half-cycle low-voltage AC voltage is output to the boost module according to the second drive signal and the fourth drive signal.

[0053] In a specific implementation, the first half-bridge output unit includes a first switch tube Q1, a second switch tube Q2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a first diode D1, a second diode D2, a first inductor L1, a first capacitor C1 and a second capacitor C2; the first control terminal HIN1 of the first half-bridge driver chip U2 is connected to the control module 11 to access the first positive pulse signal or the third positive pulse signal (such as Figure 3 The PWM0 shown in the figure can represent a first positive pulse signal or a third positive pulse signal), and the second control terminal LIN1 of the first half-bridge driver chip U2 is connected to the control module 11 to access the first negative pulse signal or the third negative pulse signal output by the control module 11 (such as Figure 3PWM1 shown in the figure can represent a first negative pulse signal or a third negative pulse signal); a first output terminal HO1 of the first half-bridge driver chip U2 is connected to one end of the second resistor R2 and the output end of the first diode D1, the other end of the second resistor R2 is connected to one end of the first resistor R1, one end of the third resistor R3 and the control end of the first switch tube Q1, the other end of the first resistor R1 is connected to the input end of the first diode D1, the other end of the third resistor R3 is connected to one end of the fourth resistor R4, the input end of the first switch tube Q1 and one end of the sixth resistor R6, the other end of the fourth resistor R4 is connected to one end of the fifth resistor R5 and the first current detection terminal SDHIN1 of the first half-bridge driver chip U2, the other end of the fifth resistor R5 is connected to the potential detection terminal VBS1 of the first half-bridge driver chip U2, the other end of the sixth resistor R6, the output end of the second switch tube Q2 and one end of the first inductor L1, and the output end of the first switch tube Q1 is connected to a power supply (such as Figure 5 DC24 in the figure), the control end of the second switch tube Q2 is connected to one end of the seventh resistor R7, one end of the eighth resistor R8 and one end of the ninth resistor R9, the other end of the seventh resistor R7 is connected to the input end of the second diode D2, the output end of the second diode D2 is connected to the other end of the eighth resistor R8 and the second output end LO1 of the first half-bridge driver chip U2, the input end of the second switch tube Q2 is connected to the other end of the ninth resistor R9, one end of the tenth resistor R10 and one end of the eleventh resistor R11, the other end of the tenth resistor R10 is connected to the second current detection end SDLIN1 of the first half-bridge driver chip U2, and the other end of the eleventh resistor R11 is grounded; the other end of the first inductor L1 is connected to the first end of the first capacitor C1, one end of the second capacitor C2 and the boost module 14 (that is, as Figure 5 As shown, an output OUT1 is sent to the boost module 14, and the other end of the first capacitor C1 and the other end of the second capacitor C2 are both grounded.

[0054] Further, the second half-bridge output unit includes a third switch tube Q3, a fourth switch tube Q4, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, a twentieth resistor R20, a twenty-first resistor R21, a twenty-second resistor R22, a third diode D3, a fourth diode D4, a second inductor L2, a third capacitor C3 and a fourth capacitor C4; the first control terminal HIN2 of the second half-bridge driver chip U3 is connected to the control module 11 to access the second positive pulse signal or the fourth positive pulse signal (such as Figure 4The PWM2 shown in the figure can represent a second positive pulse signal or a fourth positive pulse signal), and the second control terminal LIN2 of the second half-bridge driver chip U3 is connected to the control module 11 to access the second negative pulse signal or the fourth negative pulse signal (such as Figure 4 PWM3 shown in the figure can represent a second negative pulse signal or a fourth negative pulse signal); the first output terminal HO2 of the second half-bridge driver chip U3 is connected to one end of the thirteenth resistor R13 and the output end of the third diode D3, the other end of the thirteenth resistor R13 is connected to one end of the twelfth resistor R12, one end of the fourteenth resistor R14 and the control end of the third switch tube Q3, the other end of the twelfth resistor R12 is connected to the input end of the third diode D3, the other end of the fourteenth resistor R14 is connected to one end of the fifteenth resistor R15, the input end of the third switch tube Q3 and one end of the seventeenth resistor R17, the other end of the fifteenth resistor R15 is connected to one end of the sixteenth resistor R16 and the first current detection terminal SDHIN2 of the second half-bridge driver chip U3, the other end of the sixteenth resistor R16 is connected to the potential detection terminal VBS2 of the second half-bridge driver chip U3, the other end of the seventeenth resistor R17, the output end of the fourth switch tube Q4 and one end of the second inductor L2, and the output end of the third switch tube Q3 is connected to the power supply (such as Figure 6 DC24 in the figure), the control end of the fourth switch tube Q4 is connected to one end of the eighteenth resistor R18, one end of the nineteenth resistor R19 and one end of the twentieth resistor R20, the other end of the eighteenth resistor R18 is connected to the input end of the fourth diode D4, the output end of the fourth diode D4 is connected to the other end of the nineteenth resistor R19 and the second output end LO2 of the second half-bridge driver chip U3, the input end of the fourth switch tube Q4 is connected to the other end of the twentieth resistor R20, one end of the twenty-first resistor R21 and one end of the twenty-second resistor R22, the other end of the twenty-first resistor R21 is connected to the second current detection end SDLIN2 of the second half-bridge driver chip U3, and the other end of the twenty-second resistor R22 is grounded; the other end of the second inductor L2 is connected to the first end of the third capacitor C3, one end of the fourth capacitor C4 and the boost module 14 (i.e., Figure 6 As shown, OUT2 is output to the boost module 14, and the other end of the third capacitor C3 and the other end of the fourth capacitor C4 are both grounded.

[0055] In a specific implementation, when the control module 11 outputs an initial pulse signal, the first half-bridge driver chip U2 receives a first positive pulse signal and a first negative pulse signal through the first control terminal HIN and the second control terminal LIN respectively; and when the control module 11 outputs a controlled pulse signal, the first half-bridge driver chip U2 receives a third positive pulse signal and a third negative pulse signal through the first control terminal HIN and the second control terminal LIN respectively. When the first half-bridge driver chip U2 receives the first positive pulse signal or the third positive pulse signal, it outputs a first drive signal through the first output terminal HO1; when the first half-bridge driver chip U2 receives the first negative pulse signal or the third negative pulse signal, it outputs a second drive signal through the second output terminal LO1.

[0056] When the first half-bridge output unit receives the first drive signal (the first drive signal is output by the first output terminal HO1 of the first half-bridge driver chip U2), the first switch tube Q1 will be turned on, and then the positive half-cycle low-voltage AC voltage is connected from the power supply to the boost module 14; at the same time, the second half-bridge output unit will receive the third drive signal (the third drive signal is output by the second output terminal LO2 of the second half-bridge driver chip U3), and the fourth switch tube Q4 will be turned on. At this time, the first switch tube Q1 and the fourth switch tube Q4 are turned on at the same time, while the second switch tube Q2 and the third switch tube Q3 are in the off state, forming a "power supply-first switch tube-boost module-fourth switch tube-ground" loop, so that the positive half-cycle low-voltage AC voltage can be boosted by the boost module to obtain the corresponding high-voltage AC voltage.

[0057] When the second half-bridge output unit receives the fourth drive signal, the third switch tube will be turned on, and the positive half-cycle low-voltage AC voltage will be connected from the power supply to the boost module 14; at the same time, the first half-bridge output unit will receive the second drive signal to turn on the second switch tube. At this time, the second switch tube Q2 and the third switch tube Q3 are turned on at the same time, while the first switch tube Q1 and the fourth switch tube Q4 are in the cut-off state, forming a "power supply-third switch tube-boost module-second switch tube-ground" loop, so that the positive half-cycle low-voltage AC voltage can be boosted by the boost module to obtain the corresponding high-voltage AC voltage.

[0058] Specifically, before each switching on, the first switch tube Q1, the second switch tube Q2, the third switch tube Q3 and the fourth switch tube Q4 are all turned off for a certain period of time, and then switched on again, so that a smooth 50Hz sinusoidal voltage is formed in the primary side of the high-voltage transformer of the boost module 14, thereby obtaining a 50Hz high voltage at the secondary side of the high-voltage transformer.

[0059] Furthermore, the width of the positive and negative pulses is modulated by the sine function of the main control module, and changes according to the duty cycle of the sine function. After integration and waveform shaping circuit, the secondary side of the high-voltage transformer follows the primary-secondary transformation ratio and can obtain a 5KV or 10KV sine wave high voltage as needed. The waveform shaping circuit element is Figure 5 The first inductor L1, the first capacitor C1, the second capacitor C2 and Figure 6 The second inductor L2, the third capacitor C3 and the fourth capacitor C4, plus the inductance effect of the high-voltage transformer itself, jointly complete the waveform shaping.

[0060] In one possible embodiment, see Figure 7 The output module includes a fifth diode D5, a sixth diode D6, a first switch JD1, a second switch JD2, and a fifth capacitor C5; the input end of the fifth diode D5 is connected to the input end of the first switch JD1 and the output end of the boost module 14 (such as Figure 7 The output end of the fifth diode D5 is connected to the input end of the sixth diode D6, and the output end of the sixth diode D6 is connected to the output end of the first switch JD1, the input end of the second switch JD2 and the test end (such as Figure 7 V5000DC in the figure), the output end of the second switch JD2 is connected to one end of the fifth capacitor C5, and the other end of the fifth capacitor C5 is grounded; the input control end of the first switch JD1 is connected to the first switch control signal, and the input control end of the second switch JD2 is connected to the second switch control signal; the input control end of the first switch JD1 is used to control the conduction and disconnection between the input end and the output end of the first switch JD1; the input control end of the second switch JD2 is used to control the conduction and disconnection between the input end and the output end of the second switch JD2.

[0061] In the specific implementation, Figure 7 The first switch JD1 may be a relay, and one end of the relay coil of the first switch JD1 (eg Figure 7 The second foot of the first switch JD1 is connected to a DC power supply (DC12), and the other end of the relay coil of the first switch JD1 is the input control end of the first switch JD1, which is used to receive the first switch control signal MDCACn; when the first switch control signal MDCACn is received, the relay coil is turned on, so that the input end of the first switch JD1 (such as Figure 7 1 in) and the output terminal (such as Figure 7 The 4th foot of the ) is turned on.

[0062] Similarly, the second switch JD2 may also be a relay, and one end of the relay coil of the second switch JD2 (such as Figure 7The 6th foot in the second switch JD2 is connected to the DC power supply (DC12), and the other end of the relay coil of the second switch JD2 is the input control end of the second switch JD2, which is used to receive the second switch control signal MDCAC; when the second switch control signal MDCAC is received, the relay coil is turned on, so that the input end of the second switch JD2 (such as Figure 7 Pin 5 in the output terminal (such as Figure 7 The 8th pin in the circuit is turned on.

[0063] Specifically, when the first switch JD1 receives the first switch control signal MDCACn and the second switch JD2 does not receive the second switch control signal MDCAC, the high-voltage AC voltage is directly output to the test end, and the test end uses the high-voltage AC voltage to test the product under test.

[0064] When the second switch JD2 receives the second switch control signal MDCAC and the first switch JD1 does not receive the first switch control signal MDCACn, the fifth capacitor C5 is connected through the second switch JD2, and the high-voltage AC voltage is rectified and filtered by the fifth capacitor to obtain a high-voltage DC voltage, which is output to the test end. The test end uses the high-voltage DC voltage to test the product to be tested.

[0065] In one possible embodiment, see Figure 8 and Fig. 9, the sampling signal includes a voltage sampling signal; the sampling module includes a sampling chip U4 and a voltage sampling circuit; the voltage sampling circuit includes a twenty-third resistor R23, a twenty-fourth resistor R24, a twenty-fifth resistor R25, a twenty-sixth resistor R26, a twenty-seventh resistor R27, a twenty-eighth resistor R28, a twenty-ninth resistor R29, a thirtieth resistor R30, a thirty-first resistor R31, a thirty-second resistor R32 and a sixth capacitor C6; one end of the twenty-third resistor R23 is connected to the output module, the other end of the twenty-third resistor R23 is connected to one end of the twenty-fourth resistor R24, the other end of the twenty-fourth resistor R24 ​​is connected to one end of the twenty-fifth resistor R25, the other end of the twenty-fifth resistor R25 is connected to one end of the twenty-sixth resistor R26, and the twenty-sixth resistor R2 The other end of the 27th resistor R27 is connected to one end of the 27th resistor R27, the other end of the 27th resistor R27 is connected to one end of the 28th resistor R28, the other end of the 28th resistor R28 is connected to one end of the 29th resistor R29 and one end of the 30th resistor R30, the other end of the 29th resistor R29 is connected to one end of the 31st resistor R31 and one end of the 32nd resistor R32, the other end of the 30th resistor R30 is connected to one end of the sixth capacitor C6 and the first voltage sampling input terminal VinP of the sampling chip U4, the other end of the 31st resistor R31 is connected to the other end of the sixth capacitor C6 and the second voltage sampling input terminal VinN of the sampling chip U4, and the other end of the 32nd resistor R32 is grounded; the data transmission interface (such as Fig. 9 The selection terminal shown A voltage clock feedback terminal SCLK, a voltage input terminal SDI and a voltage output terminal SDO are connected to the control module 11 to feed back a voltage sampling signal to the control module 11.

[0066] In one possible embodiment, see Fig.10, the sampling signal includes a current sampling signal; the sampling module also includes a current sampling circuit, the current sampling circuit includes a thirty-third resistor R33, a thirty-fourth resistor R34, a thirty-fifth resistor R35, a thirty-sixth resistor R36, a thirty-seventh resistor R37, a thirty-eighth resistor R38, a thirty-ninth resistor R39, a fortieth resistor R40, a forty-first resistor R41, a seventh diode D7, an eighth diode D8, a ninth diode D9, a tenth diode D10, a seventh capacitor C7 and an eighth capacitor C8; one end of the thirty-third resistor R33 is connected to the test end to access the test current ACCh, the other end of the thirty-third resistor R33 is connected to one end of the thirty-fourth resistor R34 and one end of the thirty-fifth resistor R35, the other end of the thirty-fourth resistor R34 is connected to one end of the thirty-seventh resistor R37 and one end of the thirty-eighth resistor R38, the thirty-seventh resistor is grounded, the other end of the thirty-fifth resistor R35 is connected to one end of the thirty-sixth resistor R36, the other end of the thirty-sixth resistor R36 is connected to one end of the thirty-sixth resistor R36 One end is connected to the input end of the seventh diode D7, the output end of the eighth diode D8 and one end of the fortieth resistor R40, the other end of the thirty-eighth resistor R38 is connected to one end of the thirty-ninth resistor R39, the other end of the thirty-ninth resistor R39 is connected to the input end of the ninth diode D9, the output end of the tenth diode D10 and one end of the forty-first resistor R41, the input end of the eighth diode D8 and the input end of the tenth diode D10 are grounded, the output end of the seventh diode D7 and the output end of the ninth diode D9 are both connected to the power supply, the other end of the fortieth resistor R40 is connected to one end of the seventh capacitor C7 and the first current sampling end CinP of the sampling chip U4, the other end of the forty-first resistor R41 is connected to one end of the eighth capacitor C8 and the second current sampling end CinN of the sampling chip, and the other end of the seventh capacitor C7 and the other end of the eighth capacitor C8 are both grounded; the data transmission interface of the sampling chip U4 is connected to the control module 11 to feed back the current sampling signal to the control module 11.

[0067] Figure 8 The network VPP and VPN at both ends of the sixth capacitor C6 are sent to the sampling end of the sampling chip (such as Fig. 9 The first pin of U4, VinP and the second pin, VinN) are sampled, and then the data is transmitted through the SPI interface of the sampling chip (such as SPI CLK, SPI MOSI and SPI MISO) are sent to the control chip to calculate the high voltage value of the high voltage output end in proportion, and then the PWM duty cycle is adjusted proportionally to obtain the set test high voltage with an accuracy better than one percent.

[0068] Fig.10The networks mip1 and min1 in are differential current sampling networks. This set of current differential networks comes from Fig.10 The mip1 and min1 at both ends of the seventh capacitor and the eighth capacitor are output to the first current sampling terminal CinP and the second current sampling terminal CinN of the sampling chip. Fig.10 The thirty-third resistor R33 in the test rod is connected to the negative end, and the test current is connected from the thirty-third resistor R33, and then flows through the thirty-fourth resistor R34 and the thirty-seventh resistor R37 to Fig.10 The ground network GND in.

[0069] It can be understood that chips U1-U4 can be chips of any model, and the marked pins are only for indicating specific functions, and no specific limitation is made here. The actual chip model number may be different from that in the embodiment of the present application, but as long as the functions are the same, it falls within the scope of protection of the present application.

[0070] See also Fig.11 The present application also provides a high-voltage test device 100, including the high-voltage test circuit 10 in the embodiment of the present application, which outputs an initial pulse signal with a duty cycle that basically corresponds to the preset test voltage through the control module 11, and the full-bridge conversion module generates a corresponding low-voltage AC voltage according to the initial pulse signal. The boost module boosts the low-voltage AC voltage to a high-voltage AC voltage, and the output module converts the high-voltage AC voltage into a high-voltage DC voltage and outputs it to the test end or directly outputs the high-voltage AC to the voltage test end; the sampling module then samples the output module and outputs the sampling signal to the control module 11; the control module 11 adjusts the duty cycle of the initial pulse signal according to the sampling signal collected each time until the test voltage at the test end is equal to the preset voltage value, thereby forming a voltage control loop, which monitors and controls the voltage in real time to stabilize at the preset voltage to obtain a more accurate test voltage.

[0071] The high voltage testing device 100 may be a high voltage tester, or may be other devices or equipment capable of achieving the same or corresponding functions, which is not limited herein.

[0072] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions without departing from the spirit and scope of the present invention, and can make various changes and modifications, including the combination of the above-mentioned different functions and implementation steps, including software and hardware implementation methods, all of which are within the scope of protection of the present invention.

Claims

1. A high voltage test circuit, characterized in that: include: A control module, used for outputting an initial pulse signal or a controlled pulse signal according to a preset test voltage, wherein the controlled pulse signal is obtained by adjusting the control module based on a sampling signal corresponding to the initial pulse signal; A full-bridge conversion module, used to generate a corresponding low-voltage AC voltage according to the initial pulse signal or the controlled pulse signal; A boost module, used to boost the low-voltage AC voltage to obtain a high-voltage AC voltage; An output module, used to convert the high-voltage AC voltage into a high-voltage DC voltage, and output the high-voltage DC voltage to the test end; or directly output the high-voltage AC voltage to the test end; The test end is used to generate a test voltage according to the high-voltage DC voltage or the high-voltage AC voltage to test the product to be tested; A sampling module, used for sampling the high-voltage direct current voltage or the high-voltage alternating current voltage of the output module to obtain the sampling signal, and outputting the sampling signal to the control module; The adjustment process of the control module includes: adjusting the duty cycle of the initial pulse signal according to the sampling signal to obtain an adjusted controlled pulse signal; and, when a first voltage value corresponding to the adjusted controlled pulse signal is less than a preset voltage value, continuing to adjust the duty cycle of the controlled pulse signal according to the sampling signal corresponding to the controlled pulse signal until the first voltage value is equal to the preset voltage value; wherein the first voltage value is a voltage value calculated based on the sampling value.

2. The high voltage test circuit according to claim 1, characterized in that: The initial pulse signal includes a first positive pulse signal, a first negative pulse signal, a second positive pulse signal, and a second negative pulse signal; The low-voltage AC voltage includes a positive half-cycle low-voltage AC voltage and a negative half-cycle low-voltage AC voltage; The full-bridge conversion module includes a first half-bridge driver module and a second half-bridge driver module; the first half-bridge driver module and the second half-bridge driver module are both connected to the control module and the boost module; When the first half-bridge driving submodule receives the first positive pulse signal and the second half-bridge driving submodule receives the second positive pulse signal, the positive half-cycle low-voltage AC voltage is output to the boost module according to the first positive pulse signal and the second positive pulse signal; When the first half-bridge driving submodule receives the first negative pulse signal and the second half-bridge driving submodule receives the second negative pulse signal, the negative half-cycle low-voltage AC voltage is output to the boost module according to the first negative pulse signal and the second negative pulse signal.

3. The high voltage test circuit according to claim 2, characterized in that: The controlled pulse signal includes a third positive pulse signal, a third negative pulse signal, a fourth positive pulse signal and a fourth negative pulse signal; When the first half-bridge driving submodule receives the third positive pulse signal and the second half-bridge driving submodule receives the fourth positive pulse signal, the positive half-cycle low-voltage AC voltage is generated according to the third positive pulse signal and the fourth positive pulse signal; When the first half-bridge driving submodule receives the third negative pulse signal and the second half-bridge driving submodule receives the fourth negative pulse signal, the negative half-cycle low-voltage AC voltage is output to the boost module according to the third negative pulse signal and the fourth negative pulse signal.

4. The high voltage test circuit according to claim 3, characterized in that: The first half-bridge driver submodule includes a first half-bridge driver chip and a first half-bridge output unit, and the second half-bridge driver submodule includes a second half-bridge driver chip and a second half-bridge output unit; The first half-bridge driver chip is connected to the control module and the first half-bridge output unit, and is used to generate a first drive signal according to the first positive pulse signal or the third positive pulse signal when receiving the first positive pulse signal or the third positive pulse signal, and output the first drive signal to the first half-bridge driver unit; And, upon receiving the first negative pulse signal or the third negative pulse signal, generating a second drive signal according to the first negative pulse signal or the third negative pulse signal, and outputting the second drive signal to the first half-bridge output unit; The second half-bridge driver chip is connected to the control module and the second half-bridge output unit, and is used to generate a third drive signal according to the second positive pulse signal or the fourth positive pulse signal when receiving the second positive pulse signal or the fourth positive pulse signal, and output the third drive signal to the first half-bridge driver unit; and, when receiving the second negative pulse signal or the fourth negative pulse signal, generate a fourth drive signal according to the second negative pulse signal or the fourth negative pulse signal, and output the fourth drive signal to the first half-bridge output unit; When the first half-bridge output unit receives the first drive signal and the second half-bridge output unit receives the third drive signal, the positive half-cycle low-voltage AC voltage is output to the boost module according to the first drive signal and the third drive signal; When the first half-bridge output unit receives the second drive signal and the second half-bridge output unit receives the fourth drive signal, the positive half-cycle low-voltage AC voltage is output to the boost module according to the second drive signal and the fourth drive signal.

5. The high voltage test circuit according to claim 4, characterized in that: The first half-bridge output unit includes a first switch tube, a second switch tube, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a first diode, a second diode, a first inductor, a first capacitor, and a second capacitor; The first control end of the first half-bridge driver chip is connected to the control module to access the first positive pulse signal or the third positive pulse signal output by the control module, and the second control end of the first half-bridge driver chip is connected to the control module to access the first negative pulse signal or the third negative pulse signal output by the control module; the first output end of the first half-bridge driver chip is connected to one end of the second resistor and the output end of the first diode, the other end of the second resistor is connected to one end of the first resistor, one end of the third resistor and the control end of the first switch tube, the other end of the first resistor is connected to the input end of the first diode, the other end of the third resistor is connected to one end of the fourth resistor, the input end of the first switch tube and one end of the sixth resistor, the other end of the fourth resistor is connected to one end of the fifth resistor and the first current detection end of the first half-bridge driver chip, and the other end of the fifth resistor is connected The potential detection end of the first half-bridge driver chip, the other end of the sixth resistor, the output end of the second switch tube and one end of the first inductor, the output end of the first switch tube is connected to the power supply, the control end of the second switch tube is connected to one end of the seventh resistor, one end of the eighth resistor and one end of the ninth resistor, the other end of the seventh resistor is connected to the input end of the second diode, the output end of the second diode is connected to the other end of the eighth resistor and the second output end of the first half-bridge driver chip, the input end of the second switch tube is connected to the other end of the ninth resistor, one end of the tenth resistor and one end of the eleventh resistor, the other end of the tenth resistor is connected to the second current detection end of the first half-bridge driver chip, and the other end of the eleventh resistor is grounded; the other end of the first inductor is connected to the first end of the first capacitor, one end of the second capacitor and the boost module, and the other end of the first capacitor and the other end of the second capacitor are both grounded.

6. The high voltage test circuit according to claim 4, characterized in that: The second half-bridge output unit includes a third switch tube, a fourth switch tube, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, a twenty-second resistor, a third diode, a fourth diode, a second inductor, a third capacitor and a fourth capacitor; The first control end of the second half-bridge driver chip is connected to the control module to access the second positive pulse signal or the fourth positive pulse signal output by the control module, and the second control end of the second half-bridge driver chip is connected to the control module to access the second negative pulse signal or the fourth negative pulse signal output by the control module; the first output end of the second half-bridge driver chip is connected to one end of the thirteenth resistor and the output end of the third diode, the other end of the thirteenth resistor is connected to one end of the twelfth resistor, one end of the fourteenth resistor and the control end of the third switch tube, the other end of the twelfth resistor is connected to the input end of the third diode, the other end of the fourteenth resistor is connected to one end of the fifteenth resistor, the input end of the third switch tube and one end of the seventeenth resistor, the other end of the fifteenth resistor is connected to one end of the sixteenth resistor and the first current detection end of the second half-bridge driver chip, and the other end of the sixteenth resistor is connected to the input end of the third diode. The potential detection end of the second half-bridge driver chip, the other end of the seventeenth resistor, the output end of the fourth switch tube and one end of the second inductor, the output end of the third switch tube is connected to the power supply, the control end of the fourth switch tube is connected to one end of the eighteenth resistor, one end of the nineteenth resistor and one end of the twentieth resistor, the other end of the eighteenth resistor is connected to the input end of the fourth diode, the output end of the fourth diode is connected to the other end of the nineteenth resistor and the second output end of the second half-bridge driver chip, the input end of the fourth switch tube is connected to the other end of the twentieth resistor, one end of the twenty-first resistor and one end of the twenty-second resistor, the other end of the twenty-first resistor is connected to the second current detection end of the second half-bridge driver chip, and the other end of the twenty-second resistor is grounded; the other end of the second inductor is connected to the first end of the third capacitor, one end of the fourth capacitor and the boost module, and the other end of the third capacitor and the other end of the fourth capacitor are both grounded.

7. The high voltage test circuit according to claim 4, characterized in that: The output module includes: a fifth diode, a sixth diode, a first switch, a second switch, and a fifth capacitor; The input end of the fifth diode is connected to the input end of the first switch and the output end of the boost module, the output end of the fifth diode is connected to the input end of the sixth diode, the output end of the sixth diode is connected to the output end of the first switch, the input end of the second switch and the test end, the output end of the second switch is connected to one end of the fifth capacitor, and the other end of the fifth capacitor is grounded; The input control end of the first switch is connected to a first switch control signal, and the input control end of the second switch is connected to a second switch control signal; the input control end of the first switch is used to control the conduction and disconnection between the input end and the output end of the first switch; the input control end of the second switch is used to control the conduction and disconnection between the input end and the output end of the second switch.

8. The high voltage test circuit according to claim 1, characterized in that: The sampling signal includes a voltage sampling signal; the sampling module includes a sampling chip and a voltage sampling circuit; the voltage sampling circuit includes a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, a twenty-sixth resistor, a twenty-seventh resistor, a twenty-eighth resistor, a twenty-ninth resistor, a thirtieth resistor, a thirty-first resistor, a thirty-second resistor and a sixth capacitor; one end of the twenty-third resistor is connected to the output module, the other end of the twenty-third resistor is connected to one end of the twenty-fourth resistor, the other end of the twenty-fourth resistor is connected to one end of the twenty-fifth resistor, the other end of the twenty-fifth resistor is connected to one end of the twenty-sixth resistor, the other end of the twenty-sixth resistor is connected to one end of the twenty-seventh resistor, the other end of the twenty-seventh resistor is connected to one end of the twenty-eighth resistor, the other end of the twenty-eighth resistor is connected to one end of the twenty-ninth resistor and one end of the thirtieth resistor, the other end of the twenty-ninth resistor is connected to one end of the thirty-first resistor and one end of the thirty-second resistor, the other end of the thirtieth resistor is connected to one end of the sixth capacitor and the first voltage sampling input end of the sampling chip, the other end of the thirty-first resistor is connected to the other end of the sixth capacitor and the second voltage sampling input end of the sampling chip, and the other end of the thirty-second resistor is grounded; The data transmission interface of the sampling chip is connected to the control module to feed back a voltage sampling signal to the control module.

9. The high voltage test circuit according to claim 8, characterized in that: The sampling signal includes a current sampling signal; the sampling module also includes a current sampling circuit, and the current sampling circuit includes a thirty-third resistor, a thirty-fourth resistor, a thirty-fifth resistor, a thirty-sixth resistor, a thirty-seventh resistor, a thirty-eighth resistor, a thirty-ninth resistor, a fortieth resistor, a forty-first resistor, a seventh diode, an eighth diode, a ninth diode, a tenth diode, a seventh capacitor, and an eighth capacitor; One end of the thirty-third resistor is connected to the test end, the other end of the thirty-third resistor is connected to one end of the thirty-fourth resistor and one end of the thirty-fifth resistor, the other end of the thirty-fourth resistor is connected to one end of the thirty-seventh resistor and one end of the thirty-eighth resistor, the thirty-seventh resistor is grounded, the other end of the thirty-fifth resistor is connected to one end of the thirty-sixth resistor, the other end of the thirty-sixth resistor is connected to the input end of the seventh diode, the output end of the eighth diode and one end of the fortieth resistor, the other end of the thirty-eighth resistor is connected to one end of the thirty-ninth resistor, the other end of the thirty-ninth resistor is connected to the input end of the ninth diode, the output end of the tenth diode and one end of the forty-first resistor, the input end of the eighth diode and the input end of the tenth diode are grounded, the output end of the seventh diode and the output end of the ninth diode are both connected to the power supply, the other end of the fortieth resistor is connected to one end of the seventh capacitor and the first current sampling end of the sampling chip, the other end of the forty-first resistor is connected to one end of the eighth capacitor and the second current sampling end of the sampling chip, and the other end of the seventh capacitor and the other end of the eighth capacitor are both grounded; The data transmission interface of the sampling chip is connected to the control module to feed back a current sampling signal to the control module.

10. A high voltage testing device, characterized in that: Comprising a high voltage test circuit as described in any one of claims 1-9.

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