A silicon carbide ohmic contact electrode structure without step etching and a preparation method thereof

Abstract

A kind of silicon carbide ohmic contact electrode structure without step etching, epitaxial layer different from substrate doping type is grown on the surface layer of silicon carbide substrate piece, metal electrode array is manufactured on the surface of epitaxial layer, the manufacturing process of metal electrode does not need to rely on complex micro-nano manufacturing photoetching, etching and other processes, but uses tape with uniform edge geometry as mask to separate ohmic contact electrodes, finally, the sample is uniformly cut, and rectangular transmission line electrode without step is formed;The present application realizes the preparation of silicon carbide ohmic contact electrode with simpler structure and smaller leakage current error based on rectangular transmission line (TLM) principle, overcomes the complex process problem of traditional electrode rectangular transmission line method, reduces manufacturing cost while greatly shortens electrode preparation time, and is easy to realize.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor processing and manufacturing technology, specifically relating to a silicon carbide ohmic contact electrode structure and preparation method that does not require step etching. Background Technology

[0002] As a typical representative of third-generation wide-bandgap semiconductors, silicon carbide (SiC) is widely used as a substrate material in microelectronic devices and sensors due to its advantages in mechanical, electrical, and chemical properties, including a wide bandgap, high carrier mobility, high thermal conductivity, and corrosion resistance. In the field of power devices, metal-oxide-semiconductor field-effect transistors (MOSFETs) fabricated with SiC as the primary material have been shown to have higher operating frequencies, significantly reduced on-resistance and switching losses, and greatly improved high-temperature stability and switching speed. In the field of micro-nano sensing, compared to silicon-based sensors, pressure sensors and accelerometers using SiC as a substrate have been proven to operate directly in harsh environments such as high temperatures and radiation. The high-temperature resistance of the electrical ohmic contacts in these SiC-based power devices and sensors directly determines the device's survivability at high temperatures; therefore, the study of SiC ohmic contact performance has become an important branch of SiC device research.

[0003] Current experimental research on ohmic contacts mainly focuses on methods based on the rectangular transmission line (TLM) principle. For example, the papers "Abbas T, Slewa L. Transmission line method (TLM) measurement of (metal / ZnS) contact resistance[J]. Int.J. Nanoelectronics and Materials, 2015, 8: 111-120." and "Lee DY, Ko WS, Kim KN, et al. Analysis of metal and zinc oxide semiconductor interface resistance using transmission line method[J]. Solid-State Electronics, 2024, 216: 108916." adopt this principle. The corresponding ohmic contact electrode manufacturing methods involve many processes, including dry etching, photolithography, lift-off, and secondary photolithography (overlay), which have significant drawbacks such as complex processes, long processing time, high cost, and the requirement for operators to have a certain foundation in micro-nano manufacturing processes. Summary of the Invention

[0004] To overcome the shortcomings of the prior art, the present invention aims to propose a silicon carbide ohmic contact electrode structure and preparation method that does not require step etching. The method uses growth and intermittent sputtering to form an array of ohmic contact metal electrodes with different electrode spacings on a silicon carbide substrate, thereby reducing the difficulty of electrode preparation.

[0005] To achieve the above objectives, the technical solution of the present invention is as follows:

[0006] A silicon carbide ohmic contact electrode structure that does not require step etching includes a silicon carbide substrate 101, characterized in that an epitaxial layer with a different doping type than the substrate is grown on the surface of the silicon carbide substrate 101, and a metal electrode array 201 is fabricated on the surface of the epitaxial layer.

[0007] The silicon carbide substrate 101 is a single crystal form of silicon carbide, including 4H or 6H crystal forms.

[0008] The epitaxial layer includes an N-type doped epitaxial layer 103 or a P-type doped epitaxial layer 102.

[0009] The epitaxial layer can be a single layer or multiple layers; the growth thickness of each layer is 2-5 μm; when it is a multilayer layer, adjacent epitaxial doping types are cross-grown.

[0010] The metal electrode array 201 is composed of multiple rectangular metal single electrode regions, which are separated by a certain distance; the distance between each metal single electrode increases by a fixed value δd.

[0011] The metal electrode array 201 is made of any type of single-layer or multi-layer metal thin film, alloy thin film, semiconductor thin film or other thin film with conductive properties.

[0012] A method for fabricating a silicon carbide ohmic contact electrode structure without step etching, characterized by comprising the following steps:

[0013] Step 1: Grow an N-type doped epitaxial layer 103 or a P-type doped epitaxial layer 102 on the surface of a silicon carbide substrate 101, ensuring that the doping types of the silicon carbide substrate 101 and the epitaxial layer in contact with it are different, to obtain a multilayer silicon carbide epitaxial wafer used to prepare an ohmic contact electrode.

[0014] Step 2: Clean and dry the surface of the multilayer silicon carbide epitaxial wafer obtained in Step 1 using the RCA cleaning method for standard silicon wafers;

[0015] Step 3: Apply tapes 301 of different widths in parallel to the surface of the multilayer silicon carbide epitaxial wafer obtained in step 2;

[0016] Step 4: The sample surface obtained in step 3 is magnetron sputtered or electron beam evaporated to form a metal conductive thin film 401;

[0017] Step 5: Remove all the adhesive tape 301 from the sample surface obtained in Step 4 to obtain an ohmic contact metal electrode array 201 with the same electrode width but different electrode spacing.

[0018] Step 6: Anneal the sample obtained in Step 5;

[0019] Step 7: Cut the sample obtained in step 6 to obtain several slender silicon carbide ohmic contact electrode samples with a total length of L and a total width of W. Each sample has a metal electrode array 201 with an electrode width of W, a length of l, and a spacing of d.

[0020] The specific method for growing an N-type doped epitaxial layer 103 or a P-type doped epitaxial layer 102 on the surface of the silicon carbide substrate 101 in step 1 is as follows: using chemical vapor deposition, an epitaxial layer growth source is introduced into a high-temperature furnace at a temperature of 1500-1800℃, with a flow rate of 2 sccm-1000 sccm and a introduction time of 10-30 minutes; the thickness of each layer is 2-5 μm.

[0021] When applying the tape in step 3, the specific application method is as follows: Apply tape No. 1 with a width of d1 to the surface of the multilayer silicon carbide epitaxial wafer obtained in step 2; then, at a distance L from tape No. 1, apply tape No. 2 with a width of d2 in parallel; then, along the same direction, at a distance L from tape No. 2, apply tape No. 3 with a width of d3 in parallel; repeat this process until a parallel array of multiple tapes with equal spacing l is formed on the surface of the multilayer silicon carbide epitaxial wafer, and the widths of the tapes in the array are d1, d2, d3, ..., up to dn; the tape width d satisfies: d2 = d1 + δd; d3 = d2 + δd; d4 = d3 + δd, that is, dn = d(n-1) + δd.

[0022] The tape used in step 3 is a tape with regular edges, including polymer tape and transparent laboratory tape made of different materials.

[0023] The specific parameters for magnetron sputtering in step 4 are as follows: sputtering power of 80-200W, sputtering gas of argon with a flow rate of 20 sccm, and sputtering time of 5-40 minutes.

[0024] The specific method for the annealing treatment in step 6 is as follows: place the sample to be annealed into an annealing furnace, set the temperature to 500-1200℃, and anneal for 2-30 minutes.

[0025] The methods for cutting the sample used in step 7 include diamond wheel cutting and laser cutting.

[0026] Compared with the prior art, the present invention has the following beneficial technical effects:

[0027] (1) This invention addresses the hot research issue of ohmic contacts in the field of micro-nano sensor manufacturing and proposes a new method to get rid of the "etching isolation steps". It uses growth and interval sputtering to form an array of ohmic contact metal electrodes with different electrode spacings on a silicon carbide substrate. In principle, this effectively avoids the leakage current that may be generated at the edge of the etching step in the traditional transmission line method, reduces the measurement error of the specific contact resistance between electrodes, and improves the accuracy of electrical performance evaluation of ohmic contact electrodes.

[0028] (2) The present invention uses adhesive tape to prepare a metal electrode array with a spacing of d, which reduces the difficulty of electrode preparation and effectively shortens the experimental time.

[0029] In summary, this invention, based on the principle of rectangular transmission line (TLM), enables the fabrication of silicon carbide ohmic contact electrodes with a simpler structure and smaller leakage current error. It overcomes the complex process problems of traditional rectangular transmission line electrode manufacturing methods, reduces manufacturing costs, significantly shortens electrode fabrication time, and is easy to implement. Attached Figure Description

[0030] Figure 1 This is a three-dimensional diagram showing the structure of the silicon carbide ohmic contact electrode sample of the present invention.

[0031] Figure 2 This is a front view of the silicon carbide ohmic contact electrode sample structure of the present invention.

[0032] Figure 3 This is a top view of the silicon carbide ohmic contact electrode sample structure of the present invention.

[0033] Figure 4 This is a simplified fabrication process for the silicon carbide ohmic contact electrode sample structure of the present invention.

[0034] In the figure: 101-silicon carbide substrate, 102-P-type doped epitaxial layer, 103-N-type doped epitaxial layer, 201-metal electrode array, 301-tape, 401-metal conductive thin film. Detailed Implementation

[0035] To make the objectives and technical solutions of this invention clearer and easier to understand, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. The specific embodiments described herein are for illustrative purposes only and are not intended to limit the invention.

[0036] Reference Figure 1 , Figure 2 and Figure 3A silicon carbide ohmic contact electrode structure that does not require step etching includes a silicon carbide substrate 101, characterized in that an epitaxial layer with a different doping type than the substrate is grown on the surface of the silicon carbide substrate, and a metal electrode array 201 is fabricated on the surface of the epitaxial layer.

[0037] The silicon carbide substrate 101 is an N-type 4H-SiC single crystal wafer.

[0038] The silicon carbide substrate 101 has two epitaxial layers, with cross-grown epitaxial doping types, namely, from bottom to top, a middle P-type doped epitaxial layer 102 and a surface N-type doped epitaxial layer 103.

[0039] The metal electrode array 201 is composed of multiple rectangular metal single electrode regions. The longitudinal dimension l and the transverse dimension W of each electrode are the same, which are 1000 μm and 2000 μm, respectively. The distance between each electrode increases by a fixed value, which is 1000 μm.

[0040] The electrode material of the metal electrode array 201 region is a three-layer multilayer metal system composed of Ni / TaSi2 / Pt from bottom to top.

[0041] Reference Figure 4 A method for fabricating a silicon carbide ohmic contact electrode structure without step etching, characterized by comprising the following steps:

[0042] Step 1: Grow an epitaxially doped Al layer with a thickness of 5 μm and a doping concentration of 1e18 cm⁻¹ on a single-crystal 4H silicon carbide substrate 101. 3 A P-type epitaxial layer 102 is formed, and then an epitaxially doped N element is grown to form a layer with a thickness of 2 μm and a doping concentration of 1e19 cm⁻¹. 3 ~1e20cm 3 N-type doped epitaxial layer 103;

[0043] The specific method for growing an N-type doped epitaxial layer 103 on the surface of a silicon carbide substrate 101 is as follows: using chemical vapor deposition, a growth silicon source, a growth carbon source and nitrogen gas are introduced into a high-temperature furnace at a temperature of 1500 to 1800°C, with a flow rate of 2 sccm to 1000 sccm and an introduction time of 10 to 30 minutes.

[0044] The specific method for growing a P-type doped epitaxial layer 102 on the surface of a silicon carbide substrate 101 is as follows: using chemical vapor deposition, a growth silicon source, a growth carbon source and trimethylaluminum TMA dopant are introduced into a high-temperature furnace at a temperature of 1500-1800℃, with a flow rate of 2 sccm-1000 sccm and an introduction time of 10-30 minutes.

[0045] Step 2: Clean the surface of the multilayer silicon carbide epitaxial wafer obtained in Step 1 using the RCA cleaning method for standard silicon wafers and dry it on a hot plate for later use.

[0046] Step 3: Parallelly attach polyimide tape 301 with widths of 1000μm, 2000μm, 3000μm, 4000μm and 5000μm to the N-type epitaxial doped surface of the multilayer silicon carbide epitaxial wafer obtained in step 2.

[0047] Step 4: On the sample surface obtained in step 3, a Ni layer, a TaSi2 layer and a Pt layer are sequentially sputtered using a magnetron sputtering method to form a multilayer metal conductive film 401; the sputtering power is 100W, the sputtering gas is argon, the flow rate is 20sccm, and the sputtering time is 20 minutes.

[0048] Step 5: Remove all polyimide tape 301 from the sample surface obtained in Step 4 to obtain an ohmic contact metal electrode array 201 composed of electrodes with the same electrode size but different electrode spacing.

[0049] Step 6: Perform rapid thermal annealing on the sample obtained in Step 5 at a temperature of 1000℃ for 200 seconds.

[0050] Step 7: Perform femtosecond laser cutting on the sample obtained in Step 6 to obtain several slender silicon carbide ohmic contact electrode samples with a total length of 2cm and a total width of 2mm. Each sample has a metal electrode array 201 with a longitudinal dimension l = 1000μm and a transverse dimension W = 2000μm deposited on it. The spacing between each electrode is 1000μm, 2000μm, 3000μm, 4000μm, and 5000μm.

[0051] When applying the polyimide tape 301 in step 3, the specific application method is as follows: Tape No. 1, with a width of 1000 μm, is applied to the surface of the multilayer silicon carbide epitaxial wafer obtained in step 2; then, at a blank position 1000 μm away from Tape No. 1, Tape No. 2, with a width of 2000 μm, is applied parallel to it; then, along the same direction, at a position 1000 μm away from Tape No. 2, Tape No. 3, with a width of 3000 μm, is also applied parallel to it; continuing along the same direction, at a position 1000 μm away from Tape No. 3, Tape No. 4, with a width of 4000 μm, is also applied parallel to it; continuing along the same direction, at a position 1000 μm away from Tape No. 4, Tape No. 5, with a width of 5000 μm, is also applied parallel to it, ultimately forming a parallel array of multiple tapes 301 with equal blank spacing (1000 μm) on the surface of the multilayer silicon carbide epitaxial wafer.

[0052] The tape 301 used in step 3 is a laboratory-grade polyimide tape. This series of tapes has a custom width and regular edges.

[0053] The above content is only for illustrating the technical concept of the present invention and should not be construed as limiting the scope of protection of the present invention. Any modifications made to the technical solution based on the technical concept proposed in this invention shall fall within the scope of protection of the claims of this invention.

Claims

1. A method for fabricating a silicon carbide ohmic contact electrode structure without step etching, characterized in that, Includes the following steps: Step 1: An N-type doped epitaxial layer (103) or a P-type doped epitaxial layer (102) is grown on the surface of a silicon carbide substrate (101) to ensure that the doping types of the silicon carbide substrate (101) and the epitaxial layer in contact with it are different, so as to obtain a multilayer silicon carbide epitaxial wafer used to prepare an ohmic contact electrode. Step 2: Clean and dry the surface of the multilayer silicon carbide epitaxial wafer obtained in Step 1 using the RCA cleaning method for standard silicon wafers; Step 3: Apply tapes (301) of different widths in parallel to the surface of the multilayer silicon carbide epitaxial wafer obtained in step 2; Step 4: Magnetron sputtering or electron beam evaporation is performed on the sample surface obtained in step 3 to form a metal conductive thin film (401). Step 5: Remove all the adhesive tape (301) from the sample surface obtained in Step 4 to obtain an ohmic contact metal electrode array (201) with the same electrode width but different electrode spacing. Step 6: Anneal the sample obtained in Step 5; Step 7: The sample obtained in Step 6 is cut to obtain several slender silicon carbide ohmic contact electrode samples with a total length of L and a total width of W. Each sample has an electrode with a width of W and a length of L. l , a metal electrode array (201) with a spacing of d; The epitaxial layer can be a single layer or multiple layers; the thickness of each layer is 2-5 μm; adjacent epitaxial layers with different doping types grow alternately. When applying the tape in step 3, the specific application method is as follows: Apply tape No. 1 with a width of d1 to the surface of the multilayer silicon carbide epitaxial wafer obtained in step 2; then, at a distance L from tape No. 1, apply tape No. 2 parallel to it; then, in the same direction, at a distance L from tape No. 2, apply tape No. 3 parallel to it; repeat this process until equal spacing is formed on the surface of the multilayer silicon carbide epitaxial wafer. l Multiple tapes are arranged in a parallel array, and the widths of the tapes in the array are d1, d2, d3, ..., up to dn; the tape widths d satisfy: d2=d1+δd; d3=d2+δd; d4=d3+δd, that is, dn=d(n-1)+δd; The specific method for growing an N-type doped epitaxial layer (103) or a P-type doped epitaxial layer (102) on the surface of the silicon carbide substrate (101) in step 1 is as follows: using chemical vapor deposition, an epitaxial layer growth source is introduced into a high-temperature furnace at a temperature of 1500~1800℃, with a flow rate of 2sccm~1000sccm and a time of 10~30 minutes; the thickness of each layer is 2-5μm. The specific parameters for magnetron sputtering in step 4 are as follows: sputtering power of 80-200W, sputtering gas of argon with a flow rate of 20sccm, and sputtering time of 5-40 minutes. The specific method for the annealing treatment in step 6 is as follows: place the sample to be annealed into an annealing furnace, set the temperature to 500-1200℃, and anneal for 2-30 minutes.

2. The method for fabricating a silicon carbide ohmic contact electrode structure without step etching according to claim 1, characterized in that, The tape used in step 3 is a tape with regular edges, including polymer tape and transparent laboratory tape made of different materials.

3. The method for fabricating a silicon carbide ohmic contact electrode structure without step etching according to claim 1, characterized in that, The methods for cutting the sample used in step 7 include diamond wheel cutting and laser cutting.

4. The method for fabricating a silicon carbide ohmic contact electrode structure without step etching according to claim 1, characterized in that, The silicon carbide substrate (101) is a single crystal form of silicon carbide, including 4H or 6H crystal forms.

5. The method for fabricating a silicon carbide ohmic contact electrode structure without step etching according to claim 1, characterized in that, The metal electrode array (201) consists of multiple rectangular metal single electrode regions, which are separated by a certain distance; the distance between each metal single electrode increases by a fixed value δd.

6. The method for fabricating a silicon carbide ohmic contact electrode structure without step etching according to claim 1, characterized in that, The metal electrode array (201) is made of any kind of single-layer or multi-layer metal thin film, alloy thin film, semiconductor thin film or other thin film with conductivity; it is single-layer or multi-layer.

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