Silicon wafer measuring method and system

Abstract

The invention provides a silicon wafer measurement method and system, and the method comprises the steps: measuring the morphology of a silicon wafer, and obtaining first morphology data; carrying out pretreatment on the silicon wafer; measuring the morphology of the preprocessed silicon wafer to obtain second morphology data; and based on the first morphology data and the second morphology data, calculating to obtain an anti-deformation index value for representing the anti-deformation capability of the silicon wafer. According to the invention, the shape change of the silicon wafer before and after pretreatment is measured, and the deformation resistance of the silicon wafer is quantified.

Description

Technical Field

[0001] The present application relates to the field of silicon wafer measurement technology, and in particular to a silicon wafer measurement method and system. Background Art

[0002] With the rapid development of semiconductor technology, the importance of 3D stacking technology has gradually increased. In 3D stacking technology, silicon wafers need to withstand higher stress during processing and application, which puts higher requirements on the deformation resistance of silicon wafers. Therefore, it is necessary to quantify the deformation resistance of silicon wafers. However, most of the relevant silicon wafer deformation resistance test methods are based on the mechanical strength measurement of materials, including three-point bending test, tensile test and compression test. These methods are usually destructive tests and difficult to apply non-destructively in mass production. In addition, these test methods are mostly based on the intrinsic properties of the material and fail to fully consider the geometric morphology changes on the front and back of the silicon wafer, so they cannot fully reflect the overall deformation of the silicon wafer under multi-layer stacking conditions. In addition, the thin film stress measurement technology based on the Stoney formula indirectly measures the deformation resistance through the change of curvature, but due to its low accuracy, it is difficult to distinguish silicon wafers with small differences in deformation resistance, and there is also the problem of poor non-destructiveness. Therefore, the relevant methods are difficult to meet the strict requirements of high-end applications such as 3D stacking on silicon wafer quality in terms of measurement accuracy, non-destructive testing and applicability.

[0003] Based on this, the present application provides a silicon wafer measurement method and system to improve the relevant technology. Summary of the invention

[0004] The purpose of this application is to provide a silicon wafer measurement method and system to quantify the anti-deformation ability of the silicon wafer.

[0005] The purpose of this application is achieved by the following technical solutions:

[0006] In a first aspect, the present application provides a silicon wafer measurement method, the method comprising: measuring the morphology of the silicon wafer to obtain first morphology data; preprocessing the silicon wafer; measuring the morphology of the preprocessed silicon wafer to obtain second morphology data; based on the first morphology data and the second morphology data, calculating an anti-deformation index value for characterizing the anti-deformation ability of the silicon wafer.

[0007] In some embodiments, the measuring of the morphology of the silicon wafer to obtain first morphology data includes: measuring the front morphology and the back morphology of the silicon wafer to obtain first morphology data including first front morphology data and first back morphology data; the measuring of the morphology of the pretreated silicon wafer to obtain second morphology data includes: measuring the front morphology and the back morphology of the pretreated silicon wafer to obtain second morphology data including second front morphology data and second back morphology data.

[0008] In some embodiments, the anti-deformation index value used to characterize the anti-deformation ability of the silicon wafer is calculated based on the first morphology data and the second morphology data, including: calculating the corresponding out-of-plane deformation amounts of multiple measurement points of the silicon wafer based on the first front morphology data, the first back morphology data, the second front morphology data and the second back morphology data; summing the absolute values ​​of the corresponding out-of-plane deformation amounts of multiple measurement points of the silicon wafer to obtain the deformation degree; taking the negative value of the deformation degree as the anti-deformation index value used to characterize the anti-deformation ability of the silicon wafer.

[0009] In some embodiments, the out-of-plane deformation corresponding to multiple measurement points of the silicon wafer is calculated based on the first front side morphology data, the first back side morphology data, the second front side morphology data and the second back side morphology data, including: using the first front side morphology data and the first back side morphology data to calculate the first mid-curve values ​​corresponding to multiple measurement points of the silicon wafer; using the second front side morphology data and the second back side morphology data to calculate the second mid-curve values ​​corresponding to multiple measurement points of the silicon wafer; for at least one measurement point, calculating the difference between the first mid-curve value and the second mid-curve value corresponding to the measurement point, to obtain the out-of-plane deformation corresponding to the measurement point.

[0010] In some embodiments, the topography of the silicon wafer is measured using capacitive measurement and / or optical measurement.

[0011] In some embodiments, the measurement method of the topography of the silicon wafer is determined according to the diffuse reflection parameter value and / or the roughness parameter value of the silicon wafer surface.

[0012] In some embodiments, when the diffuse reflection parameter value is greater than a first target value and / or when the roughness parameter value is greater than a second target value, the topography of the silicon wafer is measured by capacitive measurement.

[0013] In some embodiments, the pretreatment includes thermal treatment and / or thin film deposition.

[0014] In some embodiments, the method further includes: processing a production process of the silicon wafer based on the anti-deformation index value.

[0015] In a second aspect, the present application provides a silicon wafer measurement system, the system comprising a morphology measurement module, a preprocessing module and a control module; the morphology measurement module is used to measure the morphology of the silicon wafer to obtain first morphology data; the preprocessing module is used to preprocess the silicon wafer; the morphology measurement module is also used to measure the morphology of the preprocessed silicon wafer to obtain second morphology data; the control module is used to calculate, based on the first morphology data and the second morphology data, an anti-deformation index value for characterizing the anti-deformation ability of the silicon wafer.

[0016] The present application provides a silicon wafer measurement method and system. First, the morphology of the silicon wafer is measured to obtain first morphology data; next, the silicon wafer is pre-processed; then, the morphology of the pre-processed silicon wafer is measured to obtain second morphology data; thereafter, based on the first morphology data and the second morphology data, an anti-deformation index value used to characterize the anti-deformation ability of the silicon wafer is calculated. The present application quantifies the anti-deformation ability of the silicon wafer by measuring the morphology changes of the silicon wafer before and after pre-processing. When the pre-processing operation is an operation required for the silicon wafer production process, the present application can non-destructively and accurately measure the anti-deformation ability of the silicon wafer, and is particularly suitable for the detection of silicon wafers with different characteristics in a mass production environment. In addition, the calculated anti-deformation index value can be used to determine process control measures in production, which is conducive to improving the production efficiency and product yield of silicon wafers. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The present application is further described below in conjunction with the accompanying drawings and specific implementation methods.

[0018] Figure 1 It is a flow chart of a silicon wafer measurement method provided in an embodiment of the present application.

[0019] Figure 2 It is a box plot of the anti-deformation index value of a silicon wafer provided in an embodiment of the present application (with different oxygen content gradients and nitrogen content gradients).

[0020] Figure 3 It is a box plot of the anti-deformation index value of a silicon wafer provided in an embodiment of the present application (with different boron doping amounts). DETAILED DESCRIPTION

[0021] The following will be combined with the drawings in this application to clearly and completely describe the technical solutions in the implementation mode of this application. Obviously, the described implementation mode is only a part of the implementation mode of this application, not all the implementation modes. Based on the implementation mode in this application, all other implementation modes obtained by those skilled in the art without creative work are within the scope of protection of this application.

[0022] In the description of the embodiments of the present application, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present application, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

[0023] Planar transistor integration has reached its physical limit, and advanced transistor structures are evolving toward 3D. Storage devices also have 3D stacking based on their designed structures. Some advanced packaging technologies and products such as HBM also involve 3D stacking. Silicon wafers used for "planar integration or low 3D stacking" in the past have been greatly deformed by the mechanical stress brought by 3D stacking and the thermal stress in the thermal history, which restricts the stacking limit. Therefore, it is imperative to quantify the deformation resistance of silicon wafers and develop silicon wafers with high deformation resistance.

[0024] In related technologies, based on the consideration of the intrinsic properties of the material, the deformation resistance of silicon wafers is equated with the mechanical strength of silicon wafers. The corresponding measurement methods include three-point bending test, tensile test, compression test, etc. However, these test methods are not non-destructive and difficult to apply to mass production. In addition, the one-sided use of mechanical strength to equate deformation resistance ignores the impact of the geometric shape of the silicon wafer. Other measurement technologies, such as the thin film stress measurement method based on Stoney's formula, have low measurement accuracy and cannot distinguish individuals with small differences in deformation resistance.

[0025] In order to improve the relevant technology, it is urgent to develop a deformation resistance measurement method that can not only quantify the deformation resistance of silicon wafers, but also perform process control in production based on the deformation resistance index.

[0026] The applicant has found in practice that the out-of-plane deformation at any position of the silicon wafer is related to the thickness of the silicon wafer at that position, the Young's modulus, the intrinsic property of the material, the geometric morphology and the stress distribution, for example, as described by formula (1) as follows.

[0027]

[0028] Among them, the subscripts x and y represent the two-dimensional coordinates of the measurement points on the silicon wafer, z represents the out-of-plane deformation, h represents the thickness, E represents the Young's modulus of the material intrinsic property, f represents the geometric morphology, and σ h Represents stress distribution. The deformation degree is obtained by summing up the absolute values ​​of the out-of-plane deformation at all measurement points. The deformation degree is negative and defined as the anti-deformation capacity Rd. Rd can be used to characterize the anti-deformation capacity of the entire silicon wafer. Its expression is shown in formula (2).

[0029] Rd=―∑|z x,y | (2)

[0030] The larger the Rd, the smaller the deformation and the stronger the anti-deformation ability; the smaller the Rd, the larger the deformation and the weaker the anti-deformation ability. However, the out-of-plane deformation can also be obtained in actual measurement, and the implementation method of the present application will be specifically described below.

[0031] See also Figure 1 , Figure 1 It is a flow chart of a silicon wafer measurement method provided in an embodiment of the present application.

[0032] An embodiment of the present application provides a silicon wafer measurement method, which includes steps S101 to S104.

[0033] Step S101: measuring the morphology of the silicon wafer to obtain first morphology data.

[0034] Step S102: pre-processing the silicon wafer.

[0035] Step S103: measuring the morphology of the pre-processed silicon wafer to obtain second morphology data.

[0036] Step S104: Based on the first morphological data and the second morphological data, an anti-deformation index value for characterizing the anti-deformation capability of the silicon wafer is calculated.

[0037] In the above embodiments, the morphology data can be regarded as geometric morphology data, for example, it can be measured by a morphology measurement module. "First morphology data" and "second morphology data" are both morphology data, and the prefixes "first" and "second" only serve to distinguish them. As an example, the morphology measurement module can measure multiple measurement points of a silicon wafer to obtain morphology information corresponding to each measurement point. In other words, the morphology data may include morphology information corresponding to multiple measurement points. The morphology information may be represented by a numerical value, and its sign may be positive or negative. In practical applications, the positive direction of the morphology information may be set through the user interface of the morphology measurement module.

[0038] In some embodiments, the pre-treatment may include thermal treatment and / or thin film deposition.

[0039] In the above embodiment, a process may be selected to pre-treat the silicon wafer, which may be a thin film deposition process or a heat treatment process, etc., which is not limited in the above embodiment. In some embodiments, the pre-treating operation used for all silicon wafers involved in the measurement may be the same.

[0040] The above embodiment obtains the morphological change of the silicon wafer under stress by measuring the morphological data of the silicon wafer before and after pretreatment. Based on the first morphological data and the second morphological data, the anti-deformation index value of the silicon wafer is calculated, and the anti-deformation ability of the silicon wafer under mechanical stress and / or thermal stress is effectively quantified. This method can accurately measure the anti-deformation ability of the silicon wafer and is suitable for mass production testing.

[0041] In some embodiments, measuring the morphology of the silicon wafer to obtain first morphology data may include: measuring the front morphology and the back morphology of the silicon wafer to obtain first morphology data including first front morphology data and first back morphology data.

[0042] In some embodiments, measuring the morphology of the preprocessed silicon wafer to obtain second morphology data may include: measuring the front morphology and back morphology of the preprocessed silicon wafer to obtain second morphology data including second front morphology data and second back morphology data.

[0043] The related technology only focuses on single-sided data, fails to reflect the overall effect of the changes in the front and back morphology of the silicon wafer, and is difficult to accurately characterize the anti-deformation ability of the silicon wafer in actual 3D stacking and complex processes. In the above embodiment, the front and back morphologies of the silicon wafer are first measured to obtain the first morphology data. Subsequently, the silicon wafer is subjected to one or more pretreatment operations, such as heat treatment or thin film deposition, and then the front and back morphologies are measured again to obtain the second morphology data. By comparing the two morphology data before and after, combined with the influence of the deformation of the front and back of the silicon wafer on its overall anti-deformation ability, the overall morphology changes of the silicon wafer under different stresses are accurately reflected, which improves the measurement accuracy and is conducive to distinguishing individuals with smaller differences in anti-deformation ability.

[0044] In some embodiments, the anti-deformation index value calculated based on the first morphology data and the second morphology data to characterize the anti-deformation ability of the silicon wafer may include: calculating the corresponding out-of-plane deformation amounts of multiple measurement points of the silicon wafer based on the first front morphology data, the first back morphology data, the second front morphology data and the second back morphology data; summing the absolute values ​​of the corresponding out-of-plane deformation amounts of the multiple measurement points of the silicon wafer to obtain the deformation degree; taking the negative value of the deformation degree as the anti-deformation index value used to characterize the anti-deformation ability of the silicon wafer.

[0045] In the above embodiment, at each measuring point, the out-of-plane deformation is calculated by comparing the morphological data before and after preprocessing, which represents the deformation of the measuring point under stress. Subsequently, the absolute values ​​of the out-of-plane deformation at each measuring point are added to obtain the deformation degree of the silicon wafer, and its negative value is taken as the anti-deformation index value. The anti-deformation index value reflects the influence of the front and back morphologies on the anti-deformation ability, and accurately quantifies the overall deformation of the silicon wafer.

[0046] In some embodiments, calculating the corresponding out-of-plane deformation amounts of multiple measurement points of the silicon wafer based on the first front side morphology data, the first back side morphology data, the second front side morphology data and the second back side morphology data may include: calculating the corresponding first mid-curve values ​​of multiple measurement points of the silicon wafer using the first front side morphology data and the first back side morphology data; calculating the corresponding second mid-curve values ​​of multiple measurement points of the silicon wafer using the second front side morphology data and the second back side morphology data; and calculating, for at least one measurement point, the difference between the first mid-curve value and the second mid-curve value corresponding to the measurement point to obtain the corresponding out-of-plane deformation amount of the measurement point.

[0047] The mid-surface value characterizes the deformation in the thickness direction of the silicon wafer. Both the "first mid-surface value" and the "second mid-surface value" are mid-surface values, and the prefixes "first" and "second" only serve to distinguish them. The first mid-surface value refers to the mid-surface value before pretreatment, and the second mid-surface value refers to the mid-surface value after pretreatment.

[0048] In some embodiments, the first front side morphology data F1 may include the first front side morphology information f1(x,y) of the measuring point (x,y), the first back side morphology data B1 may include the first back side morphology information b1(x,y) of the measuring point (x,y), the second front side morphology data F2 may include the second front side morphology information f2(x,y) of the measuring point (x,y), and the second back side morphology data B2 may include the second back side morphology information b2(x,y) of the measuring point (x,y). As an example, for the measuring point (x,y), the average value of the first front side morphology information f1(x,y) and the first back side morphology information b1(x,y) is taken as the first mid-curved surface value, and the first mid-curved surface value is The average value of the second front surface morphology information f2(x, y) and the second back surface morphology information b2(x, y) is taken as the second median surface value.

[0049] In the above embodiment, for each measuring point, by calculating the difference between the first mid-curve value and the second mid-curve value, the out-of-plane deformation of the measuring point can be obtained, which can accurately reflect the degree of deformation in the thickness direction of the silicon wafer under different stress conditions. When the pretreatment operation adopted is the operation required in the silicon wafer production process, this method can measure the anti-deformation ability of the silicon wafer non-destructively and with high precision, and is suitable for batch testing in a mass production environment. By calculating the out-of-plane deformation at multiple measuring points respectively, the deformation of each measuring point can be comprehensively considered, providing a comprehensive basis for the characterization of the overall anti-deformation ability of the silicon wafer.

[0050] In some embodiments, the measurement method of the morphology of the silicon wafer may include capacitive measurement and / or optical measurement.

[0051] In the above embodiments, capacitive measurement and / or optical measurement can be used to measure the morphological data of the front and back sides of the silicon wafer. Capacitive measurement can use a capacitive sensor to detect tiny height changes on the surface of the silicon wafer. The capacitive sensor detects the surface morphology of the silicon wafer by sensing the distance change between the probe and the surface of the silicon wafer. This method is more sensitive to diffuse reflection surfaces and is suitable for detecting samples with high surface roughness or low reflectivity. Optical measurement can use optical instruments (such as interferometers or laser measurement equipment) to detect the morphology of the silicon wafer. By analyzing the phase or interference pattern of the light reflected from the surface of the silicon wafer, the surface height difference of the silicon wafer can be measured with high precision, which is suitable for smooth and reflective silicon wafer surfaces.

[0052] In some embodiments, the measurement method of the morphology of the silicon wafer can be determined based on the diffuse reflection parameter value and / or the roughness parameter value of the silicon wafer surface. In some embodiments, when the diffuse reflection parameter value is greater than the first target value and / or when the roughness parameter value is greater than the second target value, the measurement method of the morphology of the silicon wafer can be capacitive measurement.

[0053] The diffuse reflection parameter value represents the light scattering characteristics of the silicon wafer surface. A higher diffuse reflection parameter value indicates that the surface is relatively rough and not smooth. The roughness parameter value is, for example, an average measure of the microscopic roughness of the surface. A higher roughness parameter value indicates that the surface is relatively rough and not smooth. In the above embodiment, based on the diffuse reflection degree (the diffuse reflection degree is, for example, characterized by the diffuse reflection parameter value) and / or the roughness (the roughness is, for example, characterized by the roughness parameter value) of the silicon wafer surface, a suitable measurement method is selected. As an example, in the case of strong diffuse reflection, capacitive measurement is selected, whereas optical measurement is selected, thereby obtaining the topographic data of the silicon wafer.

[0054] The first target value and the second target value are values ​​used to judge the surface characteristics of the silicon wafer, and are used to select a suitable measurement method, which can be selected or pre-set according to actual needs. When the diffuse reflection parameter value and the roughness parameter value exceed their corresponding target values, capacitive measurement is used preferentially. The above embodiment uses the diffuse reflection parameter value and / or the roughness parameter value of the silicon wafer surface as the basis for selecting the measurement method. When the diffuse reflection parameter value is higher than the first target value, and / or the roughness parameter value is higher than the second target value, it indicates that the silicon wafer surface is relatively rough and not smooth, and capacitive measurement can be selected; when both are lower than their corresponding target values, it indicates that the silicon wafer surface is relatively smooth, and optical measurement can be selected. Automatically selecting the measurement method based on the diffuse reflection parameter value and the roughness parameter value, this automatic switching mechanism of the measurement method based on the surface characteristics of the silicon wafer facilitates the use of the corresponding measurement method for silicon wafers with different surface characteristics, reduces the measurement error caused by different surface characteristics, and can significantly improve the adaptability and accuracy of silicon wafer morphology measurement. Compared with the fixed measurement method, the above embodiment provides higher accuracy when the surface characteristics of the silicon wafer are variable, which is conducive to the non-destructive and efficient measurement of silicon wafers with complex surface types.

[0055] See also Figure 2 , Figure 2 It is a box diagram of the anti-deformation index value of a silicon wafer provided in an embodiment of the present application (with different oxygen content gradients and nitrogen content gradients). The anti-deformation capability Rd is the anti-deformation index value Rd, and its unit is, for example, μm (micrometer).

[0056] In a specific application scenario, silicon wafers with different characteristics (for example, different oxygen content gradients and nitrogen content gradients) were taken for thin film deposition. The morphological data before and after the film growth were measured and the anti-deformation ability was calculated. The results are shown in Table 1 and Figure 2 shown.

[0057] Table 1

[0058]

[0059]

[0060] Among them, 3PCS N and 8PCS N represent different nitrogen content gradients, and 4.5ppma Oi and 10ppma Oi represent different oxygen content gradients. Figure 2 It can be seen that silicon wafers with different characteristics have different anti-deformation capabilities. Within the same characteristic group, the calculated anti-deformation index value has a small difference within the group, which is in line with the actual situation, indicating that this anti-deformation ability calculation method can accurately measure the anti-deformation ability of silicon wafers with high precision.

[0061] See also Figure 3 , Figure 3It is a box plot of the anti-deformation index value of a silicon wafer provided in an embodiment of the present application (with different boron doping amounts).

[0062] In another specific application scenario, 300 pieces of polished silicon wafers with boron doping levels of e15 and e17 were taken for thin film deposition to grow epitaxial layers to obtain epitaxial wafers, the thickness of which was, for example, 5 μm. The morphology data of the silicon wafers was measured before and after epitaxial growth, and the anti-deformation index value was calculated. The results were as follows: Figure 3 As shown. It can be seen that there is a difference in the anti-deformation ability of the lightly doped epitaxial wafer EPI (p / p-) and the heavily doped epitaxial wafer EPI (p / p+) of the same thickness. The lightly doped silicon wafer (boron doping amount is e15) has a smaller deformation degree and a larger anti-deformation index value Rd; the heavily doped silicon wafer (boron doping amount is e17) has a larger deformation degree and a smaller anti-deformation index value Rd. The measurement results are consistent with scientific inferences, because the doping elements (for example, boron) destroy the periodic crystal structure of the single crystal to a certain extent, resulting in a decrease in its mechanical properties.

[0063] In some embodiments, the method may further include: processing a production process of the silicon wafer based on the anti-deformation index value.

[0064] The production process of silicon wafers can be handled, for example, process adjustments or quality control measures can be taken according to the anti-deformation index value of silicon wafers to optimize the production process. Specific handling operations may include adjusting process parameters, correcting process links or screening silicon wafers to ensure that the finished product meets the anti-deformation performance required by the design.

[0065] In semiconductor production, the anti-deformation ability of silicon wafers affects their stability and applicability in processes such as 3D stacking and precision packaging. However, the relevant technology lacks real-time evaluation of the anti-deformation ability of silicon wafers and production process control measures based on the evaluation results, making it difficult to effectively control the final quality of silicon wafers, especially in batch production. The above embodiment calculates the anti-deformation index value by measuring the morphological changes of the silicon wafer, and uses the anti-deformation index value as a benchmark for process control of the silicon wafer in production. For example, according to the anti-deformation index value, the production process parameters can be adjusted in time. For example, when the anti-deformation index value is lower than a predetermined value, the process parameters such as the heat treatment time or the deposition temperature are automatically adjusted to improve the anti-deformation performance of the silicon wafer, ensure the stability of the anti-deformation performance of the silicon wafer, and reduce the quality fluctuations caused by process differences. Based on the anti-deformation index value, the production process is intelligently and finely controlled in real time, which significantly improves the consistency of the anti-deformation performance of the silicon wafer and the quality of the finished product. Compared with the production method that relies on fixed process parameters, this method can optimize the production process according to the specific anti-deformation performance requirements of each batch of silicon wafers, improve the flexibility and adaptability of the production line, and provide a reliable quality control method for high-precision 3D stacking and precision packaging processes, which is conducive to improving overall production efficiency and product yield.

[0066] The embodiment of the present application also provides a silicon wafer measurement system, the system comprising a morphology measurement module, a preprocessing module and a control module. The morphology measurement module is used to measure the morphology of the silicon wafer to obtain first morphology data. The preprocessing module is used to preprocess the silicon wafer. The morphology measurement module is also used to measure the morphology of the preprocessed silicon wafer to obtain second morphology data. The control module is used to calculate the anti-deformation index value used to characterize the anti-deformation ability of the silicon wafer based on the first morphology data and the second morphology data.

[0067] In some embodiments, the topography measurement module may include a capacitance measurement unit and / or an optical measurement unit. The capacitance measurement unit may include, for example, a capacitance sensor. The optical measurement unit may include, for example, an interferometer and / or a laser measurement device.

[0068] It should be noted that each embodiment in the present application is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the product embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0069] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0070] It will be understood that when an element such as a layer, film, region, or substrate is referred to as being “on” or “under” another element, it can be “directly on” or “under” the other element or intervening elements may be present.

[0071] In the description of the above embodiments, specific features, structures, materials or characteristics may be combined in a suitable manner in any one or more embodiments or examples.

[0072] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art who is familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A silicon wafer measurement method, characterized in that: The method comprises: Measuring the morphology of the silicon wafer to obtain first morphology data; Pre-treating the silicon wafer; measuring the morphology of the pre-treated silicon wafer to obtain second morphology data; Based on the first morphology data and the second morphology data, an anti-deformation index value for characterizing the anti-deformation capability of the silicon wafer is calculated.

2. The silicon wafer measurement method according to claim 1, characterized in that: The measuring the topography of the silicon wafer to obtain first topography data includes: measuring the front topography and the back topography of the silicon wafer to obtain first topography data including first front topography data and first back topography data; The measuring the morphology of the pre-treated silicon wafer to obtain the second morphology data includes: measuring the front morphology and the back morphology of the pre-treated silicon wafer to obtain the second morphology data including the second front morphology data and the second back morphology data.

3. The silicon wafer measurement method according to claim 2, characterized in that: The step of calculating the anti-deformation index value for characterizing the anti-deformation capability of the silicon wafer based on the first morphology data and the second morphology data includes: Calculating corresponding out-of-plane deformation amounts of a plurality of measurement points of the silicon wafer based on the first front surface topography data, the first back surface topography data, the second front surface topography data, and the second back surface topography data; The absolute values ​​of the out-of-plane deformations corresponding to the plurality of measuring points of the silicon wafer are summed to obtain the deformation degree; The deformation degree takes a negative value as an anti-deformation index value for characterizing the anti-deformation ability of the silicon wafer.

4. The silicon wafer measurement method according to claim 3, characterized in that: The step of calculating the corresponding out-of-plane deformation amounts of a plurality of measurement points of the silicon wafer based on the first front surface topography data, the first back surface topography data, the second front surface topography data, and the second back surface topography data comprises: Calculating first mid-surface values ​​corresponding to a plurality of measurement points of the silicon wafer using the first front-side topography data and the first back-side topography data; Calculating second mid-surface values ​​corresponding to a plurality of measurement points of the silicon wafer using the second front-side topography data and the second back-side topography data; For at least one measuring point, a difference between a first mid-curved surface value and a second mid-curved surface value corresponding to the measuring point is calculated to obtain an out-of-plane deformation corresponding to the measuring point.

5. The silicon wafer measurement method according to claim 1, characterized in that: The measurement method of the silicon wafer morphology includes capacitive measurement and / or optical measurement.

6. The silicon wafer measurement method according to claim 5, characterized in that: The measurement method of the silicon wafer topography is determined according to the diffuse reflection parameter value and / or the roughness parameter value of the silicon wafer surface.

7. The silicon wafer measurement method according to claim 6, characterized in that: When the diffuse reflection parameter value is greater than the first target value and / or the roughness parameter value is greater than the second target value, the topography of the silicon wafer is measured by capacitive measurement.

8. The silicon wafer measurement method according to claim 1, characterized in that: The pretreatment includes heat treatment and / or thin film deposition.

9. The silicon wafer measurement method according to claim 1, characterized in that: The method further comprises: Based on the anti-deformation index value, the production process of the silicon wafer is processed.

10. A silicon wafer measurement system, characterized in that: The system includes a shape measurement module, a preprocessing module and a control module; The topography measurement module is used to measure the topography of the silicon wafer to obtain first topography data; The pre-processing module is used to pre-process the silicon wafer; The topography measurement module is also used to measure the topography of the pre-processed silicon wafer to obtain second topography data; The control module is used to calculate an anti-deformation index value for characterizing the anti-deformation capability of the silicon wafer based on the first morphology data and the second morphology data.

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