A Bidirectional Thyristor Electrostatic Protection Structure with Asymmetric Breakdown
By forming a specific P and N well structures in the bidirectional thyristor electrostatic protection structure, asymmetric breakdown characteristics are achieved, the problem of insufficient voltage withstand in the prior art is solved, and the voltage withstandability and process compatibility of the device are improved.
Patent Information
- Application Number
- CN202510168140.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-17
- Publication Date
- 2025-06-27
- Estimated Expiration
- 2045-02-17
AI Technical Summary
The prior art is difficult to achieve the design index of asymmetric breakdown voltage in thyristor electrostatic protection structures, mainly due to the limited voltage adjustable range of the HVNW well, which is difficult to meet the voltage withstand demand of SCR at the high voltage end.
By forming a first P well and a high-voltage N well distributed left and right on the epitaxial layer and having a spacing between each other, and forming a second P well within the high-voltage N well, a PNP structure is formed to achieve an asymmetric trigger voltage.
The asymmetric breakdown characteristics of the thyristor electrostatic protection structure are realized, and the voltage resistance of the device is improved. It is suitable for low-voltage and medium-low voltage platforms, with good process compatibility.
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Figure CN119653869B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and particularly to an asymmetrical breakdown bidirectional thyristor electrostatic protection structure. Background Art
[0002] In recent years, the development of integrated circuit manufacturing technology has been rapid, bringing about rapid product replacement of electronic products. Low-voltage ultra-high-speed data transmission interfaces such as USB3.1, HDMI2.1, and Type-C are widely used in electronic products. To ensure the quality and reliability of electronic products, the circuits of their chips and external interfaces must have a certain level of anti-ESD (Electro-Static Discharge) ability. Therefore, more and more protection devices are required.
[0003] SCR (Silicon-Controlled Rectifier) is widely used in various products as a protection device with strong robustness per unit area and small parasitic capacitance. As Figure 1 shown in a traditional bidirectional SCR design, the breakdown voltage and trigger voltage of the SCR are adjusted by adjusting the distance D1 between the P-type SDPW well and the N-type HVNW well. Such a traditional design can achieve asymmetrical breakdown by adjusting the geometric distance from the HVNW well to the left and right SDPW wells. However, the voltage adjustable range of only the HVNW well and the SDPW well is limited. Since the SCR needs to exhibit a large snapback characteristic, the concentration and width of the HVNW well are restricted. Therefore, it is difficult for this traditional structure to achieve the design index of bidirectional asymmetrical breakdown voltage. Summary of the Invention
[0004] Aiming at the problems existing in the prior art, the present invention provides an asymmetrical breakdown bidirectional thyristor electrostatic protection structure, which includes a substrate, a first buried layer, and an epitaxial layer sequentially arranged from bottom to top. A first P well and a high-voltage N well are formed on the epitaxial layer and are distributed left and right with a spacing therebetween. A second P well is formed in the high-voltage N well, and a PNP structure is formed in both the first P well and the second P well.
[0005] Preferably, the first P well and the second P well have the same doping structure.
[0006] Preferably, N wells are respectively arranged on both sides of the high-voltage N well. The doping concentration of the first P well is lower than that of the second P well, and the junction depth of the first P well is greater than that of the second P well.
[0007] Preferably, the doping concentration of the N well is higher than that of the high-voltage N well, and the junction depth of the N well is less than that of the high-voltage N well.
[0008] Preferably, the top of the N-well is flush with the top of the high-voltage N-well and the side parts overlap.
[0009] Preferably, a second buried layer is further formed in the epitaxial layer, and the second buried layer is located on at least one side of the high-voltage N-well and below the corresponding first P-well and N-well.
[0010] Preferably, the first buried layer is an N-type buried layer and the second buried layer is a P-type buried layer.
[0011] Preferably, the junction depth of the high-voltage N-well is the same as the thickness of the epitaxial layer.
[0012] Preferably, the substrate is a P-type substrate and the epitaxial layer is a P-type epitaxial layer.
[0013] The above technical solution has the following advantages or beneficial effects: By forming the first P-well and the high-voltage N-well which are distributed left and right and have a spacing between them on the epitaxial layer, and forming a second P-well in the high-voltage N-well, the thyristor electrostatic protection structure of the present invention can exhibit an asymmetric trigger voltage. Description of the Drawings
[0014] Figure 1 is a schematic structural diagram of a traditional bidirectional SCR;
[0015] Figure 2 is a schematic structural diagram of a bidirectional thyristor electrostatic protection structure with asymmetric breakdown in Embodiment 1;
[0016] Figure 3 is a schematic structural diagram of a bidirectional thyristor electrostatic protection structure with asymmetric breakdown in Embodiment 2;
[0017] Figure 4 is a schematic structural diagram of a bidirectional thyristor electrostatic protection structure with asymmetric breakdown in Embodiment 3;
[0018] Figure 5 is a complete structural diagram of a bidirectional thyristor electrostatic protection structure with 4 input / output ports in Embodiment 3;
[0019] Figure 6 is a schematic diagram of the DCBV curves of the 3 embodiments. Detailed Description of the Invention
[0020] The present invention will be described in detail below with reference to the drawings and specific embodiments. The present invention is not limited to this embodiment, and other embodiments also belong to the scope of the present invention as long as they conform to the gist of the present invention.
[0021] Embodiment 1
[0022] In this embodiment, in view of the above problems existing in the prior art, a bilateral thyristor electrostatic protection structure with asymmetric breakdown is provided. As Figure 2 shown, it includes a substrate 1, a first buried layer 2, and an epitaxial layer 3 which are sequentially arranged from bottom to top. On the epitaxial layer 3, a first P-well 4 and a high-voltage N-well 5 which are distributed left and right and have a spacing therebetween are formed. A second P-well 6 is formed in the high-voltage N-well 5. PNP structures are formed in both the first P-well 4 and the second P-well 6.
[0023] In a preferred embodiment of the present invention, the first P-well 4 and the second P-well 6 have the same doping structure. Here, having the same doping structure can be understood as having the same doping characteristics, that is, both have the same doping concentration and junction depth.
[0024] In this embodiment, the junction depth of the high-voltage N-well 5 is the same as the thickness of the epitaxial layer 3.
[0025] In this embodiment, the substrate 1 is a P-type substrate, and the epitaxial layer 3 is a P-type epitaxial layer.
[0026] Specifically, in this embodiment, the above PNP structure includes an N-type semiconductor region NSD, and P-type semiconductor regions PSD are respectively arranged on both sides of the N-type semiconductor region NSD. Among them, the PNP structure in the first P-well 4 leads out a first input / output port IO1 outward, and the PNP structure in the second P-well 6 leads out a second input / output port IO2 outward.
[0027] Further, the junction depth of the first P-well 4 is less than the junction depth of the high-voltage N-well 5, and the second P-well 6 formed in the high-voltage N-well 5 has the same doping structure as the first P-well 4, so that the bilateral thyristor electrostatic protection structure of this embodiment can be applied to a low-voltage process platform with isolation devices and has the characteristic of asymmetric breakdown. Since it involves the fewest injection levels, this embodiment has the best process compatibility.
[0028] Embodiment 2
[0029] In this embodiment, a bilateral thyristor electrostatic protection structure with asymmetric breakdown is provided. As Figure 3 shown, it includes a substrate 1, a first buried layer 2, and an epitaxial layer 3 which are sequentially arranged from bottom to top. On the epitaxial layer 3, a first P-well 4 and a high-voltage N-well 5 which are distributed left and right and have a spacing therebetween are formed. A second P-well 6 is formed in the high-voltage N-well 5. PNP structures are formed in both the first P-well 4 and the second P-well 6.
[0030] In this embodiment, N-wells 7 are respectively arranged on both sides of the high-voltage N-well 5. The doping concentration of the first P-well 4 is lower than that of the second P-well 6, and the junction depth of the first P-well 4 is greater than that of the second P-well 6.
[0031] In this embodiment, the doping concentration of N-well 7 is higher than that of the high-voltage N-well 5, and the junction depth of N-well 7 is less than that of the high-voltage N-well 5.
[0032] In this embodiment, the top of N-well 7 is flush with that of the high-voltage N-well 5 and the side parts overlap.
[0033] In this embodiment, the junction depth of the high-voltage N-well 5 is the same as the thickness of the epitaxial layer 3.
[0034] In this embodiment, the substrate 1 is a P-type substrate, and the epitaxial layer 3 is a P-type epitaxial layer.
[0035] Specifically, in this embodiment, on the basis of Embodiment 1, the second P-well in the high-voltage N-well 5 is replaced with a doping structure different from that of the first P-well, and N-wells 7 with partially overlapping sides are formed on both sides of the high-voltage N-well 5. The N-well 7 preferably has a junction depth comparable to that of the first P-well 4, and the junction depth of the second P-well 6 is not greater than that of the N-well 7. So that the thyristor electrostatic protection structure of this embodiment can be applied to the medium and low voltage platforms, also has the characteristic of asymmetric breakdown, and has good process compatibility.
[0036] Embodiment 3
[0037] In this embodiment, a thyristor electrostatic protection structure with asymmetric breakdown is provided, as Figure 4 shown, including a substrate 1, a first buried layer 2, and an epitaxial layer 3 arranged in sequence from bottom to top. On the epitaxial layer 3, a first P-well 4 and a high-voltage N-well 5 are formed and distributed left and right with a spacing therebetween. A second P-well 6 is formed in the high-voltage N-well 5, and a PNP structure is formed in both the first P-well 4 and the second P-well 6.
[0038] In this embodiment, N-wells 7 are respectively arranged on both sides of the high-voltage N-well 5. The doping concentration of the first P-well 4 is lower than that of the second P-well 6, and the junction depth of the first P-well 4 is greater than that of the second P-well 6.
[0039] In this embodiment, the doping concentration of N-well 7 is higher than that of the high-voltage N-well 5, and the junction depth of N-well 7 is less than that of the high-voltage N-well 5.
[0040] In this embodiment, the top of N-well 7 is flush with that of the high-voltage N-well 5 and the side parts overlap.
[0041] In this embodiment, the junction depth of the high-voltage N-well 5 is the same as the thickness of the epitaxial layer 3.
[0042] In this embodiment, the substrate 1 is a P-type substrate, and the epitaxial layer 3 is a P-type epitaxial layer.
[0043] In this embodiment, a second buried layer 8 is further formed in the epitaxial layer 3. The second buried layer 8 is located on at least one side of the high-voltage N-well 5 and below the corresponding first P-well 4 and N-well 7.
[0044] In a preferred embodiment of the present invention, the first buried layer 2 is an N-type buried layer, and the second buried layer 8 is a P-type buried layer.
[0045] Specifically, in the traditional bidirectional SCR structure, as the voltage required at the high-voltage end increases, the breakdown voltage can be increased by increasing the size of D1. However, when D1 increases to a certain extent, continuing to increase the size of D1 will not further increase the breakdown voltage. At this time, the reason for restricting the further increase of the breakdown voltage is that the electric field intensity at the surface is too large, and the PN junction breaks down from the surface. To reduce the surface electric field intensity, in this embodiment, on the basis of Embodiment 2, a second buried layer 8, that is, a P-type buried layer, is further formed in the epitaxial layer 3, so that a dual ReSurF (Reduced Surface Field) structure is composed of three regions: the N well 7, the P-type buried layer PBL, and the N-type NBL of the first buried layer 2. Transferring the location with the maximum electric field intensity from the surface to the body can improve the breakdown voltage of the device. The advantage of this structure is that it further improves the breakdown voltage of IO2 - IO1 without increasing the device size.
[0046] Figure 4 In [the structure], the N well 7, in addition to being part of the ResurF structure, also serves as part of the equivalent base region, increasing the concentration of the equivalent base region of the parasitic PNP transistor and having the advantage of reducing the leakage current of the device.
[0047] Furthermore, as Figure 5 shown, it is a complete schematic diagram of Embodiment 1 with 4 finger bars, that is, a complete schematic diagram of a bidirectional thyristor electrostatic protection structure with 4 input ports. Among them, it includes the first first P well 4, the first high-voltage N well 5, the second first P well 4, and the second high-voltage N well 5 arranged in sequence from left to right. And a second buried layer 8 is provided below the N well 7 on the left side of the first first P well 4 and the first high-voltage N well 5, a second buried layer 8 is provided below the N well 7 on the right side of the first high-voltage N well 5 and on the left side of the second first P well 4, and a second buried layer 8 is provided below the N well 7 on the right side of the second first P well 4 and on the left side of the second high-voltage N well 5. N well regions NW with the same thickness as the epitaxial layer 3 are also formed on the left side of the first first P well 4 and on the right side of the second high-voltage N well 5, that is, N well regions NW are provided above both ends of the first buried layer 2, which are connected to the first buried layer 2 and can surround the internal finger bars to form good isolation.
[0048] As Figure 6 shown, it is a schematic diagram of the DCBV (DC breakdown characteristic) curves obtained by performing DC breakdown tests on the asymmetrical breakdown bidirectional thyristor electrostatic protection structures of Embodiment 1, Embodiment 2, and Embodiment 3 respectively. It can be seen that there are differences between the forward breakdown voltages and reverse breakdown voltages of the three embodiments, showing asymmetrical breakdown characteristics.
[0049] The above are only the preferred embodiments of the present invention, and thus do not limit the implementation and protection scope of the present invention. For those skilled in the art, it should be realized that all the equivalent replacements and obvious changes made by using the content of this specification and the drawings should be included in the protection scope of the present invention.
Claims
1. A bidirectional thyristor electrostatic protection structure with asymmetric breakdown, characterized in that: The invention comprises a substrate, a first buried layer and an epitaxial layer arranged in sequence from bottom to top, wherein a first P well and a high-voltage N well are formed on the epitaxial layer and are distributed left and right and have a spacing therebetween, a second P well is formed in the high-voltage N well, and a PNP structure is formed in both the first P well and the second P well; N wells are provided on both sides of the high-voltage N well, respectively. The doping concentration of the first P well is lower than that of the second P well, and the junction depth of the first P well is greater than that of the second P well.
2. The bidirectional thyristor electrostatic protection structure according to claim 1, characterized in that: The doping concentration of the N-well is higher than that of the high-voltage N-well, and the junction depth of the N-well is smaller than that of the high-voltage N-well.
3. The bidirectional thyristor electrostatic protection structure according to claim 1, characterized in that: The N-well is flush with the high-voltage N-well at the top and the side surfaces partially overlap with each other.
4. The bidirectional thyristor electrostatic protection structure according to claim 1, characterized in that: A second buried layer is also formed in the epitaxial layer. The second buried layer is located on at least one side of the high-voltage N-well and below the corresponding first P-well and the N-well.
5. The bidirectional thyristor electrostatic protection structure according to claim 4, characterized in that: The first buried layer is an N-type buried layer, and the second buried layer is a P-type buried layer.
6. The bidirectional thyristor electrostatic protection structure according to claim 1, characterized in that: The junction depth of the high-voltage N-well is the same as the thickness of the epitaxial layer.
7. The bidirectional thyristor electrostatic protection structure according to claim 1, characterized in that: The substrate is a P-type substrate, and the epitaxial layer is a P-type epitaxial layer.
Citation Information
Patent Citations
Bidirectional PNPN silicon-controlled rectifier
US20090236631A1