A heat dissipation improved EEB motherboard as a chassis component and wiring method

Abstract

The present invention provides a heat dissipation improved EEB motherboard and wiring method as a chassis component in the technical field of EEB motherboard, the EEB motherboard comprises: a PCB board, provided with a first extension part and a second extension part; a first CPU slot, arranged on the PCB board, located at the lower left of the PCB board; a second CPU slot, arranged on the PCB board, located at the lower right of the PCB board; a first power module, located directly below the first CPU slot; a second power module, located directly below the second CPU slot; a first memory slot group, arranged on the PCB board, located on the left and right sides of the first CPU slot; a second memory slot group, arranged on the PCB board, located on the left and right sides of the second CPU slot; a PCIE slot group, located above the PCB board; a first PCIE expansion interface, arranged on the PCB board; a second PCIE expansion interface, arranged on the PCB board; a PCH, arranged on the PCB board; four MCIO connectors, arranged on the PCB board and the first extension part. The advantages of the present invention are: under the premise of ensuring compatibility, the heat dissipation performance, signal stability and expansibility of the EEB motherboard are greatly improved.

Description

Technical Field

[0001] The invention relates to the technical field of EEB motherboards, and in particular to an EEB motherboard with improved heat dissipation as a chassis component and a wiring method. Background Art

[0002] The EEB (Enterprise Electronics Bay) motherboard is a standard motherboard for dual-channel server design. The EEB motherboard is one of the most important components of the chassis. The standard of the EEB motherboard was updated to version 1.01 in 2012, which defines the motherboard size, screw hole positions, PCIE slot positions, IO interface positions, avoidance areas in the chassis, etc. In the server application field at that time, it mainly supported INTEL E5 series processors and AMD Opteron series processors. The power consumption of these processors is in the range of 100-200W, and the maximum PCIE link rate is PCIE3.0.

[0003] The structure and layout of the traditional EEB motherboard (standard EEB motherboard for dual-core CPU) are as follows: Figure 6 As shown, the EEB motherboard is installed in the chassis, and a 2.5-inch hard disk bracket (HARDDISK) and a power supply module cage (POWER SUPPLY) are designed on the right side, and the fan tray (PACK FAN) is located below the EEB motherboard; the gap between the 2.5-inch hard disk bracket and the EEB motherboard is 10mm, and there is a margin in the chassis design, which is greater than the standard requirement of at least 5.08mm. The gap between the fan tray and the EEB motherboard is 20mm, which is greater than the standard requirement of at least 12.7mm; CPU1 and CPU0 on the EEB motherboard are arranged up and down, CPU PWR1 (power supply module) is located above CPU1, CPU PWR0 (power supply module) is located below CPU0, and the IO interface area (IO AERA) is located above CPU PWR1, with a width of 152.15mm. Seven (most designs have six) PCIE slots are located on the upper left of the EEB motherboard, and memory slots (MEMORY) are provided on the left and right sides of CPU1 and CPU0, respectively, as well as components such as MCIO connectors, PCH, and PCIE expansion interfaces (PCIE DEVICE).

[0004] The wiring of the traditional EEB motherboard is as follows Figure 7As shown, CPU0 is connected to the PCIE slot, and some of the routing needs to pass through the memory slot (high-speed DDR5 signal line area); the routing from CPU1 to the PCIE slot needs to pass through the memory slot; the PCIE signal of CPU0 is connected to the MCIO connector and needs to pass through the memory slot; due to space limitations, CPU1 cannot connect the PCIE signal to the MCIO connector; the DMI signal from CPU0 to PCH needs to pass through the memory slot; there are three groups of UPI interconnection signals that interconnect CPU0 and CPU1, each group has a total of 48 pairs of transmission and reception, and the third group needs to pass through the memory slot.

[0005] The structure and wiring of the traditional EEB motherboard have the following disadvantages: 1. The air blown out by the fan tray passes through CPUPWR0, CPU0, CPU1, and CPU PWR1 in sequence, that is, the heat of CPU PWR0 is transferred to CPU0, CPU1, and CPU PWR1, the heat of CPU0 is transferred to CPU1 and CPU PWR1, and the heat of CPU1 is transferred to CPU PWR1. There is overlap of heat sources in the entire air duct, resulting in the temperature of CPU1 being higher than that of CPU0, and the temperature of CPU PWR1 being the highest; with the development of processor technology, CPU power consumption is increasing, and PCIE speed is increasing. The traditional EEB motherboard can only meet the heat dissipation capacity of 200W power consumption, and can no longer meet the current heat dissipation requirements of 350W power consumption; 2. Due to the long distance when wiring, and the inevitable need to cross related components (memory slots, etc.), in order to complete the wiring, the number of layers of the PCB board needs to be increased, which will undoubtedly increase interference and cause the quality of high-speed signals to deteriorate; 3. Due to the influence of the memory slot and CPU PWR1, the space in the IO interface area is very cramped, and only IO interfaces with a relatively shallow depth (about 30mm deep) can be placed, which limits the scalability.

[0006] A Chinese utility model patent with application number 202020536636.9 and classification number G12B9 / 10 discloses an instrument motherboard with an anti-static ring. Although this motherboard is a single-channel CPU motherboard, its heat dissipation and wiring also have certain defects.

[0007] Although traditional EEB motherboards have problems related to heat dissipation and wiring, the EEB standard chassis is a relatively low-cost mature solution, which has become the priority choice for small and medium-sized enterprise customers. Therefore, how to provide an EEB motherboard with improved heat dissipation as a chassis component and a wiring method to improve the heat dissipation performance, signal stability and scalability of the EEB motherboard while ensuring compatibility has become a technical problem that needs to be solved urgently. Summary of the invention

[0008] The technical problem to be solved by the present invention is to provide a heat dissipation improved EEB motherboard and wiring method as a chassis component, so as to improve the heat dissipation performance, signal stability and scalability of the EEB motherboard while ensuring compatibility.

[0009] In a first aspect, the present invention provides an EEB motherboard with improved heat dissipation as a chassis component, comprising:

[0010] An EEB standard PCB board, with a first extension portion downwardly arranged on the lower side and a second extension portion rightwardly arranged on the right side;

[0011] A first CPU slot is provided on the PCB board and is located at the lower left side of the PCB board;

[0012] A second CPU slot is provided on the PCB board, located at the lower right side of the PCB board, and arranged symmetrically with the first CPU slot;

[0013] A first power supply module is disposed on the PCB board, is located directly below the first CPU slot, and is connected to the first CPU slot;

[0014] a second power supply module, disposed on the PCB board, located directly below the second CPU slot and connected to the second CPU slot;

[0015] an ATX power connector, disposed on the second extension portion and connected to the first power module and the second power module;

[0016] A first memory slot group is provided on the PCB board, located on the left and right sides of the first CPU slot, and connected to the first CPU slot;

[0017] A second memory slot group is provided on the PCB board, located on the left and right sides of the second CPU slot, and connected to the second CPU slot;

[0018] A PCIE slot group is provided on the PCB board, is located above the PCB board, and is connected to the first CPU slot and the second CPU slot;

[0019] A first PCIE expansion interface, provided on the PCB board and connected to the first CPU slot;

[0020] A second PCIE expansion interface, provided on the PCB board and connected to the second CPU slot;

[0021] A PCH, disposed on the PCB board and connected to the first CPU slot;

[0022] Two upper MCIO connectors are arranged side by side on the PCB board and connected to the second CPU socket;

[0023] Two lower MCIO connectors are arranged side by side on the left and right sides of the first extension portion and are respectively connected to the first CPU slot and the second CPU slot;

[0024] A plurality of locking accessories are arranged on the PCB board, and the EEB mainboard is locked in the chassis through the locking accessories to serve as a chassis component.

[0025] Furthermore, the size of the first extension part is 304.8 mm*15 mm; the size of the second extension part is 10 mm*185.3 mm, and the bottom is flush with the first extension part.

[0026] Furthermore, the first power module and the second power module are both seven-phase power supply modules.

[0027] Furthermore, the first memory slot group includes:

[0028] Four first memory slots are symmetrically arranged on the left and right sides of the first CPU slot, and the first memory slots on the same side are arranged up and down.

[0029] Furthermore, the second memory slot group includes:

[0030] Four second memory slots are symmetrically arranged on the left and right sides of the second CPU slot, and the second memory slots on the same side are arranged up and down.

[0031] Furthermore, the PCIE slot group includes:

[0032] A No. 1 PCIE slot, located at the upper left of the PCB board and connected to the first CPU slot;

[0033] A second PCIE slot, located at the upper left of the PCB board, located to the right of the first PCIE slot, and connected to the first CPU slot;

[0034] A sixth-position PCIE slot, located at the upper left of the PCB board, located to the right of the second-position PCIE slot, separated from the second-position PCIE slot by three slots, and connected to the first CPU slot;

[0035] An eighth-position PCIE slot, located at the upper right of the PCB board, at the same height as the first-position PCIE slot, and connected to the second CPU slot;

[0036] A No. 9 PCIE slot, located at the upper right of the PCB board, located to the right of the No. 8 PCIE slot, and connected to the second CPU slot;

[0037] A No. 10 PCIE slot is located at the upper right of the PCB board, at the right side of the No. 9 PCIE slot, and is connected to the second CPU slot.

[0038] Furthermore, the first PCIE expansion interface is located above the middle of the second PCIE slot and the sixth PCIE slot;

[0039] The second PCIE expansion interface is located in the middle of the sixth PCIE slot and the eighth PCIE slot;

[0040] The PCH is located above the second PCIE expansion interface.

[0041] Furthermore, the upper MCIO connector is located between the second PCIE expansion interface and the eighth PCIE slot, and is located above the second CPU slot.

[0042] Furthermore, it also includes:

[0043] An IO interface group is arranged on the PCB board, located above the middle of the sixth PCIE slot and the eighth PCIE slot, and connected to the PCH.

[0044] In a second aspect, the present invention provides a wiring method for a heat dissipation improved EEB motherboard as a chassis component, comprising the following steps in no particular order:

[0045] Step S1, the middle of the top of the first CPU slot is connected to the bottom of the first PCIE slot, the second PCIE slot, the sixth PCIE slot and the first PCIE expansion interface through the PCIE11 signal line, the PCIE12 signal line, the PCIE13 signal line and the PCIE14 signal line respectively;

[0046] Step S2, the top middle of the first CPU slot is connected to the top middle of the second CPU slot via the UPI1 signal line and the UPI2 signal line, bypassing the top of the first memory slot group and the second memory slot group, and is connected to the PCH in a straight line via the DMI signal line;

[0047] Step S3, the middle of the bottom end of the first CPU slot is connected to the lower MCIO connector on the left side in a straight line through the PCIE15 signal line, and is connected to the middle of the bottom end of the second CPU slot by bypassing the bottom of the first memory slot group and the second memory slot group through the UPI3 signal line;

[0048] Step S4, the top middle part of the second CPU slot is directly connected to the eighth PCIE slot, the ninth PCIE slot, and the tenth PCIE slot through the PCIE21 signal line, the PCIE22 signal line, and the PCIE23 signal line, respectively, and is directly connected to the two upper MCIO connectors through the PCIE24 signal line and the PCIE25 signal line;

[0049] Step S5, the middle of the bottom end of the second CPU slot is connected to the lower MCIO connector on the right side in a straight line through the PCIE26 signal line, and the left side of the bottom end is connected to the second PCIE expansion interface through the middle of the first memory slot group and the second memory slot group through the PCIE27 signal line.

[0050] The advantages of the present invention are:

[0051] 1. By symmetrically arranging the first CPU slot and the second CPU slot at the lower left and lower right of the PCB board, and arranging the first power module and the second power module respectively below the first CPU slot and the second CPU slot, the traditional vertical arrangement structure is adjusted to a horizontal arrangement structure, so that the heat of the first CPU slot and the first power module will not be transferred to the second CPU slot and the second power module, and the heat of the second CPU slot and the second power module will not be transferred to the first CPU slot and the first power module, and the first memory slot group is located on the left and right sides of the first CPU slot, and the second memory slot group is located on the left and right sides of the second CPU slot, so that the memories installed in the first memory slot group and the second memory slot group are closer to the fan disk, thereby greatly improving the heat dissipation performance of the EEB motherboard.

[0052] 2. By symmetrically arranging the first CPU slot and the second CPU slot at the lower left and lower right of the PCB board, arranging the first memory slot on the left and right sides of the first CPU slot, arranging the second memory slot on the left and right sides of the second CPU slot, arranging the No. 1 PCIE slot, the No. 2 PCIE slot, and the No. 6 PCIE slot above the first CPU slot, and arranging the No. 8 PCIE slot, the No. 9 PCIE slot, and the No. 10 PCIE slot above the second CPU slot; arranging the first PCIE expansion interface to be located above the middle of the No. 2 PCIE slot and the No. 6 PCIE slot, the second PCIE expansion interface to be located in the middle of the No. 6 PCIE slot and the No. 8 PCIE slot, the PCH to be located above the second PCIE expansion interface, the upper MCIO connector to be located between the second PCIE expansion interface and the No. 8 PCIE slot, and located above the second CPU slot, and the lower MCIO connector to be located on the left and right sides of the first extension portion below the PCB board; so that the first CPU slot is connected to the PCIE11 signal line, the PCIE12 signal line, the PCIE13 signal line, the PCIE14 signal line, the PCIE15 signal line, and the DMI signal line. The first CPU slot is connected to the second CPU slot through the PCIE21 signal line, the second CPU slot, the sixth CPU slot, the first PCIE expansion interface, the lower MCIO connector on the left, and the PCH; the second CPU slot is connected to the eighth PCIE slot, the ninth PCIE slot, the tenth PCIE slot, the upper MCIO connector, the upper MCIO connector, and the lower MCIO connector on the right through the PCIE21 signal line, the PCIE22 signal line, the PCIE23 signal line, the PCIE24 signal line, the PCIE25 signal line, and the PCIE26 signal line; the three groups of UPI signal lines connected to the first CPU slot and the second CPU slot only need to bypass the first memory and the second memory from the top or bottom for a short distance, and the left side of the bottom of the second CPU slot is connected to the second PCIE expansion interface through the PCIE27 signal line through the middle of the first memory slot group and the second memory slot group; that is, the overall wiring greatly shortens the length of the signal line, and there is no need to cross the first memory slot group and the second memory slot group as traditionally, and there is no need to increase the number of layers of the PCB board as traditionally, so as to avoid introducing unnecessary interference, thereby greatly improving the signal stability of the EEB motherboard.

[0053] 3. A first extension portion with a size of 304.8 mm*15 mm is set downward on the lower side of the PCB board, and a second extension portion with a size of 10 mm*185.3 mm is set to the right on the right side, and the bottom of the second extension portion is flush with the bottom of the first extension portion. Since the chassis for installing the EEB motherboard has a space margin in the design, the extended first extension portion and the second extension portion can perfectly fit the existing chassis; and the No. 1 PCIE slot, the No. 2 PCIE slot, and the No. 6 PCIE slot are sequentially arranged on the upper left side of the PCB board, and the No. 2 PCIE slot and the No. 6 PCIE slot are separated by three slots; that is, the No. 1 PCIE slot, the No. 2 PCIE slot, and the No. 6 PCIE slot are located in the traditional installation position, and the No. 3 PCIE slot, the No. 4 PCIE slot, the No. 5 PCIE slot, and the No. 7 PCIE slot can be expanded between the No. 2 PCIE slot and the No. 6 PCIE slot and on the right side of the No. 6 PCIE slot as needed, thereby ensuring the compatibility of the EEB motherboard.

[0054] 4. By adjusting the traditional vertical heat dissipation arrangement structure to a horizontal heat dissipation arrangement structure, the heat dissipation performance of the EEB motherboard is effectively improved, so that the first power module and the second power module can use a seven-phase power supply module instead of the traditional eight-phase power supply module, which not only reduces the cost of the EEB motherboard, but also provides more space for the routing of the UPI3 signal line between the first CPU slot and the second CPU slot.

[0055] 5. By leaving three slots between the second PCIE slot and the sixth PCIE slot, and ample space between the sixth PCIE slot and the eighth PCIE slot, subsequent expansion can be carried out between the second PCIE slot and the sixth PCIE slot, and between the sixth PCIE slot and the eighth PCIE slot; and because of the ample space between the sixth PCIE slot and the eighth PCIE slot, an IO interface area with a width of 81.6mm can be accommodated for placing the IO interface group, and the depth is deeper than that of the traditional EEB motherboard, and can accommodate IO interfaces larger than the dual network port socket (for example, a 60mm deep dual optical port socket), which is convenient for more flexible expansion of interfaces; although the right side of the IO interface group is affected by the eighth PCIE slot and the connector cannot be placed directly, there is a need for additional connectors, which can be connected to the three slots (the fourth PCIE slot, the fifth PCIE slot, and the sixth PCIE slot) on the left side through cables, which ultimately greatly improves the scalability of the EEB motherboard.

[0056] 6. By providing the second extension part, the ATX power connector can be installed on the second extension part, ensuring that the 12V power supply current capacity meets the 700W requirement. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] The present invention will be further described below in conjunction with embodiments with reference to the accompanying drawings.

[0058] Figure 1 The present invention is a schematic structural diagram of a heat dissipation improved EEB mainboard as a chassis component.

[0059] Figure 2 It is a schematic diagram of the dimensions of a heat dissipation improved EEB mainboard as a chassis component of the present invention.

[0060] Figure 3 The invention discloses a wiring diagram of an improved heat dissipation EEB mainboard as a chassis component.

[0061] Figure 4 The invention discloses a circuit principle block diagram of a heat dissipation improved EEB mainboard as a chassis component.

[0062] Figure 5 The present invention is a flow chart of a wiring method of a heat dissipation improved EEB mainboard as a chassis component.

[0063] Figure 6 It is a structural diagram of a traditional EEB motherboard.

[0064] Figure 7 This is a wiring diagram of a traditional EEB motherboard.

[0065] Figure 8 This is a schematic diagram of the screw holes of a traditional EEB motherboard (EEB standard screw holes).

[0066] Marking Description:

[0067] 100-a heat dissipation improved EEB motherboard as a chassis component, 1-PCB board, 2-a first CPU slot, 3-a second CPU slot, 4-a first power module, 5-a second power module, 6-ATX power connector, 7-a first memory slot group, 8-a second memory slot group, 9-a PCIE slot group, 10-a first PCIE expansion interface, 20-a second PCIE expansion interface, 30-PCH, 40-an upper MCIO connector, 50-a lower MCIO connector, 60-a lock attachment, 70-an IO interface group, 80-a fan tray, 11-a first extension part, 12-a second extension part, 71-a first memory slot, 81-a second memory slot, 91-a first PCIE slot, 92-a second PCIE slot, 93-a sixth PCIE slot, 94-a eighth PCIE slot, 95-a ninth PCIE slot, 96-a tenth PCIE slot, DETAILED DESCRIPTION

[0068] The technical solution in the embodiment of the present application has the following overall idea: by strictly limiting the size of the first extension portion and the second extension portion, the No. 1 PCIE slot, the No. 2 PCIE slot, and the No. 6 PCIE slot are arranged at traditional installation positions to ensure compatibility; by adjusting the traditional vertical heat dissipation arrangement structure to a horizontal heat dissipation arrangement structure, the heat dissipation performance is improved; by adjusting the layout of each component to shorten the length of the signal line, there is no need to cross the first memory slot group and the second memory slot group as traditionally, and there is no need to increase the number of layers of the PCB board, thereby avoiding the introduction of unnecessary interference to improve signal stability.

[0069] Please refer to Figures 1 to 8 As shown, a preferred embodiment of the heat dissipation improved EEB motherboard 100 of the present invention as a chassis component includes:

[0070] A PCB board 1 of EEB standard is provided with a first extension portion 11 downwardly on the lower side and a second extension portion 12 to the right on the right side; the first extension portion 11 is used to install the lower MCIO connector 50; the second extension portion 12 is used to install the ATX power connector 6; the PCB board 1 is provided with screw holes of EEB standard, that is, Figure 8 The screw hole positions shown are A, C, F', F, G, H, H', J, J', K, K', L, L', M, M', X, Y, Y', Z.

[0071] A first CPU slot 2 is provided on the PCB board 1 and is located at the lower left side of the PCB board 1;

[0072] A second CPU slot 3 is provided on the PCB board 1, located at the lower right side of the PCB board 1, and arranged symmetrically with the first CPU slot 2; the first CPU slot 2 and the second CPU slot 3 are both used to install a CPU (not shown), and the horizontal arrangement is used to improve the overall heat dissipation performance;

[0073] a first power module 4, provided on the PCB board 1, located directly below the first CPU slot 2 and connected to the first CPU slot 2, and used for supplying power to the CPU connected to the first CPU slot 2;

[0074] a second power supply module 5, provided on the PCB board 1, located directly below the second CPU slot 3 and connected to the second CPU slot 3, and used for supplying power to the CPU connected to the second CPU slot 3;

[0075] an ATX power connector 6, disposed on the second extension portion 12 and connected to the first power module 4 and the second power module 5;

[0076] A first memory slot group 7 is provided on the PCB board 1, located on the left and right sides of the first CPU slot 2, and connected to the first CPU slot 2;

[0077] A second memory slot group 8 is provided on the PCB board 1, located on the left and right sides of the second CPU slot 3, and connected to the second CPU slot 3; that is, the first memory slot group 7 and the second memory slot group 8 are also arranged in a horizontal manner to be close to the fan tray 80, effectively improving the heat dissipation performance;

[0078] A PCIE slot group 9 is provided on the PCB board 1, located above the PCB board 1, and connected to the first CPU slot 2 and the second CPU slot 3;

[0079] A first PCIE expansion interface 10, provided on the PCB board 1 and connected to the first CPU slot 2;

[0080] A second PCIE expansion interface 20, provided on the PCB board 1 and connected to the second CPU slot 3;

[0081] A PCH 30, provided on the PCB board 1 and connected to the first CPU slot 2;

[0082] Two upper MCIO connectors 40 are arranged side by side on the PCB board 1 and connected to the second CPU socket 3;

[0083] Two lower MCIO connectors 50 are arranged side by side on the left and right sides of the first extension portion 11, and are respectively connected to the first CPU slot 2 and the second CPU slot 3; by arranging the lower MCIO connectors 50 on the first extension portion 11, the wiring distance is effectively shortened;

[0084] A plurality of locking accessories 60 are arranged on the PCB board 1, and the EEB mainboard 100 is locked in a chassis (not shown) through the locking accessories 60 to serve as a chassis component; that is, the locking accessories 60 are arranged on the screw holes of the PCB board 1. In specific implementation, the screw holes A, C, F', G, H, J, X, Y, and Z are selected to just avoid the positions of components such as the first CPU slot 2, the second CPU slot 3, the first memory slot group 7, and the second memory slot group 8.

[0085] The size of the first extension part 11 is 304.8 mm*15 mm, and the size of the second extension part 12 is 10 mm*185.3 mm, and the bottom is flush with the bottom of the first extension part 11. By strictly limiting the sizes of the first extension part 11 and the second extension part 12, it can be compatible with the existing chassis (not shown).

[0086] The first power module 4 and the second power module 5 are both seven-phase power supply modules, replacing the traditional eight-phase power supply module, which not only reduces the cost but also provides space for wiring.

[0087] The first memory slot group 7 includes:

[0088] Four first memory slots 71 are symmetrically arranged on the left and right sides of the first CPU slot 2, and the first memory slots 71 on the same side are arranged up and down.

[0089] The second memory slot group 8 includes:

[0090] Four second memory slots 81 are symmetrically arranged on the left and right sides of the second CPU slot 3, and the second memory slots 81 on the same side are arranged up and down.

[0091] The PCIE slot group 9 includes:

[0092] A No. 1 PCIE slot 91, located at the upper left of the PCB board 1 and connected to the first CPU slot 2;

[0093] A second PCIE slot 92 is located at the upper left of the PCB board 1, located to the right of the first PCIE slot 91, and connected to the first CPU slot 2;

[0094] A sixth-position PCIE slot 93 is located at the upper left of the PCB board 1, to the right of the second-position PCIE slot 92, is separated from the second-position PCIE slot 92 by three slots, and is connected to the first CPU slot 2;

[0095] An eighth-position PCIE slot 94 is located at the upper right of the PCB board 1, is at the same height as the first-position PCIE slot 91, and is connected to the second CPU slot 3;

[0096] A No. 9 PCIE slot 95 is located at the upper right of the PCB board 1, at the right side of the No. 8 PCIE slot 94, and connected to the second CPU slot 3;

[0097] A No. 10 PCIE slot 96 is located at the upper right of the PCB board 1 , at the right side of the No. 9 PCIE slot 95 , and is connected to the second CPU slot 3 .

[0098] By spacing three slots between the second PCIE slot 92 and the sixth PCIE slot 93, and leaving ample space between the sixth PCIE slot 93 and the eighth PCIE slot 94, subsequent expansion can be performed between the second PCIE slot 92 and the sixth PCIE slot 93, and between the sixth PCIE slot 93 and the eighth PCIE slot 94, thereby greatly improving the expansibility of the EEB motherboard 100.

[0099] The first PCIE expansion interface 10 is located above the middle of the second PCIE slot 92 and the sixth PCIE slot 93;

[0100] The second PCIE expansion interface 20 is located in the middle of the sixth PCIE slot 93 and the eighth PCIE slot 94;

[0101] The PCH 30 is located above the second PCIE expansion interface 20 .

[0102] The upper MCIO connector 40 is located between the second PCIE expansion interface 20 and the eighth PCIE slot 94 , and is located above the second CPU slot 3 .

[0103] Also includes:

[0104] An IO interface group 70 is provided on the PCB board 1 , located above the middle of the sixth PCIE slot 93 and the eighth PCIE slot 94 , and connected to the PCH 30 .

[0105] A preferred embodiment of a wiring method of a heat dissipation improved EEB motherboard as a chassis component of the present invention comprises the following steps in no particular order:

[0106] Step S1, the middle of the top of the first CPU slot is connected to the bottom of the first PCIE slot, the second PCIE slot, the sixth PCIE slot and the first PCIE expansion interface through the PCIE11 signal line, the PCIE12 signal line, the PCIE13 signal line and the PCIE14 signal line respectively;

[0107] Step S2, the top middle of the first CPU slot is connected to the top middle of the second CPU slot via the UPI1 signal line and the UPI2 signal line, bypassing the top of the first memory slot group and the second memory slot group, and is connected to the PCH in a straight line via the DMI signal line;

[0108] Step S3, the middle of the bottom end of the first CPU slot is connected to the lower MCIO connector on the left side in a straight line through the PCIE15 signal line, and is connected to the middle of the bottom end of the second CPU slot by bypassing the bottom of the first memory slot group and the second memory slot group through the UPI3 signal line;

[0109] Step S4, the top middle part of the second CPU slot is directly connected to the eighth PCIE slot, the ninth PCIE slot, and the tenth PCIE slot through the PCIE21 signal line, the PCIE22 signal line, and the PCIE23 signal line, respectively, and is directly connected to the two upper MCIO connectors through the PCIE24 signal line and the PCIE25 signal line;

[0110] Step S5, the middle of the bottom end of the second CPU slot is connected to the lower MCIO connector on the right side in a straight line through the PCIE26 signal line, and the left side of the bottom end is connected to the second PCIE expansion interface through the middle of the first memory slot group and the second memory slot group through the PCIE27 signal line.

[0111] In summary, the advantages of the present invention are:

[0112] 1. By symmetrically arranging the first CPU slot and the second CPU slot at the lower left and lower right of the PCB board, and arranging the first power module and the second power module respectively below the first CPU slot and the second CPU slot, the traditional vertical arrangement structure is adjusted to a horizontal arrangement structure, so that the heat of the first CPU slot and the first power module will not be transferred to the second CPU slot and the second power module, and the heat of the second CPU slot and the second power module will not be transferred to the first CPU slot and the first power module, and the first memory slot group is located on the left and right sides of the first CPU slot, and the second memory slot group is located on the left and right sides of the second CPU slot, so that the memories installed in the first memory slot group and the second memory slot group are closer to the fan disk, thereby greatly improving the heat dissipation performance of the EEB motherboard.

[0113] 2. By symmetrically arranging the first CPU slot and the second CPU slot at the lower left and lower right of the PCB board, arranging the first memory slot on the left and right sides of the first CPU slot, arranging the second memory slot on the left and right sides of the second CPU slot, arranging the No. 1 PCIE slot, the No. 2 PCIE slot, and the No. 6 PCIE slot above the first CPU slot, and arranging the No. 8 PCIE slot, the No. 9 PCIE slot, and the No. 10 PCIE slot above the second CPU slot; arranging the first PCIE expansion interface to be located above the middle of the No. 2 PCIE slot and the No. 6 PCIE slot, the second PCIE expansion interface to be located in the middle of the No. 6 PCIE slot and the No. 8 PCIE slot, the PCH to be located above the second PCIE expansion interface, the upper MCIO connector to be located between the second PCIE expansion interface and the No. 8 PCIE slot, and located above the second CPU slot, and the lower MCIO connector to be located on the left and right sides of the first extension portion below the PCB board; so that the first CPU slot is connected to the PCIE11 signal line, the PCIE12 signal line, the PCIE13 signal line, the PCIE14 signal line, the PCIE15 signal line, and the DMI signal line. The first CPU slot is connected to the second CPU slot through the PCIE21 signal line, the second CPU slot, the sixth CPU slot, the first PCIE expansion interface, the lower MCIO connector on the left, and the PCH; the second CPU slot is connected to the eighth PCIE slot, the ninth PCIE slot, the tenth PCIE slot, the upper MCIO connector, the upper MCIO connector, and the lower MCIO connector on the right through the PCIE21 signal line, the PCIE22 signal line, the PCIE23 signal line, the PCIE24 signal line, the PCIE25 signal line, and the PCIE26 signal line; the three groups of UPI signal lines connected to the first CPU slot and the second CPU slot only need to bypass the first memory and the second memory from the top or bottom for a short distance, and the left side of the bottom of the second CPU slot is connected to the second PCIE expansion interface through the PCIE27 signal line through the middle of the first memory slot group and the second memory slot group; that is, the overall wiring greatly shortens the length of the signal line, and there is no need to cross the first memory slot group and the second memory slot group as traditionally, and there is no need to increase the number of layers of the PCB board as traditionally, so as to avoid introducing unnecessary interference, thereby greatly improving the signal stability of the EEB motherboard.

[0114] 3. A first extension portion with a size of 304.8 mm*15 mm is set downward on the lower side of the PCB board, and a second extension portion with a size of 10 mm*185.3 mm is set to the right on the right side, and the bottom of the second extension portion is flush with the bottom of the first extension portion. Since the chassis for installing the EEB motherboard has a space margin in the design, the extended first extension portion and the second extension portion can perfectly fit the existing chassis; and the No. 1 PCIE slot, the No. 2 PCIE slot, and the No. 6 PCIE slot are sequentially arranged on the upper left side of the PCB board, and the No. 2 PCIE slot and the No. 6 PCIE slot are separated by three slots; that is, the No. 1 PCIE slot, the No. 2 PCIE slot, and the No. 6 PCIE slot are located in the traditional installation position, and the No. 3 PCIE slot, the No. 4 PCIE slot, the No. 5 PCIE slot, and the No. 7 PCIE slot can be expanded between the No. 2 PCIE slot and the No. 6 PCIE slot and on the right side of the No. 6 PCIE slot as needed, thereby ensuring the compatibility of the EEB motherboard.

[0115] 4. By adjusting the traditional vertical heat dissipation arrangement structure to a horizontal heat dissipation arrangement structure, the heat dissipation performance of the EEB motherboard is effectively improved, so that the first power module and the second power module can use a seven-phase power supply module instead of the traditional eight-phase power supply module, which not only reduces the cost of the EEB motherboard, but also provides more space for the routing of the UPI3 signal line between the first CPU slot and the second CPU slot.

[0116] 5. By leaving three slots between the second PCIE slot and the sixth PCIE slot, and ample space between the sixth PCIE slot and the eighth PCIE slot, subsequent expansion can be carried out between the second PCIE slot and the sixth PCIE slot, and between the sixth PCIE slot and the eighth PCIE slot; and because of the ample space between the sixth PCIE slot and the eighth PCIE slot, an IO interface area with a width of 81.6mm can be accommodated for placing the IO interface group, and the depth is deeper than that of the traditional EEB motherboard, and can accommodate IO interfaces larger than the dual network port socket (for example, a 60mm deep dual optical port socket), which is convenient for more flexible expansion of interfaces; although the right side of the IO interface group is affected by the eighth PCIE slot and the connector cannot be placed directly, there is a need for additional connectors, which can be connected to the three slots (the fourth PCIE slot, the fifth PCIE slot, and the sixth PCIE slot) on the left side through cables, which ultimately greatly improves the scalability of the EEB motherboard.

[0117] 6. By providing the second extension part, the ATX power connector can be installed on the second extension part, ensuring that the 12V power supply current capacity meets the 700W requirement.

[0118] Although the specific implementation modes of the present invention are described above, those skilled in the art should understand that the specific implementation modes described are only illustrative and are not intended to limit the scope of the present invention. Equivalent modifications and changes made by those skilled in the art in accordance with the spirit of the present invention should be included in the scope of protection of the claims of the present invention.

Claims

1. An EEB motherboard with improved heat dissipation as a chassis component, characterized in that: include: An EEB standard PCB board, with a first extension portion downwardly arranged on the lower side and a second extension portion rightwardly arranged on the right side; A first CPU slot is provided on the PCB board and is located at the lower left side of the PCB board; A second CPU slot is provided on the PCB board, located at the lower right side of the PCB board, and arranged symmetrically with the first CPU slot; A first power supply module is disposed on the PCB board, is located directly below the first CPU slot, and is connected to the first CPU slot; a second power supply module, disposed on the PCB board, located directly below the second CPU slot and connected to the second CPU slot; an ATX power connector, disposed on the second extension portion and connected to the first power module and the second power module; A first memory slot group is provided on the PCB board, located on the left and right sides of the first CPU slot, and connected to the first CPU slot; A second memory slot group is provided on the PCB board, located on the left and right sides of the second CPU slot, and connected to the second CPU slot; A PCIE slot group is provided on the PCB board, is located above the PCB board, and is connected to the first CPU slot and the second CPU slot; A first PCIE expansion interface, provided on the PCB board and connected to the first CPU slot; A second PCIE expansion interface, provided on the PCB board and connected to the second CPU slot; A PCH, disposed on the PCB board and connected to the first CPU slot; Two upper MCIO connectors are arranged side by side on the PCB board and connected to the second CPU socket; Two lower MCIO connectors are arranged side by side on the left and right sides of the first extension portion and are respectively connected to the first CPU slot and the second CPU slot; A plurality of locking accessories are arranged on the PCB board, and the EEB mainboard is locked in the chassis through the locking accessories to serve as a chassis component; The PCIE slot group includes: A No. 1 PCIE slot, located at the upper left of the PCB board and connected to the first CPU slot; A second PCIE slot, located at the upper left of the PCB board, located to the right of the first PCIE slot, and connected to the first CPU slot; A sixth-position PCIE slot, located at the upper left of the PCB board, located to the right of the second-position PCIE slot, separated from the second-position PCIE slot by three slots, and connected to the first CPU slot; An eighth-position PCIE slot, located at the upper right of the PCB board, at the same height as the first-position PCIE slot, and connected to the second CPU slot; A No. 9 PCIE slot, located at the upper right of the PCB board, located to the right of the No. 8 PCIE slot, and connected to the second CPU slot; A No. 10 PCIE slot, located at the upper right of the PCB board, located to the right of the No. 9 PCIE slot, and connected to the second CPU slot; The upper MCIO connector is located between the second PCIE expansion interface and the eighth PCIE slot, and is located above the second CPU slot.

2. The heat dissipation improved EEB motherboard as a chassis component as claimed in claim 1, characterized in that: The size of the first extension part is 304.8 mm*15 mm; the size of the second extension part is 10 mm*185.3 mm, and the bottom is flush with the first extension part.

3. The heat dissipation improved EEB motherboard as a chassis component as claimed in claim 1, characterized in that: The first power supply module and the second power supply module are both seven-phase power supply modules.

4. The heat dissipation improved EEB motherboard as a chassis component as claimed in claim 1, characterized in that: The first memory slot group includes: Four first memory slots are symmetrically arranged on the left and right sides of the first CPU slot, and the first memory slots on the same side are arranged up and down.

5. The heat dissipation improved EEB motherboard as a chassis component as claimed in claim 1, characterized in that: The second memory slot group includes: Four second memory slots are symmetrically arranged on the left and right sides of the second CPU slot, and the second memory slots on the same side are arranged up and down.

6. The heat dissipation improved EEB motherboard as a chassis component as claimed in claim 1, characterized in that: The first PCIE expansion interface is located above the middle of the second PCIE slot and the sixth PCIE slot; The second PCIE expansion interface is located in the middle of the sixth PCIE slot and the eighth PCIE slot; The PCH is located above the second PCIE expansion interface.

7. The heat dissipation improved EEB motherboard as a chassis component as claimed in claim 1, characterized in that: Also includes: An IO interface group is arranged on the PCB board, located above the middle of the sixth PCIE slot and the eighth PCIE slot, and connected to the PCH.

8. A wiring method for a heat dissipation improved EEB motherboard as a chassis component, characterized in that: The method requires the use of the heat dissipation improved EEB motherboard as described in any one of claims 1 to 7, and includes the following steps in no particular order: Step S1, the middle of the top of the first CPU slot is connected to the bottom of the first PCIE slot, the second PCIE slot, the sixth PCIE slot and the first PCIE expansion interface through the PCIE11 signal line, the PCIE12 signal line, the PCIE13 signal line and the PCIE14 signal line respectively; Step S2, the top middle of the first CPU slot is connected to the top middle of the second CPU slot via the UPI1 signal line and the UPI2 signal line, bypassing the top of the first memory slot group and the second memory slot group, and is connected to the PCH in a straight line via the DMI signal line; Step S3, the middle of the bottom end of the first CPU slot is connected to the lower MCIO connector on the left side in a straight line through the PCIE15 signal line, and is connected to the middle of the bottom end of the second CPU slot by bypassing the bottom of the first memory slot group and the second memory slot group through the UPI3 signal line; Step S4, the top middle part of the second CPU slot is directly connected to the eighth PCIE slot, the ninth PCIE slot, and the tenth PCIE slot through the PCIE21 signal line, the PCIE22 signal line, and the PCIE23 signal line, respectively, and is directly connected to the two upper MCIO connectors through the PCIE24 signal line and the PCIE25 signal line; Step S5, the middle of the bottom end of the second CPU slot is connected to the lower MCIO connector on the right side in a straight line through the PCIE26 signal line, and the left side of the bottom end is connected to the second PCIE expansion interface through the middle of the first memory slot group and the second memory slot group through the PCIE27 signal line.

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