Computing device interconnection architecture and communication method
By introducing the concept of computing resource groups and switches into the computing device interconnection architecture, and using the same interconnection communication technology to connect computing devices and switches, the shortcomings in performance and compatibility of large-scale computing device networking in the prior art are solved, and larger-scale networking and more efficient communication are achieved.
Patent Information
- Application Number
- CN202510311728.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-14
- Publication Date
- 2025-06-03
AI Technical Summary
In the prior art, large-scale computing device networking has defects in performance and compatibility, especially in programming methods, latency and throughput, resulting in compatibility and optimization problems and may cause performance bottlenecks.
A computing device interconnection architecture is proposed, which realizes the interconnection between computing devices through multiple computing resource groups and multiple switches. The same interconnection communication technology is used to connect computing devices and switches, ensuring the unity and tidy programming semantics, improving throughput, and saving hardware costs.
On the premise of ensuring compatibility and communication performance, the number of devices that can be connected to by computing devices has been greatly improved, and a larger-scale computing device networking has been achieved, reducing the complexity of development and maintenance, and improving communication efficiency.
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Figure CN120090996A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of artificial intelligence technology, and particularly to a computing device interconnection architecture and a communication method. Background Art
[0002] With the rapid development of artificial intelligence technology, the demand for computing resources has shown explosive growth. The large-scale networking of computing devices provides conditions for the training and inference of large-scale artificial intelligence models.
[0003] Currently, under an interconnection communication technology, the number of computing devices that a computing device can connect to is limited. To achieve a larger-scale networking of computing devices, it is usually necessary to additionally connect the computing device to a network card and a switch under other interconnection communication technologies.
[0004] However, the connection between computing devices achieved through one interconnection communication technology and the connection between computing devices achieved through a network card and other interconnection communication technologies have differences in programming methods, which may lead to compatibility and optimization problems. Moreover, the connections achieved through network cards and other interconnection communication technologies have disadvantages in terms of latency and throughput, which may cause performance bottlenecks in large-scale networking. Summary of the Invention
[0005] The present invention provides a computing device interconnection architecture and a communication method to solve the defects in performance and compatibility existing in large-scale computing device networking in related technologies.
[0006] The present invention provides a computing device interconnection architecture, including a plurality of computing resource groups and a plurality of switches; For each computing resource group, the computing resource group includes a plurality of interconnected computing devices; For different computing resource groups, the computing devices belonging to different computing resource groups are connected through a target switch among the plurality of switches, and the target switch corresponds to the in-group serial number of the computing device; The plurality of interconnected computing devices are connected to each other, and the computing device and the target switch are connected through the same interconnection communication technology.
[0007] According to a computing device interconnection architecture provided by the present invention, the plurality of switches include a first type of switch, and the number of the first type of switches is the number of computing devices within the computing resource group; The target switch includes a first type of target switch, and the first type of target switch is a first type of switch whose serial number corresponds one-to-one to the in-group serial number of the computing device.
[0008] According to a computing device interconnection architecture provided by the present invention, two computing devices belonging to different computing resource groups are connected through a first communication link; When the group sequence numbers of the two computing devices are the same, the first communication link includes a first type of switch with a sequence number corresponding one-to-one to the group sequence number within the group, and the two computing devices; When the group sequence numbers of the two computing devices are different, the first communication link includes a first type of switch with a sequence number corresponding one-to-one to the group sequence number of one of the two computing devices, a transit computing device that belongs to the same computing resource group as the other computing device and has a group sequence number consistent with the group sequence number of the one computing device, and the two computing devices.
[0009] According to a computing device interconnection architecture provided by the present invention, the multiple switches further include a second type of switch, and the second type of switch is connected to each first type of switch corresponding to each group sequence number within the group sequence number range; The target switch further includes a second type of target switch, and the second type of target switch is a second type of switch connected to the first type of target switch.
[0010] According to a computing device interconnection architecture provided by the present invention, two computing devices belonging to different computing resource groups are connected through a second communication link; When the group sequence numbers of the two computing devices are different and the group sequence numbers of the two computing devices belong to the same group sequence number range, the second communication link includes two first type of switches with sequence numbers corresponding one-to-one to the group sequence numbers of the two computing devices, a second type of switch connected to the two first type of switches, and the two computing devices.
[0011] According to a computing device interconnection architecture provided by the present invention, the multiple switches include a third type of switch and a fourth type of switch, the third type of switch corresponds to a group sequence number range and a resource group sequence number range, and the fourth type of switch corresponds to the group sequence number range; The third type of switch is connected to a computing device whose group sequence number belongs to the group sequence number range and the group sequence number of the computing resource group where it is located belongs to the resource group sequence number range, and the fourth type of switch is connected to the third type of switch corresponding to the same group sequence number range.
[0012] According to a computing device interconnection architecture provided by the present invention, two computing devices belonging to different computing resource groups are connected through a third communication link; When the group sequence numbers of the two computing devices belong to the same group sequence number range and the computing resource groups to which the two computing devices belong respectively belong to the same resource group sequence number range, the third communication link includes a third type of switch corresponding to the group sequence number range and the resource group sequence number range, and the two computing devices; When the group numbers of the two computing devices within the group belong to the same interval of group device numbers within the group, and the computing resource groups to which the two computing devices belong respectively belong to different intervals of resource group numbers, the third communication link includes two third-class switches corresponding to the interval of group numbers within the group and the interval of resource group numbers, a fourth-class switch corresponding to the interval of group numbers within the group, and the two computing devices.
[0013] The present invention also provides a communication method based on a computing device interconnection architecture, including: When the local computing device and the peer computing device belong to the same computing resource group, directly communicate with the peer computing device; When the local computing device and the peer computing device belong to different computing resource groups, communicate with the peer computing device based on the target switch.
[0014] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the program, the communication method based on the computing device interconnection architecture as described above is implemented.
[0015] The present invention also provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the communication method based on the computing device interconnection architecture as described above is implemented.
[0016] The present invention also provides a computer program product, including a computer program. When the computer program is executed by a processor, the communication method based on the computing device interconnection architecture as described above is implemented.
[0017] The computing device interconnection architecture and communication method provided by the present invention interconnect the computing devices within each computing resource group, and connect the computing devices in different computing resource groups to the target switch corresponding to the group number within the group of the computing device. Thus, under the condition that the number of devices that a computing device can connect to is limited, the number of devices that can be interconnected and communicated with a computing device under an interconnection communication technology is greatly increased. Furthermore, on the premise of ensuring compatibility and communication performance, it helps to realize a larger-scale network of computing devices. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] In order to more clearly illustrate the technical solutions in the present invention or related technologies, the following will briefly introduce the drawings required for use in the description of the embodiments or related technologies. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0019] Figure 1It is one of the schematic structural diagrams of the computing device interconnection architecture provided by the present invention; Figure 2 It is the second of the schematic structural diagrams of the computing device interconnection architecture provided by the present invention; Figure 3 It is one of the schematic structural diagrams of the GPU interconnection architecture provided by the present invention; Figure 4 It is the third of the schematic structural diagrams of the computing device interconnection architecture provided by the present invention; Figure 5 It is the second of the schematic structural diagrams of the GPU interconnection architecture provided by the present invention; Figure 6 It is the fourth of the schematic structural diagrams of the computing device interconnection architecture provided by the present invention; Figure 7 It is the third of the schematic structural diagrams of the GPU interconnection architecture provided by the present invention; Figure 8 It is the schematic structural diagram of the electronic device provided by the present invention.
[0020] Reference numerals: 10: Computing resource group; 11: Computing device; 20: Switch; 21: First type of switch; 22: Second type of switch; 23: Third type of switch; 24: Fourth type of switch. Detailed implementation manners
[0021] To make the objectives, technical solutions and advantages of the present invention clearer, the technical solutions in the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present invention without making creative efforts shall fall within the protection scope of the present invention.
[0022] With the rapid development of artificial intelligence technology, the demand for computing resources has shown explosive growth. The large-scale networking of computing devices provides conditions for the training and inference of large-scale artificial intelligence models.
[0023] The computing device here can specifically be an artificial intelligence chip. For example, it can be a Graphics Processing Unit (GPU), or it can also be an NPU (Neural network Processing Unit), a DPU (Deep learning Processing Unit), an APU (Accelerated Processing Unit), as well as a GPGPU (General-Purpose computing on Graphics Processing Unit), etc.
[0024] The large-scale networking of computing devices means connecting a large number of computing devices to form a large-scale computing cluster, thereby enhancing the overall computing power and efficiency, and further meeting the computing requirements in fields such as high-performance computing, the field of deep learning, and big data analysis.
[0025] The interconnection communication technology is the technology used to achieve connection and communication between devices. Currently, under a certain interconnection communication technology, the number of computing devices that a computing device can connect to is limited. For example, the P2PLink (Point to Point Link) technology is an interconnection technology between computing devices with high speed and low latency. It allows computing devices to directly and efficiently exchange data, thereby accelerating the execution of computing tasks. Some GPUs limit the maximum number of GPUs that can be interconnected through the P2PLink technology to 1000 in their own settings. In this case, if it is necessary to achieve networking of tens of thousands of cards or even a larger scale, it is necessary to use a network card and a switch under an interconnection communication technology such as PCIe (Peripheral Component Interconnect Express).
[0026] However, there are differences in the programming methods between the connection between computing devices achieved through P2PLink and the connection between computing devices achieved through a network card and a PCIe switch. Specifically, there may be differences in both hardware design and communication protocols between the connection between computing devices achieved through P2PLink and the connection between computing devices achieved through a network card and a PCIe switch. These differences will result in the need to use different programming methods and interfaces during programming, which will increase the complexity of development and maintenance, leading to compatibility and optimization problems at the software level. In addition, compared with the P2PLink technology, communicating between computing devices through a network card and a PCIe switch may introduce higher latency and lower throughput, thereby causing performance bottlenecks in large-scale networking.
[0027] In view of the above problems, the present invention provides an interconnection architecture for computing devices. Figure 1 FIG. is one of the schematic structural diagrams of the interconnection architecture for computing devices provided by the present invention. As Figure 1 shown, the architecture includes a plurality of computing resource groups 10 and a plurality of switches 20; For each computing resource group 10, the computing resource group 10 includes a plurality of interconnected computing devices 11; For different computing resource groups 10, the computing devices 11 belonging to different computing resource groups 10 are connected through a target switch among the plurality of switches 20, and the target switch corresponds to the in-group serial number of the computing device 11; The plurality of interconnected computing devices 11 are connected to each other, and the computing device 11 and the target switch are connected through the same interconnection communication technology.
[0028] Specifically, in the interconnection architecture for computing devices, a plurality of computing resource groups 10 may be included.
[0029] Among them, for each computing resource group 10, the computing resource group 10 may include a plurality of computing devices 11, and each computing device 11 in the same computing resource group 10 is connected to each other. For example, in Figure 1 , a computing resource group 10 may include M + 1 computing devices 11, specifically computing devices 0 to M, and the M + 1 computing devices 11 are connected to each other pairwise. Here, the connection between two computing devices 11 within a computing resource group 10 may be realized through the P2PLink technology or through other interconnection communication technologies, and the interconnection communication technology for realizing the connection between the computing devices 11 within the computing resource group 10 is the same technology. For example, in Figure 1 , in a computing resource group 10, each of the computing devices 0 to M can be connected to the switch within the computing resource group, so that every two of the computing devices 0 to M can be connected to each other through the switch within the computing resource group.
[0030] On this basis, in order to realize the connection between the computing devices 11 in different computing resource groups 10, a plurality of switches 20 are also provided in the interconnection architecture for computing devices. Here, the switch 20 can be used as a transit for the interconnection of the computing devices 11 in different computing resource groups 10, and in a computing resource group 10, different computing devices 11 can be connected to the same switch 20 outside the computing resource group 10 or can be connected to different switches 20 outside the computing resource group 10, and a computing device 11 can be connected to one switch 20 or can be connected to a plurality of switches 20 respectively.
[0031] In the embodiments of the present invention, for the sake of convenience of description, for any computing device 11, the switch 20 that is connected to the computing device 11 to realize the interconnection between the computing device 11 and the computing devices 11 within other computing resource groups 10 is denoted as the target switch. To facilitate the realization of the interconnection between the computing devices 11 of different computing resource groups 10, a corresponding relationship can be established between the intra-group serial numbers of the computing devices 11 and the switches 20.
[0032] Here, for any computing device 11, in a computing resource group 10 containing multiple computing devices 11, there is a corresponding intra-group serial number. For example Figure 1 the 0 to M in the computing devices 0 to M shown in are the intra-group serial numbers corresponding to each of the M + 1 computing devices. Each computing device under each intra-group serial number has a corresponding switch. For example, the computing device with the intra-group serial number 0 can correspond to switch 0, that is, switch 0 can be used as the target switch corresponding to the computing device with the intra-group serial number 0; again, for example, the computing device with the intra-group serial number M can correspond to switch M, that is, switch M can be used as the target switch corresponding to the computing device with the intra-group serial number M.
[0033] Thus, the computing devices 11 with the same intra-group serial number belonging to different computing resource groups 10 can be connected to the same switch 20, that is, both are connected to the target switch. That is to say, the target switch can be connected to the computing devices 11 with the same intra-group serial number within each computing resource group 10, thereby realizing the connection between the computing devices 11 with the same intra-group serial number in different computing resource groups 10. Here, the connection of the computing devices 11 with the same intra-group serial number in different computing resource groups 10 to the target switch respectively can be realized through the P2PLink technology or other interconnection communication technologies, and the interconnection communication technology for realizing the connection between the computing devices 11 in different computing resource groups 10 and the target switch, as well as the interconnection communication technology for realizing the connection between every two computing devices 11 within the computing resource group 10, is the same technology.
[0034] It can be understood that the interconnection communication technology between any two computing devices 11 belonging to the same computing resource group 10, that is, the intra-group communication technology. The interconnection communication technology between any two computing devices 11 belonging to different computing resource groups 10 and the target switch is the inter-group communication technology. Under the computing device interconnection architecture provided by the embodiments of the present invention, the same interconnection communication technology is applied to both the intra-group communication technology and the inter-group communication technology. For example, the P2Plink technology can be applied to implement intra-group communication and inter-group communication. The unification of the interconnection communication technology in intra-group and inter-group communication helps to ensure the unity and neatness of programming semantics, improve throughput, and save hardware costs. Combining the interconnection structure between the computing devices 11 within each computing resource group 10 and the interconnection structure between the computing devices 11 with the same intra-group serial number within different computing resource groups 10 and the target switch, the interconnection and communication between all computing devices 11 under the computing device interconnection architecture can be realized. Moreover, for each computing device 11, the computing device only needs to be connected to other computing devices within the computing resource group 10 to which it belongs and the target switch corresponding to the intra-group serial number of the computing device, so as to achieve communication between the computing device and any other computing device under the computing device interconnection architecture within the limit of the number of computing devices that the computing device itself can connect.
[0035] Under the computing device interconnection architecture provided by the embodiments of the present invention, the computing devices within each computing resource group are interconnected, and the computing devices in different computing resource groups are connected to the target switch corresponding to the intra-group serial number of the computing device. Thus, under the condition that the number of devices that a computing device can connect is limited, the number of devices that can be interconnected and communicated with a computing device under an interconnection communication technology is greatly increased. Furthermore, on the premise of ensuring compatibility and communication performance, it helps to realize a larger-scale computing device network.
[0036] Moreover, since the above-mentioned computing device interconnection architecture can implement communication between all computing devices by only applying one interconnection communication technology without additionally adding the control of network cards or other interconnection communication technologies for relaying, on the one hand, it ensures the unity and neatness of programming semantics and reduces the complexity of development and maintenance. On the other hand, it avoids introducing higher latency, effectively improves throughput, and thirdly, saves hardware costs.
[0037] Based on the above embodiments, Figure 2 is the second structural schematic diagram of the computing device interconnection architecture provided by the present invention. As Figure 2 shown, the multiple switches include the first type of switches 21, and the number of the first type of switches 21 is the same as the number of the computing devices 11 within the computing resource group 10; The target switch includes the first type of target switches, and the first type of target switches are the first type of switches 21 whose serial numbers correspond one-to-one to the intra-group serial numbers of the computing devices 11.
[0038] Specifically, there are multiple first-class switches 21 in the computing device interconnection architecture. The first-class switches 21 here belong to one type of the multiple switches mentioned above, and the characteristic of this type of switch is that the serial number of this type of switch corresponds one-to-one with the in-group serial number of the computing device 11 connected to this type of switch.
[0039] That is, for the case where there are multiple first-class switches 21, each first-class switch 21 can be numbered, that is, each first-class switch 21 itself has a serial number. For example, in Figure 2 , there are a total of M + 1 first-class switches 21, specifically the first-class switches from 0 to M. Here, 0 to M are the serial numbers of the M + 1 first-class switches.
[0040] For each first-class switch 21, there is a corresponding in-group serial number. Thus, each first-class switch 21 can be connected to the computing devices with the in-group serial numbers that correspond one-to-one with the serial number of the first-class switch 21 under all computing resource groups 10. For example, the first-class switch with the serial number 0 corresponds one-to-one with the computing device with the in-group serial number 0. Thus, the first-class switch 0 can be connected to the computing device 0 in each computing resource group respectively. Another example is that the first-class switch with the serial number 1 corresponds one-to-one with the computing device with the in-group serial number 1. Thus, the first-class switch 1 can be connected to the computing device 1 in each computing resource group respectively.
[0041] In this interconnection architecture, the computing devices within each computing resource group are all interconnected. The computing devices within the same computing resource group can communicate using the group number of the computing resource group where they are located; the computing devices with the same in-group serial numbers in different computing resource groups are connected through switches, and the computing devices in different computing resource groups can communicate using the in-group serial numbers.
[0042] In the computing device interconnection architecture provided by the embodiments of the present invention, the serial number of the first-class switch corresponds one-to-one with the in-group serial number of the computing device. Thus, the computing devices in different computing resource groups are interconnected through the first-class switch, providing conditions for realizing a larger-scale computing device networking.
[0043] Based on any of the above embodiments, in the computing device interconnection architecture, two computing devices belonging to different computing resource groups are connected through a first communication link; When the in-group serial numbers of the two computing devices are the same, the first communication link includes a first-class switch whose serial number corresponds one-to-one with the in-group serial number, and the two computing devices; When the group sequence numbers of the two computing devices are different, the first communication link includes a first-class switch whose sequence number corresponds one-to-one to the group sequence number of one of the two computing devices, a transit computing device that belongs to the same computing resource group as the other computing device and whose group sequence number is the same as the group sequence number of the one computing device, and the two computing devices.
[0044] Specifically, for two computing devices belonging to different computing resource groups, in the embodiments of the present invention, the communication link for communication between these two computing devices is denoted as the first communication link.
[0045] Further, when the group sequence numbers of two computing devices belonging to different computing resource groups are the same, the two computing devices are connected to the same first-class switch. Correspondingly, the first communication link may include the two computing devices and a first-class switch whose sequence number corresponds one-to-one to the group sequence numbers of the two computing devices. That is to say, the first communication link may include the two computing devices and a first-class target switch connected to the two computing devices. When the two computing devices communicate, the data of one computing device can be transmitted to the other computing device through the first-class target switch. At this time, the two computing devices can achieve direct connection transmission communication without relaying through other computing devices.
[0046] In addition, when the group sequence numbers of two computing devices belonging to different computing resource groups are different, that is, the two computing devices are respectively connected to different first-class switches, they need to be relayed through other computing devices to achieve interconnection communication. Correspondingly, the first communication link may include the two devices, a first-class switch whose sequence number corresponds one-to-one to the group sequence number of one of the computing devices, and a computing device that belongs to the same computing resource group as the other computing device and whose group sequence number is the same as the group sequence number of the one computing device.
[0047] Among them, the first-class switch whose sequence number corresponds one-to-one to the group sequence number of one computing device is the first-class target switch of this computing device. The computing device that belongs to the same computing resource group as the other computing device and whose group sequence number is the same as the group sequence number of the one computing device can be understood as a computing device that acts as a relay between the two computing devices and can be denoted as a transit computing device in the embodiments of the present invention.
[0048] The data of the computing device can be transmitted to the transit computing device through the target switch of the computing device to achieve cross-group data transmission, and then the transit computing device transmits the data to another computing device in the same group to achieve in-group data transmission. That is, the two computing devices can achieve transmission communication through the transit computing device.
[0049] For example, Figure 3It is one of the schematic structural diagrams of the GPU interconnection architecture provided by the present invention. As Figure 3 shown, when the computing devices are all GPUs, the computing device interconnection architecture can specifically be a GPU interconnection architecture. In Figure 3 , the GPU interconnection architecture includes 128 computing resource groups, namely computing resource groups 0 to 127. Each computing resource group includes 64 GPUs, namely GPUs 0 to 63. And each computing resource group also includes an intra-group switch, and the intra-group switch is respectively connected to GPUs 0 to 63 to achieve intra-group interconnection of GPUs 0 to 63. In addition, the GPU interconnection architecture also includes 64 first-class switches, that is, the number of first-class switches is the same as the number of GPUs in each computing resource group, and each first-class switch is connected to the corresponding GPU in each computing resource group. For example, first-class switch 0 is connected to GPU0 in each computing resource group, first-class switch 1 is connected to GPU1 in each computing resource group, and so on. First-class switch 63 is connected to GPU63 in each computing resource group.
[0050] Under this GPU interconnection architecture, for the case where the intra-group serial numbers of two computing devices are the same, for example, for GPU0 in computing resource group 0 and GPU0 in computing resource group 127, the first communication link between the two can include GPU0 in computing resource group 0, GPU0 in computing resource group 127, and first-class switch 0, that is, GPU0 in computing resource group 0 and GPU0 in computing resource group 127 are respectively connected to first-class switch 0, and GPU0 in computing resource group 0 and GPU0 in computing resource group 127 can achieve direct transmission communication through first-class switch 0.
[0051] Similarly, for GPU63 in computing resource group 1 and GPU63 in computing resource group 127, the first communication link between the two can include GPU63 in computing resource group 1, GPU63 in computing resource group 127, and first-class switch 63; for GPU1 in computing resource group 0 and GPU1 in computing resource group 1, the first communication link between the two can include GPU1 in computing resource group 0, GPU1 in computing resource group 1, and first-class switch 1.
[0052] Under this GPU interconnection architecture, for the case where the intra-group sequence numbers of two computing devices are different, for example, for GPU0 in computing resource group 0 and GPU1 in computing resource group 63, the first communication link between the two can include GPU0 in computing resource group 0, GPU1 in computing resource group 127, as well as GPU0 in the first type of switch 0 and computing resource group 127, that is, data transmission relay can be achieved through GPU0 in the first type of switch 0 and computing resource group 127; or, the first communication link between the two can include GPU0 in computing resource group 0, GPU1 in computing resource group 127, as well as the first type of switch 1 and GPU1 in computing resource group 0, that is, data transmission relay can be achieved through the first type of switch 1 and GPU1 in computing resource group 0.
[0053] It can be understood that under the computing device interconnection architecture shown in the embodiments of the present invention, the maximum networking scale that can be achieved is the product of the number of computing resource groups and the number of computing devices within the computing resource group. For example, in Figure 3 the shown GPU interconnection architecture, the maximum networking scale can be , that is, the interconnection communication of up to 8192 GPUs can be realized. Or assume that the number of computing resource groups is 128 and the number of computing devices within the computing resource group is 128, then the maximum networking scale can be , that is, the interconnection communication of up to 16384 computing devices can be realized.
[0054] Based on any of the above embodiments, Figure 4 is the third structural schematic diagram of the computing device interconnection architecture provided by the present invention. As Figure 4 shown, in the computing device interconnection architecture, the multiple switches further include a second type of switch 22, and the second type of switch 22 is connected to each first type of switch 11 corresponding to each intra-group sequence number in the intra-group sequence number range; The target switch further includes a second type of target switch, and the second type of target switch is the second type of switch 22 connected to the first type of target switch.
[0055] Specifically, on the premise that the computing device interconnection architecture realizes the connection relationship between computing devices through the first type of switch, in order to further increase the proportion of direct transmission communication between computing devices without passing through relay computing devices in the computing device interconnection architecture, the embodiments of the present invention also add a second type of switch 22 to the computing device interconnection architecture.
[0056] In the computing device interconnection architecture, there may be a second - type switch 22, or there may be multiple second - type switches 22. And, different from the first - type switch 21 directly connected to the computing device 11, the second - type switch 22 is connected to the first - type switch 21 and is not directly connected to the computing device 11.
[0057] In the embodiments of the present invention, an in - group serial number range can be preset. Here, the in - group serial number range is the range of in - group serial numbers for which direct transmission communication between computing devices 11 in different computing resource groups 10 is expected. For example, an in - group serial number range of [0, 7] means that it is expected that direct transmission communication can occur between computing devices 11 whose in - group serial numbers belong to [0, 7] in different computing resource groups 10. And, the in - group serial number range can be one or more.
[0058] Since the serial number of the first - type switch 21 corresponds one - to - one with the in - group serial number of the computing device 11, based on the determined in - group serial number range, the first - type switches 21 whose serial numbers correspond to the in - group serial numbers within the in - group serial number range can be connected to the second - type switch 22. Thus, each first - type switch 21 whose serial number corresponds to the in - group serial number within the in - group serial number range is connected to the same second - type switch 22. That is, the second - type switch 22 can cooperate with the first - type switch 11 to achieve direct transmission communication between computing devices 11 within different computing resource groups and whose in - group serial numbers belong to the in - group serial number range.
[0059] For example, for computing devices 11 in two different computing resource groups 10, if the in - group serial numbers of the two computing devices 11 are different, then each of the two computing devices 11 is connected to a first - type target switch, and the second - type switch 21 connected to these two first - type target switches, that is, the second - type target switch for these two computing devices 11, can undertake data transmission between the two first - type target switches. Thus, through the first - type target switch and the second - type target switch, direct transmission communication between the two computing devices can be achieved without further relaying through other computing devices.
[0060] Based on any of the above - mentioned embodiments, two computing devices belonging to different computing resource groups are connected through a second communication link; In the case where the in - group serial numbers of the two computing devices are different and the in - group serial numbers of the two computing devices belong to the same in - group serial number range, the second communication link includes two first - type switches whose serial numbers correspond one - to - one with the in - group serial numbers of the two computing devices, a second - type switch connected to the two first - type switches, and the two computing devices.
[0061] Specifically, for two computing devices belonging to different computing resource groups, in the embodiments of the present invention, the communication link for communication between these two computing devices is denoted as the second communication link.
[0062] Furthermore, when the intra-group sequence numbers of two computing devices belonging to different computing resource groups are the same, the two computing devices are connected to the same first-class switch, that is, direct transmission communication can be performed through the first communication link in the above embodiments; When the intra-group sequence numbers of two computing devices belonging to different computing resource groups are different and the intra-group sequence numbers of the two computing devices belong to different intra-group sequence number intervals, the two computing devices are connected through a first-class switch and a transit computing device, that is, transmission communication through the transit of a computing device can be performed through the first communication link in the above embodiments; When the intra-group sequence numbers of two computing devices belonging to different computing resource groups are different and the intra-group sequence numbers of the two computing devices belong to the same intra-group sequence number interval, that is, each of the two computing devices is connected to a first-class target switch, and both of these first-class target switches are connected to the same second-class switch. Correspondingly, the second communication link may include two computing devices, two first-class switches with sequence numbers corresponding one-to-one to the intra-group sequence numbers of the two computing devices, and a second-class switch connected to both of these two first-class switches. Thus, when the two computing devices communicate, the data of one computing device can be transmitted to the second-class switch through the first-class switch connected to itself, and then transmitted to the other computing device by the second-class switch through the first-class switch connected to the other computing device, so as to achieve direct transmission communication without passing through other computing devices for transit.
[0063] For example, Figure 5 is the second structural schematic diagram of the GPU interconnection architecture provided by the present invention. As Figure 5 shown, when the computing devices are all GPUs, the computing device interconnection architecture may specifically be a GPU interconnection architecture. In Figure 5Among them, the GPU interconnection architecture includes 64 computing resource groups, namely computing resource groups 0 to 63. Each computing resource group includes 64 GPUs, namely GPUs 0 to 63. And each computing resource group also includes an intra-group switch, which is respectively connected to GPUs 0 to 63 to achieve intra-group interconnection of GPUs 0 to 63. In addition, the GPU interconnection architecture also includes 64 first-class switches, that is, the number of first-class switches is the same as the number of GPUs in each computing resource group, and each first-class switch is connected to the corresponding GPU in each computing resource group. For example, first-class switch 0 is connected to GPU0 in each computing resource group, first-class switch 1 is connected to GPU1 in each computing resource group, and so on. First-class switch 63 is connected to GPU63 in each computing resource group.
[0064] In addition, the GPU interconnection architecture also includes second-class switches. The number of second-class switches can be one or more. For example Figure 5 the second-class switch shown in has the GPU0-GPU7 marked, that is, the intra-group serial number range corresponding to this second-class switch is [0, 7], and this second-class switch can be connected to first-class switches 0 to first-class switch 7.
[0065] Under this GPU interconnection architecture, for the case where the intra-group serial numbers of two computing devices are different and the intra-group serial numbers of the two computing devices both belong to the same intra-group serial number range. For example, for GPU0 in computing resource group 1 and GPU1 in computing resource group 63, the second communication link between the two can include GPU0 in computing resource group 1, GPU1 in computing resource group 63, first-class switch 0, first-class switch 1, and the second-class switch marked with GPU0-GPU7. Thus, GPU0 in computing resource group 1 can transmit data to GPU1 in computing resource group 63 in sequence through first-class switch 0, the second-class switch marked with GPU0-GPU7, and first-class switch 1 to achieve direct connection transmission communication of data.
[0066] It can be understood that under the Figure 5 shown GPU interconnection architecture, the maximum networking scale can be . If the number of computing resource groups is increased to 128, the maximum networking scale can be .
[0067] And, in the Figure 5 shown GPU interconnection architecture, GPUs 0-GPU7 in 64 computing resource groups can all achieve direct connection transmission communication. That is, in each computing resource group, GPUs 0-GPU7 can be regarded as a GPU group containing 8 GPUs, and there are a total of 64 GPU groups that can achieve direct connection transmission communication.
[0068] In the method provided by the embodiment of the present invention, by setting up the second type of switch, the proportion of direct communication between computing devices in the computing device interconnection architecture without passing through a relay computing device is increased, which helps to optimize the communication efficiency of the computing device interconnection architecture.
[0069] Based on any of the above embodiments, Figure 6 is the fourth structural schematic diagram of the computing device interconnection architecture provided by the present invention. As Figure 6 shown, in the computing device interconnection architecture, the multiple switches include a third type of switch 23 and a fourth type of switch 24. The third type of switch 24 corresponds to an in-group serial number interval and a resource group serial number interval, and the fourth type of switch 24 corresponds to the in-group serial number interval; The third type of switch 23 is connected to the computing device 11 whose in-group serial number belongs to the in-group serial number interval and the group serial number of the computing resource group 10 where it is located belongs to the resource group serial number interval. The fourth type of switch 24 is connected to the third type of switch 23 corresponding to the same in-group serial number interval.
[0070] Specifically, in the computing device interconnection architecture, two types of switches can be included, namely the third type of switch 23 and the fourth type of switch 24.
[0071] Among them, the third type of switch 23 is a switch directly connected to the computing device 11, and there is a corresponding in-group serial number interval and resource group serial number interval for the third type of switch 23.
[0072] Here, both the in-group serial number interval and the resource group serial number interval are pre-constructed intervals, and the number of both the in-group serial number interval and the resource group serial number interval can be one or more. Further, the in-group serial number interval is the interval of in-group serial numbers where direct transmission communication between computing devices 11 in different computing resource groups 10 is expected. For example, the in-group serial number interval of [0, 7] means that it is expected that the computing devices 11 with in-group serial numbers belonging to [0, 7] in different computing resource groups 10 can all directly transmit communication. The resource group serial number interval is an interval obtained by grouping all the computing resource groups 10 included in the computing device interconnection architecture according to the group serial number. One resource group serial number interval can include the group serial numbers of multiple computing resource groups 10, and the union of all resource group serial number intervals includes the serial numbers of all the computing resource groups 10 under the computing device interconnection architecture. For example, there are a total of 64 computing resource groups with group serial numbers from 0 to 63, which can be divided into 8 resource group serial number intervals, namely [0, 7], [8, 15], [16, 23], [24, 31], [32, 39], [40, 47], [48, 55], [56, 63].
[0073] It can be understood that the third switch 23 is specifically connected to the computing devices within the corresponding intra-group serial number range in the computing resource group corresponding to the resource group serial number range. For example, if the resource group serial number range corresponding to a third switch is [0, 7] and the corresponding intra-group serial number range is [0, 7], then this third switch is connected to the computing devices with intra-group serial numbers from 0 to 7 in the computing resource groups with group serial numbers from 0 to 7; if the resource group serial number range corresponding to a third switch is [8, 15] and the corresponding intra-group serial number range is [0, 7], then this third switch is connected to the computing devices with intra-group serial numbers from 0 to 7 in the computing resource groups with group serial numbers from 8 to 15.
[0074] The fourth type of switch 24 is a switch connected to the third type of switch 23 and is not directly connected to the computing device 11. Moreover, there is a corresponding intra-group serial number range for the fourth type of switch 24. Thus, the fourth type of switch 24 is connected to the third type of switches 23 corresponding to the same intra-group serial number range, and the resource group serial number range corresponding to the third type of switch is ignored. That is, one fourth type of switch 24 can be connected to all the third type of switches 23 corresponding to the same intra-group serial number range.
[0075] Under this connection structure, for the computing devices in two different computing resource groups, there is a third switch corresponding to the group serial number and intra-group serial number of each of the two computing devices. If the group serial numbers of the two computing devices fall within the same resource group serial number range and the intra-group serial numbers fall within the same intra-group serial number range, then the two computing devices are connected to the same third switch and can directly perform direct connection transmission communication through this third switch; if the group serial numbers of the two computing devices fall within different resource group serial number ranges and the intra-group serial numbers fall within the same intra-group serial number range, then the two computing devices are connected to different third switches, and the two different third switches are connected to the same fourth switch, so direct connection transmission communication can be achieved through the cooperation of the third switch and the fourth switch. Additionally, if the intra-group serial number of the computing device is not within the intra-group serial number range, then a computing device with an intra-group serial number within the intra-group serial number range in the same computing resource group needs to be used as a relay computing device to cooperate with the third switch, or to cooperate with the third switch and the fourth switch to achieve transmission communication through relay.
[0076] Based on any of the above embodiments, in the computing device interconnection architecture, two computing devices belonging to different computing resource groups are connected through a third communication link; When the intra-group serial numbers of the two computing devices belong to the same intra-group serial number range and the group serial numbers of the computing resource groups to which the two computing devices belong respectively belong to the same resource group serial number range, the third communication link includes the third type of switch corresponding to the intra-group serial number range and the resource group serial number range, and the two computing devices; When the group numbers of the two computing devices within the group belong to the same intra-group device number range, and the group numbers of the computing resource groups to which the two computing devices belong respectively belong to different resource group number ranges, the third communication link includes two third-class switches corresponding to the intra-group device number range and the resource group number range, a fourth-class switch corresponding to the intra-group device number range, and the two computing devices.
[0077] Specifically, for two computing devices belonging to different computing resource groups, in the embodiments of the present invention, the communication link for communication between these two computing devices is denoted as the third communication link.
[0078] Furthermore, when the group numbers of the two computing devices belonging to two computing resource groups respectively belong to the same intra-group device number range, and the group numbers of the computing resource groups to which the two computing devices belong respectively belong to the same resource group number range, it can be understood that the two computing devices are connected to the same third-class switch. Here, the third-class switch to which they are connected is the third-class switch corresponding to the above-mentioned intra-group device number range and resource group number range. Thus, the two computing devices can achieve direct data transmission communication through one third-class switch. That is, the third communication link includes two computing devices and one third-class switch connected to the two computing devices. When the two computing devices communicate, the data of one computing device can be transmitted to the other computing device through the third-class switch. At this time, the two computing devices can achieve direct connection transmission communication without relaying through other computing devices.
[0079] When the group numbers of the two computing devices belonging to two computing resource groups respectively belong to the same intra-group device number range, and the group numbers of the computing resource groups to which the two computing devices belong respectively belong to two different resource group number ranges, it can be understood that each of the two computing devices is connected to a third-class switch, and the third-class switches to which the two computing devices are connected are different. Here, the two different third-class switches are connected to the same fourth-class switch because they correspond to the same intra-group device number range. Thus, the third communication link includes two computing devices, two third-class switches connected to the two computing devices, and one fourth-class switch connected to the two third-class switches. When the two computing devices communicate, the data of one computing device can be transmitted to the fourth-class switch through the third-class switch, and then transmitted to the other computing device through another third-class switch by the fourth-class switch. At this time, the two computing devices can achieve direct connection transmission communication without relaying through other computing devices.
[0080] For example, Figure 7 is the third structural schematic diagram of the GPU interconnection architecture provided by the present invention. As Figure 7As shown, when the computing devices are all GPUs, the computing device interconnection architecture can specifically be a GPU interconnection architecture. In Figure 7 , the GPU interconnection architecture includes multiple computing resource groups, as well as multiple third-class switches and multiple fourth-class switches. For example, in Figure 7 , the third-class switches shown include third-class switches corresponding to GPU0-7 and group sequence numbers 0-7, and third-class switches corresponding to GPU0-7 and group sequence numbers 8-15. The fourth-class switches include two fourth-class switches corresponding to GPU0-7, namely fourth-class switch 0 and fourth-class switch 1. For the case where the intra-group sequence numbers of two computing devices belonging to two computing resource groups respectively belong to the same intra-group sequence number interval, and the group sequence numbers of the computing resource groups to which the two computing devices belong respectively belong to the same resource group sequence number interval. For example, computing device 2 belonging to computing resource group 0 and computing device 5 belonging to computing resource group 1, where group sequence numbers 0 and 1 both belong to the resource group sequence number interval [0, 7], and intra-group sequence numbers 2 and 5 both belong to the intra-group sequence number interval [0, 7]. That is, computing device 2 belonging to computing resource group 0 and computing device 5 belonging to computing resource group 1 are both connected to the third-class switches corresponding to GPU0-7 and group sequence numbers 0-7. Therefore, the third transmission link includes computing device 2 belonging to computing resource group 0, computing device 5 belonging to computing resource group 1, and the third-class switches corresponding to GPU0-7 and group sequence numbers 0-7.
[0081] For the case where the intra-group serial numbers of two computing devices belonging to two computing resource groups respectively are both within the same intra-group serial number range, and the group serial numbers of the two computing resource groups to which the two computing devices belong are within two different resource group serial number ranges. For example, computing device 2 belonging to computing resource group 0 and computing device 5 belonging to computing resource group 9, group serial number 0 belongs to the resource group serial number range [0, 7], group serial number 9 belongs to the resource group serial number range [8, 15], and the intra-group serial numbers 2 and 5 are both within the intra-group serial number range [0, 7]. That is, computing device 2 belonging to computing resource group 0 is connected to the third type of switch corresponding to GPU0 - 7 and group serial numbers 0 - 7, and computing device 5 belonging to computing resource group 9 is connected to the third type of switch corresponding to GPU0 - 7 and group serial numbers 8 - 15, and the third type of switch for GPU0 - 7 and group serial numbers 0 - 7 and the third type of switch for GPU0 - 7 and group serial numbers 8 - 15 are both connected to the fourth type of switch 0 and the fourth type of switch 1. Thus, the third transmission link can include computing device 2 belonging to computing resource group 0 and computing device 5 belonging to computing resource group 9, the third type of switch for GPU0 - 7 and group serial numbers 0 - 7 and the third type of switch for GPU0 - 7 and group serial numbers 8 - 15, and the fourth type of switch 0; or, the third transmission link can include computing device 2 belonging to computing resource group 0 and computing device 5 belonging to computing resource group 9, the third type of switch for GPU0 - 7 and group serial numbers 0 - 7 and the third type of switch for GPU0 - 7 and group serial numbers 8 - 15, and the fourth type of switch 1.
[0082] Based on any of the above embodiments, the present invention further provides a communication method, which is implemented on the basis of the computing device interconnection architecture provided in the above embodiments. The execution subject of this communication method is any computing device in the computing device interconnection architecture, and the method includes: When the local computing device and the peer computing device belong to the same computing resource group, directly communicate with the peer computing device; When the local computing device and the peer computing device belong to different computing resource groups, communicate with the peer computing device based on the target switch.
[0083] Specifically, this communication method is applied to the communication implementation between any two computing devices in the computing device interconnection architecture. For the convenience of distinction, among the two computing devices, one computing device that is the execution subject of this communication method is denoted as the local computing device, and the other computing device is denoted as the peer computing device. Both of the two computing devices can regard themselves as the local computing device, and both of the two computing devices are the peer computing devices of each other.
[0084] Under the above computing device interconnection architecture, for the case where the local computing device and the peer computing device belong to the same computing resource group, the local computing device and the peer computing device are connected to each other, that is, the local computing device can directly communicate with the peer computing device.
[0085] For the case where the local computing device and the peer computing device belong to different computing resource groups, since computing devices belonging to different computing resource groups can be interconnected through a switch under the computing device interconnection architecture, specifically, communication between the local computing device and the peer computing device can be carried out through a target switch connected to the local computing device and / or the peer computing device. In the communication through the target switch here, the local computing device and the peer computing device can communicate only through the target switch, or can be relayed through the target switch and other computing devices to achieve communication. The embodiments of the present invention do not make specific limitations on this.
[0086] In the communication method provided by the embodiments of the present invention, under the computing device interconnection architecture, computing devices within each computing resource group are interconnected, and computing devices in different computing resource groups are connected to a target switch corresponding to the group sequence number of the computing device. Thus, under the condition that the number of devices that a computing device can connect to is limited, the number of devices that can be interconnected and communicate with the computing device under an interconnection communication technology is greatly increased. Furthermore, on the premise of ensuring compatibility and communication performance, it helps to realize a larger-scale networking of computing devices to achieve large-scale communication of computing devices.
[0087] Figure 8 An example of a schematic physical structure diagram of an electronic device is as Figure 8 shown. The electronic device may include: a processor 810, a communications interface 820, a memory 830, and a communication bus 840. Among them, the processor 810, the communications interface 820, and the memory 830 communicate with each other through the communication bus 840. The processor 810 can call logical instructions in the memory 830 to execute a communication method based on the computing device interconnection architecture. The method includes: When the local computing device and the peer computing device belong to the same computing resource group, directly communicate with the peer computing device; When the local computing device and the peer computing device belong to different computing resource groups, communicate with the peer computing device based on the target switch.
[0088] In addition, when the logical instructions in the above-mentioned memory 830 are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the related technology, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The aforementioned storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROMs), random access memories (RAMs), magnetic disks, or optical discs that can store program codes.
[0089] On the other hand, the present invention also provides a computer program product. The computer program product includes a computer program that can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the communication method based on the computing device interconnection architecture provided by the above-mentioned various methods. The method includes: When the local computing device and the peer computing device belong to the same computing resource group, directly communicate with the peer computing device; When the local computing device and the peer computing device belong to different computing resource groups, communicate with the peer computing device based on a target switch.
[0090] In yet another aspect, the present invention also provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it is configured to execute the communication method based on the computing device interconnection architecture provided by the above-mentioned various methods. The method includes: When the local computing device and the peer computing device belong to the same computing resource group, directly communicate with the peer computing device; When the local computing device and the peer computing device belong to different computing resource groups, communicate with the peer computing device based on a target switch.
[0091] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separated. The components shown as units may or may not be physical units, that is, they may be located in one place or distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. A person of ordinary skill in the art can understand and implement it without creative efforts.
[0092] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on such an understanding, the essence of the above technical solution, or the part that contributes to the related technology, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.
[0093] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features. And these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A computing device interconnection architecture, characterized in that: including a plurality of computing resource groups and a plurality of switches; For each computing resource group, the computing resource group includes a plurality of interconnected computing devices; For different computing resource groups, computing devices belonging to different computing resource groups are connected through a target switch among the multiple switches, and the target switch corresponds to the intra-group sequence number of the computing device; The interconnected multiple computing devices, and the computing device and the target switch are connected via the same interconnection communication technology.
2. The computing device interconnection architecture according to claim 1, characterized in that: The plurality of switches include switches of a first type, the number of the switches of the first type being the number of computing devices in the computing resource group; The target switch includes a first type of target switch, where the first type of target switch is a first type of switch whose serial number corresponds one-to-one to the intra-group serial number of the computing device.
3. The computing device interconnection architecture according to claim 2, characterized in that: Two computing devices belonging to different computing resource groups are connected via a first communication link; In the case where the two computing devices have the same intra-group sequence number, the first communication link includes a first type switch having a sequence number corresponding to the intra-group sequence number one by one, and the two computing devices; When the intra-group sequence numbers of the two computing devices are different, the first communication link includes a first type switch whose sequence number corresponds one-to-one with the intra-group sequence number of one of the two computing devices, a transit computing device that belongs to the same computing resource group as the other computing device and whose intra-group sequence number is consistent with the intra-group sequence number of the one computing device, and the two computing devices.
4. The computing device interconnection architecture according to claim 2, characterized in that: The plurality of switches further include a second type switch, and the second type switch is connected to each of the first type switches corresponding to each of the group sequence numbers in the group sequence number interval; The target switch further includes a second type of target switch, where the second type of target switch is a second type of switch connected to the first type of target switch.
5. The computing device interconnection architecture according to claim 4, characterized in that: Two computing devices belonging to different computing resource groups are connected via a second communication link; When the intra-group sequence numbers of the two computing devices are different and belong to the same intra-group sequence number interval, the second communication link includes two first-type switches whose sequence numbers correspond one-to-one to the intra-group sequence numbers of the two computing devices, a second-type switch connected to the two first-type switches, and the two computing devices.
6. The computing device interconnection architecture according to claim 1, characterized in that: The multiple switches include a third type of switch and a fourth type of switch, the third type of switch corresponds to the sequence number interval within the group and the sequence number interval of the resource group, and the fourth type of switch corresponds to the sequence number interval within the group; The third type of switch is connected to a computing device whose group number belongs to the group number interval and whose computing resource group group number belongs to the resource group number interval, and the fourth type of switch is connected to a third type of switch corresponding to the same group number interval.
7. The computing device interconnection architecture according to claim 6, characterized in that: Two computing devices belonging to different computing resource groups are connected via a third communication link; In the case where the intra-group sequence numbers of the two computing devices belong to the same intra-group sequence number interval, and the computing resource groups to which the two computing devices belong respectively belong to the same resource group sequence number interval, the third communication link includes a third type switch corresponding to the intra-group sequence number interval and the resource group sequence number interval, and the two computing devices; When the intra-group sequence numbers of the two computing devices belong to the same intra-group device sequence number interval, and the computing resource groups to which the two computing devices respectively belong belong to different resource group sequence number intervals, the third communication link includes two third-type switches corresponding to the intra-group sequence number interval and the resource group sequence number interval, a fourth-type switch corresponding to the intra-group sequence number interval, and the two computing devices.
8. A communication method based on the computing device interconnection architecture according to any one of claims 1 to 7, characterized in that: include: When the local computing device and the opposite computing device belong to the same computing resource group, directly communicate with the opposite computing device; In the case that the local computing device and the opposite computing device belong to different computing resource groups, communication is performed with the opposite computing device based on the target switch.
9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that: When the processor executes the computer program, the communication method according to claim 8 is implemented.
10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the communication method according to claim 8 is implemented.
11. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the communication method according to claim 8 is implemented.
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