Software verification method and device

Abstract

The invention discloses a software verification method and device, relates to the technical field of computers, and mainly aims to improve the problem confirmation efficiency after determining that software is tampered. According to the main technical scheme, the method comprises the steps of obtaining a machine code; calculating a first check code of each binary instruction in the machine code according to a preset check algorithm; replacing a placeholder instruction at a specified position of each binary instruction with the first check code of each binary instruction to obtain a target machine code, so that after the target machine code is linked as target software and published, the check end generates machine codes corresponding to the target machine code by using a preset check algorithm, according to the first check code of each binary instruction and the second check code of each binary instruction, checking each binary instruction in the target software according to the first check code and the second check code of each binary instruction. The method and the device are used for software verification.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a software verification method and device. Background Art

[0002] With the rapid development of information technology, computer software has become an indispensable part of modern society. The reliability and security of software are directly related to the user's data security and system stability. Therefore, it is particularly important to ensure that the software has not been tampered with to ensure its reliability and security.

[0003] At present, the method of verifying whether the software has been tampered with is usually to generate a verification code for the software package using technologies such as cyclic redundancy code (CRC), checksum, cryptographic checksum, digital signature, etc. before the software is released. After the user downloads the software package, the verification code is generated again using the same algorithm to confirm whether the software package has been tampered with during the transmission process.

[0004] However, this method has certain limitations. If the verification code of the downloaded software package does not match the original verification code, that is, after determining that the software has been tampered with, the user needs to conduct a comprehensive inspection of the software to determine the specific problem. This process is too time-consuming and laborious. Summary of the invention

[0005] In view of the above problems, the present invention provides a software verification method and device, the main purpose of which is to improve the problem confirmation efficiency after determining that the software has been tampered with.

[0006] In order to solve the above technical problems, the present invention proposes the following solutions:

[0007] In a first aspect, the present invention provides a software verification method, which is applied to a tag end and includes:

[0008] Get machine code;

[0009] Calculate a first check code for each binary instruction in the machine code according to a preset check algorithm;

[0010] The first check code of each binary instruction is used to replace the placeholder instruction at the specified position of each binary instruction to obtain the target machine code, so that after the target machine code is linked to the target software and released, the verification end uses the preset verification algorithm to generate the second check code of each binary instruction in the machine code corresponding to the target machine code, so as to verify each binary instruction in the target software according to the first check code and the second check code of each binary instruction.

[0011] In a second aspect, the present invention provides a software verification method, which is applied to a verification end and includes:

[0012] Get the software package corresponding to the target software;

[0013] Extracting the target machine code and a first checksum of each binary instruction in the target machine code from the software package;

[0014] Restoring the target machine code to a corresponding machine code, and calculating a second check code for each binary instruction in the machine code according to a preset check algorithm;

[0015] If the first verification code and the second verification code of the plurality of binary instructions are the same, it is determined that the target software has not been tampered with;

[0016] If the first verification code and the second verification code of multiple binary instructions are not the same, it is determined that the target binary instruction in the target software in which the first verification code and the second verification code are different is tampered with.

[0017] In a third aspect, the present invention provides a software verification device, the method is applied to a tag end, and the device comprises:

[0018] A code acquisition unit, used for acquiring machine code;

[0019] a mark calculation unit, configured to calculate a first check code for each binary instruction in the machine code acquired by the code acquisition unit according to a preset check algorithm;

[0020] A replacement unit is used to replace the placeholder instruction at the specified position of each binary instruction with the first check code of each binary instruction calculated by the mark calculation unit to obtain the target machine code, so that after the target machine code is linked to the target software and released, the verification end uses the preset verification algorithm to generate the second check code of each binary instruction in the machine code corresponding to the target machine code, so as to verify each binary instruction in the target software according to the first check code and the second check code of each binary instruction.

[0021] In a fourth aspect, the present invention provides a software verification device, wherein the method is applied to a verification end, and the device comprises:

[0022] A software package acquisition unit, used to acquire the software package corresponding to the target software;

[0023] an extraction unit, configured to extract a target machine code and a first checksum of each binary instruction in the target machine code from the software package acquired by the software package acquisition unit;

[0024] a restoration unit, configured to restore the target machine code extracted by the extraction unit to a corresponding machine code, and calculate a second check code for each binary instruction in the machine code according to a preset check algorithm;

[0025] a first confirmation unit, configured to determine that the target software has not been tampered with if the first verification codes and the second verification codes of the plurality of binary instructions calculated by the restoration unit are all the same;

[0026] The second confirmation unit is used to determine that the target binary instruction in the target software whose first verification code is different from the second verification code is tampered if the first verification code and the second verification code of the multiple binary instructions calculated by the restoration unit are not all the same.

[0027] In order to achieve the above-mentioned purpose, according to a third aspect of the present invention, a storage medium is provided, wherein the storage medium includes a stored program, wherein when the program is executed, the device where the storage medium is located is controlled to execute the method of the first aspect or the second aspect.

[0028] In order to achieve the above objective, according to a fourth aspect of the present invention, a processor is provided, wherein the processor is used to run a program, wherein the program executes the method of the first aspect or the second aspect when running.

[0029] By means of the above technical scheme, the present invention provides a software verification method and device, which is divided into a marking end and a verification end. At the marking end, the machine code is first obtained, and then the first verification code of each binary instruction in the machine code is calculated according to a preset verification algorithm. Next, the first verification code of each binary instruction is used to replace the placeholder instruction at the specified position in the instruction, thereby generating the target machine code. When the target machine code is linked to the target software and released, the verification end can use the same verification algorithm to calculate the second verification code of each binary instruction in the machine code after the target machine code is restored, and compare it with the first verification code to verify the integrity of the target software. Specifically, if the first verification code of all binary instructions is completely consistent with the second verification code, it indicates that the target software has not been tampered with; conversely, if there is any pair of verification codes that do not match, it can be concluded that the binary instruction in the target software has been tampered with. In addition, the advantage of this method is that it can directly locate the specific binary instruction that has been tampered with without the need to conduct a comprehensive inspection of the entire software, thereby significantly improving the efficiency of problem confirmation.

[0030] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented according to the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present invention. Moreover, the same reference symbols are used throughout the accompanying drawings to represent the same components. In the accompanying drawings:

[0032] Figure 1 A flow chart of a verification method for software applied to a marking end provided by an embodiment of the present invention is shown;

[0033] Figure 2 A flowchart of another verification method for software applied to a marking end provided by an embodiment of the present invention is shown;

[0034] Figure 3 A flow chart of a verification method for software applied to a verification terminal provided by an embodiment of the present invention is shown;

[0035] Figure 4 A flowchart of another verification method for software applied to a verification terminal provided by an embodiment of the present invention is shown;

[0036] Figure 5 A block diagram showing a composition of a verification device for software applied to a marking end provided by an embodiment of the present invention;

[0037] Figure 6 A block diagram showing another software verification device applied to a marking end provided by an embodiment of the present invention is shown;

[0038] Figure 7 A block diagram showing a component of a verification device for software applied to a verification terminal provided by an embodiment of the present invention;

[0039] Figure 8 A block diagram showing the composition of another verification device for software applied to a verification terminal provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0040] The exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0041] Aiming at the problems existing in the existing software verification methods, that is, usually a verification code is generated for the entire software package to check whether the software has been tampered with. Once the software package is tampered with, it is necessary to conduct a comprehensive inspection of the software to determine the specific problem, which is both time-consuming and laborious. To this end, the inventor has proposed a new software verification method after a lot of creative work. The method is applied to a software verification system, wherein the system includes a marking end and a verification end, wherein the marking end is used to calculate the first verification code of each binary instruction in the machine code according to a preset verification algorithm to obtain the target machine code. The verification end is used to calculate the second verification code of each binary instruction in the machine code according to the preset verification algorithm, and compare the first verification code of each binary instruction with the second verification code to determine whether each binary instruction has been tampered with. In this way, in the case where the software package is tampered with, the specific tampered instruction can be quickly located, thereby greatly improving the efficiency and accuracy of the verification.

[0042] In the process of compiling source code into software, it usually goes through four main steps: preprocessing, compilation, assembly, and linking. In the compilation stage, the source code is converted into assembly code. Then, in the assembly stage, the assembler converts the assembly code into machine code. Finally, in the linking stage, the machine code is formed into a complete executable program, and the software is finally built and released.

[0043] In this process, assembly code is a high-level representation organized in the form of functions, etc., which is easy for humans to read and understand. Machine code exists in the form of binary instructions, each instruction corresponds to an operation that the CPU can directly execute, that is, each function in the assembly code is represented in the machine code as a binary instruction. This form of code can be directly understood and executed by the computer, ensuring that the software can run correctly on the target platform.

[0044] Among them, the marking device in the marking end can be deployed on the physical host where the target software is built, and can be implemented in the form of an independent automated script or a special tool. The verification device on the verification end can be deployed on the physical host where the target software needs to be installed and run, and can be implemented in the following forms: one is to be embedded in the software installation program to verify the integrity of the software in real time during the installation process; the other is to be executed as an independent verification script when the software is installed or loaded. The marking device and the verification device can communicate through appropriate network protocols (such as HTTP, TCP / IP, etc.), and the relevant software information and verification code generation information are transmitted from the marking device to the host where the verification device is located. In this way, regardless of whether the software construction and software operation are located in the same physical location, the integrity and security of the software can be effectively verified.

[0045] The tagging device can interact with the build tool of the target software. The build tool plays a core role in the entire build process, managing every step from source code to executable files and mastering the input and output of each stage. The tagging device can access the intermediate products of the build process, such as assembly code and machine code, through the interfaces provided by the build tool (such as plug-in interface, command line parameter interface, etc.), and perform necessary processing on them.

[0046] Another way is that the build tool can inform the marking device of the build progress through the event notification mechanism. Specifically, the build tool can trigger the execution of a custom script after each key step (such as compilation, linking, etc.) is completed. The script is responsible for notifying the marking device that the current build step has been completed. The script can achieve this function by sending a message containing the build step identifier to the marking device, thereby ensuring that the marking device can intervene at the appropriate time to add verification codes or other necessary processing to the relevant code.

[0047] In addition, the verification end can complete the verification before the target software runs, or it can perform the verification during the program loading or execution of the target software. Compared with the prior art, the software verification method provided by the embodiment of the present invention is not limited to the verification during the software transmission process, but can also play a role during the software execution process, effectively preventing the software from being tampered with. In this way, the integrity and security of the software can be ensured in both static and dynamic environments.

[0048] Next, the software verification method provided by the embodiment of the present invention will be described in detail from the perspectives of the marking end and the verification end. Figure 1 , Figure 1 A flowchart of a verification method for software applied to a marking end provided in an embodiment of the present invention, wherein the specific steps include:

[0049] 101. Get the machine code.

[0050] 102. Calculate a first check code of each binary instruction in the machine code according to a preset check algorithm.

[0051] As mentioned above, after the construction device generates the machine code, it will inform the marking device through the notification mechanism. In this way, the marking device can obtain the machine code through the preset communication interface according to the received notification. This method ensures that the marking device can intervene at the appropriate time and perform necessary processing on the machine code, such as adding the first check code.

[0052] After the marking device obtains the machine code, in order to accurately locate the tampered position when the software is tampered, in step 102, a corresponding first verification code can be generated for each binary instruction in the machine code according to a preset verification algorithm during the linking stage. In this way, once the software is detected to be tampered, the specific tampered position can be quickly determined.

[0053] In addition, it is usually necessary to insert a placeholder instruction in each function of the assembly code after the assembly code is generated, so as to reserve space for the subsequent insertion of the first check code. This ensures that the first check code can be smoothly embedded in the specified position during the marking stage without affecting the logic and execution of the original code. In other words, after the machine code is generated, each binary instruction has a corresponding placeholder instruction at the corresponding position. Therefore, when calculating the first check code corresponding to each binary instruction in the machine code according to the preset check algorithm, you can choose to keep these placeholder instructions for calculation, or you can choose to remove these placeholder instructions for calculation.

[0054] It should be made clear that the role of the placeholder instruction is to reserve a position for the subsequent insertion of the first check code. Therefore, when calculating the first check code corresponding to each binary instruction, these placeholder instructions are not deleted at the actual insertion position, but only considered during the calculation process whether to include these placeholder instructions in the calculation range. In other words, the elimination of placeholder instructions here only refers to the way of handling placeholder instructions during the calculation process, not the actual deletion operation.

[0055] 103. Use the first checksum of each binary instruction to replace the placeholder instruction at the specified position of each binary instruction to obtain the target machine code.

[0056] Referring to step 102, after the machine code is generated, each binary instruction has a corresponding placeholder instruction at the corresponding position. Therefore, after obtaining the first check code of each binary instruction, the first check code of each binary instruction can be directly used to replace the corresponding placeholder instruction.

[0057] It should be noted that the insertion position (i.e., the specified position) of the first check code and the placeholder instruction should be a position that will always be skipped during execution and will not be executed as a valid instruction. The placeholder instruction can be a NOP instruction, which is usually used for purposes such as controlling timing and forcing address alignment. It does not change registers, processor status flags, or memory. If the target CPU architecture does not have a NOP instruction, some ordinary instructions that have no practical meaning can also be used as placeholders. This ensures that the first check code is successfully embedded and the target machine code is obtained without affecting the normal execution of the program.

[0058] After obtaining the target machine code, the code can be compiled and linked into the target software, and then released. The release process can be to send the software directly to the target physical host where the verification end is located, or to release it through a public channel, and the environment where the verification end is located can download and execute it by itself. Regardless of the release method used, once the verification end obtains the target software, it can use the same verification algorithm as the marking end to generate a second verification code corresponding to each binary instruction in the machine code corresponding to the target machine code. By comparing the first verification code and the second verification code, the verification end can verify each binary instruction in the target software to ensure its integrity and correctness.

[0059] Furthermore, as a Figure 1 The embodiment shown in the figure is refined and extended. The embodiment of the present invention also provides another flowchart of a verification method for software applied to a marking end, such as Figure 2 As shown, the specific steps are as follows:

[0060] 201. Obtain assembly code, insert placeholder instructions at designated positions of each function in the assembly code according to a preset placeholder setting algorithm, obtain target assembly code, and generate machine code according to the target assembly code.

[0061] In this embodiment, since the source code will be compiled into assembly code, and a placeholder needs to be inserted at a specified position of each function in the assembly code to reserve a position for the subsequent first check code, in this step, an algorithm can be set according to a preset placeholder to insert a placeholder instruction at a specified position of each function in the assembly code, thereby obtaining the target assembly code.

[0062] It should be noted that the designated location is a location that will not be called when the code is executed. Since there may be multiple such locations in a function, these locations can be selected in order. For example, the first such location can be selected, or the last such location can be selected. This ensures that the placeholder instruction is successfully embedded without affecting the normal execution of the program, and reserves space for the subsequent first checksum.

[0063] In addition, in this step, it is necessary to consider that the number of bytes of the inserted first check code should match the number of bytes of the placeholder. Otherwise, the following problems may occur:

[0064] Code alignment issue: If the number of bytes in the first checksum does not match the number of bytes in the placeholder, the alignment of the code may be disrupted, causing errors or performance degradation during CPU execution.

[0065] Instruction overwrite problem: If the number of bytes in the first checksum is greater than the number of bytes in the placeholder, adjacent valid instructions may be overwritten, resulting in program logic errors.

[0066] Gap filling problem: If the number of bytes of the first check code is less than the number of bytes of the placeholder, unused blank space may be left, which not only wastes space but may also cause confusion in the subsequent verification process.

[0067] Therefore, it is necessary to calculate the number of inserted placeholder instructions so as to insert placeholder instructions at the specified position of each function according to the number of placeholder instructions, thereby ensuring that the total number of bytes of the inserted placeholder instructions matches the number of bytes of the first verification code. In this process, the preset number of bytes of the first verification code and the specified number of bytes of a single placeholder instruction can be obtained first.

[0068] Then, the preset number of bytes and the specified number of bytes are calculated according to the specified calculation formula to obtain the number of placeholder instructions to be inserted at the specified position of each function. This ensures that when the first checksum is inserted, the alignment of the code will not be destroyed, and adjacent valid instructions will not be overwritten or unused blank areas will not be left.

[0069] Specifically, the sum of the preset number of bytes and the specified number of bytes can be calculated first, and the difference between the sum and the preset value (which can be 1 in the embodiment of the present invention) can be calculated, and then the quotient between the difference and the specified number of bytes can be determined as the number of placeholder instructions.

[0070] Specifically, the specified calculation formula can be:

[0071]

[0072] In the formula, the preset number of bytes is N check , specify the number of bytes as N nop , n is the number of placeholder instructions.

[0073] It should be noted that, since the number of bytes of the check code generated by most commonly used check algorithms is fixed, the preset number of bytes of the first check code can be determined according to the check algorithm used in this step. This ensures that the number of placeholder instructions required is accurate when inserting the first check code, thereby avoiding problems caused by byte mismatch.

[0074] 202. Get machine code.

[0075] Among them, the implementation method of step 202 is the same as that of step 101, and can achieve the same technical effect and solve the same technical problem, and will not be repeated here.

[0076] 203. Calculate a first check code of each binary instruction in the machine code according to a preset check algorithm.

[0077] It should be noted that, in this embodiment, the first verification code may be generated in the form of a Hash Message Authentication Code (HMAC) and a key.

[0078] In the process of generating the first check code, it is first necessary to obtain a pre-selected key. Then, the key is combined with each binary instruction, and the HMAC algorithm is used to calculate the corresponding first check code for each instruction. During this calculation process, the placeholder instruction can be retained or removed, depending on the specific implementation strategy.

[0079] It is worth noting that the hash algorithm and key will not be released with the software. They will be transmitted to the host where the verification end is located in a safe and reliable way to ensure that these key information are not used to tamper with the software program. The specific form can be encrypted email or cloud, which is not limited here. As long as it can be implemented, it is within the scope of protection of the present invention.

[0080] Since the calculation of the checksum is based on the function granularity, the location information of each function (binary instruction) is usually recorded in the program file of the final target software, such as the symbol table section of the ELF file under Linux. This location information needs to be retained when the software is released.

[0081] There is no limitation on how to configure the above configuration information (such as the number of bytes of the first check code, the insertion position of the first check code, whether the machine code of the placeholder instruction is included when calculating the first check code, the name and starting position of each binary instruction, etc.) to the verification device. This configuration information can be saved in the program file of the target software that is finally generated, saved in a separate section in the form of a string; it can also be saved separately in the form of a configuration file and released with the software; it can even be saved on a server open to the Internet for the verification device to access and read when needed. These methods ensure that the verification device can obtain the necessary configuration information to correctly perform the verification operation.

[0082] 204. Use the first checksum of each binary instruction to replace the placeholder instruction at the specified position of each binary instruction to obtain the target machine code.

[0083] Among them, the implementation method of step 204 is the same as that of step 103, and can achieve the same technical effect and solve the same technical problem, and will not be repeated here.

[0084] Next, see Figure 3 , Figure 3 A flowchart of a verification method for software applied to a verification terminal provided by an embodiment of the present invention, wherein the specific steps include:

[0085] 301. Obtain a software package corresponding to the target software.

[0086] 302. Extract the target machine code and the first checksum of each binary instruction in the target machine code from the software package.

[0087] 303. Restore the target machine code to the corresponding machine code, and calculate the second check code of each binary instruction in the machine code according to a preset check algorithm.

[0088] 304. If the first verification codes and the second verification codes of the plurality of binary instructions are the same, it is determined that the target software has not been tampered with;

[0089] 305. If the first verification codes and the second verification codes of the plurality of binary instructions are not the same, it is determined that the target binary instruction in the target software whose first verification code and the second verification code are different is tampered with.

[0090] After the verification end obtains the software package of the target software in step 301, in step 302, the "configuration information" can be extracted from the software package, which includes the number of bytes of the first verification code, the insertion position of the first verification code, whether the machine code of the placeholder instruction is included when calculating the first verification code, the name and starting position of each binary instruction, etc. With this configuration information, each binary instruction and its corresponding verification code can be accurately located and extracted in the program file of the software package. This means that the software package not only contains program data, but also comes with a configuration file for verification.

[0091] Next, in step 303, based on the information of whether the machine code of the placeholder instruction is included when calculating the first check code, the verification end will decide whether to replace the first check code in the target machine code with the machine code of the placeholder instruction, or replace it with the original machine code after removing the first check code and the placeholder instruction. The machine code data processed in this step will be used as the input of the subsequent verification algorithm. That is to say, if the marking end retains the placeholder instruction when calculating the first check code of each binary instruction, then the verification end also needs to retain these placeholder instructions; conversely, if the marking end does not retain the placeholder instruction when calculating the first check code, the verification end can directly use the original machine code as the input of the verification algorithm. This ensures the consistency and accuracy of the verification process. In this process, the calculation method of the second check code must be strictly consistent with the method of calculating the first check code by the marking end.

[0092] Finally, the integrity of the software can be verified by comparing the calculated second checksum of each binary instruction with the previously extracted first checksum. If the first checksum of any binary instruction does not match the second checksum, this indicates that the machine code of the target software may be damaged or tampered with, and step 305 is executed. At this time, the loading or running of the program should be stopped immediately to prevent potential risks. Only when the first checksum of all binary instructions can perfectly match the second checksum, step 304 is executed, and the software can be confirmed to be intact and allowed to continue to execute.

[0093] Next, see Figure 4 , Figure 4 Another flowchart of a verification method for software applied to a verification terminal provided by an embodiment of the present invention includes the following specific steps:

[0094] 401. Obtain the software package corresponding to the target software.

[0095] 402. Extract the target machine code and the first checksum of each binary instruction in the target machine code from the software package.

[0096] 403. Restore the target machine code to the corresponding machine code, and calculate the second check code of each binary instruction in the machine code according to a preset check algorithm.

[0097] 404. If the first verification codes and the second verification codes of the plurality of binary instructions are the same, it is determined that the target software has not been tampered with;

[0098] 405. If the first verification codes and the second verification codes of the plurality of binary instructions are not the same, it is determined that the target binary instruction in the target software whose first verification code and the second verification code are different is tampered with.

[0099] Among them, the implementation methods of steps 401 to 405 are the same as those of steps 301 to 305, and can achieve the same technical effects and solve the same technical problems, and will not be repeated here.

[0100] 406. After determining that the binary instructions in the target software are tampered with, send a tampering prompt message to the display terminal.

[0101] In this step, all binary instructions whose first check code does not match the second check code, together with the first check code and the second check code corresponding to these instructions, can be encapsulated into a tampering prompt message. Subsequently, these tampering prompt messages are sent to the display terminal, so that the staff can quickly locate and repair the problem of the target software based on the prompt information. This not only can instantly identify the binary instructions whose check codes do not match, but also can avoid the tedious process of staff checking one by one by sending the information of the relevant instructions directly to the display terminal, significantly improving the efficiency of problem identification and resolution.

[0102] 407. Check whether the information sent by the sender has changed.

[0103] When handling the transmission of keys and verification algorithms, we must be alert to potential security risks. If these key information are intercepted or tampered with when being transmitted from the tag end to the verification end, it may cause errors in the verification algorithm and key received by the verification end. Using these incorrect algorithms and keys to verify the same binary instructions as the tag end will inevitably result in mismatches. Therefore, in this step, it is necessary to check the preset verification algorithm information received in advance. The information contains the verification algorithm, preset secret key, and the address information of the sender.

[0104] Next, the verification algorithm and the preset secret key are encapsulated into an algorithm confirmation message. After that, the algorithm confirmation message is sent back to the sender through the sender's address information. This process is to confirm whether the verification algorithm and the preset secret key have not been tampered with and ensure that both parties use the same verification parameters. Such verification steps are the key to ensuring the security and accuracy of information transmission.

[0105] In the process of confirming the verification algorithm and key to the sender, a diversified transmission strategy can be adopted to integrate multiple transmission channels. For the transmission of the algorithm confirmation message, a transmission channel with low latency and high bandwidth characteristics can be selected for fast initial transmission to ensure the rapid delivery of data. At the same time, a backup channel is also established to continuously send data copies and algorithm confirmation messages.

[0106] In this way, through dual-channel transmission, data is verified on both channels. The receiving end (i.e., the tagging end or the sender) compares the integrity and consistency of data from different channels according to a preset algorithm to verify whether the algorithm confirms that the message has been tampered with.

[0107] When the confirmation algorithm confirms that the message has not been tampered with, the receiving end (marking end) will confirm these messages and reply them to the verification end to complete the entire verification algorithm and key confirmation process. Such a transmission strategy not only improves the reliability and security of data transmission, but also enhances the robustness of the entire communication system.

[0108] The present invention provides a software verification method, which is divided into a marking end and a verification end. At the marking end, the machine code is first obtained, and then the first verification code of each binary instruction in the machine code is calculated according to a preset verification algorithm. Next, the first verification code of each binary instruction is used to replace the placeholder instruction at a specified position in the instruction, thereby generating a target machine code. When the target machine code is linked to the target software and released, the verification end can use the same verification algorithm to calculate the second verification code of each binary instruction in the machine code after the target machine code is restored, and compare it with the first verification code to verify the integrity of the target software. Specifically, if the first verification code of all binary instructions is completely consistent with the second verification code, it indicates that the target software has not been tampered with; conversely, if there is any pair of verification codes that do not match, it can be concluded that the binary instruction in the target software has been tampered with. In addition, the advantage of this method is that it can directly locate the specific binary instruction that has been tampered with without having to conduct a comprehensive inspection of the entire software, thereby significantly improving the efficiency of problem confirmation.

[0109] Furthermore, as a response to the above Figure 1 In order to realize the method shown in the figure, the embodiment of the present invention also provides a verification device for software applied to the marking end, which is used to verify the above Figure 1 The device embodiment corresponds to the aforementioned method embodiment. For ease of reading, this device embodiment will not repeat the details of the aforementioned method embodiment one by one, but it should be clear that the device in this embodiment can correspond to all the contents of the aforementioned method embodiment. Figure 5 As shown, the device comprises:

[0110] A code acquisition unit 501, used to acquire machine code;

[0111] A tag calculation unit 502, configured to calculate a first check code for each binary instruction in the machine code acquired by the code acquisition unit 501 according to a preset check algorithm;

[0112] The replacement unit 503 is used to replace the placeholder instruction at the specified position of each binary instruction with the first check code of each binary instruction calculated by the mark calculation unit 502 to obtain the target machine code, so that after the target machine code is linked to the target software and released, the verification end uses the preset verification algorithm to generate the second check code of each binary instruction in the machine code corresponding to the target machine code, so as to verify each binary instruction in the target software according to the first check code and the second check code of each binary instruction.

[0113] Furthermore, as a response to the above Figure 2In order to realize the method shown in the figure, the embodiment of the present invention also provides another verification device for software applied to the marking end, which is used to verify the above Figure 2 The device embodiment corresponds to the aforementioned method embodiment. For ease of reading, this device embodiment will not repeat the details of the aforementioned method embodiment one by one, but it should be clear that the device in this embodiment can correspond to all the contents of the aforementioned method embodiment. Figure 6 As shown, the device comprises:

[0114] A code acquisition unit 501, used to acquire machine code;

[0115] A tag calculation unit 502, configured to calculate a first check code for each binary instruction in the machine code acquired by the code acquisition unit 501 according to a preset check algorithm;

[0116] The replacement unit 503 is used to replace the placeholder instruction at the specified position of each binary instruction with the first check code of each binary instruction calculated by the mark calculation unit 502 to obtain the target machine code, so that after the target machine code is linked to the target software and released, the verification end uses the preset verification algorithm to generate the second check code of each binary instruction in the machine code corresponding to the target machine code, so as to verify each binary instruction in the target software according to the first check code and the second check code of each binary instruction.

[0117] In an optional implementation manner, the tag calculation unit 502 is specifically configured to:

[0118] Get the preset key;

[0119] Using a hash algorithm to calculate the preset key and each binary instruction with a placeholder instruction in the machine code, respectively, to obtain a first check code corresponding to each binary instruction; and / or

[0120] A hash algorithm is used to calculate the preset key and each binary instruction in the machine code after removing the placeholder instructions, to obtain a first check code corresponding to each binary instruction.

[0121] In an optional implementation, before the code acquisition unit 501, the device further includes a placeholder instruction insertion unit 504, and the placeholder instruction insertion unit 504 is specifically used to:

[0122] Obtain the assembly code obtained by compiling the source code;

[0123] A placeholder instruction is inserted at a specified position of each function in the assembly code according to a preset placeholder setting algorithm to obtain a target assembly code, so as to generate the machine code according to the target assembly code, wherein each function in the assembly code is represented in the machine code as a binary instruction.

[0124] In an optional implementation manner, the placeholder instruction insertion unit 504 inserts a placeholder instruction at a specified position of each function in the assembly code according to a preset placeholder setting algorithm to obtain the target assembly code, specifically for:

[0125] Obtaining a preset number of bytes of the first check code and a specified number of bytes corresponding to a single placeholder instruction;

[0126] Using a specified calculation formula, the preset number of bytes and the specified number of bytes are calculated to obtain the number of placeholder instructions inserted at the specified position of each function;

[0127] Placeholder instructions are inserted at designated positions of each function according to the number of placeholder instructions, wherein the designated positions are positions that will not be called when the code is executed.

[0128] In an optional implementation manner, the placeholder instruction insertion unit 504 calculates the preset number of bytes and the specified number of bytes using a specified calculation formula to obtain the number of placeholder instructions inserted at the specified position of each function, specifically for:

[0129] Calculating a sum of the preset number of bytes and the specified number of bytes, and calculating a difference between the sum and the preset value;

[0130] A quotient between the difference and the specified number of bytes is determined as the number of placeholder instructions.

[0131] Furthermore, as a response to the above Figure 3 In order to realize the method shown in the figure, the embodiment of the present invention also provides a verification device for software applied to the verification end, which is used to verify the above Figure 3 The device embodiment corresponds to the aforementioned method embodiment. For ease of reading, this device embodiment will not repeat the details of the aforementioned method embodiment one by one, but it should be clear that the device in this embodiment can correspond to all the contents of the aforementioned method embodiment. Figure 7 As shown, the device comprises:

[0132] The software package acquisition unit 701 is used to acquire the software package corresponding to the target software;

[0133] An extraction unit 702 is used to extract a target machine code and a first checksum of each binary instruction in the target machine code from the software package acquired by the software package acquisition unit 701;

[0134] A restoration unit 703, configured to restore the target machine code extracted by the extraction unit 702 to a corresponding machine code, and calculate a second check code for each binary instruction in the machine code according to a preset check algorithm;

[0135] A first confirmation unit 704, configured to determine that the target software has not been tampered with if the first verification codes and the second verification codes of the plurality of binary instructions calculated by the restoration unit 703 are the same;

[0136] The second confirmation unit 705 is used to determine that the target binary instruction in the target software whose first verification code is different from the second verification code is tampered with if the first verification code and the second verification code of the multiple binary instructions calculated by the restoration unit 703 are not all the same.

[0137] Furthermore, as a response to the above Figure 4 In order to realize the method shown in the figure, the embodiment of the present invention also provides another verification device for software applied to the verification end, which is used to verify the above Figure 4 The device embodiment corresponds to the aforementioned method embodiment. For ease of reading, this device embodiment will not repeat the details of the aforementioned method embodiment one by one, but it should be clear that the device in this embodiment can correspond to all the contents of the aforementioned method embodiment. Figure 8 As shown, the device comprises:

[0138] The software package acquisition unit 701 is used to acquire the software package corresponding to the target software;

[0139] An extraction unit 702 is used to extract a target machine code and a first checksum of each binary instruction in the target machine code from the software package acquired by the software package acquisition unit 701;

[0140] A restoration unit 703, configured to restore the target machine code extracted by the extraction unit 702 to a corresponding machine code, and calculate a second check code for each binary instruction in the machine code according to a preset check algorithm;

[0141] A first confirmation unit 704 is configured to determine that the target software has not been tampered with if the first verification code and the second verification code of each binary instruction in the plurality of binary instructions calculated by the restoration unit 703 are the same;

[0142] The second confirmation unit 705 is used to determine that the target binary instruction in the target software has been tampered with if there is a target binary instruction whose first check code is different from the second check code among the multiple binary instructions calculated by the restoration unit 703.

[0143] In an optional implementation manner, after the second confirmation unit 705, the device further includes a first message sending unit 706, and the first message sending unit 706 is specifically configured to:

[0144] encapsulate, among the plurality of binary instructions, a target binary instruction in which the first verification code and the second verification code are different, the first verification code and the second verification code corresponding to the target binary instruction into a tampering prompt message;

[0145] The tampering prompt message is sent to a display terminal so that the staff can repair the target software according to the tampering prompt message.

[0146] In an optional implementation manner, after the second confirmation unit 705, the device further includes a second message sending unit 707, and the second message sending unit 707 is specifically configured to:

[0147] Check the preset verification algorithm information received in advance, wherein the preset verification algorithm information includes the verification algorithm, the preset secret key and the sending address information of the sender;

[0148] Encapsulating the verification algorithm and the preset secret key into an algorithm confirmation message;

[0149] The algorithm confirmation message is sent to the sender through the sender address information, so as to verify with the sender whether the verification algorithm and the preset secret key have changed.

[0150] Furthermore, an embodiment of the present invention further provides a storage medium, wherein the storage medium is used to store a computer program, wherein when the computer program is running, the device where the storage medium is located is controlled to execute the above Figure 1-2 Or the method described in 3-4.

[0151] Furthermore, an embodiment of the present invention further provides a processor, the processor is used to run a program, wherein the program executes the above Figure 1-2 Or the method described in 3-4.

[0152] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0153] It is understandable that the related features in the above methods and devices can be referenced to each other. In addition, the "first", "second" and the like in the above embodiments are used to distinguish the embodiments, but do not represent the advantages and disadvantages of the embodiments.

[0154] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0155] The algorithm and display provided herein are not inherently related to any particular computer, virtual system or other device. Various general purpose systems can also be used together with the teachings based on this. According to the above description, it is obvious that the structure required for constructing such systems. In addition, the present invention is not directed to any specific programming language either. It should be understood that various programming languages ​​can be utilized to realize the content of the present invention described herein, and the description of the above specific languages ​​is for disclosing the best mode of the present invention.

[0156] In addition, the memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM, and the memory includes at least one memory chip.

[0157] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.

[0158] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0159] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0160] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0161] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0162] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.

[0163] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

[0164] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0165] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0166] The above are only embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included within the scope of the claims of the present application.

Claims

1. A software verification method, characterized in that: The method is applied to the marking end, and the method comprises: Get machine code; Calculate a first check code for each binary instruction in the machine code according to a preset check algorithm; The first check code of each binary instruction is used to replace the placeholder instruction at the specified position of each binary instruction to obtain the target machine code, so that after the target machine code is linked to the target software and released, the verification end uses the preset verification algorithm to generate the second check code of each binary instruction in the machine code corresponding to the target machine code, so as to verify each binary instruction in the target software according to the first check code and the second check code of each binary instruction.

2. The method according to claim 1, characterized in that Calculating a first check code of each binary instruction in the machine code according to a preset check algorithm includes: Get the preset key; Using a hash algorithm to calculate the preset key and each binary instruction with a placeholder instruction in the machine code, respectively, to obtain a first check code corresponding to each binary instruction; and / or A hash algorithm is used to calculate the preset key and each binary instruction in the machine code after removing the placeholder instructions, to obtain a first check code corresponding to each binary instruction.

3. The method according to claim 1, characterized in that Before obtaining the machine code, the method further includes: Obtain the assembly code obtained by compiling the source code; A placeholder instruction is inserted at a specified position of each function in the assembly code according to a preset placeholder setting algorithm to obtain a target assembly code, so as to generate the machine code according to the target assembly code, wherein each function in the assembly code is represented in the machine code as a binary instruction.

4. The method according to claim 3, characterized in that Inserting a placeholder instruction at a specified position of each function in the assembly code according to a preset placeholder setting algorithm to obtain a target assembly code, including: Obtaining a preset number of bytes of the first check code and a specified number of bytes corresponding to a single placeholder instruction; Using a specified calculation formula, the preset number of bytes and the specified number of bytes are calculated to obtain the number of placeholder instructions inserted at the specified position of each function; Placeholder instructions are inserted at designated positions of each function according to the number of placeholder instructions, wherein the designated positions are positions that will not be called when the code is executed.

5. The method according to claim 4, characterized in that The preset number of bytes and the specified number of bytes are calculated using a specified calculation formula to obtain the number of placeholder instructions inserted at the specified position of each function, including: Calculating a sum of the preset number of bytes and the specified number of bytes, and calculating a difference between the sum and the preset value; A quotient between the difference and the specified number of bytes is determined as the number of placeholder instructions.

6. A software verification method, characterized in that: The method is applied to a verification end, and the method comprises: Get the software package corresponding to the target software; Extracting the target machine code and a first checksum of each binary instruction in the target machine code from the software package; Restoring the target machine code to a corresponding machine code, and calculating a second check code for each binary instruction in the machine code according to a preset check algorithm; If the first verification code and the second verification code of each binary instruction in a plurality of binary instructions are the same, it is determined that the target software has not been tampered with; If, among the multiple binary instructions, there is a target binary instruction whose first check code is different from the second check code, it is determined that the target binary instruction in the target software has been tampered with.

7. The method according to claim 6, characterized in that After determining that the target software has been tampered with, the method further includes: encapsulate, among the plurality of binary instructions, a target binary instruction in which the first verification code and the second verification code are different, the first verification code and the second verification code corresponding to the target binary instruction into a tampering prompt message; The tampering prompt message is sent to a display terminal so that the staff can repair the target software according to the tampering prompt message.

8. The method according to claim 6, characterized in that After determining that the target software has been tampered with, the method further includes: Check the preset verification algorithm information received in advance, wherein the preset verification algorithm information includes the verification algorithm, the preset secret key and the sending address information of the sender; Encapsulating the verification algorithm and the preset secret key into an algorithm confirmation message; The algorithm confirmation message is sent to the sender through the sender address information, so as to verify with the sender whether the verification algorithm and the preset secret key have changed.

9. A software verification device, characterized in that: The method is applied to the marking end, and the device comprises: A code acquisition unit, used for acquiring machine code; a mark calculation unit, configured to calculate a first check code for each binary instruction in the machine code acquired by the code acquisition unit according to a preset check algorithm; A replacement unit is used to replace the placeholder instruction at the specified position of each binary instruction with the first check code of each binary instruction calculated by the mark calculation unit to obtain the target machine code, so that after the target machine code is linked to the target software and released, the verification end uses the preset verification algorithm to generate the second check code of each binary instruction in the machine code corresponding to the target machine code, so as to verify each binary instruction in the target software according to the first check code and the second check code of each binary instruction.

10. A software verification device, characterized in that: The method is applied to a verification end, and the device comprises: A software package acquisition unit, used to acquire the software package corresponding to the target software; an extraction unit, configured to extract a target machine code and a first checksum of each binary instruction in the target machine code from the software package acquired by the software package acquisition unit; a restoration unit, configured to restore the target machine code extracted by the extraction unit to a corresponding machine code, and calculate a second check code for each binary instruction in the machine code according to a preset check algorithm; a first confirmation unit, configured to determine that the target software has not been tampered with if the first verification codes and the second verification codes of the plurality of binary instructions calculated by the restoration unit are all the same; The second confirmation unit is used to determine that the target binary instruction in the target software whose first verification code is different from the second verification code is tampered if the first verification code and the second verification code of the multiple binary instructions calculated by the restoration unit are not all the same.

11. A software verification system, characterized in that: The system comprises: A marking terminal, used to calculate the first check code of each binary instruction in the machine code according to a preset check algorithm to obtain a target machine code; The verification end is used to calculate the second verification code of each binary instruction in the machine code according to a preset verification algorithm, and compare the first verification code of each binary instruction with the second verification code to determine whether each binary instruction has been tampered with.

12. A storage medium, characterized in that: The storage medium includes a stored program, wherein when the program is executed, the device where the storage medium is located is controlled to execute the method according to any one of claims 1 to 5 or claims 6 to 8.

13. A processor, characterized in that: The processor is used to run a program, wherein the program executes the method according to any one of claims 1 to 5 or claims 6 to 8 when running.

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