Continuous-time digital Ising model hardware solver based on combinational logic

Abstract

The present invention relates to the field of computing technology and discloses a continuous-time digital Ising model hardware solver based on combinational logic. The hardware solver comprises: a plurality of neurons; a data initialization module for initializing and assigning values ​​to corresponding coefficients of the hardware solver; a control signal for starting iterative calculation after initializing and assigning values ​​to the neurons; a neuron update module for performing matrix operations on an interaction relationship weight matrix composed of initialized weight coefficients and initialized neurons, and adding the matrix operations to a bias to obtain the cumulative sum of each neuron in the current neuron state; and a neuron activation module for adding a nonlinear factor to the iterative calculation. The module utilizes the high precision of digital circuits while also utilizing the continuity of physical systems to achieve accelerated hardware with lower energy consumption and faster digital solution.

Description

Technical Field

[0001] The invention belongs to the field of computing technology, and in particular relates to a continuous-time digital Ising model hardware solver based on combinational logic. Background Art

[0002] Hardware solvers are tools designed to solve specific mathematical problems. These solvers are designed to accelerate the problem-solving process using hardware. The Ising model hardware solver is a computational tool for solving the extremum problem of the Ising energy function.

[0003] The Ising model is a mathematical model named after physicist Ernst Ising, originally used to describe the ferromagnetism of materials. The ferromagnetic Ising model assumes that ferromagnetic materials are composed of regularly arranged small magnetic needles, each of which has only two directions (spins) up and down. Adjacent small magnetic needles interact with each other through energy constraints, and at the same time, their magnetism undergoes random transitions (up to down or vice versa) under environmental interference. In the Ising system, the Hamiltonian H of the entire system is derived from the sum of the interactions between all spins and the sum of the effects of the external field on each spin. The Hamiltonian H of the Ising model is:

[0004]

[0005] {σ1,...,σ n} represents n binary spins (values ​​+1 and -1), J ij represents the interaction between spins, Represents the external magnetic field. The explanatory power of the Ising model is also applicable to neuroscience, where the small magnetic needle is analogized to a neuron, with its upward and downward states corresponding to neuronal activation and inhibition, and the interaction of the small magnetic needles corresponding to signal transmission between neurons. In this case, the Hamiltonian function H in the original Ising model can be abstracted as the energy function of the neural network. This is where the Hopfield network comes in, extending the explanatory power of the Ising model to the computational functions of neural networks.

[0006] Many practical mathematical problems can be transformed into Ising energy function extremum problems, such as combinatorial optimization problems. Combinatorial optimization is a type of optimization problem that seeks the minimum value under constraints. It is typically an NP-Hard problem, meaning that the optimal solution cannot be obtained exhaustively in polynomial time. Traditional computers typically use heuristic algorithms such as simulated annealing to find approximate solutions, but as the scale of combinatorial optimization problems increases, heuristic algorithms consume a large amount of computing resources. Combinatorial optimization problems can be transformed into the Ising energy model, and the optimal solution to the combinatorial optimization problem corresponds to the state where the system's Hamiltonian has the lowest value.

[0007] A variety of Ising model hardware solvers have been proposed, usually called Ising machines or annealing machines. These include coherent Ising machines based on optical parametric oscillators, Fujitsu digital annealing machines based on application-specific integrated circuits (ASICs), and Hitachi COMS annealing machines. Broadly speaking, hardware-implemented Hopfield networks also fall into the category of Ising machines. Generally speaking, the update frequency of hardware accelerators involving sequential digital circuits is limited by the clock frequency; while the calculation accuracy of hardware accelerators involving analog circuits is affected by noise and interference. The present invention proposes a new continuous-time digital Ising model hardware solver, whose core computing module is composed of combinational logic loops. The update of its neuron state is not limited by the clock signal, which improves the solution speed. The neuron state is transmitted in the form of high and low-level digital signals, which has higher calculation accuracy than the analog system. Summary of the Invention

[0008] The present invention discloses a continuous-time digital hardware solver for Ising model based on combinational logic. The technical solution includes: a data initialization module, a state control module, a neuron update module and a neuron activation module, all of which are implemented by digital logic circuits.

[0009] The neuron update module and the neuron activation module constitute neurons; the continuous time digital Ising model hardware solver includes n neurons S1, ..., S i ,…,S n , the weight coefficients between neurons are W(1,1),W(1,2),…,W(n,n), where W(i,j) is the weight coefficient of neuron S i and S j The weight coefficient between them is 1≤i,j≤n; the state value of the neuron s i represents the i-th neuron S i The activation state of the neuron; the state value of the neuron is accumulated and summed through the neuron update module, that is, the synaptic connection function, the neuron activation module activates the accumulated sum, and the new state value of the neuron is fed back to the neuron update module through the state control module to iteratively update the state value of the neuron;

[0010] Data initialization module: used to initialize the state value of neurons, the weight coefficients between neurons, and the variable bias corresponding to each neuron, and output them to the neuron update module;

[0011] State control module: The control signal enables the state control module to operate in initialization mode or block iterative update mode. When the state control module operates in initialization mode, the state values ​​of neurons, the weight coefficients between neurons, and the variable biases corresponding to neurons all maintain their initialization values. When the state control module operates in block iterative update mode, it can selectively update the state values ​​of some neurons while keeping the state values ​​of the remaining neurons unchanged, or update the state values ​​of all neurons.

[0012] Neuron Update Module: The neuron update module is composed of combinational logic circuits. The weight coefficients between neurons are input by the data initialization module. The interaction relationship weight matrix composed of these weight coefficients represents the circuit connection relationship between the corresponding neurons. The corresponding circuit structure is generated through the circuit connection relationship. When the neuron is in the iterative update state, the neuron update module can obtain the cumulative sum of the neuron in the current neuron state.

[0013] Neuron activation module: The neuron activation module is composed of a combinational logic circuit; the activation function is used to perform nonlinear activation processing on the accumulated sum of the neuron in the current neuron state to obtain the new state value of the neuron;

[0014] When the state value of any neuron in the continuous-time digital Ising model hardware solver changes, the state values ​​of other neurons in the iterative update state are immediately updated, and the new state value of the neuron is obtained; according to the signal of the state control module, the neuron in the iterative update state accepts the new state value of the neuron, and the neuron in the holding state does not receive the new state value of the neuron and remains at the original state value; the state values ​​of all neurons are numerically updated until the state values ​​of all neurons are stable, and a stable energy state or energy state distribution is obtained. The solution corresponding to the state value of each neuron in the stable energy state or energy state distribution is the optimal solution or suboptimal solution to the problem to be solved.

[0015] Furthermore, the weight coefficient is stored in a register array, and the data initialization module can configure the value of the weight coefficient; the interaction relationship weight matrix is ​​a symmetric matrix or an asymmetric matrix; the value of the weight coefficient can be set to any integer or floating point type.

[0016] Furthermore, the activation function in the neuron update process is any form of neuron accumulation and X i The function for nonlinear activation is determined by the type of problem being solved.

[0017] Furthermore, when the state control module operates in the block iterative update mode, it can selectively update the state values ​​of some neurons while keeping the state values ​​of the remaining neurons unchanged, or update the state values ​​of all neurons, specifically including:

[0018] The state value of the neuron is updated continuously in blocks and is not controlled by a clock. That is, when the neuron is in the update state, it is updated continuously and is affected by the inherent noise and different delays of the circuit. The dynamic response of the network can be changed by configuring the buffer delay.

[0019] The updating or maintaining of the state values ​​of different neurons is controlled by latches;

[0020] The latch corresponding to the neuron in the update state receives the voltage signal input by the neuron activation module. The circuit loop formed by the neuron is continuous, the input and output are connected, and the corresponding neuron loop is in iterative update;

[0021] The latch corresponding to the neuron in the hold state does not receive the voltage signal input by the neuron activation module, the neuron loop is disconnected, and the state value of the neuron is obtained by the last iterative update and output by the latch.

[0022] Furthermore, the updating process of the neural network composed of neurons is the process in which the energy value of the total energy state of the neural system automatically decreases. The expression of the energy value E of the total energy state of the neural system is:

[0023] E=-∑ ＜i,j＞ W(i,j)s i s j -∑ i h i s i ,

[0024] s j represents the current state value of the jth neuron, h i Indicates the variable bias added to the i-th neuron; during the neuron state update process, the energy value spontaneously decreases, so that the result converges to the global energy minimum point or close to the energy minimum point. h with gradually decreasing absolute value can be injected in a time-series manner. i The sequence affects the update of the corresponding neuron state value by changing the size of the accumulated sum, so that the result jumps out of the local optimal point.

[0025] Furthermore, the continuous-time digital Ising model hardware solver is used to solve the minimum energy problem of the ferromagnetic Ising model, then n neurons S1,…,S i ,…,S n They represent the corresponding spin nodes respectively, the weight coefficient W(i,j) represents the interaction between the spin nodes, and the activation function in the neuron update process adopts the sgn function. Finally, the spin node state value at the lowest energy of the ferromagnetic Ising model corresponding to the stable energy state is obtained, realizing the solution to the lowest energy problem of the ferromagnetic Ising model.

[0026] Furthermore, the continuous-time digital Ising model hardware solver is used to realize the associative memory function, then n neurons S1,…,S i ,…,S n Different value combinations of represent possible memory modes, W(i,j) represents the inter-neuron connection strength determined by the memory benchmark model, and the activation function in the neuron update process adopts the sgn function. According to different initial test modes, the network eventually stabilizes to the corresponding benchmark mode, realizing the function of network associative memory.

[0027] Furthermore, the continuous-time digital Ising model hardware solver is used to solve the maximum cut problem, then n neurons S1,…,S i ,…,S n Represent the corresponding vertices respectively, W(i,j) represents the interaction between vertices, neurons are updated in blocks according to a certain order, the activation function in the update process adopts the inverse of the sgn function, and the final neuron state value corresponds to the vertex state value of the optimal solution or suboptimal solution of the maximum cut problem, thereby solving the maximum cut problem.

[0028] Furthermore, when the neuron is in the iterative update mode, the neuron update module can obtain the cumulative sum of the neuron in the current neuron state, specifically including:

[0029] For the initialized neuron state values ​​s1,…,s n Perform matrix operations with the weight matrix and compare it with the neuron S i The corresponding bias h i By adding the adder, the cumulative sum X corresponding to the i-th neuron is obtained. i , any neuron state value s i Related to the state values ​​of all neurons, the cumulative sum X of the i-th neuron in the current neuron state i as follows:

[0030]

[0031] h i Represents the variable bias corresponding to the i-th neuron.

[0032] Compared with the prior art, the beneficial technical effects of the present invention are:

[0033] The continuous-time digital Ising model hardware solver based on combinatorial logic leverages the high precision of digital circuits while also exploiting the continuous nature of physical systems. "Continuous time" refers to the fact that the core circuitry for the neuron state update process is not controlled by sequential logic, but rather by digital multiplication, addition, subtraction, and comparators constructed from combinatorial logic, combining the advantages of both analog and digital circuits. The use of combinatorial logic avoids the clock frequency limitations of existing CMOS annealers, enabling faster update speeds. The overall computational complexity is lower than that of Fujitsu's ASIC-based digital annealer, resulting in lower energy consumption. The system can also be adapted to different types of combinatorial optimization problems by adjusting the number of neurons, the size of connection weights, and the number of bits. Furthermore, by controlling neuron time delays or injecting random biases, the circuit can better escape local optima and rapidly solve combinatorial optimization problems. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 It is a schematic diagram of the overall architecture of the present invention.

[0035] Figure 2 Schematic diagram of the continuous-time digital Ising model hardware solver in all embodiments of the present invention.

[0036] Figure 3 This is a schematic diagram of implementing the associative memory function in the second embodiment of the present invention. DETAILED DESCRIPTION

[0037] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to specific embodiments and accompanying drawings.

[0038] Example 1:

[0039] This embodiment is based on a 2*2 ferromagnetic Ising model, which is implemented on an FPGA (Field Programmable Gate Array). The overall architecture is as follows: Figure 1 shown.

[0040] like Figure 2 As shown, the continuous-time digital Ising model hardware solver in the present invention is mainly composed of neurons and the interconnection structure between neurons.

[0041] A hardware solver consisting of four neurons S1, S2, S3, and S4 can be constructed, and the state value of the neuron s i represents the i-th neuron S i The state of the neuron, the neuron weight coefficient W(1,1),W(1,2),…,W(4,4), where W(i,j) is the neuron S i and Sj The weight coefficient between them, the state value of the neuron is reflected in the FPGA as the voltage of the corresponding line. When the voltage is high, the neuron state value is -1, and when the voltage is low, the neuron state value is +1; the weight coefficient is saved in the FPGA using registers. The main modules of the solver include:

[0042] Data Initialization Module: Initializes and assigns values ​​to the weight coefficients W(1,1), W(1,2), …, W(4,4) stored in registers, as shown in Table 1. The state control module then selects an external signal to apply a high or low level to the lines representing the initial neuron state values ​​s1, s2, s3, and s4, thereby assigning initial state values. The control signal is implemented in the FPGA as a two-choice circuit consisting of a lookup table. The data receiving module in the initialization module allows external devices to assign and reassign initial neuron state values. In this embodiment, the initial state values ​​are assigned as s1 = +1, s2 = -1, s3 = -1, and s4 = -1. This means that the line voltage levels corresponding to each neuron in the FPGA are: s1 is low, s2 is high, s3 is high, and s4 is high.

[0043] Table 1

[0044] W(1,1)＝0 W(1,2)＝1 W(1,3)＝1 W(4,1)＝1 W(1,2)＝1 W(2,2)＝0 W(2,3)＝1 W(4,2)＝1 W(1,3)＝1 W(3,2)＝1 W(3,3)＝0 W(4,3)＝1 W(1,4)＝0 W(4,2)＝1 W(3,4)＝1 W(4,4)＝0

[0045] State control module: The state control module is kept in initialization mode through control signals. The host computer controls the state values ​​s1, s2, s3, s4, weight coefficients W(1,1), W(1,2), W(3,3), W(4,4) corresponding to the circuit neurons S1, S2, S3, S4, and the variable bias h corresponding to the neurons. i Perform initialization assignment; after the initialization is completed, the state control module controls the circuit to select some neurons in a certain order or randomly to perform iterative update mode and start updating.

[0046] Neuron update module: The weight coefficients W(1,1), W(1,2), W(3,3), W(4,4) are input from the data initialization module. According to the digital annealing update rule, the initialized neuron state values ​​s1, s2, s3, s4 and the weight matrix are subjected to matrix operations. In the FPGA, the input state values ​​s1, s2, s3, s4 and the weight coefficients W(1,1), W(1,2), W(3,3), W(4,4) are passed through the matrix operation circuit of the combinational logic based on the lookup table. And with the neuron S i The corresponding bias h i The neuron sum X1, X2, X3, and X4 are added together by the adder and input into the neuron activation module. The update formula of the i-th neuron in the current neuron state is as follows:

[0047]

[0048] Neuron activation module: The neuron accumulation sum X1, X2, X3, X4 is input into the neuron activation module, and the activation function f(X i ) and the cumulative sum X calculated by the neuron after this iteration i Multiply, output the obtained value to the external data acquisition device, and update the obtained value to neurons S1,…,S through the control signal n The corresponding neuron S in i , activation function f(X i ) is represented in FPGA as a comparator composed of accumulation and lookup table, and the updated value is output by the corresponding lookup table.

[0049] In the 2*2 ferromagnetic Ising model, the new state value s of the i-th neuron is i By formula s i =f(X i ) It can be concluded that the activation function f(x) is:

[0050]

[0051] where X i is the cumulative sum of the i-th neuron in the current state. For the state where the cumulative sum of neurons is greater than 0, s i Assigned to low level, the corresponding neuron state is +1. For the state where the neuron cumulative sum is less than 0, s i The assigned value is high, and the corresponding neuron state is -1.

[0052] Due to the combinatorial logic structure of the continuous-time digital Ising model hardware solver, when the state of any interconnected external neuron changes, the corresponding neuron begins to perform matrix operations on the current state energy value to obtain the next state of the neuron as quickly as possible. That is, if the voltage level of the line corresponding to any neuron in the FPGA changes, the cumulative sum corresponding to the neurons in the iterative update mode whose correlation coefficient is not 0 will change immediately, causing the voltage level of the line corresponding to the neuron to change.

[0053] If a neuron is in an iterative update state, the updated values ​​X1, X2, X3, and X4 are activated after each iteration and then reassigned to neurons S1, S2, S3, and S4. This means that the FPGA's binary selection circuit always selects the iterative mode and assigns the voltage level after the cumulative sum passes through the comparator to the state line corresponding to each neuron. The system is then in iterative update mode. Following the above update rules, the system iteratively updates and ultimately achieves a stable energy state. This means that the updated cumulative sums X1, X2, X3, and X4 after each iteration are the same as the previous values ​​of neurons S1, S2, S3, and S4. This manifests itself in the FPGA as the line voltage level corresponding to each neuron remaining stable.

[0054] During the update process, the energy state may become trapped in a local optimum. Therefore, the bias control component injects numerical noise to escape the local minimum and ultimately achieve the optimal solution. This component, through the bias injection module in the FPGA, applies the bias to the sum of the neuron interactions. By changing the size of the accumulated sum, it influences the update of the corresponding neuron state value, causing the result to escape the local optimum.

[0055] The FPGA output results are stable at s1 high, s2 high, s3 high, and s4 high, because in the FPGA, a high level represents a state of -1, and a low level represents a neuron state of 1. That is, the continuous-time digital Ising model hardware solver stabilizes at the results s1 = -1, s2 = -1, s3 = -1, and s4 = -1, which is the lowest energy state.

[0056] When the initial state values ​​are assigned as s1 = 1, s2 = 1, s3 = 1, and s4 = -1, the line voltage levels corresponding to each neuron in the FPGA are: s1 low, s2 low, s3 low, and s4 high. The FPGA output stabilizes at S1 low, S2 low, S3 low, and S4 low. This means that after iteration, the continuous-time digital Ising model hardware solver outputs a stable state of s1 = 1, s2 = 1, s3 = 1, and s4 = 1, representing the lowest energy state.

[0057] It can be seen that the continuous-time digital Ising model hardware solver can eventually stabilize to the lowest energy state under the corresponding problem.

[0058] Example 2:

[0059] This embodiment is based on the Hopfield neural network model that stores four benchmark patterns and is implemented on an FPGA. The overall architecture is as follows: Figure 1 shown.

[0060] This embodiment maps a Hopfield network storing four benchmark patterns to a continuous-time digital Ising model hardware solver to verify whether the benchmark pattern can be correctly associatively memorized when the Hamming distance between the input and the benchmark pattern is less than 15 / 2.

[0061] In order to achieve the above purpose, a neural network consisting of fifteen neurons S1, S2, ..., S 15 The solver, neuron S i The status value s i represents the activation state of the i-th neuron, and the neuron interaction system is W(1,1),W(1,2)…,W(15,15), where W(i,j) is the activation state of neuron S i and S j The weight coefficient between .

[0062] Data initialization module: Assign initial values ​​to the weight coefficients W(1,1), W(1,2), …, W(15,15) stored in the registers, as shown in Table 2.

[0063] The following is a detailed description of how to obtain the weight coefficient:

[0064] The interaction matrix in the second embodiment needs to store four reference patterns P1, P2, P3, and P4:

[0065] P1=[+1,-1,+1,-1,+1,-1,+1,-1,+1,-1,+1,-1,+1,-1,+1]

[0066] P2=[+1,+1,-1,-1,+1,+1,-1,-1,+1,+1,-1,-1,+1,+1,-1]

[0067] P3=[+1,+1,+1,-1,-1,-1,+1,+1,+1,-1,-1,-1,+1,+1,+1]

[0068] P4=[+1,+1,+1,+1,-1,-1,-1,-1,+1,+1,+1,+1,-1,-1,-1]

[0069] The interaction matrix is ​​obtained by Hebb learning rule:

[0070]

[0071] After numerical calculation, a 15*15 interaction matrix is ​​obtained. The weight coefficients in the matrix are converted into signed binary numbers and written into Verilog. The interaction matrix is ​​shown in Table 2:

[0072] Table 2

[0073]

[0074]

[0075] By manually modifying one bit of the reference pattern P3, we get the test pattern P3′=[-1,+1,+1,-1,-1,-1,+1,+1,-1,-1,-1,+1,+1,+1,+1]. And by selecting the controller, we select the external pair of representative neurons S1,S2,…,S 15 The initial state value line is applied with a high or low level, representing the assigned initial state value. The initial state value of the neuron can be assigned and reassigned by an external device through the data receiving module in the initialization module. The initial state value assignment is s1 = -1, s2 = +1, s3 = +1, s4 = -1, s5 = -1, s6 = -1, s7 = +1, s8 = +1, s9 = +1, s 10 =-1,s 11 =-1,s 12 =-1,s 13 =+1,s 14 =

[0076] +1,s 15 =+1. That is, the line voltage level corresponding to each neuron in the FPGA is s1 high level, s2 low level, s3 low level, s4 high level, s5 high level, s6 high level, s9 low level, s8 low level, s9 low level, s 10 High level, s 11 High level, s 12 High level, s 13 Low level, s 14 Low level, s 15 Low level.

[0077] State control module: control neurons S1, S2, ..., S through the state control module 15 Accept the updated neuron state value after iterative calculation, keep the value when the circuit loop is disconnected unchanged, or accept the reassignment by the external device. When re-initializing the data, the initialization mode is selected by the control signal, and neurons S1, S2, ..., S 15 Accepts reassignment by external devices.

[0078] Neuron update module: After the initialization, neurons S1, S2, ..., S 15 , according to the update rule of the hardware solver, neurons S1, S2, ..., S 15 The value is updated until the result is stable.

[0079] Neuron activation module: In the Hopfield neural network model that stores 4 benchmark patterns, the i-th neuron S i The new state value s i By formula s i =f(X i ) It can be concluded that the activation function f(x) is:

[0080]

[0081] The output result of FPGA is stable at s1 low level, s2 low level, s3 low level, s4 high level, s5 high level, s6 high level, s7 low level, s8 low level, s9 low level, s 10 High level, s 11 High level, s 12 High level, s 13 Low level, s 14 Low level, s 15 Low level. Because in FPGA, high level represents the state of -1, low level represents the neuron state of 1, that is, the hardware solver is stable at the result s1=+1,s2=+1,s3=+1,s4=-1,s5=-1,s6=-1,s7=+1,s8=+1,s9=+1,s 10 =-1,s 11 =-1,s 12 =-1,s 13 =+1,s 14 =

[0082] +1,s 15 =+1.

[0083] like Figure 2 As shown, the hardware solver has the correct associative memory function, and when the initial pattern P3′=[-1,+1,+1,-1,-1,-1,+1,+1,-1,-1,-1,+1,+1,+1] is input, the reference pattern P3=[+1,+1,+1,-1,-1,+1,+1,-1,-1,+1,+1,-1,-1,+1,+1,+1].

[0084] Example 3:

[0085] This embodiment is based on the Max-Cut problem model with 10 neurons, which is implemented on FPGA. The overall architecture is as follows: Figure 1 shown.

[0086] This embodiment maps the Max-Cut problem with 10 neurons to the hardware solver to verify whether the output of the hardware solver is the solution corresponding to the theoretical maximum cut of this problem.

[0087] In order to achieve the above object, the present invention constructs a continuous-time digital Ising model hardware solver based on combinational logic, including ten neurons S1, S2, ..., S 10 , neuron S i The status value s i Represents the activation state of the i-th neuron, the neuron weight coefficient W(1,1),W(1,2),…,W(10,10), where W(i,j) is the activation state of the neuron S i and S j The weight coefficients between are saved in registers in FPGA.

[0088] Data initialization module: assign initial values ​​to the weight coefficients W(1,1), W(1,2), ..., W(15,15) stored in the register, as shown in Table 3. And select the external pair of initial state values ​​S1, S2, ..., S representing the neurons by selecting the controller. 10 The line is applied with a high or low level, representing the assigned initial state value. The initial state value of the neuron can be assigned and reassigned by an external device through the data receiving module in the initialization module. The initial state value assignment is s1=+1, s2=+1, s3=+1, s4=+1, s5=+1, s6=+1, s7=+1, s8=+1, s9=

[0089] +1,s 10 =+1. That is, the line voltage level corresponding to each neuron in the FPGA is s1 low level, s2 low level, s3 low level, s4 low level, s5 low level, s6 low level, s7 low level, s8 low level, s9 low level, s 10 Low level.

[0090] Table 3

[0091] 0 1 0 1 1 1 0 1 1 1 1 0 1 1 0 1 1 1 1 0 0 1 0 0 1 0 1 1 0 1 1 1 0 0 1 1 0 0 1 1 1 0 1 1 0 0 1 1 0 0 1 1 0 1 0 0 1 0 1 1 0 1 1 0 1 1 0 1 1 1 1 1 1 0 1 0 1 0 1 0 1 1 0 1 0 1 1 1 0 1 1 0 1 1 0 1 1 0 1 0

[0092] State control module: control neurons S1, S2, ..., S through the state control module 15 Accept the updated neuron state value after iterative calculation, keep the value when the circuit loop is disconnected unchanged, or accept the reassignment by the external device. When re-initializing the data, the initialization mode is selected by the control signal, and neurons S1, S2, ..., S 10 Accepts reassignment by external devices.

[0093] Neuron update module: After the initialization, neurons S1, S2, ..., S 10 According to the update rules of the hardware solver, the connection matrix weights W(1,1),W(1,2),…,W(10,10) and the neuron state values ​​s1,s2,…,s 10 Perform matrix operations.

[0094] Neuron activation module: In the Max-Cut problem with 10 neurons, the new state value s of the i-th neuron is i By formula s i =f(X i ) It can be concluded that the activation function f(s) is:

[0095]

[0096] where X i is the cumulative sum of the i-th neuron in the current state. For the state where the cumulative sum of neurons is less than 0, s i Assigned to low level, the corresponding neuron state is +1. For the state where the neuron cumulative sum is greater than 0, s i The assigned value is high, and the corresponding neuron state is -1.

[0097] If the neuron is in the iterative update state, the iteration continues until a stable energy state or energy state distribution is obtained, that is, the cumulative sum X1, X2, ..., X1 after each iteration is calculated. 10 The value after activation is the same as the previous value of neurons X1, X2, ..., X 10 The values ​​s1,s2,…,s 10 All the same.

[0098] The output result of FPGA is stable at s1 high level, s2 low level, s3 high level, s4 high level, s7 low level, s6 low level, s7 high level, s8 low level, s9 high level, s 10 Low level, because in FPGA, high level represents the state of -1, low level represents the neuron state of +1. That is, the hardware solver is stable at the result s1=-1,s2=+1,s3=-1,s4=-1,s5=+1,s6=+1,s7=-1,s8=+1,s9=-1,s 10 = + 1. By using the enumeration method in Matlab to verify, the solution output by the hardware solver is the theoretical maximum cut of the maximum cut problem, which means that the hardware solver has the potential to solve combinatorial optimization problems such as maximum cut.

[0099] The continuous-time digital Ising model hardware solver in the present invention can not only solve the minimum energy problem and the maximum cut problem of the ferromagnetic Ising model and realize the function of associative memory, but also solve other combinatorial optimization problems such as the traveling salesman problem and the graph coloring problem.

[0100] The present invention only provides an embodiment based on an FPGA platform, but it is obvious that other digital circuit platforms or mixed analog and digital platforms can be used for implementation, such as building circuits based on platforms such as breadboards or multi-purpose soldering boards, designing dedicated digital integrated circuits, or building continuous-time digital hardware solvers based on other electrical or optical logic.

[0101] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above and that the invention can be embodied in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered in all respects as illustrative and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. It is intended that all variations within the meaning and range of equivalents of the claims be embraced herein, and any reference signs in the claims should not be construed as limiting the claims to which they relate.

[0102] In addition, it should be understood that although this specification is described in terms of implementation methods, not every implementation method contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other implementation methods that can be understood by those skilled in the art.

Claims

1. A continuous-time digital Ising model hardware solver based on combinational logic, characterized in that: include: The data initialization module, state control module, neuron update module and neuron activation module are all implemented by digital logic circuits; The neuron update module and the neuron activation module constitute the neuron; the continuous time digital Ising model hardware solver includes neurons , the weight coefficient between neurons is ,in For neurons and The weight coefficient between ; The state value of the neuron Indicates the neurons The activation state of The state value of the neuron is accumulated and summed through the neuron update module, which is the synaptic connection function. The neuron activation module activates the accumulated sum and feeds the new state value of the neuron back to the neuron update module through the state control module to iteratively update the state value of the neuron. Data initialization module: used to initialize the state value of neurons, the weight coefficients between neurons, and the variable bias corresponding to each neuron, and output them to the neuron update module; State control module: The control signal enables the state control module to operate in initialization mode or block iterative update mode. When the state control module operates in initialization mode, the state values ​​of neurons, the weight coefficients between neurons, and the variable biases corresponding to neurons all maintain their initialization values. When the state control module operates in block iterative update mode, it can selectively update the state values ​​of some neurons while keeping the state values ​​of the remaining neurons unchanged, or update the state values ​​of all neurons. Neuron Update Module: The neuron update module is composed of combinational logic circuits. The weight coefficients between neurons are input by the data initialization module. The interaction relationship weight matrix composed of these weight coefficients represents the circuit connection relationship between the corresponding neurons. The corresponding circuit structure is generated through the circuit connection relationship. When the neuron is in the iterative update state, the neuron update module can obtain the cumulative sum of the neuron in the current neuron state. Neuron activation module: The neuron activation module is composed of combinational logic circuits; the activation function is used to perform nonlinear activation on the accumulated sum of neurons in the current neuron state. , obtain the new state value of the neuron; When the state value of any neuron in the continuous-time digital Ising model hardware solver changes, the state values ​​of other neurons in the iterative update state are immediately updated to obtain the new state value of the neuron; according to the signal of the state control module, the neuron in the iterative update state accepts the new state value of the neuron, and the neuron in the hold state does not receive the new state value of the neuron and remains at the original state value; the state values ​​of all neurons are numerically updated until all neuron state values ​​are stable, and a stable energy state or energy state distribution is obtained; the solution corresponding to the state value of each neuron in the stable energy state or energy state distribution is the optimal solution or suboptimal solution to the problem to be solved; The updating process of the neural network composed of neurons is the process in which the energy value of the total energy state of the neural system automatically decreases; the energy value of the total energy state of the neural system The expression is: ， Indicates the The current state value of a neuron, Indicates the A variable bias is added to each neuron; during the neuron state update process, the energy value decreases spontaneously, causing the result to converge to the global energy minimum point or close to the energy minimum point; The absolute value of the injection can be gradually reduced in a time sequence The sequence affects the update of the corresponding neuron state value by changing the size of the accumulated sum, so that the result jumps out of the local optimal point.

2. The continuous-time digital Ising model hardware solver based on combinational logic according to claim 1, characterized in that: The weight coefficient is stored in a register array, and the data initialization module can configure the value of the weight coefficient; the interaction relationship weight matrix is ​​a symmetric matrix or an asymmetric matrix; the value of the weight coefficient can be set to any integer or floating point type.

3. The continuous-time digital Ising model hardware solver based on combinational logic according to claim 1, characterized in that: The activation function in the neuron update process is the sum of neurons in any form The function for nonlinear activation is determined by the type of problem being solved.

4. The continuous-time digital Ising model hardware solver based on combinational logic according to claim 1, characterized in that: When the state control module operates in the block iterative update mode, it can selectively update the state values ​​of some neurons while keeping the state values ​​of the remaining neurons unchanged, or update the state values ​​of all neurons, specifically including: The state value of the neuron is updated continuously in blocks and is not controlled by a clock. That is, when the neuron is in the update state, it is updated continuously and is affected by the inherent noise and different delays of the circuit. The dynamic response of the network can be changed by configuring the buffer delay. The updating or maintaining of the state values ​​of different neurons is controlled by latches; The latch corresponding to the neuron in the update state receives the voltage signal input by the neuron activation module. The neuron loop is continuous, the input and output are connected, and the corresponding neuron loop is in iterative update; The latch corresponding to the neuron in the hold state does not receive the voltage signal input by the neuron activation module, the neuron loop is disconnected, and the state value of the neuron is obtained by the last iterative update and output by the latch.

5. The continuous-time digital Ising model hardware solver based on combinational logic according to claim 1, characterized in that: The continuous-time digital Ising model hardware solver is used to solve the minimum energy problem of the ferromagnetic Ising model. neurons Represent the corresponding spin nodes, weight coefficients Represents the interaction between spin nodes, and the activation function in the neuron update process adopts function, and finally obtain the spin node state value at the lowest energy of the ferromagnetic Ising model corresponding to the stable energy state, thereby solving the lowest energy problem of the ferromagnetic Ising model.

6. The continuous-time digital Ising model hardware solver based on combinational logic according to claim 1, characterized in that: The continuous-time digital Ising model hardware solver is used to realize the associative memory function. neurons Different value combinations of represent possible memory modes. Represents the strength of the interneuron connection determined by the memory reference model, and the activation function in the neuron update process adopts Function, according to different initial test modes, the network eventually stabilizes to the corresponding benchmark mode, realizing the function of network associative memory.

7. The continuous-time digital Ising model hardware solver based on combinational logic according to claim 1, characterized in that: The continuous-time digital Ising model hardware solver is used to solve the maximum cut problem. neurons Represent the corresponding vertices, Represents the interaction between vertices. Neurons are updated in blocks according to a certain order. The activation function in the update process adopts The function is inverted, and the final neuron state value corresponds to the vertex state value of the optimal solution or suboptimal solution of the maximum cut problem, thereby solving the maximum cut problem.

8. The continuous-time digital Ising model hardware solver based on combinational logic according to claim 1, characterized in that: When the neuron is in the iterative update mode, the neuron update module can obtain the cumulative sum of the neuron in the current neuron state, specifically including: The neuron state value Perform matrix operations with weight matrices and compare them with neurons The corresponding bias By adding the numbers in the adder, we get The cumulative sum of neurons , any neuron state value Related to the state values ​​of all neurons, The cumulative sum of neurons in the current neuron state as follows: + ； Indicates the The variable bias corresponding to each neuron.

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