Chip defect detection and optimization system based on knowledge graph reasoning

By using a chip defect detection and optimization system based on knowledge graph reasoning, combined with scanning probe microscopy and the YOLOv8 model, a knowledge graph is constructed for intelligent analysis and optimization. This solves the problems of low efficiency and insufficient defect prediction in traditional detection methods, and achieves efficient and accurate chip defect detection and process optimization.

CN119671776BActive Publication Date: 2025-11-07JIANGSU UNIV
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202411826640.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-12
Publication Date
2025-11-07
Estimated Expiration
2044-12-12

AI Technical Summary

Technical Problem

Existing chip defect detection methods rely on manual inspection and basic testing methods, which are inefficient and have the risk of missed or false detections. They cannot meet the needs of high-performance integrated circuits and lack the ability to predict and optimize defects in the chip manufacturing process.

Method used

A chip defect detection and optimization system based on knowledge graph reasoning is adopted, including a chip defect detection module, a data storage and knowledge graph construction module, a reasoning analysis module, and a feedback optimization module. Through technologies such as scanning probe microscopy, YOLOv8 target detection model, knowledge graph generation and Bayesian algorithm, and long short-term memory network, high-precision detection of chip defects and optimization of process parameters are achieved.

Benefits of technology

It achieves high-precision and intelligent chip defect detection, reduces defects in the processing, improves production efficiency and process optimization, reduces costs, and enhances the stability and reliability of the production line.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119671776B_ABST
    Figure CN119671776B_ABST
Patent Text Reader

Abstract

The application discloses a chip defect detection and optimization system based on knowledge graph reasoning, which comprises a chip defect detection module, a data storage and knowledge graph construction module, an inference analysis module and a feedback optimization module; the system is used for defect root cause analysis and production process optimization based on a knowledge reasoning system, and a feedback optimization module generates process optimization suggestions based on inference results, and a production process is optimized in real time through an automatic process adjustment system and a self-adaptive feedback controller, so that the optimization measures can effectively reduce the occurrence of defects. Through the closed loop of defect detection, knowledge reasoning and process optimization, the system can realize early warning of defects, root cause analysis and automatic adjustment of process parameters, and significantly improve the quality and efficiency of the chip production process.
Need to check novelty before this filing date? Find Prior Art

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of machine vision, and particularly relates to a chip defect detection and optimization system based on knowledge graph reasoning. BACKGROUND

[0002] With the rapid development of the semiconductor industry, chip defect detection is a key link to ensure product quality. Traditional defect detection methods rely on manual inspection and basic testing methods, which are not only inefficient, but also have a high risk of missed detection and false detection, and cannot meet the increasingly stringent demand for high-performance integrated circuits. Some research has applied deep learning technology to chip defect detection. These algorithms significantly improve the accuracy and efficiency of detection through automatic feature extraction and complex image data processing. For example, researchers have developed high-precision detection systems using advanced models such as the YOLO series and Faster R-CNN, which can process massive amounts of detection information in real time.

[0003] However, existing technologies are more focused on chip defect detection and classification, and can only solve problems such as chip defect detection accuracy and efficiency. How to reduce defects in the processing of products, optimize process parameters, equipment materials, and other issues in the chip manufacturing process to reduce chip defects and predict future problems is a technical problem that needs to be solved. SUMMARY

[0004] To solve the problems in the prior art, the application provides a chip defect detection and optimization system based on knowledge graph reasoning, which uses a chip defect detection module, a data storage and knowledge graph construction module, an inference analysis module, and a feedback optimization module to predict chip defects and predict future problems, and optimize process parameters, equipment materials, and other issues in the chip manufacturing process to reduce chip defects.

[0005] The technical solution adopted by the application is as follows:

[0006] A chip defect detection and optimization system based on knowledge graph reasoning, comprising: a chip defect detection module, a data storage and knowledge graph construction module, an inference analysis module, and a feedback optimization module.

[0007] The chip defect detection module comprises a scanning probe microscope SPM, an image processing unit, and a YOLOv8 target detection model. The scanning probe microscope SPM scans the surface of the chip to obtain image data. The image processing unit extracts defect features from the image data. The YOLOv8 target detection model identifies the defect features and outputs defect data.

[0008] The data storage and knowledge graph construction module comprises a data storage system, a data preprocessing and standardization unit, and a knowledge graph generation engine; the data storage system is used to store defect data output by the chip defect detection module and picture data, process data, and historical defect records of the chip manufacturing process; the data preprocessing and standardization unit pre-processes the data of the data storage system; and the knowledge graph generation engine constructs a knowledge graph of the chip manufacturing based on the pre-processed data.

[0009] The inference analysis module comprises a knowledge inference engine and a fault diagnosis model; the knowledge inference engine uses a Bayesian algorithm to calculate a probability value between two nodes that are associated with each other in the knowledge graph; and the fault diagnosis model uses a long short-term memory network (LSTM) to take the knowledge graph probability data sequence obtained by the knowledge inference engine as an input of the LSTM network and uses the LSTM network to predict a root cause of a defect or a prediction result of a device fault.

[0010] The feedback optimization module comprises a process optimization suggestion generator and an automatic process adjustment system; the process optimization suggestion generator generates system optimization suggestions according to the root cause of the defect predicted by the fault diagnosis model; and the automatic process adjustment system receives the system optimization suggestions generated by the process optimization suggestion generator and automatically adjusts process parameters of the production line.

[0011] Further, the data storage and knowledge graph construction module is further provided with a knowledge updating and management system, which maps newly detected defects or process improvements to the knowledge graph; and the knowledge graph is automatically updated as new data continuously enters.

[0012] Further, the data storage and knowledge graph construction module is further provided with a result visualization module,

[0013] Further, the feedback optimization module is further provided with an adaptive feedback controller, which captures process parameters in the production line in real time, detects abnormal process parameters or potential quality problems, processes feedback data immediately, and analyzes whether the process parameters need to be adjusted.

[0014] Further, the feedback optimization module is further provided with a process optimization effect evaluator, which comprehensively evaluates the influence of the optimization measures on the occurrence of defects in the production process by comparing new detection data and historical data.

[0015] Further, the image processing unit performs edge detection and morphological analysis on the image data to preliminarily screen potential defect areas in the chip image data.

[0016] Further, the image processing unit performs Gaussian filtering processing and image enhancement processing on the image.

[0017] Further, the defect data output by the YOLOv8 target detection model includes the category of the defect, the confidence and the position information of the defect on the chip.

[0018] Further, the data in the data preprocessing and standardization unit are sequentially cleaned, preprocessed and standardized.

[0019] Further, a knowledge graph of chip manufacturing is constructed using a Neo4j graph database management system.

[0020] The beneficial effects of the present application are:

[0021] (1) The chip defect detection module has the advantages of high precision, high efficiency and intelligence. The scanning probe microscope (SPM) can obtain chip surface topography data with nanoscale resolution, ensuring accurate capture of tiny defects. The image processing unit quickly extracts key defect features, significantly improving data processing efficiency. Combined with the powerful real-time recognition ability of the YOLOv8 target detection model, it can quickly classify and locate multiple types of defects, realize the full-process automation from data acquisition to defect output, and greatly improve the quality control level and production efficiency in the chip manufacturing process.

[0022] (2) The data storage and knowledge graph construction module integrates comprehensive data storage, efficient data preprocessing and standardization capabilities, can integrate detection defect data and historical records, and ensure data consistency. Based on the knowledge graph generation engine and Neo4j graph database, the chip manufacturing knowledge graph is dynamically constructed and real-time updated, and the correlation between defects and processes is intuitively displayed. At the same time, complex relationship data is easy to understand, supporting intelligent knowledge management and analysis, helping chip manufacturing optimization and decision support.

[0023] (3) The reasoning analysis module combines Bayesian algorithm and LSTM network, has strong causal reasoning and time series analysis ability. Through the knowledge reasoning engine, the probability relationship between nodes in the knowledge graph is accurately calculated, and potential defect associations are mined. The fault diagnosis model uses LSTM to learn time series data deeply, which can predict the root cause of defects or equipment failure, improve the accuracy and foresight of diagnosis. The overall module realizes intelligent analysis and prediction of complex manufacturing processes, helps to quickly locate the problem source, and provides scientific basis for process optimization and equipment maintenance.

[0024] (4) The feedback optimization module has real-time, self-adaptability and closed-loop optimization capabilities. Through the process optimization suggestion generator, the fault diagnosis results are converted into explicit optimization suggestions to ensure the pertinence of the optimization measures; the automatic process adjustment system realizes the automatic adjustment of the process parameters of the production line to improve the response speed and efficiency; the adaptive feedback controller monitors the process parameters of the production line in real time, quickly identifies abnormalities and dynamically adjusts to enhance the stability and robustness of the system; the process optimization effect evaluator quantifies the actual effect of the optimization measures by comparing the detection data to provide a scientific basis for continuous improvement. The overall module forms an intelligent and dynamic closed-loop optimization process, which significantly reduces the defect rate and improves the production efficiency.

[0025] The system has efficient and accurate defect identification capability, comprehensive data integration capability, intelligent causal reasoning and real-time optimization capability, which greatly reduces the cost of chip processing and improves the efficiency of problem diagnosis and the effect of process optimization. Through the synergistic effect of each module, an efficient and intelligent solution is provided for the problem of defects in the chip manufacturing process. BRIEF DESCRIPTION OF DRAWINGS

[0026] Figure 1 is a flow chart of a chip defect detection and optimization system based on knowledge graph reasoning of the present application;

[0027] Figure 2 is a structure diagram of each module of the present application;

[0028] Figure 3 is a detection effect diagram of the YOLOv8 target detection model;

[0029] Figure 4 is a knowledge graph visualization schematic diagram; DETAILED DESCRIPTION

[0030] In order to make the purpose, technical scheme and advantages of the present application clearer, the present application will be further described in detail below in combination with the drawings and examples. It should be understood that the specific examples described herein are only used to explain the present application and do not limit the present application.

[0031] As shown in Figure 1 A chip defect detection and optimization system based on knowledge graph reasoning, the system uses a chip defect detection module, a data storage and knowledge graph construction module, an inference analysis module and a feedback optimization module to optimize the process parameters, equipment and material problems in the chip manufacturing process, thereby reducing chip defects in the processing process and predicting future problems.

[0032] As shown in Figure 2As shown, the chip defect detection module is composed of a scanning probe microscope (SPM), an image processing unit, and a YOLOv8 target detection model. The scanning probe microscope (SPM) scans the chip surface with high precision, generating image data with nanoscale resolution; the image processing unit performs image denoising, enhancement, and defect feature extraction on the image data. The YOLOv8 target detection model identifies the defect features and outputs the location, type, and confidence of the defects. Specifically as follows:

[0033] (1) The scanning probe microscope (SPM) uses a very small probe with a tip radius in the nanometer range, which scans the sample surface. The interaction between the probe and the sample surface causes the probe to produce slight displacement, which is accurately measured to generate a three-dimensional image of the surface topography; the probe moves along the sample surface in a grid pattern, and when the probe approaches a specific area of the surface, the local characteristics of the surface (such as height or local charge distribution) will cause the probe position to shift slightly or vibrate. This displacement can be regulated by a feedback system to maintain a relatively stable distance between the probe tip and the sample surface. The SPM device uses a feedback control system (such as a piezoelectric device) to maintain a constant distance between the probe and the surface. When the probe's displacement sensor detects a slight change in displacement, the feedback system immediately adjusts the probe's position to restore it to the preset distance. This feedback signal directly reflects the surface topography and other local physical characteristics. The probe displacement data is recorded in real time to generate a dataset containing the height information of the probe at each point, and the computer forms a three-dimensional image of the sample surface based on these datasets.

[0034] (2) Image Processing Unit This module is responsible for pre-processing and enhancing the high-resolution images acquired from the scanning probe microscope to improve the performance of the subsequent detection model. The module first applies a Gaussian filter to the image to reduce random noise while preserving the edge information of the image. Since the defect areas can be subtle and have low contrast, the image processing unit enhances the brightness and contrast of the image using methods such as contrast stretching and histogram equalization, making the potential defect areas more clear. To distinguish between defects and normal areas, the image processing unit uses the Canny edge detection algorithm to extract the edges of the chip surface structure. Edge detection highlights structural changes in the image, revealing potential defects such as cracks, depressions, or protrusions on the surface. After preliminary edge detection, some errors or incomplete edges may be obtained. Through morphological operations such as erosion, dilation, opening, and closing, the processing unit further refines the edge information, eliminating non-key noise edges to retain clear and continuous defect outlines. After extracting the defect edges, morphological analysis is used to segment and label potential defect areas in the image. Using methods such as dilation and closing, adjacent edge pixels are connected to form complete area blocks from isolated defect areas, allowing for subsequent detection. The processing unit further filters potential defect areas by analyzing their morphological features such as shape, size, location, and outline. Certain morphological areas, such as sharp edges or abnormal geometric shapes, can indicate surface defects such as cracks, pores, impurities, etc. After edge detection and morphological analysis, the system automatically extracts regions of interest (ROI) that may contain potential defect information. The system labels these ROIs to allow subsequent more detailed detection models to focus on these areas, avoiding searching the entire image. After labeling potential defect areas, the image processing unit can perform local contrast enhancement and detail optimization on these areas. Using image sharpening techniques, the boundaries of the defect areas are further highlighted, making it easier for subsequent models to detect potential defects.

[0035] (3) The YOLOv8 target detection model is composed of a backbone network module, a feature fusion module, and a detection head module. The backbone network uses convolutional neural network layers to gradually extract low-level to high-level features in the input image. By layer-by-layer convolution of the image, the backbone network effectively captures the edge, shape, and texture information of the defect area, enabling the model to identify tiny defect features. The low-level features in the backbone network are responsible for capturing fine edges and textures, while the high-level features capture more abstract patterns. By combining features from different layers, the model can obtain more rich feature representations, enabling it to better perceive the boundaries and structures of defects. In the feature fusion module, the FPN architecture is used to fuse features from different scales. The feature pyramid network in YOLOv8 is mainly used to integrate multi-scale features and enhance the model's multi-scale perception ability to identify defects of different sizes. Through upsampling and downsampling of feature maps of different scales, the feature fusion module can identify larger and smaller defects. In identifying the "DIE_BROKEN" defect with a larger area, the down-sampled features help the model capture the overall shape, while for the "DIE_CRACK" defect with fine cracks, the up-sampled features provide detailed contours. The detection head is responsible for classifying the categories of each target region (such as "DIE_BROKEN", "DIE_CRACK", and "DIE_INK") and predicting the bounding box of each defect. Through bounding box regression, the detection head can output the precise location of the defect, providing specific coordinates of the detection region. The detection head also assigns a confidence score to the detection result, indicating the model's trust in the detected defect. In this model, a training weight is set, which is trained using 1177 different defect data to identify defects in the processing of optoelectronic chips and output defect information. For example Figure 3 , the effect diagram of three chip defect types detected by the detection model, the three chip defect types are "DIE_BROKEN", "DIE_CRACK", and "DIE_INK", and the effect diagram indicates the category and confidence of the defect. The rectangular box on the diagram indicates the location of the defect on the chip.

[0036] As shown in Figure 2 , the data storage and knowledge graph construction module mainly consists of a data storage system, a data preprocessing and standardization unit, a knowledge graph generation engine, a knowledge update and management system, and a result visualization module.

[0037] (1) The data storage system uses a SQL database to store defect data output by the chip defect detection module, as well as image data, process data, and historical defect records of the chip manufacturing process.

[0038] (2) The data preprocessing and standardization unit cleans, preprocesses, and standardizes the data from the data storage system to ensure that data from different sources can be formatted and integrated.

[0039] (2.1) Data cleaning includes removing duplicate records, filling missing values, and unifying formats.

[0040] Since the same defect will be repeatedly detected in the preparation process of the chip, in order to reduce the workload and avoid repeated analysis of the same defect, it is necessary to remove the multiple repeated records of the same defect detected. The DISTINCT keyword in SQL is used to remove duplicate records.

[0041] Since data may be missing during data cleaning, the mean value is used to fill in the missing data at the missing data. For example, for the missing value in field x, the mean filling formula is as follows:

[0042]

[0043] Where x i is the data filled with missing values, mean is the mean function, n is the number of non-missing values in field x, and x j represents the non-missing values of field x.

[0044] Next, the Z-score is used to identify outliers, and if it is an outlier, it needs to be standardized,

[0045] According to the following formula, the outliers are identified, and if | z | > 3, it is considered that the value is an outlier.

[0046]

[0047] Where z represents the Z-score of the data; x represents a value in the data; u is the mean of field x; is the standard deviation of field x.

[0048] According to the following formula, the outliers are standardized.

[0049]

[0050] Where x is the current outlier, min(X) is the minimum value in the data, max(X) is the maximum value in the data, and x' is the result of the standardization.

[0051] For the encoding of categorical variables, One-Hot Encoding is implemented by creating multiple binary features. For the values "red", "green", "blue" in the category variable "color", three new columns (e.g. is_red, is_green, is_blue) can be generated. For the date format, it is unified to the format YYYY-MM-DD. At the same time, ensure the consistency of numerical data types. In addition, text fields need to remove extra spaces and unify case.

[0052] After the above data preprocessing and standardization processing, the real-time collected data and historical data are fused according to the common key field using the JOIN operation of SQL, to ensure the consistency and integrity of the data; lay a solid foundation for subsequent analysis and modeling.

[0053] (3) Knowledge graph generation engine, based on the data in the SQL database after data preprocessing and standardization processing, use Neo4j graph database management system to construct the knowledge graph of chip manufacturing. The process flow, equipment parameters, historical defects and material properties, etc. are taken as nodes, such as "etching", "equipment A", "silicon", "fracture" and so on; the relationship between nodes as edge, such as "use", "cause" and so on; the data structure is structured into triple form, represented as "node1, relationship, node2", used to represent the association between process flow, equipment parameters, historical defects and material properties, etc., such as "equipment A etching process", "etching process causes fracture defect" and so on. Based on the triple form of data, nodes and relationships are created in Neo4j, and the knowledge graph of chip manufacturing is constructed, as shown in Figure 4 .

[0054] (4) Knowledge update and management system, maintain the dynamic updating ability of knowledge graph, ensure that newly detected defects or process improvements can be reflected in the knowledge graph in real time. For newly detected defects or process improvements, map them to the corresponding nodes and edges in the knowledge graph. With the continuous entry of new data, the knowledge graph will be automatically updated, ensuring that each new piece of information can be accurately incorporated into the existing knowledge structure, forming a complete and real-time knowledge network.

[0055] (5) Result visualization module, as shown in Figure 4As shown, the result visualization module displays the causes of different defects and their related attributes through graphical nodes and edges, so that users can intuitively understand the complex fault diagnosis process. In this visualization method, each node represents a key entity, such as equipment, process steps, materials, defect types, etc., and each edge represents the relationship or interaction between these entities. In this way, users can clearly see how defects are triggered by different factors, as well as the nature and attributes of the defects themselves. Users can further view detailed information of the nodes by clicking on them, such as the time of failure, process steps, material properties, or equipment status, etc. This graph-based display method can help users quickly identify which factors may be the root cause of the defect. In addition, the related attributes of the defect are also displayed through the attribute values of the nodes. For example, the severity, frequency, and possible risk level of the defect are presented as additional information of the nodes. Through nodes of different colors, sizes, or shapes, users can easily understand the nature of the defect and its impact.

[0056] As shown in FIG. 1, the system comprises a data collection module, a result visualization module, and a reasoning analysis module. Figure 2

[0057] (1) Knowledge reasoning engine: Based on the constructed knowledge graph, the knowledge reasoning engine uses Bayesian algorithm to perform probabilistic reasoning on the relationship between two nodes that are associated with each other in the knowledge graph, and calculates the probability value between each node, which can reflect the likelihood of occurrence. If a node corresponds to a "defect", the probability value can be used to represent the probability of defect occurrence, and the root cause of the defect can also be deduced. Through Bayesian reasoning, the present application can quantitatively analyze the correlation between complex process parameters and defects. When new process data or defect information is input, the system can automatically update the node probabilities in the network, thereby real-time deducing the possible root causes of the defect. This reasoning process can help engineers and operators quickly identify the source of the problem, reduce the time and cost of manual analysis, and improve the accuracy and efficiency of fault diagnosis.

[0058] ​(2) The fault diagnosis model combines long short-term memory network (LSTM) with knowledge graph to predict potential defect root causes and equipment problems. LSTM is a special type of recurrent neural network (RNN) that is good at processing and analyzing data with time series characteristics, and can capture the long and short term dependencies of process parameters and equipment states over time. First, the LSTM network is trained with learning process parameters, equipment operating conditions and historical defect data; the knowledge graph probability data obtained in the knowledge reasoning engine is input into the LSTM network for prediction; and the prediction results of the root causes that may lead to defects or equipment failures are output. By combining long short-term memory network (LSTM) with knowledge graph, the fault diagnosis model not only realizes efficient fault prediction, but also plays a key role in equipment management and production optimization, helping enterprises improve the stability and reliability of production lines. By combining these data with the information in the knowledge graph, LSTM uses traditional time series data and takes advantage of the rich process and defect correlation information in the knowledge graph to improve the accuracy of prediction.

[0059] As shown in Figure 2 The feedback optimization module consists of a process optimization suggestion generator, an automatic process adjustment system, an adaptive feedback controller, and a process optimization effect evaluator.

[0060] (1) The process optimization suggestion generator generates system optimization suggestions based on the root causes of defects predicted by the fault diagnosis model. System optimization suggestions are targeted adjustment measures proposed by the suggestion generator to improve product quality and production efficiency in response to detected defects and their causes. For example, if non-standard pattern transfer occurs during lithography, the process optimization suggestion generator will suggest adjusting the lithography exposure time to improve exposure effect; if over-etching or under-etching is found during etching, the suggestion generator will recommend modifying etching process parameters (such as gas flow, etching time, etc.) to ensure more accurate etching process. In addition, the generator can also suggest optimizing the purity of materials or replacing specific batches of materials based on the characteristics of materials in the production process. For example, if the reasoning analysis result indicates that the lack of material purity has led to defects in the final product, the generator will suggest optimizing the purity of materials or selecting higher quality raw materials to eliminate or reduce defects caused by materials. The process optimization suggestion generator adjusts based on historical data and existing problems, and combines changes in the production environment for real-time feedback to ensure that the optimization suggestions always fit the current production status. By automatically generating these specific and actionable optimization suggestions, the generator helps engineers identify problems more quickly and take appropriate improvement measures, thereby improving the stability and product quality of the overall production process.

[0061] (2) The automatic process adjustment system receives the system optimization suggestions generated by the process optimization suggestion generator and automatically adjusts the process parameters of the production line through integration with the manufacturing execution system (MES). Based on the system optimization suggestions, the system can adjust key process parameters that affect product quality, such as temperature, pressure, time, etc., effectively reducing the occurrence of potential defects and optimizing the production process. In practical applications, through close integration with the MES, the automatic process adjustment system can directly affect the operation of the production line and provide dynamic adjustment throughout the production process. This automatic adjustment function can achieve real-time optimization of the production line, reducing the need for human intervention, while ensuring the stability and efficiency of the production process under changing conditions.

[0062] (3) The adaptive feedback controller real-time production process changes, based on the feedback of defect detection data dynamic adjustment process settings, to avoid further expansion of the problem. The controller integrates various sensors, vision detection systems and data acquisition technologies to capture real-time fluctuations in process parameters (such as temperature, pressure, speed, etc.) and the occurrence of quality defects. Once an anomaly or potential quality problem is detected, the controller will immediately process the feedback data and analyze whether process parameters need to be adjusted. Through this closed-loop feedback mechanism, the system can intervene in time before the problem expands, ensuring the stability of the production process and ultimately improving product quality.

[0063] (4) The process optimization effect evaluator evaluates the impact of optimization measures on defect occurrence in the production process after the implementation of the optimization measures. The new detection data comes from the actual production process after process adjustment, while the historical data is the production data before adjustment, containing defect information and production parameters under the original process. First, the evaluator compares the number, type and distribution of defects to determine whether the optimization measures have effectively reduced defect occurrence; second, the evaluator analyzes the changes in related process parameters such as temperature, pressure, speed, etc., and further verifies whether the optimization suggestions have achieved the expected effect by comparing the parameter fluctuations before and after optimization; finally, the evaluator gives feedback on the effect of adjustment based on the comparison results. If the optimization measures fail to achieve the expected effect, the evaluator will feedback to the automatic process adjustment system to help it make further adjustments and optimizations. In this way, through a closed-loop feedback mechanism, the process optimization effect evaluator ensures the effectiveness of optimization measures and continuously promotes defect reduction and process level improvement.

[0064] The above examples are only used to illustrate the design idea and characteristics of the present application, and the purpose is to enable those skilled in the art to understand the content of the present application and implement it, and the protection scope of the present application is not limited to the above examples. Therefore, any equivalent changes or modifications made in accordance with the principles and design ideas disclosed by the present application are within the scope of protection of the present application.

Claims

1. A chip defect detection and optimization system based on knowledge graph reasoning, characterized in that, The chip defect detection module, the data storage and knowledge graph construction module, the reasoning analysis module, and the feedback optimization module are included. The chip defect detection module includes a scanning probe microscope (SPM), an image processing unit, and a YOLOv8 target detection model. The SPM scans the surface of a chip to obtain image data. The image processing unit extracts defect features from the image data. The YOLOv8 target detection model identifies the defect features and outputs defect data. The data storage and knowledge graph construction module includes a data storage system, a data preprocessing and standardization unit, and a knowledge graph generation engine. The data storage system stores defect data output by the chip defect detection module and image data, process data, and historical defect records of the chip manufacturing process. The data preprocessing and standardization unit preprocesses the data in the data storage system. The knowledge graph generation engine constructs a knowledge graph of the chip manufacturing process based on the preprocessed data. The reasoning analysis module includes a knowledge reasoning engine and a fault diagnosis model. The knowledge reasoning engine uses a Bayesian algorithm to calculate the probability value between two nodes that are related in the knowledge graph. The fault diagnosis model uses a long short-term memory (LSTM) network. The knowledge graph probability data sequence obtained by the knowledge reasoning engine is input into the LSTM network. The LSTM network predicts the root cause of the defect or the prediction result of the equipment failure. The feedback optimization module includes a process optimization suggestion generator and an automatic process adjustment system. The process optimization suggestion generator generates system optimization suggestions based on the root cause of the defect predicted by the fault diagnosis model. The automatic process adjustment system receives the system optimization suggestions generated by the process optimization suggestion generator and automatically adjusts the process parameters of the production line. The data storage and knowledge graph construction module also includes a knowledge update and management system. New defects or process improvements are mapped into the knowledge graph. The knowledge graph is automatically updated as new data continuously enters.

2. The chip defect detection and optimization system based on knowledge graph reasoning according to claim 1, wherein, The data storage and knowledge graph construction module also includes a result visualization module. 3.The chip defect detection and optimization system based on knowledge graph reasoning of claim 1, wherein, The feedback optimization module also includes an adaptive feedback controller. The adaptive feedback controller captures process parameters in real time and detects abnormal process parameters or potential quality problems. The adaptive feedback controller immediately processes the feedback data and analyzes whether the process parameters need to be adjusted.

4. The chip defect detection and optimization system based on knowledge graph reasoning of claim 1, wherein, The feedback optimization module also includes a process optimization effect evaluator. The process optimization effect evaluator compares new detection data with historical data to comprehensively evaluate the impact of optimization measures on the occurrence of defects in the production process.

5. The chip defect detection and optimization system based on knowledge graph reasoning of claim 1, wherein, The image processing unit performs edge detection and morphological analysis on the image data to preliminarily screen potential defect areas in the chip image data.

6. The chip defect detection and optimization system based on knowledge graph reasoning of claim 1, wherein, The image processing unit performs Gaussian filtering and image enhancement processing on the image.

7. The chip defect detection and optimization system based on knowledge graph reasoning of claim 1, wherein, The defect data output by the YOLOv8 target detection model includes the category, confidence, and location information of the defect on the chip.

8. The chip defect detection and optimization system based on knowledge graph reasoning of claim 1, wherein, The data preprocessing and standardization unit sequentially performs cleaning, preprocessing, and standardization processing on the data.

9. The chip defect detection and optimization system based on knowledge graph reasoning of claim 1, wherein, ​ 10. The chip defect detection and optimization system based on knowledge graph reasoning of claim 1, wherein, A knowledge graph for chip manufacturing is constructed using a Neo4j graph database management system.

Citation Information

Patent Citations

  • Chip appearance defect automatic detection method, electronic equipment and storage medium

    CN117011260A

  • Rapid defect detection method for chip packaging process

    CN119027383A