Method, system, apparatus and storage medium for monitoring during production of ic carriers
Through image processing and distance calculation methods, the problem of low efficiency in uniformity detection of IC substrate electroplating layers is solved, and efficient and high-precision electroplating layer uniformity judgment is achieved to ensure the quality of IC substrates.
Patent Information
- Application Number
- CN202411656249.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-19
- Publication Date
- 2025-10-17
- Estimated Expiration
- 2044-11-19
AI Technical Summary
Existing technologies are inefficient and complex in detecting the uniformity of electroplating layers on IC substrates, making it difficult to meet the requirements of efficient and high-precision detection.
By acquiring IC substrate image data, image contour extraction and contour center point calculation are performed. Combined with contour discrete point fitting and distance calculation, the actual and standard distances of the electroplating layer are calculated, and the electroplating uniformity coefficient is obtained to judge the uniformity of the electroplating layer.
It achieves efficient and accurate detection of the electroplating layer of the IC substrate, improves the detection accuracy and efficiency, and ensures that the uniformity of the electroplating layer meets the quality control requirements.
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Figure CN119671948B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of IC carrier board, and particularly relates to a monitoring method, system, device and storage medium in the production process of an IC carrier board. BACKGROUND
[0002] In the electroplating process of IC carrier board production, the uniformity of the electroplated layer directly affects the performance and quality of the finished product, so ensuring the uniformity of the electroplated layer is an important link in the production process. With the continuous development of IC carrier board technology, the requirements for the quality of the electroplated layer are becoming more and more stringent, especially in terms of the uniformity of the thickness and distribution of the electroplated layer. Traditional detection methods mainly rely on manual detection or basic image processing methods, but these methods often have difficulty in accurately identifying the small defects of the electroplated layer, and are low in efficiency.
[0003] In the prior art, the uniformity of the electroplated layer of the IC carrier board is usually detected by using simple image processing techniques such as edge detection and region gray scale analysis. However, these methods have many shortcomings in practical application. First, traditional image processing methods often require a large amount of computing resources and time, are complex to operate and low in detection efficiency, and are not suitable for efficient production environments. Second, when identifying the subtle defects of the electroplated layer, such methods are easily affected by image noise and process errors, and the accuracy of the detection results is not high. In addition, existing detection schemes lack in-depth analysis of contour features, and are difficult to provide effective data support to judge the uniformity of the electroplated layer, so they cannot meet the needs of high-precision detection of IC carrier boards.
[0004] In summary, in the production process of IC carrier boards, the uniformity of the electroplated layer directly affects the quality and performance of the product. However, the existing technology has problems of low efficiency and complex detection when detecting the uniformity of the electroplated layer, and cannot meet the needs of efficient and high-precision detection. These problems limit the quality control in the manufacturing process of IC carrier boards. SUMMARY
[0005] The present application provides a monitoring method, system, device and storage medium in the production process of an IC carrier board to solve the problems of low efficiency and complex detection in the prior art.
[0006] In a first aspect, to solve the above technical problems, the present application provides a monitoring method in the production process of an IC carrier board, comprising:
[0007] obtaining IC carrier board image data;
[0008] performing image contour extraction according to the IC carrier board image data to obtain an IC carrier board electroplated layer contour;
[0009] performing contour center point calculation according to the IC carrier board electroplated layer contour to obtain a contour center point;
[0010] According to the contour center point, contour discrete point fitting is performed to obtain a contour discrete point set;
[0011] According to the contour discrete point set, first electroplating layer distance calculation is performed to obtain an electroplating layer actual distance;
[0012] According to the contour discrete point set, second electroplating layer distance calculation is performed to obtain an electroplating layer standard distance;
[0013] According to the electroplating layer actual distance and the electroplating layer standard distance, electroplating uniformity system calculation is performed to obtain an electroplating uniformity coefficient, and whether the IC carrier electroplating layer is uniform is judged according to the electroplating uniformity coefficient.
[0014] Preferably, the image contour extraction according to the IC carrier image data to obtain the IC carrier electroplating layer contour comprises: performing edge detection operation according to the IC carrier image data to obtain IC carrier electroplating layer preliminary contour information;
[0015] According to the IC carrier electroplating layer preliminary contour information, morphological filtering processing is performed to obtain a pure IC carrier electroplating layer contour;
[0016] According to the pure IC carrier electroplating layer contour, hole filling processing is performed to obtain the IC carrier electroplating layer contour.
[0017] Preferably, the contour center point calculation according to the IC carrier electroplating layer contour to obtain the contour center point comprises:
[0018] According to the IC carrier electroplating layer contour, minimum enclosing region determination is performed to obtain an IC carrier electroplating layer contour minimum enclosing region;
[0019] According to the IC carrier electroplating layer contour minimum enclosing region, geometric calculation is performed to obtain a preliminary contour center point;
[0020] According to the preliminary contour center point, accurate adjustment is performed to obtain the contour center point.
[0021] Preferably, the contour discrete point fitting according to the contour center point to obtain the contour discrete point set comprises:
[0022] According to the contour center point, boundary limitation is performed to obtain a contour minimum region boundary;
[0023] According to the contour minimum region boundary, discrete point collection is performed to obtain an initial discrete point set; wherein the initial discrete point set is , greater than 2;
[0024] According to the initial discrete point set, an ellipse parameter fitting is performed to obtain an ellipse parameter equation; wherein the ellipse parameter equation is:
[0025]
[0026] wherein, 、 、 、 、 and are ellipse fitting parameters;
[0027] According to the ellipse parameter equation, a least square error calculation is performed to obtain optimal fitting parameters;
[0028] According to the optimal fitting parameters, an equation is constructed to obtain a best fitting ellipse equation;
[0029] According to the best fitting ellipse equation, a discrete point generation is performed to obtain a contour discrete point set; wherein the contour discrete point set is , greater than 2.
[0030] Preferably, the first plating layer distance calculation according to the contour discrete point set to obtain the actual plating layer distance comprises:
[0031] According to the contour discrete point set, a first distance calculation is performed to obtain an individual first distance, wherein the individual first distance is the distance from each discrete point in the contour discrete point set to the contour center point;
[0032] According to the individual first distance, a first distance summary is performed to obtain a first distance;
[0033] According to the contour discrete point set, a second distance calculation is performed to obtain an individual second distance, wherein the individual second distance is the distance between any two discrete points;
[0034] According to the individual second distance, a second distance summary is performed to obtain a second distance;
[0035] According to the first distance and the second distance, an actual plating layer distance calculation is performed to obtain an actual plating layer distance;
[0036] The actual plating layer distance is calculated by the following formula:
[0037]
[0038] wherein, is the actual plating layer distance, is the first distance, that is, the contour discrete point set each point to the contour center point distance summary value, is the second distance, i.e. the distance summary value between any two discrete points in the profile discrete point set.
[0039] Preferably, the second plating layer distance calculation according to the profile discrete point set to obtain a standard plating layer distance comprises: performing a third distance calculation according to the individual first distance to obtain an individual third distance.
[0040] The individual third distance is calculated by the following formula:
[0041]
[0042] wherein, is the individual third distance, is the individual first distance, is the IC carrier board lateral resolution.
[0043] The third distance summary is performed according to the individual third distance to obtain the standard plating layer distance.
[0044] Preferably, the IC carrier board lateral resolution is calculated by the following formula to obtain the IC carrier board lateral resolution:
[0045] wherein, is the IC carrier board lateral resolution, is the actual physical width of the IC carrier board, is the number of pixels of the IC carrier board in the lateral direction in the image data of the IC carrier board, is the image calibration factor, is the material thermal expansion coefficient, is the difference between the ambient temperature and the calibration temperature.
[0046] Preferably, the plating uniformity system calculation according to the actual plating layer distance and the standard plating layer distance to obtain a plating uniformity coefficient and judging whether the IC carrier board plating layer is uniform according to the plating uniformity coefficient comprises: calculating the plating uniformity coefficient by the following formula:
[0047]
[0048] wherein, K is the plating uniformity coefficient, is the actual plating layer distance, is the standard plating layer distance,
[0049] The predetermined threshold value comparison is performed according to the plating uniformity coefficient to judge whether the IC carrier board plating layer is uniform.
[0050] In a second aspect, the present application provides a monitoring system in the production process of an IC carrier board, comprising:
[0051] a data acquisition module configured to acquire IC carrier board image data;
[0052] a contour extraction module configured to perform image contour extraction according to the IC carrier board image data to obtain an IC carrier board electroplating layer contour;
[0053] a contour center point calculation module configured to perform contour center point calculation according to the IC carrier board electroplating layer contour to obtain a contour center point;
[0054] a discrete point fitting module configured to perform contour discrete point fitting according to the contour center point to obtain a contour discrete point set;
[0055] an electroplating layer actual distance calculation module configured to perform first electroplating layer distance calculation according to the contour discrete point set to obtain an electroplating layer actual distance;
[0056] an electroplating layer standard distance calculation module configured to perform second electroplating layer distance calculation according to the contour discrete point set to obtain an electroplating layer standard distance;
[0057] a uniformity judgment module configured to perform distance comparison according to the electroplating layer actual distance and the electroplating layer standard distance to obtain an electroplating uniformity coefficient, and to judge whether the IC carrier board electroplating layer is uniform according to the electroplating uniformity coefficient.
[0058] In a third aspect, the present application further provides an electronic device, comprising a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein the processor executes the computer program to implement the monitoring method in the IC carrier board production process according to any one of the above.
[0059] In a fourth aspect, the present application further provides a computer readable storage medium, comprising a stored computer program, wherein the computer program controls a device where the computer readable storage medium is located to execute the monitoring method in the IC carrier board production process according to any one of the above when the computer program runs.
[0060] Compared with the prior art, the present application has the following beneficial effects: obtaining IC carrier board image data; performing image contour extraction according to the IC carrier board image data to obtain an IC carrier board electroplating layer contour; performing contour center point calculation according to the IC carrier board electroplating layer contour to obtain a contour center point; performing contour discrete point fitting according to the contour center point to obtain a contour discrete point set; performing first electroplating layer distance calculation according to the contour discrete point set to obtain an electroplating layer actual distance; performing second electroplating layer distance calculation according to the contour discrete point set to obtain an electroplating layer standard distance; performing electroplating uniformity system calculation according to the electroplating layer actual distance and the electroplating layer standard distance to obtain an electroplating uniformity coefficient, and judging whether the IC carrier board electroplating layer is uniform according to the electroplating uniformity coefficient. The method realizes efficient detection of the uniformity of the IC carrier board electroplating layer, and improves the detection precision and efficiency. BRIEF DESCRIPTION OF DRAWINGS
[0061] Figure 1 is a monitoring method flow diagram provided by the first embodiment of the present application in the production process of an IC carrier board.
[0062] Figure 2 is a monitoring system structure diagram provided by the second embodiment of the present application in the production process of an IC carrier board. DETAILED DESCRIPTION
[0063] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.
[0064] With reference to Figure 1 The first embodiment of the present application provides a monitoring method in the production process of an IC carrier board, comprising the following steps:
[0065] S11, obtaining IC carrier board image data;
[0066] S12, performing image contour extraction according to the IC carrier board image data to obtain an IC carrier board electroplating layer contour;
[0067] S13, performing contour center point calculation according to the IC carrier board electroplating layer contour to obtain a contour center point;
[0068] S14, performing contour discrete point fitting according to the contour center point to obtain a contour discrete point set;
[0069] S15, performing first electroplating layer distance calculation according to the contour discrete point set to obtain an electroplating layer actual distance;
[0070] S16, performing second plating layer distance calculation according to the contour discrete point set, to obtain a standard plating layer distance;
[0071] S17, performing plating uniformity system calculation according to the actual plating layer distance and the standard plating layer distance, to obtain a plating uniformity coefficient, and judging whether the IC carrier plating layer is uniform according to the plating uniformity coefficient.
[0072] In step S11, IC carrier image data is acquired.
[0073] It is worth mentioning that in order to accurately acquire the image data of the IC carrier, the IC carrier is first carefully placed at a specified position of the object table, ensuring that the plane of the IC carrier is completely fitted with the surface of the object table, avoiding any inclination or displacement. The object table should have sufficient stability and horizontal adjustment function to ensure that the carrier remains stationary during the entire image acquisition process. After fixing the carrier, the angle, brightness and distance of the LED light source are adjusted to achieve uniform and sufficient illumination. Generally, the light source should be set at a suitable inclination angle to minimize reflected light interference and provide appropriate scattered light to make the plating layer surface features clearly visible in the image.
[0074] After the lighting is set, the image acquisition device is started, and the high-resolution camera is aimed at the IC carrier, ensuring that the lens optical axis of the camera is perpendicular to the surface of the carrier to avoid image distortion due to angle problems. According to the size and resolution requirements of the IC carrier, the focal length and aperture of the camera are adjusted to obtain the best image clarity and contrast. The appropriateness of the camera parameters can be confirmed by previewing the image to ensure that the edges and details are clearly visible.
[0075] Next, set the acquisition parameters in the control software of the image acquisition device, including the resolution, frame rate and color mode of the image. The resolution selection needs to meet the detail requirements of subsequent processing, and in general, the higher the resolution, the richer the details captured. The acquisition device also has automatic exposure, automatic white balance and other functions, according to the ambient light, if necessary, manually adjust the exposure time and white balance to ensure that the image of the plating layer is uniform in brightness and color.
[0076] During the acquisition process, ensure that the external environment is stable to avoid the influence of vibration and stray light on the acquisition quality. To ensure the stability of continuous images, consider adding anti-vibration equipment or adjusting the environmental lighting. After starting the image acquisition, the device transmits the acquired images to the computer or storage device for real-time monitoring to observe whether the image data quality meets the requirements. If blurred or uneven brightness is found, the acquisition should be paused immediately and the parameters of the camera and light source should be adjusted until the acquisition effect reaches the expected standard.
[0077] After all the image acquisition is completed, the image data is stored in a secure storage device, and the number of each image and the corresponding acquisition parameters are recorded to ensure that the acquisition conditions can be traced back during subsequent analysis. The entire process ensures that the IC carrier board image data has a high degree of clarity and consistency, providing reliable data support for the subsequent image contour extraction and analysis stage.
[0078] In step S12, according to the IC carrier board image data, image contour extraction is performed to obtain the IC carrier board electroplating layer contour; including:
[0079] According to the IC carrier board image data, an edge detection operation is performed to obtain the preliminary contour information of the IC carrier board electroplating layer;
[0080] According to the preliminary contour information of the IC carrier board electroplating layer, morphological filtering processing is performed to obtain the pure IC carrier board electroplating layer contour;
[0081] According to the pure IC carrier board electroplating layer contour, hole filling processing is performed to obtain the IC carrier board electroplating layer contour.
[0082] It is worth noting that after obtaining the image data of the IC carrier board, in order to accurately extract the contour information of the electroplating layer, a series of image processing steps are needed. First, an edge detection operation is performed to identify the preliminary contour of the electroplating layer in the image. In edge detection, commonly used operators include Sobel operator and Canny operator. Sobel operator is a gradient-based edge detection method that determines the edge by calculating the gray level change of each pixel point in the image in the horizontal and vertical directions. Specifically, Sobel operator uses two 3x3 convolution kernels to perform convolution operations on the image in X and Y directions to obtain gradient images in two directions, and calculates the gradient size to obtain the final edge image. Canny operator is a more advanced edge detection method that not only calculates the gradient, but also includes noise filtering and non-maximum suppression operations. Canny operator determines the edge position by finding the local maximum value in the gradient image, and sets double thresholds to suppress weak edges and only keep significant edges. This method performs well in detail extraction and is suitable for complex electroplating layer edge detection. Through the operation of these edge detection operators, a binary image is generated, with white areas representing the detected electroplating layer edge and black areas representing the background.
[0083] Next, to further purify the profile information of the electroplated layer, morphological filtering is performed on the preliminary edge image. Morphological filtering includes two operations: erosion and dilation. First, the erosion operation is applied to remove isolated noise points in the edge image. This is done by defining a structure element (usually a 3x3 square template) around each pixel and scanning it. The principle of the erosion operation is that if all the pixels within the template are white, the pixel remains unchanged; otherwise, the pixel will be set to black. In this way, small noise points can be effectively removed, making the edge profile clearer. Subsequently, the dilation operation is performed to restore the profile after the erosion process to repair the broken or missing parts of the edge. The steps of the dilation operation are similar to erosion, but as long as the structure element contains a white pixel, the center pixel will be set to white. Through the dilation operation, the continuity of the profile boundary is enhanced, and finally a pure IC board electroplated layer profile is obtained.
[0084] After obtaining the pure profile, hole filling processing is performed to eliminate all holes or unclosed areas within the electroplated layer profile, ensuring the integrity of the profile area. The purpose of hole filling is to ensure that all internal pixels belong to the electroplated layer area, so as not to interfere with subsequent analysis by the hole area. Common hole filling methods include 4-neighbor and 8-neighbor algorithms. The 4-neighbor algorithm considers the adjacent pixels in the up, down, left and right four directions of each pixel, while the 8-neighbor algorithm extends to eight directions (including four diagonal directions). In actual operation, the image is usually scanned from the profile edge to determine whether there is a closed area, and the pixels within the area are filled with white. The 4-neighbor algorithm is suitable for relatively simple hole structures, while the 8-neighbor algorithm can handle more complex closed areas.
[0085] Through the above edge detection, morphological filtering and hole filling operations, the complete profile information of the IC board electroplated layer without noise and holes is finally obtained, providing high-precision basic data for subsequent electroplated layer thickness calculation and uniformity detection. This detailed processing process ensures the accuracy of the image data and lays a solid foundation for subsequent detection and analysis.
[0086] In step S13, according to the IC board electroplated layer profile, the profile center point is calculated to obtain the profile center point; including:
[0087] According to the IC board electroplated layer profile, the minimum enclosing region is determined to obtain the minimum enclosing region of the IC board electroplated layer profile;
[0088] According to the minimum enclosing region of the IC board electroplated layer profile, the geometric calculation is performed to obtain the preliminary profile center point;
[0089] According to the preliminary profile center point, the accurate adjustment is performed to obtain the profile center point.
[0090] It is worth noting that in order to accurately obtain the profile center point of the IC carrier electroplated layer, first, the minimum enclosing region of the extracted IC carrier electroplated layer profile is determined. The minimum enclosing region refers to a rectangular frame that can completely enclose the electroplated layer profile with the smallest area. The specific operation is to calculate the extreme points in the horizontal and vertical directions according to the boundary point data of the electroplated layer profile, including the leftmost, rightmost, uppermost and lowermost boundary positions. These boundary positions determine the minimum rectangular region enclosing the electroplated layer profile, thereby obtaining the minimum enclosing region of the electroplated layer. This rectangular region provides a boundary reference for the subsequent calculation of the profile center point.
[0091] After obtaining the minimum enclosing region, the next step is to perform geometric calculation based on this region to determine the preliminary profile center point. Geometric calculation is achieved by calculating the intersection point of the diagonals of the minimum enclosing rectangle. Specifically, according to the coordinates of the top-left corner and bottom-right corner of the minimum enclosing region, as well as the coordinates of the bottom-left corner and top-right corner, the diagonals are connected, and the intersection point of the diagonals is calculated. This intersection point is the geometric center point of the minimum enclosing region. This geometric center point serves as the preliminary profile center point, providing an initial reference position for subsequent precise adjustment.
[0092] After obtaining the preliminary profile center point, further precise adjustment is performed to ensure the accuracy of the final profile center point. Precise adjustment is based on the profile shape and symmetry around the preliminary profile center point. In the specific operation, by analyzing the density distribution of the profile boundary around the preliminary profile center point, the position of the center point is adjusted so that it is located as close as possible to the center of symmetry of the profile shape, and finally the precise profile center point is obtained. This adjustment step can effectively correct the deviation caused by irregular profile shape, thereby ensuring that the finally calculated profile center point position accurately reflects the true geometric center of the electroplated layer.
[0093] In step S14, according to the profile center point, profile discrete point fitting is performed to obtain a profile discrete point set; including:
[0094] According to the profile center point, boundary limitation is performed to obtain a profile minimum region boundary;
[0095] According to the profile minimum region boundary, discrete point collection is performed to obtain an initial discrete point set; wherein the initial discrete point set is , greater than 2;
[0096] According to the initial discrete point set, elliptical parameter fitting is performed to obtain an elliptical parameter equation; wherein the elliptical parameter equation is:
[0097]
[0098] wherein, 、 、 、 、 and are ellipse fitting parameters;
[0099] According to the ellipse parameter equation, a least square error calculation is performed to obtain optimal fitting parameters;
[0100] According to the optimal fitting parameters, an equation is constructed to obtain an optimal fitting ellipse equation;
[0101] According to the optimal fitting ellipse equation, discrete points are generated to obtain a contour discrete point set; wherein the contour discrete point set is , greater than 2.
[0102] It is worth noting that in order to obtain the contour discrete point set of the electroplated layer of the IC carrier, first, based on the obtained contour center point, a boundary is limited to obtain the minimum area boundary of the contour. The boundary limitation refers to determining a closed boundary region with the contour center point as the starting point to ensure that the region completely surrounds the electroplated layer contour of the IC carrier. In specific operation, the size of the boundary is determined by measuring the minimum and maximum distances from the contour center point to the boundary point, so that the minimum area boundary can accurately cover the electroplated layer boundary, thereby avoiding the collection range exceeding the actual contour of the electroplated layer.
[0103] After determining the minimum area boundary, the next step is to collect discrete points on this boundary to obtain an initial discrete point set. Discrete point collection is to select several uniformly distributed points from the minimum area boundary of the contour, and the set of these points is denoted as wherein, greater than 2. During the collection process, the coordinates of each discrete point are selected on the boundary by uniform spacing or a specific algorithm to ensure that the collected points can fully represent the shape of the electroplated layer contour. The data of these discrete points will serve as the input data basis for subsequent ellipse fitting.
[0104] After completing the discrete point collection, the initial discrete point set is used for ellipse parameter fitting. The purpose of ellipse parameter fitting is to establish an ellipse equation that describes the contour through the discrete point data. According to the discrete point set, an ellipse parameter equation is constructed wherein, 、 、 、 、 and are fitting parameters; to determine these parameters, least square error calculation is adopted, and the best fitting parameters are found by solving the minimization of error. In the specific calculation, the discrete point coordinates are brought into the equation, the distance error between the actual discrete points and the fitted ellipse is calculated, the sum of its error squares is calculated, and the parameter value is adjusted by least square iteration to minimize the overall error. This process can accurately determine the ellipse parameters, and ensure that the fitted ellipse fits the actual profile of the electroplated layer as much as possible.
[0105] After obtaining the best ellipse fitting parameters, they are substituted into the ellipse parameter equation to finally construct the best fitting ellipse equation describing the profile. This ellipse equation not only completely describes the geometric shape of the IC carrier electroplated layer, but also provides a theoretical basis for generating the profile discrete point set. Finally, based on the best fitting ellipse equation, new discrete points are generated along the fitted ellipse to obtain the final profile discrete point set, denoted as wherein, is greater than 2. These discrete points can accurately reflect the actual profile shape of the electroplated layer and provide accurate basic data for subsequent electroplated layer uniformity and quality analysis.
[0106] In step S15, according to the profile discrete point set, a first electroplated layer distance calculation is performed to obtain the electroplated layer actual distance; including:
[0107] According to the profile discrete point set, a first distance calculation is performed to obtain a single first distance, wherein the single first distance is the distance from each discrete point in the profile discrete point set to the profile center point;
[0108] According to the single first distance, a first distance summary is performed to obtain a first distance;
[0109] According to the profile discrete point set, a second distance calculation is performed to obtain a single second distance, wherein the single second distance is the distance between any two discrete points;
[0110] According to the single second distance, a second distance summary is performed to obtain a second distance;
[0111] According to the first distance and the second distance, an electroplated layer actual distance calculation is performed to obtain the electroplated layer actual distance;
[0112] The electroplated layer actual distance is calculated by the following formula:
[0113]
[0114] wherein, is the electroplated layer actual distance, is the first distance, i.e. the distance from each point in the profile discrete point set to the profile center point, The second distance is the sum of the distances between any two discrete points in the profile discrete point set.
[0115] It is worth noting that in order to accurately calculate the actual distance of the IC carrier plate electroplated layer, first, the profile discrete point set is subjected to first distance calculation. The purpose of this step is to measure the distance from each discrete point to the profile center point, which is called "individual first distance". In specific operation, each discrete point is selected from the discrete point set in turn, and the Euclidean distance calculation method is used to determine the distance from the point to the profile center point. The Euclidean distance calculation method is a commonly used distance calculation method for measuring the straight-line distance between two points. For each discrete point, the distance calculation formula is the square root of the sum of the squares of the coordinates of the two points, that is, wherein, , is the coordinate of the discrete point, , is the coordinate of the profile center point. Through this method, the straight-line distance value from each discrete point to the center point can be accurately obtained. After the calculation of all discrete points is completed, these "individual first distances" are added one by one to obtain the sum of the "first distances", denoted as The first distance sum value can provide the distribution characteristic information of the center point for subsequent analysis.
[0116] After the first distance calculation is completed, the second distance calculation is performed, that is, the distance between any two discrete points in the discrete point set is determined, which is called "individual second distance". In specific operation, all pairwise combinations of point pairs are generated from the discrete point set, and the Euclidean distance formula is used to calculate the straight-line distance between two discrete points for each pair. Specifically, the coordinates of a pair of discrete points are selected , and the calculation formula is Through this process, the distance values between all pairs of points in the discrete point set can be obtained. These "individual second distances" are added one by one to obtain the sum of the "second distances", denoted as The second distance sum value reflects the expansibility and uniformity of the internal distribution of the discrete point set on the profile.
[0117] After obtaining the "first distance" and "second distance", the actual distance of the electroplated layer is calculated. The actual distance calculation formula is as follows wherein, is the actual distance of the electroplated layer, is the first distance, that is, the sum of the distances from each point in the profile discrete point set to the profile center point, The second distance is the sum of the distances between any two discrete points in the profile discrete point set. This formula provides the distribution characteristics of the electroplated layer through the ratio of the first distance and the second distance. The final calculated actual distance of the electroplated layer provides accurate data basis for subsequent electroplated layer uniformity judgment, supporting quality monitoring in the production process of IC carrier boards.
[0118] In step S16, a second electroplated layer distance calculation is performed according to the profile discrete point set to obtain an electroplated layer standard distance; including:
[0119] According to the individual first distance, a third distance calculation is performed to obtain an individual third distance;
[0120] The individual third distance is calculated by the following formula:
[0121]
[0122] wherein, the individual third distance is D3, the individual first distance is D1, the IC carrier board lateral resolution is R,
[0123] According to the individual third distance, a third distance summary is performed to obtain the electroplated layer standard distance.
[0124] The IC carrier board lateral resolution R is calculated by the following formula:
[0125]
[0126] wherein, the IC carrier board lateral resolution is R, the actual physical width of the IC carrier board is W, the number of pixels of the IC carrier board in the lateral direction in the image data of the IC carrier board is N, the image calibration factor is F, the material thermal expansion coefficient is a, the difference between the ambient temperature and the calibration temperature is ΔT.
[0127] In order to accurately calculate the standard distance of the electroplated layer of the IC carrier board, first, the "individual third distance" is calculated based on the "individual first distance" of the discrete point to the profile center point. This step is completed by the formula wherein D3 represents the individual third distance of each discrete point, D1 is the individual first distance of the discrete point to the profile center point, is the lateral resolution of the IC carrier board. The purpose of calculating the individual third distance is to convert each individual first distance into a unit value based on the lateral resolution, so that different discrete point distances can be compared on a unified scale. This standardization process ensures the accuracy and consistency of the calculation results, laying the foundation for subsequent standard distance calculation.
[0128] In specific operations, the individual first distance of each discrete point is selected in turn and divided by the lateral resolution to obtain the corresponding individual third distance . After the individual third distance of all discrete points is calculated one by one, they are summarized and added up to obtain the total, i.e. the "third distance summary". This summary result is the standard distance of the electroplated layer. The electroplated layer standard distance reflects the distance distribution characteristics of the discrete point set under ideal conditions, which provides important reference data for subsequent electroplated layer uniformity judgment.
[0129] In the process of calculating the individual third distance, the lateral resolution is a key conversion parameter that ensures the accuracy of the standardization of each individual first distance. The lateral resolution is calculated by the following formula:
[0130]
[0131] wherein, wherein, is the actual physical width of the IC carrier board, i.e. the lateral dimension of the electroplated layer in the actual space, to ensure that the lateral scale conforms to the true physical size; is the number of pixels of the IC carrier board in the lateral direction in the image data, reflecting the resolution capability of the image, so that each physical unit distance can be converted into a pixel unit. is the image calibration factor obtained by calibration of the camera equipment, used to correct the image scaling or distortion during the imaging process. The thermal expansion coefficient of the material represents the expansion rate of the material when the temperature changes, ensuring the accuracy of the size at different temperatures; is the difference between the ambient temperature and the calibration temperature, used to correct the size change of the material due to temperature change. This formula not only ensures the accurate lateral resolution, but also effectively adapts to the influence of temperature fluctuations in different environments on the size of the IC carrier board, thereby ensuring stable and reliable image size conversion under different working conditions.
[0132] Through the above steps, the standard distance of the electroplated layer calculated provides an accurate measurement reference for subsequent electroplated layer quality analysis, ensuring that reliable data support can be obtained during the uniformity detection process.
[0133] In step S17, a plating uniformity system calculation is performed based on the actual distance of the plating layer and the standard distance of the plating layer to obtain a plating uniformity coefficient, and whether the IC substrate plating layer is uniform is determined based on the plating uniformity coefficient; including:
[0134] The plating uniformity coefficient is calculated using the following formula:
[0135]
[0136] Among them, K is the electroplating uniformity coefficient, is the actual distance of the electroplating layer, is the standard distance of the electroplating layer,
[0137] According to the electroplating uniformity coefficient, a predetermined threshold comparison is performed to determine whether the electroplating layer of the IC substrate is uniform.
[0138] It is worth mentioning that in order to judge the uniformity of the electroplating layer of the IC substrate, the electroplating uniformity coefficient is first calculated based on the actual distance of the electroplating layer and the standard distance. The electroplating uniformity coefficient reflects the ratio between the actual electroplating layer thickness and the ideal thickness to quantify whether the distribution of the electroplating layer is uniform. The specific calculation formula
[0139] in, is the electroplating uniformity coefficient, is the actual distance of the electroplating layer, that is, the sum of the actual thickness of the electroplating layer calculated by the contour discrete point set and the contour center point, reflecting the actual distribution of the electroplating layer. The standard distance of the electroplating layer represents the thickness of the electroplating layer under ideal conditions, which is summarized based on the standardized distance between the discrete points and the center point. The electroplating uniformity coefficient is calculated by the ratio of the actual distance to the standard distance. , you can intuitively understand to what extent the actual thickness of the electroplating layer is close to the ideal uniform thickness.
[0140] In deriving the plating uniformity coefficient After that, the next The value is compared with the preset uniformity threshold to determine whether the uniformity of the electroplating layer meets the requirements. The specific threshold is set according to the quality control standard of the production and the allowable deviation of the thickness of the electroplating layer. For example, in the production of precision IC substrates, the uniformity requirement is high, and a higher threshold is set to ensure that the thickness distribution of the electroplating layer is uniform. For example, the threshold can be set to 0.90, 0.95, 1.05, etc., which is not limited in the present invention. If the electroplating uniformity coefficient If the value is greater than or equal to the set threshold, it indicates that the deviation between the actual plating thickness and the standard thickness is within the allowable range, and the uniformity of the plating layer meets the production quality requirements. If the ratio is less than the set threshold value, it indicates that there is a significant deviation between the actual thickness and the ideal thickness, the plating layer uniformity is not up to standard, and the thickness is uneven or distributed unevenly, and the production process needs to be further checked or appropriate adjustment measures are taken.
[0141] The entire uniformity judgment step provides an intuitive detection means by comparing the ratio of the actual thickness and the ideal thickness with the preset standard, to ensure that the plating layer meets the design standard and quality control requirements in thickness and distribution.
[0142] Referring to Figure 2 The second embodiment of the present application provides a monitoring system in an IC carrier plate production process, comprising:
[0143] A data acquisition module is configured to acquire IC carrier plate image data.
[0144] A contour extraction module is configured to perform image contour extraction according to the IC carrier plate image data to obtain an IC carrier plate plating layer contour.
[0145] A contour center point calculation module is configured to perform contour center point calculation according to the IC carrier plate plating layer contour to obtain a contour center point.
[0146] A discrete point fitting module is configured to perform contour discrete point fitting according to the contour center point to obtain a contour discrete point set.
[0147] A plating layer actual distance calculation module is configured to perform first plating layer distance calculation according to the contour discrete point set to obtain a plating layer actual distance.
[0148] A plating layer standard distance calculation module is configured to perform second plating layer distance calculation according to the contour discrete point set to obtain a plating layer standard distance.
[0149] A uniformity judgment module is configured to perform distance comparison according to the plating layer actual distance and the plating layer standard distance to obtain a plating uniformity coefficient, and to judge whether the IC carrier plate plating layer is uniform according to the plating uniformity coefficient.
[0150] It should be noted that the monitoring system in an IC carrier plate production process provided by the embodiments of the present application is used to execute all process steps of the monitoring method in an IC carrier plate production process of the above-mentioned embodiments, and the working principles and beneficial effects of the two are one-to-one correspondence, so they will not be repeated here.
[0151] The embodiment of the present application further provides an electronic device. The electronic device comprises a processor, a memory, and a computer program stored in the memory and executable on the processor, for example, a monitoring program in an IC carrier production process. The processor implements the steps in each of the above-mentioned monitoring method embodiments in the IC carrier production process when executing the computer program, for example Figure 1 Alternatively, the processor implements the functions of each module / unit in each of the above-mentioned devices when executing the computer program, for example, the uniformity judgment module.
[0152] For example, the computer program can be divided into one or more modules / units, which are stored in the memory and executed by the processor to complete the present application. The one or more modules / units can be a series of computer program instruction segments capable of completing a specific function, which are used to describe the execution process of the computer program in the electronic device.
[0153] The electronic device can be a desktop computer, a notebook computer, a palm computer, a smart tablet and the like. The electronic device can comprise, but is not limited to, a processor, a memory. Those skilled in the art can understand that the above-mentioned components are only examples of the electronic device and do not constitute a limitation on the electronic device, and the electronic device can comprise more or fewer components than the above-mentioned components, or combine certain components or different components, for example, the electronic device can further comprise an input / output device, a network access device, a bus and the like.
[0154] The processor can be a central processing unit (CPU), and can also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor and the like. The processor is the control center of the electronic device, and connects all parts of the electronic device through various interfaces and lines.
[0155] The memory can be used to store the computer program and / or modules, and the processor realizes various functions of the electronic device by running or executing the computer program and / or modules stored in the memory, and calling data stored in the memory. The memory can mainly include a program storage area and a data storage area, wherein the program storage area can store an operating system, at least one application required by a function (such as a sound playing function, an image playing function, etc.), and the like; and the data storage area can store data created according to the use of the mobile phone (such as audio data, a phone book, etc.), and the like. In addition, the memory can include a high-speed random access memory, and can also include a nonvolatile memory, for example, a hard disk, a memory, a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, at least one disk storage device, a flash memory device, or other volatile solid-state memory devices.
[0156] The modules / units integrated in the electronic device, if realized in the form of a software function unit and sold or used as an independent product, can be stored in a computer readable storage medium. Based on this understanding, all or part of the processes in the above-mentioned embodiment methods can also be completed by a computer program instructing related hardware, and the computer program can be stored in a computer readable storage medium. The computer program can realize the steps of the above-mentioned various method embodiments when executed by a processor. The computer program includes computer program code, which can be in the form of source code, object code, an executable file, or some intermediate form, etc. The computer readable medium can include any entity or device capable of carrying the computer program code, a recording medium, a U disk, a mobile hard disk, a magnetic disk, an optical disk, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium, etc. It should be noted that the computer readable medium can include or exclude contents according to the requirements of legislation and patent practice in a jurisdiction, for example, in some jurisdictions, according to legislation and patent practice, the computer readable medium does not include electrical carrier signals and telecommunication signals.
[0157] It should be noted that the apparatus embodiments described above are merely illustrative, and the units described as separate units can or can not be physically separate, and the units displayed as units can or can not be physical units, i.e. can be located in one place, or can be distributed to multiple network units. Part or all of the modules can be selected to achieve the purpose of the embodiment scheme according to actual needs. In addition, the connection relationship between the modules in the apparatus embodiment provided by the present application indicates that there is a communication connection between them, which can be implemented as one or more communication buses or signal lines. Those skilled in the art can understand and implement it without creative labor.
[0158] The above specific embodiments further illustrate the purpose, technical scheme and beneficial effects of the present application. It should be understood that the above description is only a specific embodiment of the present application and is not intended to limit the protection scope of the present application. It is particularly pointed out that any modification, equivalent replacement, improvement, etc. made by those skilled in the art within the spirit and principles of the present application shall be included in the protection scope of the present application.
Claims
1. A monitoring method for an IC substrate production process, characterized in that: include: Obtain IC substrate image data; Extracting image contours based on the IC substrate image data to obtain an electroplating layer contour of the IC substrate; Calculating the center point of the contour according to the electroplating layer contour of the IC substrate to obtain the contour center point; According to the contour center point, contour discrete point fitting is performed to obtain a contour discrete point set; Calculating the distance of the first electroplating layer according to the discrete point set of the contour to obtain the actual distance of the electroplating layer; Calculating the distance of the second electroplating layer according to the discrete point set of the contour to obtain a standard distance of the electroplating layer; Obtaining a plating uniformity coefficient based on a ratio of the actual distance of the electroplating layer to the standard distance of the electroplating layer, and judging whether the electroplating layer of the IC substrate is uniform based on the electroplating uniformity coefficient; The step of calculating the first electroplating layer distance based on the contour discrete point set to obtain the actual distance of the electroplating layer includes: Performing a first distance calculation based on the contour discrete point set to obtain a separate first distance, wherein the separate first distance is the distance between each discrete point in the contour discrete point set and the contour center point; Aggregating the first distances according to the individual first distances to obtain a first distance; Performing a second distance calculation based on the contour discrete point set to obtain a separate second distance, wherein the separate second distance is the distance between any two discrete points; Aggregating the second distances according to the individual second distances to obtain a second distance; Calculating the actual distance of the electroplating layer according to the first distance and the second distance to obtain the actual distance of the electroplating layer; The actual distance of the electroplating layer is calculated by the following formula: in, is the actual distance of the electroplating layer, is the first distance, that is, the summary value of the distance from each point in the contour discrete point set to the contour center point, is the second distance, that is, the summary value of the distance between any two discrete points in the contour discrete point set; The step of calculating the second electroplating layer distance based on the contour discrete point set to obtain the electroplating layer standard distance includes: Calculating a third distance based on the single first distance to obtain a single third distance; The individual third distance is calculated using the following formula: in, For the third distance alone, is the first distance alone, is the lateral resolution of the IC substrate; According to the individual third distances, the third distances are summarized to obtain the standard distance of the electroplating layer.
2. The monitoring method during the production of IC substrates according to claim 1, characterized in that: The step of extracting an image contour based on the IC substrate image data to obtain an electroplating layer contour of the IC substrate includes: Performing edge detection based on the IC substrate image data to obtain preliminary contour information of the electroplating layer of the IC substrate; Performing morphological filtering processing based on the preliminary contour information of the electroplating layer of the IC substrate to obtain a pure contour of the electroplating layer of the IC substrate; According to the outline of the electroplating layer of the pure IC substrate, hole filling processing is performed to obtain the outline of the electroplating layer of the IC substrate.
3. The monitoring method during the production process of an IC substrate according to claim 1, characterized in that: The step of calculating the center point of the contour according to the electroplating layer contour of the IC substrate to obtain the contour center point includes: Determine the minimum enclosing area according to the outline of the electroplating layer of the IC substrate to obtain the minimum enclosing area of the outline of the electroplating layer of the IC substrate; Performing geometric calculations based on the minimum enclosing area of the electroplating layer outline of the IC substrate to obtain a preliminary outline center point; Based on the preliminary contour center point, precise adjustment is performed to obtain the contour center point.
4. The method for monitoring the production process of an IC substrate according to claim 1, wherein: The step of performing contour discrete point fitting according to the contour center point to obtain a contour discrete point set includes: According to the center point of the contour, a boundary is defined to obtain the minimum area boundary of the contour; According to the minimum area boundary of the contour, discrete points are collected to obtain an initial discrete point set; wherein the initial discrete point set is , greater than 2; According to the initial discrete point set, ellipse parameter fitting is performed to obtain an ellipse parameter equation; wherein the ellipse parameter equation is: in, 、 、 、 、 and are the ellipse fitting parameters; According to the ellipse parameter equation, the least squares error calculation is performed to obtain the best fitting parameters; According to the best fitting parameters, an equation is constructed to obtain a best fitting ellipse equation; According to the best fitting ellipse equation, discrete points are generated to obtain a contour discrete point set; wherein the contour discrete point set is , Greater than 2.
5. The monitoring method during the production process of an IC substrate according to claim 1, characterized in that: The calculation formula for the lateral resolution of the IC carrier is: in, is the lateral resolution of the IC substrate, is the actual physical width of the IC carrier board, is the number of pixels in the horizontal direction of the IC carrier in the IC carrier image data, is the image calibration factor, is the thermal expansion coefficient of the material, is the difference between the ambient temperature and the calibration temperature.
6. The method for monitoring the production process of an IC substrate according to claim 1, wherein: Judging whether the electroplating layer of the IC substrate is uniform according to the electroplating uniformity coefficient includes: The plating uniformity coefficient is calculated using the following formula: Among them, K is the electroplating uniformity coefficient, is the actual distance of the electroplating layer, is the standard distance of the electroplating layer, According to the electroplating uniformity coefficient, a predetermined threshold comparison is performed to determine whether the electroplating layer of the IC substrate is uniform.
7. A monitoring system for an IC substrate production process, used to implement the monitoring method for an IC substrate production process according to claims 1-6, characterized in that: include: A data acquisition module, used to acquire IC carrier board image data; A contour extraction module, configured to extract the image contour based on the IC carrier image data to obtain the electroplating layer contour of the IC carrier; A contour center point calculation module is used to calculate the contour center point according to the contour of the electroplating layer of the IC carrier to obtain the contour center point; A discrete point fitting module is used to perform contour discrete point fitting based on the contour center point to obtain a contour discrete point set; an electroplating layer actual distance calculation module, configured to perform a first electroplating layer distance calculation based on the contour discrete point set to obtain an electroplating layer actual distance; an electroplating layer standard distance calculation module, configured to calculate the second electroplating layer distance based on the contour discrete point set to obtain the electroplating layer standard distance; The uniformity judgment module is used to compare the actual distance of the electroplating layer with the standard distance of the electroplating layer to obtain an electroplating uniformity coefficient, and judge whether the electroplating layer of the IC carrier is uniform according to the electroplating uniformity coefficient.
8. A computer-readable storage medium, characterized in that The computer-readable storage medium includes a stored computer program, wherein when the computer program is executed, the device where the computer-readable storage medium is located is controlled to execute the monitoring method in the IC substrate production process according to any one of claims 1 to 6.
Citation Information
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