Pixel driving circuit, array substrate and display device

Abstract

The invention provides a pixel driving circuit, an array substrate and a display device. According to the embodiment of the invention, the first transistor, the pixel electrode and the second transistor are sequentially connected in series, and the first transistor and the second transistor have opposite conduction types, so that a semiconductor layer in the first transistor and a semiconductor layer in the second transistor can form a Peltier pair; the pixel electrode can serve as a hot end or a cold end of a Peltier module, charge and discharge of the pixel electrode are achieved by selectively conducting the first transistor or the second transistor, and the pixel electrode can be charged or discharged by changing the direction of current flowing through the first transistor and the second transistor. The pixel electrode is used for heating or radiating liquid crystal so as to improve the display effect of the liquid crystal panel in a high-temperature or low-temperature environment.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a pixel driving circuit, an array substrate and a display device. Background Art

[0002] Liquid crystal display (LCD) has become a mainstream product in the market due to its mature technology and stable functions. The existing liquid crystal display panel generally includes an array substrate, a color filter substrate and a liquid crystal layer disposed between the array substrate and the color filter substrate.

[0003] Due to the characteristics of liquid crystal itself, when the LCD panel works at low temperature, the liquid crystal will become very viscous, so the LCD panel will have slow response speed and smearing in low temperature environment. When the operating temperature is lower than the low temperature critical value, the LCD panel will not display normally. In addition, in a high temperature environment, the liquid crystal will become transparent when the clearing point of the liquid crystal is exceeded, resulting in abnormal display. Summary of the invention

[0004] The main technical problem solved by the present application is to provide a pixel driving circuit, an array substrate and a display device to solve the problem of abnormal liquid crystal display in low or high temperature environments in the prior art.

[0005] In order to solve the above technical problems, the first technical solution provided by the present application is: to provide a pixel driving circuit, which includes:

[0006] Pixel electrode;

[0007] A transistor having a semiconductor layer; the transistor comprising a first transistor and a second transistor; the first transistor and the second transistor having opposite conductivity types;

[0008] Wherein, the first transistor, the pixel electrode and the second transistor are sequentially arranged in series;

[0009] In the display driving stage, one of the first transistor and the second transistor is turned on to discharge or charge the pixel electrode;

[0010] In the thermal management stage, the first transistor and the second transistor are both turned on, the semiconductor layer in the first transistor, the pixel electrode and the semiconductor layer in the second transistor are combined to form a Peltier module, the semiconductor layer in the first transistor and the semiconductor layer in the second transistor form a Peltier pair, and the pixel electrode serves as the hot end or the cold end of the Peltier module.

[0011] Wherein, the first end of the first transistor receives a first voltage, the second end of the first transistor is electrically connected to the pixel electrode, and the control end of the first transistor receives a first control signal;

[0012] A first terminal of the second transistor receives a second voltage, a second terminal of the second transistor is electrically connected to the pixel electrode, and a control terminal of the second transistor receives a second control signal;

[0013] In the thermal management stage, the pixel electrode is controlled to serve as a hot end or a cold end of the Peltier module by controlling the magnitude relationship between the first voltage and the second voltage;

[0014] In the display driving stage, one of the first voltage and the second voltage is a data voltage, and the other is a ground voltage.

[0015] Wherein, the first transistor is an N-type transistor, and the second transistor is a P-type transistor;

[0016] The thermal management stage includes a heating stage and a heat dissipation stage. In the heating stage, the first voltage is less than the second voltage, and the pixel electrode serves as a hot end;

[0017] In the heat dissipation stage, the first voltage is greater than the second voltage, and the pixel electrode serves as a cold end;

[0018] In the display driving stage, the first voltage is a data voltage, and the second voltage is a ground voltage; the display driving stage includes a charging stage and a discharging stage, and in the charging stage, the first transistor is turned on and the second transistor is turned off to charge the pixel electrode;

[0019] In the discharge phase, the first transistor is turned off and the second transistor is turned on to discharge the pixel electrode.

[0020] The first transistor is an oxide transistor, and the second transistor is a polysilicon transistor.

[0021] The pixel driving circuit further includes a pixel capacitor, one end of which is electrically connected to the pixel electrode, and the other end of which receives a ground voltage.

[0022] In order to solve the above technical problem, the second technical solution provided in the present application is: to provide an array substrate, which includes the above pixel driving circuit.

[0023] In order to solve the above technical problems, the third technical solution provided by the present application is: to provide a display device, which includes:

[0024] The display panel comprises a color filter substrate and an array substrate arranged opposite to each other, and a liquid crystal arranged between the color filter substrate and the array substrate; the array substrate is the above-mentioned array substrate;

[0025] The mainboard is electrically connected to the display panel to control the display of the display panel.

[0026] The display device further includes a temperature monitoring module, which is used to sense the external environment temperature and control the direction of the current flowing through the first transistor and the second transistor.

[0027] in,

[0028] The temperature monitoring module is arranged in the display panel;

[0029] or,

[0030] The temperature monitoring module is arranged in the main board;

[0031] or,

[0032] The temperature monitoring module is arranged independently from the display panel and the main board.

[0033] The transistor is located on a side of the pixel electrode away from the color film substrate, and the pixel electrode is electrically connected to the second end of the transistor through a via hole.

[0034] Beneficial effects of the present application: Different from the prior art, the present application provides a pixel driving circuit, an array substrate and a display device, wherein the pixel driving circuit includes a pixel electrode and a transistor. The transistor has a semiconductor layer. The transistor includes a first transistor and a second transistor. The first transistor and the second transistor have opposite conductivity types. The first transistor, the pixel electrode and the second transistor are sequentially arranged in series. In the display driving stage, one of the first transistor and the second transistor is turned on to discharge or charge the pixel electrode. In the thermal management stage, the first transistor and the second transistor are both turned on, and the semiconductor layer in the first transistor, the pixel electrode and the semiconductor layer in the second transistor are combined to form a Peltier module, the semiconductor layer in the first transistor and the semiconductor layer in the second transistor form a Peltier pair, and the pixel electrode serves as the hot end or cold end of the Peltier module. In the embodiment of the present application, a first transistor, a pixel electrode, and a second transistor are sequentially connected in series, and the first transistor and the second transistor have opposite conductivity types, so that the semiconductor layer in the first transistor and the semiconductor layer in the second transistor can form a Peltier pair, and the pixel electrode can serve as the hot end or the cold end of the Peltier module. The pixel electrode is charged and discharged by selectively turning on the first transistor or the second transistor, and the pixel electrode is used to heat or dissipate the liquid crystal by changing the direction of the current flowing through the first transistor and the second transistor to improve the display effect of the liquid crystal panel in a high temperature or low temperature environment. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technical workers in this field, other drawings can be obtained based on these drawings without any creative work.

[0036] Figure 1 is a structural schematic diagram of an embodiment of a pixel driving circuit provided in an embodiment of the present application;

[0037] Figure 2 is a heating schematic diagram of a Peltier module provided in an embodiment of the present application;

[0038] Figure 3 Schematic diagram of heat dissipation of the Peltier module provided in the embodiment of the present application;

[0039] Figure 4 is a structural schematic diagram of an embodiment of an array substrate provided in an embodiment of the present application;

[0040] Figure 5 is a schematic structural diagram of an embodiment of a display panel provided in an embodiment of the present application;

[0041] Figure 6is a structural schematic diagram of a first embodiment of a display device provided in an embodiment of the present application;

[0042] Figure 7 is a structural schematic diagram of a second embodiment of a display device provided in an embodiment of the present application;

[0043] Figure 8 It is a structural schematic diagram of a third embodiment of a display device provided in an embodiment of the present application.

[0044] Description of Figure Numbers:

[0045] 1. pixel driving circuit; P, pixel electrode; T, transistor; T1, first transistor; T2, second transistor; 101, Peltier module; 102, Peltier pair; C, pixel capacitor; V1, first voltage; V2, second voltage; S1, first control signal; S2, second control signal; VSS, ground voltage; 2, display panel; 100, array substrate; 10, first substrate; 20, buffer layer; 30, semiconductor layer; 31, first semiconductor layer; 32, second semiconductor layer; 40, gate Electrode insulating layer; 50, first metal layer; 51, source; 52, drain; 53, active layer; 60, insulating dielectric layer; 70, second metal layer; 71, source pad; 72, drain pad; 80, passivation layer; 90, first alignment layer; 200, color filter substrate; 201, second substrate; 202, filter; 2021, color resistance; 2022, black matrix; 203, common electrode layer; 204, second alignment layer; 300, liquid crystal; 3, mainboard; 4, temperature monitoring module; 5, display device. DETAILED DESCRIPTION

[0046] The scheme of the embodiment of the present application is described in detail below in conjunction with the drawings of the specification.

[0047] In the following description, for the purpose of explanation rather than limitation, specific details such as specific system structures, interfaces, and technologies are provided to facilitate a thorough understanding of the present application.

[0048] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technical workers in the field without making creative work are within the scope of protection of this application.

[0049] The terms "first", "second", "third" in this application are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined as "first", "second", "third" can expressly or implicitly include at least one of the features. In the description of this application, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined. In the embodiments of this application, all directional indications (such as up, down, left, right, front, back...) are only used to explain the relative position relationship, movement, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication also changes accordingly. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device comprising a series of steps or units is not limited to the steps or units listed, but optionally also includes steps or units that are not listed, or optionally also includes other steps or units inherent to these processes, methods, products or devices.

[0050] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0051] See also Figures 1 to 3 , Figure 1 is a structural diagram of an embodiment of a pixel driving circuit provided in an embodiment of the present application, Figure 2 is a heating schematic diagram of a Peltier module provided in an embodiment of the present application, Figure 3 Schematic diagram of heat dissipation of the Peltier module provided in the embodiment of the present application.

[0052] The present application provides a pixel driving circuit 1. The pixel driving circuit 1 includes a pixel electrode P and a transistor T. The transistor T has a semiconductor layer 30 (see Figure 4). The transistor T includes a first transistor T1 and a second transistor T2. The first transistor T1 and the second transistor T2 have opposite conductivity types. The first transistor T1, the pixel electrode P and the second transistor T2 are sequentially connected in series. In the display driving stage, one of the first transistor T1 and the second transistor T2 is turned on to discharge or charge the pixel electrode P. In the thermal management stage, the first transistor T1 and the second transistor T2 are both turned on, the semiconductor layer 30 in the first transistor T1, the pixel electrode P and the semiconductor layer 30 in the second transistor T2 are combined to form a Peltier module 101, the semiconductor layer 30 in the first transistor T1 and the semiconductor layer 30 in the second transistor T2 form a Peltier pair 102, and the pixel electrode P serves as the hot end or the cold end of the Peltier module 101.

[0053] In the embodiment of the present application, the first transistor T1, the pixel electrode P and the second transistor T2 are sequentially connected in series, and the first transistor T1 and the second transistor T2 have opposite conductivity types, so that the semiconductor layer 30 in the first transistor T1 and the semiconductor layer 30 in the second transistor T2 can form a Peltier pair 102, and the pixel electrode P can serve as the hot end or the cold end of the Peltier module 101. The pixel electrode P is selectively turned on to realize the charging and discharging of the pixel electrode P, and the pixel electrode P is used to heat or dissipate the liquid crystal 300 by changing the direction of the current flowing through the first transistor T1 and the second transistor T2 to improve the display effect of the liquid crystal panel in a high temperature or low temperature environment.

[0054] In the display driving stage, the pixel electrode P is used to apply voltage to change the liquid crystal 300 (see Figure 5 ) direction, thereby controlling the amount of light transmitted. The pixel electrode P defines the position of the pixel (not shown in the figure), ensuring the clarity and resolution of the image. By independently controlling the voltage or current on each pixel electrode P, precise control of a single pixel can be achieved. When a voltage is applied to a specific pixel, the liquid crystal 300 will rearrange, allowing different amounts of light to pass through, achieving grayscale changes in the image.

[0055] In the thermal management stage, the direction of the current flowing through the first transistor T1 and the second transistor T2 is changed to switch the pixel electrode P as a hot end to heat the liquid crystal 300, or to switch the pixel electrode P as a cold end to dissipate heat from the liquid crystal 300.

[0056] In the embodiment of the present application, the first transistor T1 and the second transistor T2 are designed to have opposite conductivity types, so that the first transistor T1, the pixel electrode P and the second transistor T2 arranged in series in sequence in the pixel driving circuit 1 can be combined to form a Peltier module 101, and the liquid crystal 300 can be heated or dissipated through the pixel electrode P arranged close to the liquid crystal 300, so as to improve the display effect of the liquid crystal panel in a low temperature environment or a high temperature environment, and the structure is simple and easy to implement.

[0057] The transistor T further has a first terminal and a second terminal, one of which is a source electrode 51 (see Figure 4 ), the other is a drain 52 (see Figure 4 ). In the same transistor T, the source 51 and the drain 52 have the same conductivity type.

[0058] There is no restriction on the doping ions of the source 51 and the drain 52 , and it is required to ensure that the source 51 and the drain 52 have the same conductivity type.

[0059] The transistor T may be any one of an oxide transistor, an amorphous silicon transistor, or a polysilicon transistor.

[0060] In some embodiments, the first transistor T1 is an oxide transistor, and the second transistor T2 is a polysilicon transistor.

[0061] In some embodiments, a first terminal of the first transistor T1 receives a first voltage V1 , a second terminal of the first transistor T1 is electrically connected to the pixel electrode P, and a control terminal of the first transistor T1 receives a first control signal S1 .

[0062] A first end of the second transistor T2 receives a second voltage V2 , a second end of the second transistor T2 is electrically connected to the pixel electrode P, and a control end of the second transistor T2 receives a second control signal S2 .

[0063] In the thermal management stage, the pixel electrode P is controlled to serve as a hot end or a cold end of the Peltier module 101 by controlling the magnitude relationship between the first voltage V1 and the second voltage V2 .

[0064] In the display driving stage, one of the first voltage V1 and the second voltage V2 is a data voltage, and the other is a ground voltage VSS.

[0065] In some embodiments, the pixel driving circuit 1 further includes a pixel capacitor C, one end of the pixel capacitor C is electrically connected to the pixel electrode P, and the other end of the pixel capacitor C receives a ground voltage VSS.

[0066] One of the first transistor T1 and the second transistor T2 is an N-type transistor, and the other is a P-type transistor.

[0067] Exemplarily, the first transistor T1 is an N-type transistor, and the second transistor T2 is a P-type transistor.

[0068] The thermal management stage includes a heating stage and a heat dissipation stage. In the heating stage, the first voltage V1 is less than the second voltage V2, and the pixel electrode P serves as a hot end.

[0069] In the heat dissipation stage, the first voltage V1 is greater than the second voltage V2, and the pixel electrode P serves as a cold end.

[0070] In the display driving stage, the first voltage V1 is a data voltage and the second voltage V2 is a ground voltage VSS. The display driving stage includes a charging stage and a discharging stage. In the charging stage, the first transistor T1 is turned on and the second transistor T2 is turned off to charge the pixel electrode P.

[0071] In the discharge phase, the first transistor T1 is turned off and the second transistor T2 is turned on to discharge the pixel electrode P.

[0072] Exemplarily, in the display driving stage, the first voltage V1 is a data voltage, and the second voltage V2 is a ground voltage VSS.

[0073] In the charging stage, the first control signal S1 is at a high level, controlling the first transistor T1 to be turned on, and the second control signal S2 is at a high level, controlling the second transistor T2 to be turned off, and the data voltage charges the pixel electrode P and the pixel capacitor C through the first transistor T1 for display.

[0074] In the discharge stage, the first control signal S1 is at a low level, controlling the first transistor T1 to be turned off, and the second control signal S2 is at a low level, controlling the second transistor T2 to be turned on, and the pixel electrode P is quickly discharged through the second transistor T2, which is beneficial to high-frequency display.

[0075] In the thermal management stage, the first transistor T1 , the pixel electrode P and the second transistor T2 form a closed loop.

[0076] In the heating stage, the first voltage V1 is less than the second voltage V2, and the current flows to the first transistor T1 via the second transistor T2 and the pixel electrode P in sequence. The pixel electrode P serves as a hot end to heat the liquid crystal 300 in a low temperature environment.

[0077] In the heat dissipation stage, the first voltage V1 is greater than the second voltage V2, and the current flows to the second transistor T2 via the first transistor T1 and the pixel electrode P in sequence. The pixel electrode P serves as a cold end to dissipate heat for the liquid crystal 300 in a high temperature environment.

[0078] Exemplarily, if the first transistor T1 is an N-type transistor, the semiconductor layer 30 in the first transistor T1 is an N-type semiconductor; if the second transistor T2 is a P-type transistor, the semiconductor layer 30 in the second transistor T2 is a P-type semiconductor.

[0079] When the first transistor T1 and the second transistor T2 are both turned on, the P-type semiconductor and the N-type semiconductor are connected to form a couple, namely, a Peltier pair 102. When a direct current is connected in the circuit, energy transfer can be generated.

[0080] The second end of the P-type semiconductor and the second end of the N-type semiconductor are electrically connected through the pixel electrode P. The pixel electrode P is disposed close to the liquid crystal 300. One of the first end of the N-type semiconductor and the first end of the P-type semiconductor is connected to the first voltage V1, and the other is connected to the second voltage V2, and a closed loop is formed in the thermal management stage.

[0081] In the Peltier module 101, when current flows from the N-type semiconductor to the P-type semiconductor, the first end of the P-type semiconductor and the first end of the N-type semiconductor together constitute the hot end of the Peltier module 101; the second end of the P-type semiconductor and the second end of the N-type semiconductor together constitute the cold end of the Peltier module 101.

[0082] When current flows from the P-type semiconductor to the N-type semiconductor, the first end of the P-type semiconductor and the first end of the N-type semiconductor together constitute the cold end of the Peltier module 101; the second end of the P-type semiconductor and the second end of the N-type semiconductor together constitute the hot end of the Peltier module 101.

[0083] Specifically, Figure 2 As shown, when current flows from the P-type semiconductor to the N-type semiconductor, the pixel electrode P, as the hot end of the Peltier module 101, releases heat to the liquid crystal 300 to heat the liquid crystal 300, thereby improving the problem of slow response speed and ghosting of the liquid crystal panel in a low temperature environment. Figure 3 As shown, when current flows from the N-type semiconductor to the P-type semiconductor, the pixel electrode P as the cold end of the Peltier module 101 absorbs the heat of the liquid crystal 300 to dissipate the heat of the liquid crystal 300, thereby improving the problem that the liquid crystal panel cannot display normally in a high temperature environment.

[0084] See also Figures 1 to 4 , Figure 4 It is a structural schematic diagram of an embodiment of an array substrate provided in an embodiment of the present application.

[0085] The present application provides an array substrate 100 , and the array substrate 100 includes the above-mentioned pixel driving circuit 1 .

[0086] In some embodiments, the array substrate 100 includes a first substrate 10, a buffer layer 20, a semiconductor layer 30, a gate insulating layer 40, a first metal layer 50, an insulating dielectric layer 60, a second metal layer 70, a passivation layer 80, a pixel electrode P and a first alignment layer 90 which are stacked in sequence.

[0087] The first substrate 10 can be a hard substrate, such as glass, quartz, sapphire, etc.; the first substrate 10 can also be a flexible substrate, such as polyimide (PI), polyethylene terephthalate (PET), etc. There is no restriction on the material of the first substrate 10, and it can be selected according to actual needs. The first substrate 10 is a transparent substrate.

[0088] In a direction parallel to the first substrate 10, there are multiple semiconductor layers 30. The semiconductor layer 30 is used to form a source 51, a drain 52 and an active layer 53 of the transistor T. Both ends of the semiconductor layer 30 are doped with ions of the same conductivity type to form the source 51 and the drain 52, respectively, and the undoped portion in the middle of the semiconductor layer 30 forms the active layer 53. That is, the active layer 53 is located between the source 51 and the drain 52. In the same transistor T, the source 51 and the drain 52 have the same conductivity type.

[0089] The semiconductor layer 30 is divided into a first semiconductor layer 31 and a second semiconductor layer 32 according to the conductivity type of doped ions.

[0090] The first semiconductor layer 31 is used to form a source electrode 51, a drain electrode 52 and an active layer 53 of the first transistor T1. The second semiconductor layer 32 is used to form a source electrode 51, a drain electrode 52 and an active layer 53 of the second transistor T2.

[0091] In the thermal management stage, the first semiconductor layer 31 and the second semiconductor layer 32 form a Peltier pair 102 of the Peltier module 101 .

[0092] The first metal layer 50 is used to form a gate of the transistor T. The gate of the first transistor T1 is electrically connected to the first control signal S1, and the gate of the second transistor T2 is electrically connected to the second control signal S2.

[0093] In this embodiment, the transistors T are all top-gate structures. In other embodiments, the transistors T may be bottom-gate structures.

[0094] The second metal layer 70 is used to form a source pad 71 and a drain pad 72. The source pad 71 is connected to the corresponding source electrode 51 through a via hole, and the drain pad 72 is connected to the corresponding drain electrode 52 through a via hole.

[0095] There are multiple pixel electrodes P. The pixel electrode P is a transparent conductive layer.

[0096] Exemplarily, the pixel electrode P may be a transparent conductive layer such as indium tin oxide (ITO), aluminum zinc oxide (AZO), or zinc tin oxide (IZO).

[0097] There is no restriction on the shape and arrangement of the plurality of pixel electrodes P, and they can be selected according to actual needs.

[0098] The first alignment layer 90 enables the liquid crystal 300 to be arranged along a predetermined direction through its special surface treatment and structure, thereby ensuring that the display panel 2 (see Figure 5 ) display effect and stability.

[0099] The materials of the buffer layer 20 , the gate insulating layer 40 , the insulating dielectric layer 60 , the passivation layer 80 and the first alignment layer 90 are not limited and can be selected according to actual needs.

[0100] Exemplarily, the source 51 of the transistor T receives an external power supply (for example, a first voltage V1 or a second voltage V2), and the drain 52 of the transistor T is connected to the pixel electrode P. The pixel electrode P is electrically connected to the drain 52 of the corresponding transistor T via the drain pad 72. The pixel electrode P is connected to the drain pad 72 via a via. Specifically, the source 51 of the first transistor T1 receives the first voltage V1 via the source pad 71, and the drain 52 of the first transistor T1 is electrically connected to the pixel electrode P via the drain pad 72. The source 51 of the second transistor T2 receives the second voltage V2 via the source pad 71, and the drain 52 of the second transistor T2 is electrically connected to the pixel electrode P via the drain pad 72.

[0101] See also Figures 1 to 8 , Figure 5 is a schematic structural diagram of an embodiment of a display panel provided in an embodiment of the present application, Figure 6 is a schematic structural diagram of a first embodiment of a display device provided in an embodiment of the present application, Figure 7 is a schematic structural diagram of a second embodiment of a display device provided in an embodiment of the present application, Figure 8 It is a structural schematic diagram of a third embodiment of a display device provided in an embodiment of the present application.

[0102] The present application provides a display device 5. The display device 5 includes a display panel 2 and a main board 3.

[0103] The display panel 2 includes a color filter substrate 200 and an array substrate 100 disposed opposite to each other, and a liquid crystal 300 disposed between the color filter substrate 200 and the array substrate 100. The array substrate 100 is the above-mentioned array substrate 100. That is, the display panel 2 is a liquid crystal panel.

[0104] The mainboard 3 is electrically connected to the display panel 2 to control the display of the display panel 2 .

[0105] In some embodiments, the color filter substrate 200 includes a second substrate 201 , a color filter 202 , a common electrode layer 203 , and a second alignment layer 204 which are stacked in sequence.

[0106] The second substrate 201 can be a hard substrate or a flexible substrate. The second substrate 201 is a transparent substrate. The material of the second substrate 201 is not limited here and can be selected according to actual needs.

[0107] The filter 202 includes color resists 2021 and a black matrix 2022 located between the color resists 2021 . The distribution of the color resists 2021 and the black matrix 2022 is not limited and can be selected according to actual needs.

[0108] The color resist 2021 is used to decompose white light into three basic colors: red, green, and blue, thereby achieving color display. The black matrix 2022 is used to isolate the color resists 2021 of different colors to prevent light leakage between adjacent color resists 2021, avoid color mixing, and ensure that each pixel can accurately display its predetermined color, thereby improving the clarity of the image and the purity of the color.

[0109] An electric field is formed between the common electrode layer 203 and the pixel electrode P, thereby changing the arrangement of the liquid crystal 300, thereby controlling the transmittance of light and realizing the display of different grayscales and colors.

[0110] The common electrode layer 203 is a transparent conductive layer. The material of the common electrode layer 203 is not limited and can be selected according to actual needs.

[0111] The second alignment layer 204 enables the liquid crystal 300 to be arranged along a predetermined direction through its special surface treatment and structure, thereby ensuring the display effect and stability of the display panel 2 .

[0112] The transistor T is located at a side of the pixel electrode P away from the color filter substrate 200 , and the pixel electrode P is electrically connected to the second end of the transistor T through a via hole.

[0113] In the thermal management stage, the pixel electrode P is reused as the cold end or hot end of the Peltier module 101, and the pixel electrode P is set close to the liquid crystal 300, which can better heat or dissipate heat for the liquid crystal 300, so as to improve the display effect of the display panel 2 in a low temperature environment or a high temperature environment; secondly, it can also save costs and reduce the thickness of the display panel 2.

[0114] The materials of the color filter 202 and the second alignment layer 204 are not limited and can be selected according to actual needs.

[0115] The mainboard 3 is the core of the entire display device 5 and is responsible for coordinating and controlling various functions of the display panel 2 .

[0116] In some embodiments, the display device 5 further includes a temperature monitoring module 4, which is used to sense the external environment temperature and control the direction of the current flowing through the first transistor T1 and the second transistor T2.

[0117] Exemplarily, when the temperature monitoring module 4 detects that the operating temperature of the liquid crystal 300 is lower than the low temperature critical value, it controls the first voltage V1 to be smaller than the second voltage V2, and the current flows to the first transistor T1 through the second transistor T2 and the pixel electrode P in sequence, so that the pixel electrode P releases heat as a hot end to heat the liquid crystal 300.

[0118] When the temperature monitoring module 4 detects that the operating temperature of the liquid crystal 300 exceeds the high temperature critical value, it controls the first voltage V1 to be greater than the second voltage V2, and the current flows to the second transistor T2 through the first transistor T1 and the pixel electrode P in sequence, so that the pixel electrode P absorbs heat as a cold end to dissipate the heat of the liquid crystal 300.

[0119] When the temperature monitoring module 4 detects that the operating temperature of the liquid crystal 300 is between the low temperature critical value and the high temperature critical value, the temperature monitoring module 4 does not output.

[0120] There is no restriction on the specific values ​​of the low temperature critical value and the high temperature critical value, and they can be selected according to actual needs.

[0121] In some embodiments, Figure 6 As shown, the temperature monitoring module 4 is disposed in the display panel 2 .

[0122] In other embodiments, Figure 7 As shown, the temperature monitoring module 4 is arranged in the main board 3;

[0123] In some other embodiments, Figure 8 As shown, the temperature monitoring module 4 is arranged independently from the display panel 2 and the main board 3 .

[0124] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0125] The above are only implementation methods of the present application, and are not intended to limit the patent protection scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A pixel driving circuit, characterized in that: include: Pixel electrode; A transistor having a semiconductor layer; the transistor comprising a first transistor and a second transistor; the first transistor and the second transistor having opposite conductivity types; Wherein, the first transistor, the pixel electrode and the second transistor are sequentially arranged in series; In the display driving stage, one of the first transistor and the second transistor is turned on to discharge or charge the pixel electrode; In the thermal management stage, the first transistor and the second transistor are both turned on, the semiconductor layer in the first transistor, the pixel electrode and the semiconductor layer in the second transistor are combined to form a Peltier module, the semiconductor layer in the first transistor and the semiconductor layer in the second transistor form a Peltier pair, and the pixel electrode serves as the hot end or the cold end of the Peltier module.

2. The pixel driving circuit according to claim 1, characterized in that: A first terminal of the first transistor receives a first voltage, a second terminal of the first transistor is electrically connected to the pixel electrode, and a control terminal of the first transistor receives a first control signal; A first terminal of the second transistor receives a second voltage, a second terminal of the second transistor is electrically connected to the pixel electrode, and a control terminal of the second transistor receives a second control signal; In the thermal management stage, the pixel electrode is controlled to serve as a hot end or a cold end of the Peltier module by controlling the magnitude relationship between the first voltage and the second voltage; In the display driving stage, one of the first voltage and the second voltage is a data voltage, and the other is a ground voltage.

3. The pixel driving circuit according to claim 2, characterized in that: The first transistor is an N-type transistor, and the second transistor is a P-type transistor; The thermal management stage includes a heating stage and a heat dissipation stage. In the heating stage, the first voltage is less than the second voltage, and the pixel electrode serves as a hot end; In the heat dissipation stage, the first voltage is greater than the second voltage, and the pixel electrode serves as a cold end; In the display driving stage, the first voltage is a data voltage, and the second voltage is a ground voltage; the display driving stage includes a charging stage and a discharging stage, and in the charging stage, the first transistor is turned on and the second transistor is turned off to charge the pixel electrode; In the discharge phase, the first transistor is turned off and the second transistor is turned on to discharge the pixel electrode.

4. The pixel driving circuit according to claim 1, characterized in that: The first transistor is an oxide transistor, and the second transistor is a polysilicon transistor.

5. The pixel driving circuit according to claim 1, characterized in that: The pixel driving circuit further includes a pixel capacitor, one end of which is electrically connected to the pixel electrode, and the other end of which receives a ground voltage.

6. An array substrate, characterized in that: The invention comprises the pixel driving circuit according to any one of claims 1 to 5.

7. A display device, characterized in that: include: The display panel comprises a color filter substrate and an array substrate which are arranged opposite to each other, and a liquid crystal arranged between the color filter substrate and the array substrate; The array substrate is the array substrate according to claim 6; The mainboard is electrically connected to the display panel to control the display of the display panel.

8. The display device according to claim 7, characterized in that: The display device further includes a temperature monitoring module, which is used to sense the external environment temperature and control the direction of the current flowing through the first transistor and the second transistor.

9. The display device according to claim 8, characterized in that: The temperature monitoring module is arranged in the display panel; or, The temperature monitoring module is arranged in the main board; or, The temperature monitoring module is arranged independently from the display panel and the main board.

10. The display device according to claim 7, characterized in that: The transistor is located on a side of the pixel electrode away from the color film substrate, and the pixel electrode is electrically connected to the second end of the transistor through a via hole.

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