Switching converter and control circuit and control method thereof

Abstract

The invention discloses a switching converter and a control circuit and a control method thereof. The switching converter comprises a main control tube and a synchronous tube and converts an input voltage into an output voltage, and the control circuit comprises a compensation circuit which generates a compensation signal representing a first duration based on an oscillation period of voltages at two ends of the synchronous tube, the input voltage and the output voltage; the synchronous tube control circuit generates a synchronous tube control signal based on the compensation signal to control the synchronous tube; wherein when the switching converter works in an intermittent conduction mode and the inductive current of the switching converter is reduced to zero, the synchronous tube is switched off, and after the synchronous tube is switched off and delayed for a first time length, the synchronous tube is switched on again for a first time length; and when the switching converter works in the critical conduction mode, the synchronous tube is switched off after the inductive current is reduced to zero and a first duration. According to the control circuit, zero-voltage conduction of the switching tube is realized, and the switching loss is reduced.

Description

Technical Field

[0001] Embodiments of the present invention relate to electronic circuits, and more particularly, to switching converters and control circuits and methods thereof. Background Art

[0002] In order to reduce switching losses and improve circuit efficiency, soft switching technology is widely used in switching converters. In the existing control method, when the voltage across the switch tube is detected to drop to zero, the switch tube is turned on, thereby achieving zero voltage conduction of the switch tube. However, in some cases, such as when the input voltage is close to the output voltage, the voltage across the switch tube may not drop to zero, resulting in hard switching, which in turn generates large switching losses. Summary of the invention

[0003] In view of the problems existing in the prior art, the present invention proposes a switching converter and a control circuit and a control method thereof, which can achieve zero voltage conduction of the switch tube and reduce switching loss.

[0004] According to one embodiment of the present invention, a control circuit for a switching converter is disclosed, wherein the switching converter includes a main control tube and a synchronous tube, and converts an input voltage into an output voltage, and the control circuit includes: a compensation circuit, which generates a compensation signal representing a first time length based on the oscillation period of the voltage across the synchronous tube, the input voltage and the output voltage; and a synchronous tube control circuit, which generates a synchronous tube control signal based on the compensation signal to control the synchronous tube; wherein when the switching converter operates in a discontinuous conduction mode, when the inductor current of the switching converter drops to zero, the synchronous tube is turned off, and after the synchronous tube is turned off and a delay time has passed, the synchronous tube is turned on again for a first time length; and when the switching converter operates in a critical conduction mode, after the inductor current drops to zero and a first time length has passed, the synchronous tube is turned off.

[0005] According to another embodiment of the present invention, a switching converter is disclosed, including: a first switching tube coupled between an output node and a switching node; a second switching tube coupled between the switching node and a reference ground; an inductor coupled between a first input node and the switching node; a third switching tube coupled between the second input node and the reference ground; a fourth switching tube coupled between the output node and the second input node; and a control circuit as described above; wherein, when the input voltage of the switching converter is in a positive half cycle, the second switching tube is a main control tube and the first switching tube is a synchronous tube; and when the input voltage is in a negative half cycle, the first switching tube is a main control tube and the second switching tube is a synchronous tube.

[0006] According to another embodiment of the present invention, a control method for a switching converter is disclosed, wherein the switching converter includes a main control tube and a synchronous tube, and the control method includes: judging whether the switching converter operates in a critical conduction mode or a discontinuous conduction mode; when the switching converter operates in the critical conduction mode, after the inductor current of the switching converter drops to zero and a first time period has passed, turning off the synchronous tube; after the synchronous tube is turned off, when the voltage across the main control tube is at a trough, turning on the main control tube; and after the main control tube is turned on for a second time period, turning off the main control tube, wherein the second time period is generated based on the first time period.

[0007] According to an embodiment of the present invention, the synchronous tube is additionally turned on for a first period of time to generate a reverse current so that the voltage across the main control tube can drop to zero, thereby achieving zero voltage turn-on of the main control tube and reducing switching losses. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to better understand the present invention, the present invention will be described in detail according to the following drawings:

[0009] Figure 1 1 shows a circuit schematic diagram of a switching converter 100 according to an embodiment of the present invention;

[0010] Figure 2 FIG. 4 is a schematic diagram showing a circuit structure of a switching converter 100A according to another embodiment of the present invention;

[0011] Figure 3 FIG. 2 shows a circuit structure diagram of a control circuit 20A for a switching converter 100 according to an embodiment of the present invention;

[0012] Figure 4 shows a working waveform diagram of a switching converter 100 working in DCM according to an embodiment of the present invention;

[0013] Figure 5 It shows a working waveform diagram of the switching converter 100 working in CRM according to an embodiment of the present invention;

[0014] Figure 6 FIG. 2 shows a circuit structure diagram of a control circuit 20B for a switching converter 100 according to another embodiment of the present invention;

[0015] Figure 7 A schematic diagram showing THD compensation according to an embodiment of the present invention is shown;

[0016] Figure 8 shows a working waveform diagram of a switching converter 100 working in DCM according to another embodiment of the present invention;

[0017] Fig. 9It shows a working waveform diagram of a switching converter 100 working in CRM according to another embodiment of the present invention;

[0018] Fig.10 A flow chart of a control method 1000 for a switching converter 100 according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0019] The specific embodiments of the present invention will be described in detail below. It should be noted that the embodiments described herein are only for illustration and are not intended to limit the present invention. In the following description, a large number of specific details are set forth in order to provide a thorough understanding of the present invention. However, it is obvious to those of ordinary skill in the art that these specific details do not have to be used to implement the present invention. In other examples, in order to avoid confusing the present invention, known circuits, materials or methods are not specifically described.

[0020] Throughout the specification, references to "one embodiment", "an embodiment", "an example" or "an example" mean that a particular feature, structure or characteristic described in conjunction with the embodiment or example is included in at least one embodiment of the present invention. Therefore, the phrases "in one embodiment", "in an embodiment", "an example" or "an example" appearing in various places throughout the specification do not necessarily refer to the same embodiment or example. In addition, particular features, structures or characteristics may be combined in one or more embodiments or examples in any appropriate combination and / or sub-combination. In addition, it should be understood by those of ordinary skill in the art that the drawings provided herein are for illustrative purposes and that the drawings are not necessarily drawn to scale. The same reference numerals indicate the same device. It should be understood that when an "element" is said to be "connected to" or "coupled" to another element, it may be directly connected or coupled to another element or there may be an intermediate element. In contrast, when an element is said to be "directly connected to" or "directly coupled to" another element, there is no intermediate element. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0021] Throughout the specification, relative terms such as first and second, etc. may be used only to distinguish one entity or action from another entity or action, and do not necessarily or imply the existence of such an order between these entities or actions. Numerical sequences such as "first", "second", "third", etc. refer only to different individuals in a plurality and do not imply any order or sequence unless specifically defined in the claim language. The order of the text in any claim does not mean that the processing steps must be performed in such order or logical order unless specifically specified in the claim language. Without departing from the scope of the present invention, these processing steps can be interchanged in any order, as long as such interchange does not cause the claim language to contradict and does not appear logically absurd.

[0022] Figure 1 FIG. 1 is a schematic diagram showing a circuit structure of a switching converter 100 according to an embodiment of the present invention. Figure 1 As shown, the switching converter 100 includes a switching circuit 10 and a control circuit 20. The switching circuit 10 includes: an inductor L1, coupled between a first input node T1 and a switch node SW; a first switch tube S1, coupled between an output node T3 and the switch node SW; a second switch tube S2, coupled between the switch node SW and a reference ground; a third switch tube S3, coupled between a second input node T2 and a reference ground; a fourth switch tube S4, coupled between the output node T3 and the second input node T2; and an output capacitor Cout, coupled between the output node T3 and the reference ground. The inductor current IL is Figure 1 The direction shown is the positive direction. The switch circuit 10 converts the input voltage Vin into the output voltage Vout by turning on and off the switch tubes S1 to S4.

[0023] exist Figure 1 In the illustrated embodiment, when the input voltage Vin is in a positive half cycle, the third switch tube P3 remains turned on, the fourth switch tube P4 remains turned off, the first switch tube S1 and the second switch tube S2 are turned on and off alternately, wherein the second switch tube S2 is a main control tube, and the first switch tube S1 is a synchronous tube; when the input voltage Vin is in a negative half cycle, the third switch tube S3 remains turned off, the fourth switch tube S4 remains turned on, the first switch tube S1 and the second switch tube S2 are turned on and off alternately, wherein the first switch tube S1 is a main control tube, and the second switch tube S2 is a synchronous tube.

[0024] Those skilled in the art can understand that, in the embodiments of the present invention, the main control tube and the synchronous tube are a pair of switch tubes that are alternately turned on and off, wherein when the main control tube is turned on and the synchronous tube is turned off, the energy storage element in the switching converter stores energy, and when the main control tube is turned off and the synchronous tube is turned on, the energy storage element releases energy to the output end of the switching converter.

[0025] In one embodiment, when the input voltage Vin is greater than the positive voltage threshold Vzero, the input voltage Vin is considered to be in a positive half cycle; when the input voltage Vin is less than the negative voltage threshold -Vzero, the input voltage Vin is considered to be in a negative half cycle. In one embodiment, the positive voltage threshold Vzero may be a value slightly greater than 0, and similarly, the negative voltage threshold -Vzero may be a value slightly less than 0.

[0026] The control circuit 20 receives a first feedback voltage signal Vfb1 representing the output voltage Vout, a second feedback voltage signal Vfb2 representing the input voltage Vin, a current detection signal Vcs representing the inductor current IL, and a switch voltage Vsw at the switch node SW, and generates switch control signals G1-G4 based on the first feedback voltage signal Vfb1, the second feedback voltage signal Vfb2, the current detection signal Vcs, and the switch voltage Vsw to control the switch tubes S1-S4.

[0027] Since the working principle of the switching converter 100 is similar when the input voltage Vin is in the positive half cycle and the negative half cycle, for the sake of simplicity, the following description takes the input voltage Vin in the positive half cycle as an example. At this time, the second switch tube S2 is the main control tube and the first switch tube S1 is the synchronous tube.

[0028] exist Figure 1 In the embodiment shown, in order for the main control tube S2 to achieve zero voltage conduction when the input voltage Vin is close to the output voltage Vout, the control circuit 20 turns on the synchronous tube S1 for an additional first duration tcomp1 to generate a reverse current, which is used to discharge the output capacitor of the main control tube S2, thereby allowing the voltage across the main control tube S2 to drop to zero. In one embodiment, the first duration tcomp1 is related to the input voltage Vin, the output voltage Vout, and the oscillation period Ts of the voltage across the synchronous tube S1. In one embodiment, the oscillation period Ts can be obtained by detecting the oscillation period of the switch voltage Vsw.

[0029] exist Figure 1 In the illustrated embodiment, the switching converter 100 further includes a first feedback circuit 21 and a second feedback circuit 22. The first feedback circuit 21 receives the output voltage Vout and generates a first feedback voltage signal Vfb1 based on the output voltage Vout. The second feedback circuit 22 receives the input voltage Vin and generates a second feedback voltage signal Vfb2 based on the input voltage Vin.

[0030] Figure 2 FIG. 2 shows a circuit structure diagram of a switching converter 100A according to another embodiment of the present invention. Figure 2 As shown, the first feedback circuit 21A includes resistors R1 and R2 , wherein a first feedback voltage signal Vfb1 is provided at a common connection point of the resistors R1 and R2 .

[0031] exist Figure 2 In the embodiment shown, the second feedback voltage signal Vfb2 includes a first voltage signal AC1 and a second voltage signal AC2. Figure 2As shown, the second feedback circuit 22A includes resistors R3-R6, wherein the common connection point of the resistors R3 and R4 provides the first voltage signal AC1, and the common connection point of the resistors R5 and R6 provides the second voltage signal AC2. In other embodiments, the second feedback voltage signal Vfb2 can be a signal obtained by further processing the first voltage signal AC1 and the second voltage signal AC2, for example, Vfb2=AC1-AC2=k*Vin.

[0032] exist Figure 2 In the embodiment shown, the switching converter 100A further includes a current detection circuit 23 for generating a current detection signal Vcs. Figure 2 As shown, the current detection circuit 22 includes a current detection resistor Rcs coupled between the output capacitor Cout and a reference ground.

[0033] Those skilled in the art can understand that the first feedback circuit 21, the second feedback circuit 22 and the current detection circuit 23 in the above embodiment are only for illustration, and other circuit structures that can achieve the same function are also applicable to the present invention, as long as the generated signals can represent the output voltage Vout, the input voltage Vin and the inductor current IL respectively. In one embodiment, the first feedback circuit 21 and the second feedback circuit 22 can be omitted, and the first feedback voltage signal Vfb1 is the output voltage Vout itself, and the second feedback voltage signal Vfb2 is the input voltage Vin itself. In one embodiment, the inductor current IL is equal to the input current of the switch circuit 10, so the detection signal representing the input current can also represent the inductor current IL.

[0034] Figure 3 FIG. 2 shows a schematic diagram of a circuit structure of a control circuit 20A according to an embodiment of the present invention. Figure 3 As shown, the control circuit 20A includes a voltage judgment circuit 101, a compensation circuit 102, a zero-crossing detection circuit 103, a valley detection circuit 104, a delay circuit 105, a conduction time circuit 106, a synchronous tube control circuit 107 and a main control tube control circuit 108.

[0035] The voltage judgment circuit 101 is used to judge whether the input voltage Vin is close to the output voltage Vout, and generate a voltage judgment signal Vca. In one embodiment, when |Vin|>Vout / 2, the voltage judgment signal Vca is at a first level, indicating that the input voltage Vin is close to the output voltage Vout; when |Vin|<=Vout / 2, the voltage judgment signal Vca is at a second state, indicating that the input voltage Vin is far away from the output voltage Vout. Those skilled in the art can understand that the values ​​of the output voltage Vout and the input voltage Vin can be obtained based on the first feedback voltage signal Vfb1 and the second feedback voltage signal Vfb2, respectively. In other embodiments, the voltage judgment circuit 101 can also compare the first feedback voltage signal Vfb1 with the second feedback voltage signal Vfb2 to judge whether the input voltage Vin is close to the output voltage Vout.

[0036] The compensation circuit 102 generates a compensation signal Tcomp1 representing a first duration tcomp1 based on the input voltage Vin and the output voltage Vout. In one embodiment, when the main control tube S2 and the synchronous tube S1 are both turned off, the inductor L1 resonates with the parasitic capacitance in the circuit. The compensation circuit 102 generates the compensation signal Tcomp1 based on the oscillation period Ts of the voltage across the main control tube S2 or the synchronous tube S1, the input voltage Vin and the output voltage Vout. The first duration tcomp1 represented by the compensation signal Tcomp1 can be expressed by formula (1):

[0037]

[0038] like Figure 3 As shown, the compensation circuit 102 also receives a voltage determination signal Vca. When the voltage determination signal Vca indicates that the input voltage Vin is close to the output voltage Vout, the compensation circuit 102 generates a compensation signal Tcomp1. In one embodiment, the first time duration tcomp1 satisfies Formula 1. When the voltage determination signal Vca indicates that the input voltage Vin is far from the output voltage Vout, the compensation circuit 102 is disabled.

[0039] The zero-crossing detection circuit 103 compares the current detection signal Vcs representing the inductor current IL with the zero current threshold Vz to generate a zero-crossing detection signal Izero to indicate whether the inductor current IL drops to zero. In one embodiment, the zero-crossing detection circuit includes a zero-crossing comparator having a non-inverting input terminal, an inverting input terminal, and an output terminal, wherein the non-inverting input terminal receives the zero current threshold Vz, the inverting input terminal receives the current detection signal Vcs, and the zero-crossing comparator provides a zero-crossing detection signal Izero at the output terminal. When the current detection signal Vcs decreases to the zero current threshold Vz, the zero-crossing detection signal Izero switches from a low level to a high level, indicating that the inductor current IL drops to zero. In one embodiment, the value of the zero current threshold Vz is zero. In other embodiments, the value of the zero current threshold Vz may be slightly greater than zero or slightly less than zero, that is, close to zero.

[0040] The valley detection circuit 104 detects the slope of the switch voltage Vsw and generates a valley detection signal Sval to indicate the valley of the voltage across the main control tube S2 and the voltage across the synchronous tube S1. In one embodiment, if the slope of the switch voltage Vsw is negative, the valley detection signal Sval is at a high level; otherwise, the valley detection signal Sval is at a low level. At this time, the rising edge of the valley detection signal Sval represents the valley of the synchronous tube S1, and the falling edge represents the valley of the main control tube S2.

[0041] The delay circuit 105 generates a delay signal Td representing a delay time td based on the feedback adjustment signal Vcomp. In one embodiment, when the feedback adjustment signal Vcomp is less than the first threshold value Vcomp1, the delay time td is greater than 0, and the delay time td is inversely proportional to the feedback adjustment signal Vcomp, that is, the larger the feedback adjustment signal Vcomp is, the smaller the delay time td is. When the feedback adjustment signal Vcomp is greater than the first threshold value Vcomp1 and less than the second threshold value Vcomp2, the delay time td is 0. In another embodiment, when the feedback adjustment signal Vcomp is greater than the first threshold value Vcomp1 and less than the second threshold value Vcomp2, the delay circuit 105 is not enabled.

[0042] The feedback regulation signal Vcomp reflects the load condition of the switching converter 100. When the load becomes heavier, the feedback regulation signal Vcomp increases; when the load becomes lighter, the feedback regulation signal Vcomp decreases. In one embodiment, the feedback regulation signal Vcomp is an error amplified signal between the first feedback voltage signal Vfb1 and a reference voltage signal.

[0043] The on-time circuit 106 generates an on-time signal Ton based on the feedback regulation signal Vcomp to control the on-time ton of the main control transistor S2. In one embodiment, the larger the feedback regulation signal Vcomp is, the larger the on-time ton is.

[0044] The synchronous tube control circuit 107 generates a synchronous tube control signal G1 to control the synchronous tube S1 based on the voltage determination signal Vca, the compensation signal Tcomp1 , the zero-crossing detection signal Izero , the valley detection signal Sval , the delay signal Td and the on-time signal Ton.

[0045] The main control tube control circuit 108 generates a main control tube control signal G2 to control the main control tube S2 based on the voltage determination signal Vca, the valley detection signal Sval, the delay signal Td and the on-time signal Ton.

[0046] In one embodiment, the control circuit 20A further includes a mode determination circuit 109 for generating a mode signal MOD indicating whether the switching converter 100 operates in DCM (discontinuous conduction mode) or CRM (critical conduction mode). The synchronous tube control circuit 107 and the main control tube control circuit 108 also receive the mode signal MOD to generate the synchronous tube control signal G1 and the main control tube control signal G2 respectively. In other embodiments, the synchronous tube control circuit 107 and the main control tube control circuit 108 do not receive the mode signal MOD, but directly determine whether the switching converter 100 operates in DCM or CRM according to the delay signal Td. When the delay time td is greater than 0, it means that the switching converter 100 operates in DCM, and when the delay time td is equal to 0, it means that the switching converter 100 operates in CRM.

[0047] In one embodiment, the mode determination circuit 109 generates a mode signal MOD based on the feedback regulation signal Vcomp. When the feedback regulation signal Vcomp is less than a first threshold value Vcomp1, the mode signal MOD is in a first state, indicating that the switching converter 100 operates in DCM; when the feedback regulation signal Vcomp is greater than the first threshold value Vcomp1 and less than a second threshold value Vcomp2, the mode signal MOD is in a second state, indicating that the switching converter 100 operates in CRM.

[0048] As mentioned above, when the voltage judgment signal Vca indicates that the input voltage Vin is close to the output voltage Vout, the compensation circuit 102 is enabled and generates the compensation signal Tcomp1. The synchronous tube control circuit 107 turns on the synchronous tube S1 for an additional first duration tcomp1 based on the voltage judgment signal Vca and the compensation signal Tcomp1, thereby achieving zero voltage conduction of the main control tube S2. Figure 4 and Figure 5 The waveform diagram shown is used to illustrate the working principle of the switching converter 100 and the control circuit 20A when the input voltage Vin is close to the output voltage Vout.

[0049] Figure 4 FIG. 2 shows a working waveform diagram of the switching converter 100 according to an embodiment of the present invention when the switching converter 100 works in DCM. Figure 4 As shown, at time t1, the rising edge of the zero-crossing detection signal Izero arrives, indicating that the inductor current IL drops to zero. In response to the rising edge of the zero-crossing detection signal Izero, the synchronous tube control circuit 107 switches the synchronous tube control signal G1 from high level to low level to turn off the synchronous tube S1.

[0050] At time t2, the delay time td represented by the delay signal Td ends. At time t3, the rising edge of the valley detection signal Sval arrives, indicating that the voltage across the synchronous tube S1 is at a valley. In response to the rising edge of the valley detection signal Sval, the synchronous tube control circuit 107 switches the synchronous tube control signal G1 from a low level to a high level to turn on the synchronous tube S1 again.

[0051] At time t4, the first time duration tcomp1 represented by the compensation signal Tcomp1 ends. Based on the compensation signal Tcomp1, the synchronous tube control circuit 107 switches the synchronous tube control signal G1 from a high level to a low level to turn off the synchronous tube S1.

[0052] At time t5, the falling edge of the valley detection signal Sval arrives, indicating that the voltage across the main control transistor S2 is at a valley. In response to the falling edge of the valley detection signal Sval, the main control transistor control circuit 108 switches the main control transistor control signal G2 from a low level to a high level to turn on the main control transistor S2. Figure 4 As shown, the switching converter 100 generates a reverse current in the time period t3-t4, so that the voltage across the main control tube S2 (ie, the switching voltage Vsw) drops to zero at time t5. At this time, the main control tube S2 is turned on with zero voltage.

[0053] At time t6, the conduction time ton represented by the conduction time signal Ton ends. Based on the conduction time signal Ton, the main control tube control circuit 108 switches the main control tube control signal G2 from a high level to a low level to turn off the main control tube S2. The synchronous tube control circuit 107 switches the synchronous tube control signal G1 from a low level to a high level to turn on the synchronous tube S1. Figure 4 In the embodiment shown, in order to avoid direct conduction, the synchronous tube S1 is turned on after a dead time, i.e., at time t7, after the main control tube S2 is turned off.

[0054] At time t8 , the rising edge of the zero-crossing detection signal Izero arrives, indicating that the inductor current IL drops to zero again, the synchronous tube S1 is turned off, and the switching converter 100 enters the next switching cycle.

[0055] Figure 5FIG. 2 shows a working waveform diagram of a switching converter 100 working in CRM according to an embodiment of the present invention. Figure 5 As shown, at time t1, the rising edge of the zero-crossing detection signal Izero arrives, indicating that the inductor current IL drops to zero, and the synchronous tube control circuit 107 keeps the synchronous tube control signal G1 at a high level, and the synchronous tube S1 remains turned on.

[0056] At time t2, the first time duration tcomp1 represented by the compensation signal Tcomp1 ends. Based on the compensation signal Tcomp1, the synchronous tube control circuit 107 switches the synchronous tube control signal G1 from a high level to a low level to turn off the synchronous tube S1.

[0057] At time t3, the falling edge of the valley detection signal Sval arrives, indicating that the voltage across the main control transistor S2 is at a valley. In response to the falling edge of the valley detection signal Sval, the main control transistor control circuit 108 switches the main control transistor control signal G2 from a low level to a high level to turn on the main control transistor S2. Figure 5 As shown, the switching converter 100 generates a reverse current in the time period t1 to t2, so that the voltage across the main control tube S2 (ie, the switching voltage Vsw) drops to zero at time t3. At this time, the main control tube S2 is turned on with zero voltage.

[0058] At time t4, the conduction time ton represented by the conduction time signal Ton ends. Based on the conduction time signal Ton, the main control tube control circuit 108 switches the main control tube control signal G2 from a high level to a low level to turn off the main control tube S2. After a period of dead time, that is, at time t5, the synchronous tube control circuit 107 switches the synchronous tube control signal G1 from a low level to a high level to turn on the synchronous tube S1.

[0059] At time t6 , the rising edge of the zero-crossing detection signal Izero arrives, indicating that the inductor current IL drops to zero again, and the switching converter 100 enters the next switching cycle.

[0060] According to the above embodiment, by turning on the synchronous tube S1 for an additional first time tcomp1, a reverse current is generated so that the voltage across the main control tube S2 drops to zero, and the switching converter 100 achieves zero voltage conduction of the main control tube S2 in both DCM and CRM. In order to reduce the total harmonic distortion (THD) of the input current of the switching converter 100, thereby reducing the harmonic loss of electric energy and improving the power efficiency, the embodiment of the present invention further compensates for the above reverse current.

[0061] Figure 6 FIG. 2 shows a circuit structure diagram of a control circuit 20B according to another embodiment of the present invention. Figure 3 The control circuit 20A shown is different in that Figure 6 The on-time circuit 106B shown in the figure also receives the input voltage Vin, the output voltage Vout, and the compensation signal Tcomp1, and generates the on-time signal Ton1 based on the input voltage Vin, the output voltage Vout, the compensation signal Tcomp1, and the feedback adjustment signal Vcomp. The second time ton1 represented by the on-time signal Ton1 is greater than Figure 3 The conduction time in the illustrated embodiment is ton.

[0062] The main control circuit 108B receives the on-time signal Ton1, and controls the on-time of the main control tube S2 to the second time ton1 based on the on-time signal Ton1, thereby increasing the on-time of the main control tube S2 and increasing the forward current to compensate for the above-mentioned reverse current.

[0063] Figure 7 FIG. 4 shows a waveform diagram of THD compensation according to an embodiment of the present invention. Figure 7 As shown, the conduction time of the main control tube S2 is increased from ton to ton1, thereby increasing the forward current. In order to offset the influence of the reverse current, the area of ​​the increased forward current region 704 is

[0064] It should be equal to the total area of ​​the reverse current regions 701 and 702 , and based on this, the size of the second time length ton1 can be deduced.

[0065] The area S1 of the reverse current region 701 can be expressed as:

[0066]

[0067] The total area of ​​the reverse current regions 701 and 702 is estimated using the proportionality factor k:

[0068]

[0069] The proportionality coefficient k can be set and adjusted according to actual applications.

[0070] The area of ​​the forward current region 704 is approximated by the area of ​​the region 703, and the area of ​​the forward current region 704 can be expressed as:

[0071]

[0072] Let, we can get the duration tcomp2 as:

[0073]

[0074] Then, the second duration ton1 is:

[0075]

[0076] In one embodiment, Figure 6 The second duration ton1 represented by the on-time signal Ton1 satisfies formula (6), where ton is related to the feedback regulation signal Vcomp.

[0077] Figure 8 FIG. 2 shows an operation waveform diagram of a switching converter 100 operating in DCM according to another embodiment of the present invention. Fig. 9 FIG. 2 shows a working waveform diagram of a switching converter 100 working in CRM according to another embodiment of the present invention. Figures 4-5 The difference between the working waveform shown is that Figures 8-9 The on-time of the main control tube S2 is increased to the second time ton1 to reduce the THD of the switching converter 100 .

[0078] Those skilled in the art can understand that when the input voltage Vin is in the negative half cycle, the direction of the inductor current IL is the negative direction, and the inductor current IL described in the embodiment of the present invention drops to zero, which also includes the case where the absolute value of the inductor current IL with a negative direction decreases to zero. The switch tubes S1 to S4 of the switching converter 100 can be any suitable controllable semiconductor devices, such as BJT, JFET, MOSFET, IGBT or GaNFET, and the third switch tube S3 and the fourth switch tube S4 can also be replaced by diodes. In other embodiments, the switching converter 100 can also include a rectifier bridge and a Boost circuit, wherein the Boost circuit has a high-side switch tube and a low-side switch tube coupled between the output node and the reference ground, wherein the low-side switch tube is a main control tube and the high-side switch tube is a synchronous tube.

[0079] Those skilled in the art will appreciate that the circuits given in the above embodiments are only for illustrative purposes, and any circuit structure that can realize the circuit functions and working processes in the embodiments of the present invention does not deviate from the spirit or essence of the present invention. In one embodiment, the control circuit can be realized by a digital circuit. The synchronous tube control circuit and the main control tube control circuit can be realized by a state machine. For example, the functions of the aforementioned circuits can be specifically described by languages ​​such as VHDL and Verilog, thereby automatically generating a digital circuit.

[0080] Fig.10 1 is a flow chart of a control method 1000 for a switching converter 100 according to an embodiment of the present invention. The switching converter 100 includes a main control transistor S2 and a synchronization transistor S1. The control method 1000 includes steps S101 to S109.

[0081] In step S101, it is determined whether the switching converter 100 operates in CRM or DCM. If the switching converter 100 operates in CRM, the process proceeds to step S102; if the switching converter 100 operates in DCM, the process proceeds to step S105.

[0082] In step S102 , when the first time period tcomp1 elapses after the inductor current IL is detected to drop to zero, the synchronous transistor S1 is turned off.

[0083] In step S103, after the synchronous tube S1 is turned off, when it is detected that the voltage across the main control tube S2 is at a valley, the main control tube S2 is turned on.

[0084] In step S104, after the main control transistor S2 is turned on for the second time ton1, the main control transistor S2 is turned off, the synchronous transistor S1 is turned on, and the process returns to step S102. In one embodiment, the synchronous transistor S1 is turned on after a dead time after the main control transistor S2 is turned off to avoid direct conduction.

[0085] In step S105 , when it is detected that the inductor current IL drops to zero, the synchronous tube S1 is turned off.

[0086] In step S106, after the delay time td has elapsed after the synchronous tube S1 is turned off, when it is detected that the voltage across the synchronous tube S1 is at a valley, the synchronous tube S1 is turned on again.

[0087] In step S107 , after the synchronous transistor S1 is turned on for the first time period tcomp1 , the synchronous transistor S1 is turned off.

[0088] In step S108, after the synchronous tube S1 is turned off for the second time, when it is detected that the voltage across the main control tube S2 is at a valley, the main control tube S2 is turned on.

[0089] In step S109, after the main control transistor S2 is turned on for the second time ton1, the main control transistor S2 is turned off, the synchronous transistor S1 is turned on, and the process returns to step S105. In one embodiment, the synchronous transistor S1 is turned on after a dead time has passed after the main control transistor S2 is turned off.

[0090] In the flowchart described above, the functions marked in the blocks may also occur in an order different from that shown in the figure. For example, two blocks represented in succession may actually be executed substantially in parallel, and they may sometimes be executed in the reverse order, depending on the specific functions involved.

[0091] Those skilled in the art can understand that the relationship between the logic level of the above-mentioned switch control signal and the on-off state of the switch tube is related to the type of switch tube used. For example, if the switch tube is an N-type MOSFET, when the switch control signal is a logic high level, the corresponding switch tube is turned on, and when the switch control signal is a logic low level, the corresponding switch tube is turned off. If the switch tube is a P-type MOSFET, when the switch control signal is a logic high level, the corresponding switch tube is turned off, and when the switch control signal is a logic low level, the corresponding switch tube is turned on. The level type of the switch control signal and the on-off relationship of the switch tube in the embodiment of the present invention are only used for illustration, and are not used to limit the type of control signal and the relationship between it and the on-off state of the switch tube.

[0092] Although the present invention has been described with reference to several typical embodiments, it should be understood that the terms used are illustrative and exemplary, rather than restrictive. Since the present invention can be embodied in a variety of forms without departing from the spirit or essence of the invention, it should be understood that the above embodiments are not limited to any of the foregoing details, but should be interpreted broadly within the spirit and scope defined by the appended claims, so all changes and modifications falling within the scope of the claims or their equivalents should be covered by the appended claims.

Claims

1. A control circuit for a switching converter, wherein the switching converter includes a main control tube and a synchronous tube, converting an input voltage into an output voltage, and the control circuit includes: A compensation circuit generates a compensation signal representing a first duration based on an oscillation period of the voltage across the synchronous tube, an input voltage, and an output voltage; as well as A synchronous tube control circuit generates a synchronous tube control signal based on the compensation signal to control the synchronous tube; When the switching converter operates in the discontinuous conduction mode, when the inductor current of the switching converter drops to zero, the synchronous tube is turned off, and after the synchronous tube is turned off and the delay time has passed, the synchronous tube is turned on again for the first time length; as well as When the switching converter operates in the critical conduction mode, the synchronous tube is turned off after the inductor current drops to zero and a first time period has passed.

2. The control circuit according to claim 1, further comprising: The conduction duration circuit generates a conduction duration signal representing a second duration based on the input voltage, the output voltage, the compensation signal and the feedback adjustment signal reflecting the load weight; as well as The main control tube control circuit generates a main control tube control signal to control the main control tube based on the conduction time signal; When the switching converter operates in the intermittent conduction mode, after the synchronous tube is turned off for the second time, when the voltage across the main control tube is at a valley, the main control tube is turned on for a second time period; as well as When the switching converter operates in the critical conduction mode, after the synchronous tube is turned off, when the voltage across the main control tube is at a valley, the main control tube is turned on for a second time period.

3. The control circuit as claimed in claim 2, wherein the second time length t on1 for in, k is the proportionality coefficient, V in is the input voltage, V o is the output voltage, t comp1 is the first duration, t on is the duration related to the load. The heavier the load, the longer the on The bigger.

4. The control circuit according to claim 1, further comprising: The voltage judgment circuit judges whether the input voltage is close to the output voltage and generates a voltage judgment signal, wherein the synchronous tube control circuit also generates the synchronous tube control signal based on the voltage judgment signal.

5. The control circuit according to claim 1, further comprising: The valley detection circuit detects the slope of the voltage at the common connection point of the main control tube and the synchronous tube, and generates a valley detection signal for indicating the valley of the voltage at both ends of the main control tube and the voltage at both ends of the synchronous tube.

6. The control circuit according to claim 1, further comprising: The zero-crossing detection circuit compares the current detection signal representing the inductor current with the zero-crossing threshold value to generate a zero-crossing detection signal for indicating that the inductor current drops to zero.

7. The control circuit according to claim 1, further comprising: The delay circuit generates a delay signal representing a delay duration based on a feedback adjustment signal, wherein when the feedback adjustment signal is less than a first threshold, the delay duration is inversely proportional to the feedback adjustment signal.

8. The control circuit as claimed in claim 1, wherein the first time length t comp1 for in, T s is the oscillation period of the voltage across the synchronous tube, V in is the input voltage, V o is the output voltage.

9. A switching converter, comprising: A first switch tube is coupled between the output node and the switch node; A second switch tube is coupled between the switch node and a reference ground; an inductor coupled between the first input node and the switch node; A third switch tube is coupled between the second input node and the reference ground; A fourth switch tube, coupled between the output node and the second input node; as well as The control circuit according to any one of claims 1 to 8; Among them, when the input voltage of the switching converter is in the positive half cycle, the second switch tube is the main control tube and the first switch tube is the synchronous tube; when the input voltage is in the negative half cycle, the first switch tube is the main control tube and the second switch tube is the synchronous tube.

10. A control method for a switching converter, wherein the switching converter includes a main control tube and a synchronization tube, the control method comprising: Determining whether the switching converter operates in a critical conduction mode or a discontinuous conduction mode; When the switching converter operates in the critical conduction mode, after the inductor current of the switching converter drops to zero and a first time period has passed, the synchronous tube is turned off; After the synchronous tube is turned off, when the voltage across the main control tube is at a trough, the main control tube is turned on; as well as After the main control tube is turned on for a second time period, the main control tube is turned off and the synchronous tube is turned on, wherein the second time period is generated based on the first time period. 11 . The control method according to claim 10 , wherein the second time duration is generated based on the first time duration, the input voltage, the output voltage, and a feedback adjustment signal reflecting the load severity.

12. The control method according to claim 11, wherein the second time length t on1 for in, k is the proportionality coefficient, v in is the input voltage, V o is the output voltage, t comp1 is the first duration, t on is the duration related to the load. The heavier the load, the longer the on The bigger. 13 . The control method of claim 10 , wherein the first time length is generated based on an oscillation period of the voltage across the synchronous tube, an input voltage, and an output voltage.

14. The control method according to claim 10, further comprising: When the switching converter operates in the discontinuous conduction mode, the synchronous tube is turned off when the inductor current drops to zero; After the delay time has passed since the synchronous tube was turned off, when the voltage across the synchronous tube is at a trough, the synchronous tube is turned on again; After the synchronous tube is turned on again for a first time period, the synchronous tube is turned off; After the synchronous tube is turned off for the second time, when the voltage across the main control tube is at a valley, the main control tube is turned on; and After the main control tube is turned on for the second period of time, the main control tube is turned off and the synchronous tube is turned on.

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