Memristor with high on-off ratio and low off-state current density and preparation method thereof

Abstract

The invention belongs to the field of memristors, and discloses a memristor with a high on-off ratio and low off-state current density and a preparation method thereof.The preparation method comprises the following steps that an ITO substrate with the hydroxylated surface is soaked in an ethanol solution of 3-aminopropyltriethoxysilane; 3-aminopropyltriethoxysilane molecules are modified on the surface of the ITO substrate, and the ITO substrate with positive electricity on the surface is obtained; the method comprises the following steps: soaking an ITO substrate with a positively charged surface in a gold nanoparticle colloidal solution to obtain a substrate assembled with gold nanoparticles, spin-coating polymethyl methacrylate on the surface of the substrate assembled with the gold nanoparticles, baking until the substrate is dry, and then plating an aluminum film to obtain the memristor with high on-off ratio and low off-state current density. The memristor disclosed by the invention has an ultrahigh switch ratio and ultralow off-state current density at the same time, can be stably converted between a high-resistance state and a low-resistance state, and has a long-time retention characteristic and good process repeatability.

Description

Technical Field

[0001] The present invention belongs to the field of memristors, and relates to a memristor based on gold nanoparticle-induced conductive filaments, a heterogeneous structure, and having a high switching ratio and a low off-state current density, and a preparation method thereof. Background Art

[0002] Traditional integrated circuits are computer systems built on the "von Neumann" system, where computing and storage are performed separately in data processing. However, with the rapid development of CPUs, the development speed of processors has far exceeded the development speed of memory, which leads to a mismatch between computing speed and storage speed, forming a "memory wall", also known as the "von Neumann bottleneck". Resistive random access memory (ReRAM) is a promising candidate to break through this limitation. It has two resistance states and can still "remember" the amount of charge that has passed through it after the power is turned off. Therefore, it has the potential to integrate storage and computing, and has advantages such as fast switching capability, scalability and CMOS compatibility.

[0003] Common ReRAM components are metal / resistive material / metal (MIM) sandwich structures made of resistive materials such as metal oxides, amorphous silicon, perovskites, and organic materials. In this structure, one of the most effective mechanisms is the reversible binding of ions in the active layer to the surrounding matrix, which causes the ions to be transported in the resistive material and form conductive filaments. Generally speaking, ReRAM pursues a large switching ratio to improve the fault tolerance of the device in the logic circuit and a low off-state current density to reduce power consumption. The switching ratio and off-state current density of the developed device usually depend on the inherent properties of the resistive material. Generally, the characteristics of low thermal conductivity, good electrical conductivity, and ultra-thin layered structure will be conducive to finding materials suitable for preparing ReRAM. However, many materials with low thermal conductivity, such as industrial ceramics, tend to exhibit poor electrical conductivity, while most metals with excellent electrical conductivity tend to exhibit high thermal conductivity. This also shows that in the traditional MIM sandwich structure, it is difficult to obtain a large switching ratio while having a low off-state current density because the high resistance state of the memristor depends on the intrinsic properties of the intermediate resistive material. Therefore, breaking through the dependence of traditional MIM sandwich structure memristors on the intrinsic properties of resistive materials and developing a memristor with both high switching ratio and low off-state current density is of great significance for the design of the new generation of integrated circuits. Summary of the invention

[0004] In order to solve the above technical problems, the present invention improves the device structure, sets the intermediate resistive material into two regions with higher and lower resistance states, utilizes the region with higher resistance state to obtain low off-state current density, and introduces nanoparticles through electrostatic self-assembly method to induce the formation of a conductive channel in the region with lower resistance state to achieve a high switching ratio.

[0005] The technical solution provided by the present invention is as follows:

[0006] A preparation method of a memristor with high switching ratio and low off-state current density comprises the following steps: immersing an indium tin oxide (ITO) substrate after surface hydroxylation in an ethanol solution of 3-aminopropyltriethoxysilane, so that the surface of the ITO substrate is modified with 3-aminopropyltriethoxysilane molecules to obtain an ITO substrate with a positive surface charge; immersing the ITO substrate with a positive surface charge in a colloidal solution of gold nanoparticles to obtain a substrate assembled with gold nanoparticles, spin coating polymethyl methacrylate on the surface of the substrate assembled with gold nanoparticles, baking to dry and then coating with an aluminum film to obtain a memristor with high switching ratio and low off-state current density.

[0007] Furthermore, the step of surface hydroxylation includes: drying the cleaned ITO substrate by air, and then placing it in a boiling solution consisting of deionized water, hydrogen peroxide and ammonia water to obtain the ITO substrate with surface hydroxylation.

[0008] Furthermore, the volume ratio of the deionized water, hydrogen peroxide and ammonia water is 2-4:1:1.

[0009] Furthermore, the step of cleaning the ITO substrate comprises: ultrasonically cleaning the ITO substrate in acetone, ethanol and deionized water in sequence and blowing it dry.

[0010] Furthermore, the ITO substrate with positive charge on the surface is immersed in the colloidal solution of gold nanoparticles for 3 to 12 hours, and the diameter of the gold nanoparticles is 10 to 16 nm.

[0011] Furthermore, the thickness of the spin-coated polymethyl methacrylate is 25-30 nm, the spin-coating speed is 3500-4500 rpm, and the spin-coating time is 15-25 s.

[0012] Furthermore, the baking temperature is 130-140° C., and the baking time is 4-6 min.

[0013] Furthermore, the step of coating the aluminum film includes: using a thermal evaporation coating apparatus, -6 Under a vacuum degree of 100 Torr, a 45~55 nm thick aluminum film was thermally evaporated at a rate of 2~3Å / s.

[0014] The present invention also provides a memristor with high switching ratio and low off-state current density, which is prepared by the above preparation method.

[0015] The present invention also provides the application of the above-mentioned memristor with high switching ratio and low off-state current density in information storage devices.

[0016] The present invention also provides the device structure of the memristor with high switching ratio and low off-state current density, which is characterized by a device structure of a memristor with high switching ratio and low off-state current density, characterized by using ITO as an inert electrode, Al metal as an active electrode, the intermediate resistive material being arranged as two regions with higher resistance (suspended air layer) and lower resistance (PMMA) and metal nanoparticles, and the metal nanoparticles being in contact with the low-resistance region, utilizing the region with higher resistance to obtain low off-state current density, and inducing the formation of a conductive channel in the region with lower resistance through the nanoparticles to achieve a high switching ratio.

[0017] Beneficial Effects

[0018] The present invention breaks through the traditional memristor sandwich structure and introduces uniform 13nm gold nanoparticles into the device by electrostatic self-assembly. Due to the introduction of the particles, the resistive random access memory of the present invention forms a high-resistance structure with an air gap, which greatly reduces the off-state current density compared to devices without a gap.

[0019] The memristor described in the present invention combines electrostatic force self-assembly with the device using electrostatic induction. When the heterogeneous interface and nanoparticles exist at the same time, the electric field in the structure presents a non-uniform distribution, and its electric field vector has obvious directionality depending on the distribution of the nanoparticles. In the device, the particles play the role of localized electric field and play the role of directionally induced conductive filaments. Therefore, the device also obtains an ultra-high switching ratio.

[0020] The memristor (structured as ITO / Au-PMMA / Al) of the present invention has a high switching ratio (>10 7 ) and low off-state current density (<10 -9 A / cm 2 ), which can stably switch between high resistance (HRS) and low resistance (LRS) states, and has long-term retention characteristics and good process repeatability. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 A schematic diagram of the preparation process of a memristor with a high switching ratio and a low off-state current density according to the present invention; Figure 2 This is a structural photograph of the memristor with high switching ratio and low off-state current density according to the present invention; wherein, Figure 2 Figure a is an optical photo of the memristor. Figure 2 Figure b is an optical microscope photo of a single memristor. Figure 2 c is a cross-sectional SEM image of the memristor; Figure 3 A current-voltage characteristic curve diagram of the memristor with high switching ratio and low off-state current density according to the present invention; Figure 4 The electrical characteristics of the memristor with high switching ratio and low off-state current density described in the present invention are characterized; wherein Figure 4 a is the distribution statistics of the switch voltage in the continuous cycle of the memristor, Figure 4 Fig. b shows the distribution of high resistance (HRS) and low resistance (LRS) of the memristor read at 0.02 V in a continuous cycle of on-off cycles. Figure 4 Figure c shows the HRS and LRS curves corresponding to the 0-1.0V voltage read when the memristor is stimulated by different turn-on voltages (the turn-off voltage is -1.5V). Figure 4 Figure d in the figure shows the HRS and LRS resistance curves corresponding to the 0-1.0V voltage when the memristor is reset using different shutdown voltages (the startup voltage is 5V). Figure 5 Performance diagram of the ITO / Au-PMMA / Al memristor; wherein, Figure 5 a is the 10 corresponding to the memristor HRS and LRS 4 s data retention curve, Figure 5 b is a comparison diagram of the switching ratio and off-state current density of the memristor of the present invention and some other memristors reported currently; Figure 6 Box diagrams of resistance values ​​of 10 devices prepared using the memristor preparation process of the present invention in the on and off states of 10 consecutive cycles; Figure 7 A curve of a write-read-erase-read sequence test of the ITO / Au-PMMA / Al memristor; Figure 8 A double logarithmic linear fitting diagram of the portion of the current-voltage characteristic curve of the ITO / Au-PMMA / Al memristor before the mutation (0-1.9V under the forward scanning voltage); Fig. 9 are the current-voltage characteristic curves of different comparison sample memristors; Fig. 9 In the figure a, the current-voltage characteristic curve of the ITO / PMMA / Al memristor is shown. Fig. 9 b is the current-voltage characteristic curve of the memristor coded as ITO / Au-PMMA / Au; Fig.10 This is a current-voltage characteristic curve of a memristor having a similar structure to the ITO / Au-PMMA / Al memristor of the present invention (only the PMMA thickness is different). DETAILED DESCRIPTION

[0022] The present invention will be described in detail below with reference to the accompanying drawings.

[0023] Example 1

[0024] A method for preparing a memristor with high switching ratio and low off-state current density comprises the following steps:

[0025] Figure 1 The preparation process of a PMMA-based memristor consisting of a vertical structure consisting of an upper electrode (ITO), a lower electrode (Al) and an intermediate resistive switching layer is shown. The specific preparation steps are as follows:

[0026] S1: Using ITO as an inert bottom electrode, the ITO substrate was ultrasonically cleaned in acetone, ethanol and deionized water for 15 minutes in sequence. After the cleaned ITO substrate was dried with nitrogen, it was placed in a solution consisting of deionized water, hydrogen peroxide and ammonia water (volume ratio of 3:1:1) (hydrogen peroxide molar concentration of 5.88 mol / L, ammonia molar concentration of 5.72 mol / L), and boiled on a heating plate at 170°C for 30 minutes to hydroxylate the surface of the ITO substrate to obtain a surface hydroxylated ITO substrate. The surface hydroxylated ITO substrate was taken out and repeatedly washed with deionized water and dried with nitrogen, and then immersed in an ethanol solution of 3-aminopropyltriethoxysilane (APTES) (volume ratio of 0.1%) at room temperature for 6-8 hours. The immersed ITO substrate is then taken out and the excess APTES solution on the surface is rinsed off with a large amount of ethanol, and then rinsed with deionized water and blown dry with nitrogen gas, so that the surface of the ITO substrate is modified with APTES molecules to obtain an ITO substrate with a positively charged surface.

[0027] S2: Immerse the ITO substrate with positive charge on the surface in a colloidal solution of gold nanoparticles (Au NPs) with a diameter of about 13 nm for 3-12 h, take it out, rinse it with deionized water and blow it dry with nitrogen to obtain an ITO substrate assembled with gold nanoparticles.

[0028] S3: Place the ITO substrate assembled with gold nanoparticles on a spin coating device, add 50 μL of polymethyl methacrylate (PMMA) anisole solution (concentration of 0.0004 mol / L) with a molecular weight of 50k on its surface, and spin coat at a constant speed of 4000 rpm for 20 seconds. Then, bake at 135°C for 5 minutes to remove the residual solvent to obtain a sample assembled with Au NPs and covered with PMMA with a thickness of about 25 nm, which is denoted as ITO / Au-PMMA.

[0029] S4: Place the ITO / Au-PMMA sample on a specially prepared mask. The mask pattern is as follows: Figure 2 The electrode pattern in the device a is shown in Figure 1. The thermal evaporation coating apparatus is used to coat the film at 10 -6Under a vacuum degree of 1000 Torr, an aluminum film with a thickness of about 50 nm was evaporated on the ITO / Au-PMMA sample at a rate of 2.5 Å / s as a top electrode to obtain the memristor with high switching ratio and low off-state current density described in the present invention, which is represented by the code ITO / Au-PMMA / Al.

[0030] Figure 2 Figure b shows an optical microscope photograph of a single ITO / Au-PMMA / Al memristor, from which it can be seen that the lateral size of a single device is 1 mm×1 mm.

[0031] The cross-section of the ITO / Au-PMMA / Al memristor was characterized by scanning electron microscopy (SEM). Figure 2 As shown in c, the presence of Au NPs can be observed in the memristor, and the PMMA resistive switching layer is suspended above the Au NPs, introducing a suspended air layer into the memristor.

[0032] Example 2

[0033] The electrical characteristics of the ITO / Au-PMMA / Al memristor were tested using a semiconductor device parameter analyzer (Keithley 4200A - SCS). The test method was to apply a bias voltage to the active electrode Al of the memristor, ground the inert ITO electrode, and record the current value of the device under different voltage stimulations through a direct current voltage (DC voltage) scanning mode. The test conditions were an air environment at normal temperature and pressure.

[0034] Specifically, a forward scanning voltage of 0~5~0V (step length 0.02V) was applied to the device ITO / Au-PMMA / Al, and then a reverse scanning voltage of 0~-1.5V~0V (step length -0.02V) was applied to obtain the current-voltage characteristic curve of the device, as shown in FIG. Figure 3 In order to prevent the device from being broken down under high voltage, the current value is limited to 0.0002A during the entire test process. The results show that when the voltage is increased from 0~5V to 0V, the measured memristor current value increases from <10 -8 A suddenly changes to the set current limit value of 0.0002A, which means that the resistance of the memristor suddenly changes from the initial high resistance state to a relatively low resistance state, and remains in the low resistance state during the subsequent voltage change process (1.9~5~0V). At this time, the memristor is called the on state. Then a reverse scan voltage of 0~-1.5~0V is applied to the on-state memristor. When the reverse voltage increases to about -0.5V, the measured memristor current value suddenly returns to <10 -8A, which means that the resistance of the memristor changes suddenly from the low resistance state at the start to the initial high resistance state, and remains in the high resistance state during the subsequent voltage change process (-0.5~-1.5~0V). At this time, the memristor is called the off state. This current-voltage characteristic curve shows that the memristor has bipolar non-volatile resistive switching characteristics.

[0035] Example 3

[0036] Memristor performance testing and evaluation standards.

[0037] The same device was tested for 45 cycles of switching in DC sweep mode to verify the consistency of the device. Figure 4 Figure a is the distribution diagram of the switching voltage of the memristor in the continuous cycle switching test. The results show that the on-voltage of the memristor is distributed between 1.36V and 3.72V, and the off-voltage of the memristor is distributed between -0.2V and -0.92V. In addition, in the 45 cycles of switching tests, the current values ​​of the memristor in the on and off states were read at 0.02 V, as shown in Figure 1. Figure 4 The results show that the low-resistance state current read when the memristor is turned on is less than 10 -4 A, while the current value read when the memristor is turned off is 10 -11 A, which means that the resistance ratio of the memristor when it is turned on and when it is turned off is about 10 7 , indicating that the device has >10 7 The high switching ratio can be maintained after 45 cycles of switching tests, showing that the memristor has good consistency.

[0038] Since the on-voltage and off-voltage of the memristor are both discrete, the performance of the ITO / Au-PMMA / Al memristor under different on-voltage and off-voltage stimulations was tested to verify the reliability of the device. The specific test steps are to apply different forward scanning voltages to the device to turn on the device, and use -1.5V as the off voltage. After each on and off of the device, a forward scanning voltage of 0-1.0V is applied to the device to test the current value of the device in the corresponding on and off cycles, such as Figure 4 As shown in c. The results show that when the turn-on voltage changes, as long as the device is turned on, the resistance of the device in the on state is at the same level. In addition, the device is turned on with a 5V voltage, and then different turn-off voltages are applied to the device to turn the device off. After each turn-on and turn-off of the device, a 0-1.0V forward scanning voltage is applied to the device to test the current value of the device in the corresponding turn-on and turn-off cycles, as shown in FIG. Figure 4As shown in d. The results show that the device can be turned off at different turn-off voltages after being turned on, and the resistance of the device in the on and off states is at the same level. This test result shows that although the turn-on voltage and turn-off voltage of the prepared device have a certain discreteness, as long as the turn-on voltage and turn-off voltage reach a certain value (the turn-on voltage is set to 5V and the turn-off voltage is set to -1.5V), the device can be experimentally turned on and off reliably. Cycle. Therefore, the memristor has good reliability.

[0039] In order to test the data retention of the memristor, the device was turned on with a 5V turn-on voltage, and the device was tested with a fixed 0.5V voltage. 4 The resistance change in s time is then turned off using a -1.5V voltage, and the device is tested for 10 s in the off state using a 0.5V voltage. 4 The resistance change in s time is as follows Figure 5 The results show that in 10 4 s, the device resistance in the on state is about 10 3 Ω, while the device resistance in the off state remains at 10 10 This result shows that the memristor not only has a long data retention period, but also has a stable switching ratio of 10 7 The above shows that the high resistance and low resistance states of the device can be well distinguished and remembered.

[0040] Performance evaluation criteria: the switching ratio is the ratio of the resistance value of the memristor in the off state and the on state (HRS / LRS), which represents the fault tolerance of the memristor as a storage device for data reading after storing data; the off-state current density is the current density read when the memristor is in the off state. In this embodiment, the off-state current density refers to the current value per square centimeter of the device area read when the memristor is in the off state using a voltage of 0.5V. The low off-state current density not only represents the lower power consumption of the memristor, but also represents the lower serial current of the memristor as a circuit element, which can greatly improve the stability of the designed circuit.

[0041] Figure 5 Figure b shows the performance comparison between ITO / Au-PMMA / Al memristor and the same type (specifically, bipolar memristor devices prepared with sandwich structures, using different intermediate resistive layers, mainly from four types of materials: organic materials, two-dimensional materials, binary oxides, and multi-element oxides). The comparison uses the switching ratio and off-state current density as indicators. The results show that the memristor of the present invention has an extremely low off-state current density (<10 -9 A / cm 2 ) and ultra-high on / off ratio (>10 7). This reflects the high data read error tolerance of ITO / Au-PMMA / Al memristor and its lower power consumption compared to existing technologies.

[0042] Example 4

[0043] The repeatability test of ITO / Au-PMMA / Al memristor preparation process is implemented as follows:

[0044] A batch of ITO / Au-PMMA / Al memristors were prepared according to S1-S4 in Example 1, and 10 different devices were randomly selected to perform a DC sweep voltage test. The test process was the same as that in Example 3. The HRS and LRS of each device after 10 cycles of switching were recorded, and a box plot of the HRS and LRS of each device was calculated by device number, as shown in FIG. Figure 6 The results show that the HRS and LRS of different devices are distributed in 10 11 Ω and 10 4 The results show that the preparation process of ITO / Au-PMMA / Al memristor has good process repeatability.

[0045] Example 5

[0046] The application test of the ITO / Au-PMMA / Al memristor in data storage of the present invention comprises the following steps: preparing an ITO / Au-PMMA / Al memristor according to S1-S4 in Example 1, applying a bias voltage to the Al electrode of the memristor, grounding the ITO electrode, and measuring the current value under each voltage condition by using a DC scanning mode with voltage pulses of 5 V, -5 V and 0.5 V as write, erase and read voltages, respectively. The results are as follows: Figure 7 To prevent the device from being broken down under high voltage, the current value of the device writing process is limited to 10 -4 The results show that when writing with a 5V voltage, the current value read with a 0.5V voltage is the highest limit current value of 10 -4 A, when erased with -5V voltage, the current value read with 0.5V voltage is 10 -11 A, the on / off ratio is stable at 10 7 The above results show that the device exhibits good switching characteristics in three consecutive cycles of write, read, erase and read.

[0047] Example 6

[0048] The space charge limited current model is used to explore the electrical characteristics mechanism of the memristor.

[0049] Currently, one of the resistive switching mechanisms of memristors is the conductive channel mechanism, which uses the active electrode to undergo a redox reaction in the resistive layer to form metal conductive filaments. The charge conduction model corresponding to this conductive mechanism can be described using the space charge limited current model (SCLC).

[0050] The relationship between the current and voltage of the SCLC model is:

[0051]

[0052] in, J To transmit current, θ is the ratio of free carriers to trapped carriers, μ is the electron mobility, ε 0 is the vacuum dielectric constant, ε r is the relative dielectric constant of the dielectric material, V is the voltage applied to the device, L is the thickness of the dielectric layer. As can be seen from the formula, θ The size of can determine the change of the device characteristic curve.

[0053] In this embodiment, the current and voltage of the device's typical current-voltage characteristic curve before the sudden change (0-1.9V under the forward scanning voltage) are respectively subjected to logarithmic linear fitting and analysis, such as Figure 8 As shown. The results show that when the applied voltage is low, the fitted slope is approximately 1.29, and most of the injected carriers are captured by the trap energy level and cannot move freely. At this time, it is a high-resistance state, and the carriers are thermally generated free electrons, which is consistent with the dominant ohmic conduction. As the forward scan voltage gradually increases, the injected carriers begin to gradually fill the traps in the resistive layer to control the conduction, and the fitted slope is approximately 2.27, which is consistent with the current being proportional to the square of the voltage. When the forward scan voltage is further increased, all traps are filled, the remaining carriers can move freely, and conductive filaments are formed in the resistive layer, forming a current mutation zone, and the fitted slope suddenly increases to 4.25. The curve is divided into three different trends, which are consistent with the SCLC model, indicating that the conductive mechanism of the memristor described in the present invention can be attributed to the conductive filament mechanism.

[0054] In order to demonstrate the unique advantages of the ITO / Au-PMMA / Al memristor structure of the present invention, a specific comparative description of similar structure devices of the present invention is given below in conjunction with the accompanying drawings.

[0055] Comparative Example 1

[0056] The preparation process of ITO / PMMA / Al memristor is as follows:

[0057] According to step S1 in Example 1, an ITO substrate with APTES molecules on its surface was obtained. The ITO substrate with APTES molecules on its surface was placed on a spin coating device, and 50 μL of a 50k molecular weight PMMA anisole solution (concentration of 0.0004 mol / L) was dripped on its surface, and the substrate was spin-coated at a speed of 4000 rpm for 20 seconds. Subsequently, the substrate was baked at 135 °C for 5 minutes to remove the residual solvent, and a sample with a thickness of about 25 nm PMMA was obtained, which was represented by the code ITO / PMMA. The ITO / PMMA sample was placed on a special mask plate and coated with a thermal evaporation coating instrument at 10 -6 Torr vacuum, a layer of aluminum film with a thickness of about 50 nm was evaporated on the ITO / PMMA sample at a rate of 2.5 Å / s as the top electrode to obtain a memristor codenamed ITO / PMMA / Al. A semiconductor device parameter analyzer was used to apply a forward scanning voltage of 0~5~0V (step length 0.02V) to the device ITO / PMMA / Al, and then a reverse scanning voltage of 0~-1.5V~0V was applied to obtain the current-voltage characteristic curve of the device, as shown in the figure below. Fig. 9 The results show that the hysteresis of the device is not obvious, the switching ratio is less than 10, and the resistive layer is an organic polymer, the structure of the polymer is destroyed during the growth of the filament, so the device cannot be restored to the initial state. Therefore, after the first turn-on, once the conductive filament is formed, it cannot be restored to the high resistance state.

[0058] Comparative Example 2

[0059] The preparation process of ITO / Au-PMMA / Au device is as follows:

[0060] According to the process of S1-S3 in Experimental Example 1, a sample coded as ITO / Au-PMMA was obtained, and a thermal evaporation coating apparatus was used to coat the sample at 10 -6 Torr vacuum, a 50 nm thick gold film was evaporated on the ITO / Au-PMMA sample at a rate of 1.5 Å / s as the top electrode, and the lateral size of the device was 1 mm×1 mm. A semiconductor device parameter analyzer was used to apply a forward scanning voltage of 0~5~0V (step length 0.02V) to the device ITO / Au-PMMA / Au, and then a reverse scanning voltage of 0~-1.5V~0V was applied, and the current-voltage characteristic curve of the device was obtained, as shown in the figure. Fig. 9As shown in b. The results show that after replacing the top electrode with an inert material such as gold, no obvious resistance mutation phenomenon can be observed, and the device cannot return to a high resistance state after being broken down, which indirectly proves that the resistance switching mechanism of our device is that the active metal (Al) cations migrate back and forth between the positive and negative electrodes, i.e., the middle of the resistance switching layer, under the action of the electric field to undergo redox reactions to achieve high-low resistance conversion, thereby obtaining the stable switching performance of the memristor.

[0061] Comparative Example 3

[0062] The preparation process of a memristor having a similar structure to the ITO / Au-PMMA / Al memristor of the present invention (only the PMMA thickness is different) is as follows:

[0063] According to the process of S1-S2 in Example 1, an ITO substrate assembled with Au NPs was obtained. The ITO substrate assembled with Au NPs was placed on a spin coating device, and 50 μL of PMMA anisole solution with a molecular weight of 50k (concentrations of 0.0008 mol / L, 0.00053 mol / L, and 0.00027 mol / L, respectively) was dripped on its surface. The substrate was spin-coated at a speed of 4000 rpm for 20 seconds, and then baked at 135 °C for 5 minutes to remove the residual solvent. Samples assembled with Au NPs and covered with PMMA with a thickness of approximately 48 nm, 35 nm PMMA, and 5 nm PMMA, respectively, were obtained, and were denoted by the codes ITO / Au-PMMA (48), ITO / Au-PMMA (35), and ITO / Au-PMMA (5). The above three groups of samples were placed on a special mask plate and coated using a thermal evaporation coating instrument at 10 -6 Under a vacuum degree of 1000 Torr, a layer of aluminum film with a thickness of about 50 nm was evaporated on the ITO / Au-PMMA (48), ITO / Au-PMMA (35), and ITO / Au-PMMA (5) samples at a rate of 2.5 Å / s as the top electrode to obtain memristors coded as ITO / Au-PMMA (48) / Al, ITO / Au-PMMA (35) / Al, and ITO / Au-PMMA (5) / Al. Using a semiconductor device parameter analyzer, a forward scanning voltage of 0~5~0V (step size 0.02V) was applied to the devices ITO / Au-PMMA (48) / Al, ITO / Au-PMMA (35) / Al, and ITO / Au-PMMA (5) / Al, followed by a reverse scanning voltage of 0~-1.5V~0V, and the current-voltage characteristic curves of each device were obtained, as shown in the figure. Fig.10As shown. The results show that the ITO / Au-PMMA (48) / Al, ITO / Au-PMMA (35) / Al, and ITO / Au-PMMA (5) / Al prepared in this comparative example can only obtain a low switching ratio and a hysteresis characteristic curve without obvious resistance mutation. In addition, when the polymer layer is too thin (PMMA thickness is 5 nm), the conductive filaments are relatively stable once formed, and the device cannot return to the high resistance state. Therefore, PMMA thickness has a great influence on the performance of the memristor.

Claims

1. A method for preparing a memristor with high switching ratio and low off-state current density, characterized in that: The method comprises the following steps: immersing an ITO substrate after surface hydroxylation in an ethanol solution of 3-aminopropyltriethoxysilane, so that the surface of the ITO substrate is modified with 3-aminopropyltriethoxysilane molecules to obtain an ITO substrate with a positively charged surface; immersing the ITO substrate with a positively charged surface in a gold nanoparticle colloid solution to obtain a substrate assembled with gold nanoparticles, spin coating polymethyl methacrylate on the surface of the substrate assembled with the gold nanoparticles, baking until dry and then coating an aluminum film to obtain a memristor with a high switching ratio and a low off-state current density.

2. The method for preparing a memristor with high switching ratio and low off-state current density according to claim 1, characterized in that: The step of surface hydroxylation comprises: blowing the cleaned ITO substrate dry, and then placing it in a boiling solution consisting of deionized water, hydrogen peroxide and ammonia water to obtain the ITO substrate with surface hydroxylation.

3. The method for preparing a memristor with high switching ratio and low off-state current density according to claim 2, characterized in that: The volume ratio of the deionized water, hydrogen peroxide and ammonia water is 2-4:1:

1.

4. The method for preparing a memristor with high switching ratio and low off-state current density according to claim 2, characterized in that: The step of cleaning the ITO substrate comprises: ultrasonically cleaning the ITO substrate in acetone, ethanol and deionized water in sequence and blowing it dry.

5. The method for preparing a memristor with high switching ratio and low off-state current density according to claim 1, characterized in that: The ITO substrate with positive charge on the surface is immersed in the gold nanoparticle colloidal solution for 3 to 12 hours, and the diameter of the gold nanoparticles is 10 to 16 nm.

6. The method for preparing a memristor with high switching ratio and low off-state current density according to claim 1, characterized in that: The thickness of the spin-coated polymethyl methacrylate is 25-30 nm, the spin-coating speed is 3500-4500 rpm, and the spin-coating time is 15-25 s.

7. The method for preparing a memristor with high switching ratio and low off-state current density according to claim 1, characterized in that: The baking temperature is 130~140℃ and the baking time is 4~6min.

8. The method for preparing a memristor with high switching ratio and low off-state current density according to claim 1, characterized in that: The aluminum film coating step comprises: using a thermal evaporation coating apparatus, -6 Under a vacuum degree of 100 Torr, a 45~55 nm thick aluminum film was thermally evaporated at a rate of 2~3Å / s.

9. A memristor with high on / off ratio and low off-state current density, characterized in that: Prepared by the preparation method according to any one of claims 1 to 8.

10. Application of the memristor with high switching ratio and low off-state current density as claimed in claim 9 in information storage devices.

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