Interrupt configuration method and device, electronic equipment and storage medium

By configuring an interrupt requirement list for multiple operating systems and configuring each interrupt in the interrupt controller into the corresponding operating system, the resource conflict problem when multiple operating systems share the interrupt controller is solved, and the stable startup and normal operation of the system is achieved.

CN119690608APending Publication Date: 2025-03-25CHINA AUTOMOTIVE INNOVATION CORP
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202411627198.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-14
Publication Date
2025-03-25

AI Technical Summary

Technical Problem

In system-level chip design, multiple operating systems share the same interrupt controller, resulting in conflicts when System A is driving the GIC, which causes the system to hang up or fails to start normally.

Method used

By configuring the corresponding interrupt requirement lists of multiple operating systems, the corresponding operating system is instructed to call information of each interrupt in the interrupt controller, and based on these lists, each interrupt in the interrupt controller is configured into the corresponding operating system.

Benefits of technology

It realizes reasonable configuration of each interrupt in the interrupt controller, prevents the operating system from misjudging interrupt resources, reduces the occurrence of system abnormalities, and ensures that each operating system can start and run normally.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119690608A_ABST
    Figure CN119690608A_ABST
Patent Text Reader

Abstract

The invention relates to an interrupt configuration method and device, electronic equipment and a storage medium, and the method comprises the steps that interrupt demand lists corresponding to a plurality of operating systems are configured, the interrupt demand lists indicate calling information of the corresponding operating systems to interrupts in an interrupt controller, and the interrupt controller is shared by the operating systems; and configuring each interrupt in the interrupt controller into a corresponding operating system based on the interrupt demand list. According to the method and the device, each interrupt in the interrupt controller can be reasonably configured, so that each operating system determines the interrupt which needs to be called as the own resource, and a certain operating system is prevented from mistakenly judging the interrupt which is called by other operating systems in the interrupt controller as the own resource; and thus, abnormal conditions such as system hanging and incapability of normal starting are reduced.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to an interrupt configuration method, device, electronic equipment and storage medium. Background Art

[0002] In the design of System on Chip (SoC), in order to balance performance and power consumption and accelerate computing through parallelization, more and more homogeneous multi-core and heterogeneous multi-core designs are used. Heterogeneous multi-core design can allocate tasks to the most suitable core according to their nature, thereby further improving energy efficiency and balancing performance and power consumption. Multi-core design can improve performance through parallel processing, especially when processing tasks with a high degree of parallelism, multi-core design can greatly improve performance. However, both homogeneous multi-core and heterogeneous multi-core designs involve the problem of simultaneous access to peripherals, especially the access to the Generic Interrupt Controller (GIC). Since multiple operating systems run in a SoC chip and multiple operating systems share the same GIC, for one of the operating systems, the system will think that all resources of the current chip belong to the system. This results in that when system A is driving an interrupt in the GIC, system B is initializing the GIC, causing system A to hang or become uncontrollable; and when both system A and system B are initializing the GIC, both systems will fail to start normally. Summary of the invention

[0003] In order to solve at least one of the above-mentioned technical problems, the present disclosure proposes an interrupt configuration method, device, electronic device and storage medium.

[0004] In one aspect, the present invention provides an interrupt configuration method, comprising:

[0005] Configure interrupt request lists corresponding to multiple operating systems respectively, the interrupt request lists indicate the call information of each interrupt in the interrupt controller by the corresponding operating system, and the multiple operating systems share the interrupt controller;

[0006] Based on the interrupt requirement list, each interrupt in the interrupt controller is configured to the corresponding operating system.

[0007] In an optional embodiment, the interrupt request lists corresponding to the multiple operating systems include a reserved list and an initialization list, the initialization list indicates the interrupts that the target operating system needs to call, and the reserved list indicates the interrupts that the target operating system does not need to call, and the target operating system is any one of the multiple operating systems.

[0008] In an optional embodiment, each operating system calls at least one interrupt in the interrupt controller, and each interrupt is called by no more than one operating system among the multiple operating systems.

[0009] In an optional embodiment, configuring the interruption requirement lists corresponding to the multiple operating systems respectively includes:

[0010] When the interrupt that the target operating system needs to call does not include the first interrupt in the interrupt controller, and the number of interrupts that the target operating system needs to call exceeds a preset number, the interrupt numbers corresponding to the interrupts that the target operating system does not need to call are written into a reserved list of the target operating system, and the initialization list of the target operating system is configured to be empty;

[0011] When the interrupt that the target operating system needs to call does not include the first interrupt in the interrupt controller, and the number of interrupts that the target operating system needs to call does not exceed a preset number, the interrupt number corresponding to the preceding interrupt in the interrupt that the target operating system does not need to call is written into the reserved list of the target operating system, and the interrupt number corresponding to the interrupt that the target operating system needs to call is written into the initialization list of the target operating system, the preceding interrupt being the interrupt before the first interrupt that the target operating system needs to call in the interrupt controller;

[0012] When the interrupt that the target operating system needs to call includes the first interrupt in the interrupt controller, the interrupt number corresponding to the interrupt that the target operating system needs to call is written into the initialization list of the target operating system, and the reserved list of the target operating system is configured to be empty.

[0013] In an optional embodiment, the interrupt controller is configured with a reserved array and an initialization array, the reserved array is used to store the reserved list, and the initialization array is used to store the initialization list. Based on the interrupt requirement list, each interrupt in the interrupt controller is configured to the corresponding operating system, including:

[0014] Store the reserved list and initialized list into the reserved array and initialized array respectively;

[0015] Based on the preset interrupt configuration logic, the call information stored in the reserved array and the initialization array is configured to the corresponding target operating system.

[0016] In an optional embodiment, based on a preset interrupt configuration logic, the call information stored in the reserved array and the initialization array is configured to the corresponding target operating system, including:

[0017] The first interrupt in the interrupt controller is determined as the target interrupt, and whether the interrupt number stored in the reserved array is empty;

[0018] In the case where the interrupt number stored in the reserved array is empty, determining whether the interrupt number stored in the initialization array is empty;

[0019] When the interrupt number stored in the reserved array is not empty, determining whether the interrupt number of the target interrupt is stored in the reserved array;

[0020] In the case where the interrupt number of the target interrupt is stored in the reserved array, the target interrupt is skipped, and the next interrupt in the interrupt controller is determined as the target interrupt until the last interrupt in the interrupt controller is traversed;

[0021] In the case where the interrupt number of the target interrupt is not stored in the reserved array, determining whether the interrupt number stored in the initialization array is empty;

[0022] When the interrupt number stored in the initialization array is empty, the target interrupt is configured to the target operating system, and the next interrupt in the interrupt controller is determined as the target interrupt until the last interrupt in the interrupt controller is traversed;

[0023] When the interrupt number stored in the initialization array is not empty, determining whether the interrupt number of the target interrupt is stored in the initialization array;

[0024] When the interrupt number of the target interrupt is stored in the initialization array, the target interrupt is configured to the target operating system, and the next interrupt in the interrupt controller is determined as the target interrupt until the last interrupt in the interrupt controller is traversed;

[0025] In the case that the interrupt number of the target interrupt is not stored in the initialization array, the target interrupt is skipped, and the next interrupt in the interrupt controller is determined as the target interrupt until the last interrupt in the interrupt controller is traversed.

[0026] In an optional embodiment, multiple operating systems are started in sequence, and the method further includes:

[0027] When the target operating system is started, the reserved list and the initialization list of the target operating system are stored in the reserved array and the initialization array respectively;

[0028] After configuring the call information stored in the reserved array and the initialization array to the corresponding target operating system based on the preset interrupt configuration logic, the method further includes: deleting the reserved list and the initialization list of the target operating system respectively stored in the reserved array and the initialization array.

[0029] In a second aspect, the present invention further provides an interrupt configuration device, comprising:

[0030] A first configuration module is used to configure an interruption requirement list corresponding to each of the multiple operating systems, where the interruption requirement list indicates the calling status of each interrupt in the interruption controller by the corresponding operating system, and the multiple operating systems share the interruption controller;

[0031] The second configuration module is used to configure each interrupt in the interrupt controller to a corresponding operating system based on the interrupt requirement list.

[0032] In a third aspect, the present invention further provides an electronic device, comprising:

[0033] processor;

[0034] a memory for storing processor-executable instructions;

[0035] The processor is used to execute instructions to implement the above interrupt configuration method.

[0036] In a fourth aspect, the present invention further provides a storage medium, which, when instructions in the storage medium are executed by a processor of an electronic device, enables the electronic device to execute the above-mentioned interrupt configuration method.

[0037] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

[0038] The implementation of this disclosure has the following beneficial effects:

[0039] An interrupt request list corresponding to each of the multiple operating systems is configured, wherein the interrupt request list indicates the call information of each interrupt in the interrupt controller by the corresponding operating system, and the multiple operating systems share the interrupt controller; based on the interrupt request list, each interrupt in the interrupt controller is configured to the corresponding operating system.

[0040] The present disclosure configures interrupt request lists corresponding to multiple operating systems respectively, so that the interrupt request lists can indicate the corresponding operating systems' requirements for interrupts in the interrupt controller; by configuring each interrupt in the interrupt controller to the corresponding operating system based on the interrupt request lists, each interrupt in the interrupt controller can be reasonably configured, so that each operating system determines the interrupt it needs to call as its own resource, preventing a certain operating system from mistakenly determining the interrupt in the interrupt controller called by other operating systems as its own resource, thereby reducing the occurrence of abnormal conditions such as system hangs and inability to start normally.

[0041] Further features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions and advantages of the embodiments of the present application or the prior art, the following is a brief introduction to the drawings required for use in the embodiments or the prior art description. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. The drawings herein are incorporated into the specification and constitute a part of the specification, showing embodiments consistent with the present disclosure, and are used together with the specification to explain the principles of the present disclosure, and do not constitute an improper limitation of the present disclosure.

[0043] Figure 1 is a schematic diagram of an implementation environment according to an exemplary embodiment;

[0044] Figure 2 is a flow chart showing an interrupt configuration method according to an exemplary embodiment;

[0045] Figure 3 is a schematic diagram showing a method for multiple operating systems to share an interrupt controller according to an exemplary embodiment;

[0046] Figure 4 is a schematic diagram showing configuration contents of interruption requirement lists corresponding to operating systems in different scenarios according to an exemplary embodiment;

[0047] Figure 5 is a flow chart showing an interrupt configuration logic according to an exemplary embodiment;

[0048] Figure 6 is a schematic diagram showing an interrupt configuration process according to an exemplary embodiment;

[0049] Figure 7 is a schematic diagram showing an interrupt configuration device according to an exemplary embodiment;

[0050] Figure 8 The invention is a block diagram of an electronic device for interrupt controller configuration according to an exemplary embodiment. DETAILED DESCRIPTION

[0051] The following will be combined with the drawings in the embodiments of this specification to clearly and completely describe the technical solutions in the embodiments of this specification. Obviously, the described embodiments are only part of the embodiments of this specification, not all of the embodiments. Based on the embodiments in this specification, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0052] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product, or server that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products, or devices.

[0053] Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numerals in the drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the drawings, the drawings are not necessarily drawn to scale unless otherwise indicated. The word "exemplary" is used specifically herein to mean "serving as an example, embodiment, or illustrative". Any embodiment described herein as "exemplary" is not necessarily to be construed as being superior or better than other embodiments.

[0054] The term "and / or" herein is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the term "at least one" herein represents any combination of at least two of any one or more of a plurality of. For example, including at least one of A, B, and C can represent including any one or more elements selected from the set consisting of A, B, and C.

[0055] In addition, in order to better illustrate the present disclosure, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the present disclosure can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the subject matter of the present disclosure.

[0056] See also Figure 1 , Figure 1 is a schematic diagram of an application environment according to an exemplary embodiment. Figure 1 As shown, the application environment may include a server 01 and a terminal 02 .

[0057] In an optional embodiment, the server 01 can be used to interrupt the configuration method for computing. Specifically, the server 01 can be an independent physical server, or a server cluster or distributed system composed of multiple physical servers, or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, content delivery networks (CDNs), and big data and artificial intelligence platforms.

[0058] In an optional embodiment, the terminal 02 may perform calculation processing in combination with the interrupt configuration method of the server 01. Specifically, the terminal 02 may include but is not limited to electronic devices such as smart phones, desktop computers, tablet computers, laptop computers, smart speakers, digital assistants, augmented reality (AR) / virtual reality (VR) devices, smart wearable devices, etc. Optionally, the operating system running on the electronic device may include but is not limited to Android system, IOS system, Linux system, Windows system, Unix system, etc.

[0059] For example, the interrupt requirement lists corresponding to multiple operating systems are configured through terminal 02 and transmitted to server 01. The interrupt requirement list indicates the call information of each interrupt in the interrupt controller by the corresponding operating system, and multiple operating systems share the interrupt controller; based on the interrupt requirement list, server 01 configures each interrupt in the interrupt controller to the corresponding operating system, and transmits the driving result to terminal 02.

[0060] In addition, it should be noted that Figure 1 What is shown is only one application environment provided by the present disclosure. In actual application, other application environments may also be included.

[0061] In the embodiments of this specification, the server 01 and the terminal 02 may be directly or indirectly connected via wired or wireless communication, which is not limited in this disclosure.

[0062] Figure 2 is a flowchart of an interrupt configuration method according to an exemplary embodiment. Figure 2 As shown, the interrupt configuration method includes the following:

[0063] Step S201: configuring interruption request lists corresponding to multiple operating systems respectively, wherein the interruption request lists indicate the call information of each interrupt in the interruption controller by the corresponding operating system, and the multiple operating systems share the interruption controller.

[0064] In the present disclosure, Figure 3 As shown, taking multiple operating systems including system A and system B running on a SoC chip as an example, system A is an A core with cores core0 to core1, system B can be an A core, an M core or an R core with cores core2 to core5, and system A and system B share an interrupt controller GIC. Configuring the interrupt request lists corresponding to the multiple operating systems can be configuring the interrupt request lists of system A and system B according to the calling conditions of the interrupts in the interrupt controller GIC by system A and system B respectively. The interrupt involved in this embodiment is a shared peripheral interrupt (SPI) type interrupt.

[0065] In the disclosed embodiment, each operating system calls at least one interrupt in the interrupt controller, and each interrupt is called by no more than one operating system among the multiple operating systems. In other words, each interrupt in the interrupt controller is not called by two or more systems at the same time, and each system sharing the interrupt controller does not have a calling conflict for the interrupt in the interrupt controller.

[0066] In an optional embodiment, the interrupt request lists corresponding to the multiple operating systems include a reserved list and an initialization list, the initialization list indicates the interrupts that the target operating system needs to call, and the reserved list indicates the interrupts that the target operating system does not need to call, and the target operating system is any one of the multiple operating systems.

[0067] Based on the above, it can be known that in the embodiments of the present disclosure, by constructing a reserved list and an initialization list for each operating system, it is possible to clearly identify the interrupts that each operating system needs to call and does not need to call, so as to configure corresponding interrupts for the operating system according to the reserved list and the initialization list.

[0068] In an optional embodiment, configuring the interrupt request lists corresponding to the respective operating systems may be configured through a device tree (DTS) before the system is started, and the above configuration of the interrupt request lists corresponding to the respective operating systems includes:

[0069] Step S2011: when the interrupt that the target operating system needs to call does not include the first interrupt in the interrupt controller, and the number of interrupts that the target operating system needs to call exceeds a preset number, the interrupt numbers corresponding to the interrupts that the target operating system does not need to call are written into a reserved list of the target operating system, and the initialization list of the target operating system is configured to be empty;

[0070] Step S2012: When the interrupt that the target operating system needs to call does not include the first interrupt in the interrupt controller, and the number of interrupts that the target operating system needs to call does not exceed a preset number, the interrupt number corresponding to the preceding interrupt in the interrupt that the target operating system does not need to call is written into the reserved list of the target operating system, and the interrupt number corresponding to the interrupt that the target operating system needs to call is written into the initialization list of the target operating system, where the preceding interrupt is the interrupt before the first interrupt that the target operating system needs to call in the interrupt controller;

[0071] Step S2013: When the interrupt that the target operating system needs to call includes the first interrupt in the interrupt controller, write the interrupt number corresponding to the interrupt that the target operating system needs to call into the initialization list of the target operating system, and configure the reserved list of the target operating system to be empty.

[0072] In the embodiment of the present disclosure, the method of configuring the interrupt request lists corresponding to the multiple operating systems to include the reserved list and the initialization list is as follows: Figure 4As shown, taking the above-mentioned system A and system B sharing the interrupt controller as an example, it is assumed that the interrupt numbers of the interrupts in the interrupt controller are irq_a, irq_b, irq_c, ... in sequence. In one scenario, system A needs to call all interrupts except interrupts irq_a, irq_b, and irq_c, and system B only needs to call interrupts irq_a, irq_b, and irq_c. Since system A calls more interrupts and exceeds the preset number, and system B does not call more interrupts than the preset number, if an initialization list is configured for system A, its initialization list requires more storage space, and system B does not call more interrupts. If a reserved list is configured for system B, its reserved list requires more storage space. Therefore, the interrupt numbers corresponding to the interrupts that system A does not need to call are written into the reserved list of system A, and the initialization list of system A is configured as empty, which can save some storage space, and the same is true for system B. In this scenario, the interrupt requirement lists configured for system A and system B are as follows: the reserved list of system A is configured as resv_irq_list_A = irq_a, irq_b, irq_c; the initialization list of system B is configured as init_irq_list_B = irq_a, irq_b, irq_c. In another scenario, system A only needs to call interrupts irq_d and irq_e, and system B only needs to call interrupts irq_a, irq_b, and irq_c. Since the number of interrupts called by system A does not exceed the preset number, the interrupt number corresponding to the previous interrupt in the interrupt that system A does not need to call is written into the reserved list of system A, and the interrupt number corresponding to the interrupt that system A needs to call is written into the initialization list of system A. Since the first interrupt that system A needs to call is irq_d, the previous interrupt in the interrupt that system A does not need to call is the interrupt before irq_d, that is, irq_a, irq_b, and irq_c. Since the interrupt called by system B includes the first interrupt in the interrupt controller, the interrupt number corresponding to the interrupt that system B needs to call is written into the initialization list of system B, and the reserved list of system B is configured to be empty. In this scenario, the interrupt requirement lists configured by system A and system B are as follows: the reserved list of system A is configured as resv_irq_list_A=irq_a,irq_b,irq_c, the initialization list of system A is configured as init_irq_list_A=irq_d,irq_e; the initialization list of system B is configured as init_irq_list_B=irq_a,irq_b,irq_c.

[0073] Based on the above, it can be known that in the embodiment of the present disclosure, when the target operating system needs to call more than a preset number of interrupts, the interrupt numbers corresponding to the interrupts that the target operating system does not need to call are written into the reserved list of the target operating system and the initialization list of the target operating system is configured to be empty. This can simplify the construction process of the interrupt requirement list when the target operating system needs to call too many interrupts and reduce the storage space required for the interrupt requirement list. By writing the interrupt number corresponding to the interrupt that the target operating system needs to call into the initialization list of the target operating system and configuring the reserved list of the target operating system to be empty when the interrupt that the target operating system needs to call includes the first interrupt in the interrupt controller, the step of configuring the reserved list for the target operating system can be omitted, thereby simplifying the construction process of the interrupt requirement list.

[0074] Step S202: Based on the interrupt requirement list, each interrupt in the interrupt controller is configured into a corresponding operating system.

[0075] In an optional embodiment, the interrupt controller is configured with a reserved array resv_irqlist and an initialization array init_irqlist, the reserved array resv_irqlist is used to store the reserved list, and the initialization array init_irqlist is used to store the initialization list. Based on the interrupt requirement list, each interrupt in the interrupt controller is configured to the corresponding operating system, including:

[0076] Step S2021: store the reserved list and the initialization list into the reserved array and the initialization array respectively.

[0077] In the disclosed embodiment, multiple operating systems are started in sequence, and the timing for storing the reserved list and the initialization list in the reserved array and the initialization array respectively is when the target operating system is started, and the reserved list and the initialization list of the target operating system are stored in the reserved array and the initialization array respectively, so as to configure the required interrupts in time when the target operating system is started.

[0078] Based on the above, it can be known that in the embodiment of the present disclosure, by configuring a reserved array and an initialization array for the interrupt controller, the reserved list and the initialization list of the operating system can be stored so as to be called when configuring the interrupt in the interrupt controller.

[0079] Step S2022: Based on the preset interrupt configuration logic, the call information stored in the reserved array and the initialization array is configured to the corresponding target operating system.

[0080] In an optional embodiment, based on a preset interrupt configuration logic, configuring the call information stored in the reserved array and the initialization array to the corresponding target operating system includes:

[0081] Determine the first interrupt in the interrupt controller as the target interrupt, and determine whether the interrupt number stored in the reserved array is empty; if the interrupt number stored in the reserved array is empty, determine whether the interrupt number stored in the initialization array is empty; if the interrupt number stored in the reserved array is not empty, determine whether the interrupt number of the target interrupt is stored in the reserved array; if the interrupt number of the target interrupt is stored in the reserved array, skip the target interrupt and determine the next interrupt in the interrupt controller as the target interrupt until traversing to the last interrupt in the interrupt controller; if the interrupt number of the target interrupt is not stored in the reserved array, determine whether the interrupt number stored in the initialization array is empty; if the interrupt number stored in the initialization array is empty , configure the target interrupt to the target operating system, and determine the next interrupt in the interrupt controller as the target interrupt, until traversing to the last interrupt in the interrupt controller; when the interrupt number stored in the initialization array is not empty, determine whether the interrupt number of the target interrupt is stored in the initialization array; when the interrupt number of the target interrupt is stored in the initialization array, configure the target interrupt to the target operating system, and determine the next interrupt in the interrupt controller as the target interrupt, until traversing to the last interrupt in the interrupt controller; when the interrupt number of the target interrupt is not stored in the initialization array, skip the target interrupt, and determine the next interrupt in the interrupt controller as the target interrupt, until traversing to the last interrupt in the interrupt controller.

[0082] In the embodiment of the present disclosure, the flowchart of the above interrupt configuration logic is as follows: Figure 5 As shown, when the target control system is started, its corresponding reserved list and initialization list are stored in the reserved array and the initialization array respectively, and the reserved array and the initialization array are parsed, starting from the first interrupt in the interrupt controller, the interrupt is determined as the target interrupt irq_num, and according to the above processing logic, the interrupt required by the target control system is initialized and configured in the target control system, and the interrupt not required by the target control system is not initialized and is removed from the deployable resources of the target control system until the last interrupt irq_max in the interrupt controller is traversed to complete the interrupt configuration process of the target control system.

[0083] Based on the above, it can be known that in the embodiment of the present disclosure, by traversing each interrupt in the interrupt controller through the above-mentioned preset interrupt configuration logic, the interrupt required by the target operating system can be configured into the target operating system according to the above-mentioned logical commands, so that the target operating system can determine the interrupt configured into its system as its deployable resources, and exclude the interrupt that the target operating system does not need from the target operating system, so as to avoid the target operating system determining the interrupt required by other operating systems as its deployable resources.

[0084] In an optional embodiment, the above interrupt configuration process, or interrupt routing implementation is as follows: Figure 6 As shown. The interrupt controller consists of three parts: the distributor, the redistributor, and the CPU interface. The distributor is responsible for managing all interrupt sources, including forwarding interrupts to the CPU interface globally; the redistributor is responsible for managing interrupts, sending these interrupts to the corresponding CPU interface, enabling or disabling each interrupt, setting the priority, target processor list, trigger mode (level sensitive or edge triggered) and clearing the interrupt status for each interrupt; CPU Interface: Each CPU core has a CPU interface for receiving interrupts, confirming interrupts, and indicating the completion of interrupt processing. Figure 6 In the example, intf0-intf5 refers to CPU interface0-5.

[0085] In this embodiment, the module controlling interrupt routing is the Distributor module. Assume that there are 8 interrupts in the interrupt controller, namely irp_1 to irp_8. The Distributor module controls the interrupt routing to the CPU interface, specifically, controls the Redistributor module to send to the corresponding CPU interface.

[0086] In an optional embodiment, based on the preset interrupt configuration logic, after configuring the call information stored in the reserved array and the initialization array to the corresponding target operating system, the method also includes: deleting the reserved list and the initialization list of the target operating system stored in the reserved array and the initialization array respectively.

[0087] Based on the above, it can be known that in the embodiment of the present disclosure, when the target operating system is started, the reserved list and initialization list of the target operating system are stored in the reserved array and the initialization array respectively, and after the call information stored in the reserved array and the initialization array is configured to the corresponding target operating system based on the preset interrupt configuration logic, the reserved list and the initialization list of the target operating system respectively stored in the reserved array and the initialization array are deleted, thereby meeting the initialization requirements of the interrupt controller when the target operating system is started, and clearing the space occupied by the reserved array and the initialization array in time after the configuration is completed.

[0088] Figure 7 is a block diagram of an interrupt configuration device according to an exemplary embodiment. Figure 7 The device includes a first configuration module 701 and a second configuration module 702, wherein:

[0089] The first configuration module 701 is used to configure an interrupt request list corresponding to each of the multiple operating systems, where the interrupt request list indicates the calling status of each interrupt in the interrupt controller by the corresponding operating system, and the multiple operating systems share the interrupt controller;

[0090] The second configuration module 702 is used to configure each interrupt in the interrupt controller to a corresponding operating system based on the interrupt requirement list.

[0091] In an optional embodiment, the interrupt request lists corresponding to the multiple operating systems include a reserved list and an initialization list, the initialization list indicates the interrupts that the target operating system needs to call, and the reserved list indicates the interrupts that the target operating system does not need to call, and the target operating system is any one of the multiple operating systems.

[0092] In an optional embodiment, each operating system calls at least one interrupt in the interrupt controller, and each interrupt is called by no more than one operating system among the multiple operating systems.

[0093] In an optional embodiment, the first configuration module 701 includes:

[0094] A first writing module is used for, when the interrupt that the target operating system needs to call does not include the first interrupt in the interrupt controller and the number of interrupts that the target operating system needs to call exceeds a preset number, writing the interrupt number corresponding to the interrupt that the target operating system does not need to call into a reserved list of the target operating system and configuring the initialization list of the target operating system to be empty;

[0095] A second writing module is used to write the interrupt number corresponding to the preceding interrupt in the interrupt that the target operating system does not need to call into a reserved list of the target operating system, and write the interrupt number corresponding to the interrupt that the target operating system needs to call into an initialization list of the target operating system, when the interrupt that the target operating system needs to call does not include the first interrupt in the interrupt controller and the interrupt that the target operating system needs to call does not exceed a preset number. The preceding interrupt is an interrupt before the first interrupt that the target operating system needs to call in the interrupt controller;

[0096] The third writing module is used to write the interrupt number corresponding to the interrupt that the target operating system needs to call into the initialization list of the target operating system when the interrupt that the target operating system needs to call includes the first interrupt in the interrupt controller, and configure the reserved list of the target operating system to be empty.

[0097] In an optional embodiment, the interrupt controller is configured with a reserved array and an initialization array, the reserved array is used to store the reserved list, and the initialization array is used to store the initialization list. The second configuration module 702 includes:

[0098] A storage module, used for storing the reserved list and the initialization list into the reserved array and the initialization array respectively;

[0099] The second configuration submodule is used to configure the call information stored in the reserved array and the initialization array to the corresponding target operating system based on the preset interrupt configuration logic.

[0100] In an optional embodiment, the second configuration submodule includes:

[0101] A first logic unit, used to determine the first interrupt in the interrupt controller as a target interrupt, and determine whether the interrupt number stored in the reserved array is empty;

[0102] The second logic unit is used to determine whether the interrupt number stored in the initialization array is empty when the interrupt number stored in the reserved array is empty;

[0103] A third logic unit, configured to determine whether the interrupt number of the target interrupt is stored in the reserved array if the interrupt number stored in the reserved array is not empty;

[0104] a fourth logic unit, configured to skip the target interrupt and determine the next interrupt in the interrupt controller as the target interrupt when the interrupt number of the target interrupt is stored in the reserved array, until the last interrupt in the interrupt controller is traversed;

[0105] a fifth logic unit, for determining whether the interrupt number stored in the initialization array is empty if the interrupt number of the target interrupt is not stored in the reserved array;

[0106] a sixth logic unit, configured to configure a target interrupt to a target operating system when the interrupt number stored in the initialization array is empty, and to determine the next interrupt in the interrupt controller as the target interrupt until the last interrupt in the interrupt controller is traversed;

[0107] a seventh logic unit, for determining whether the interrupt number of the target interrupt is stored in the initialization array when the interrupt number stored in the initialization array is not empty;

[0108] an eighth logic unit, configured to configure the target interrupt to the target operating system when the interrupt number of the target interrupt is stored in the initialization array, and determine the next interrupt in the interrupt controller as the target interrupt until the last interrupt in the interrupt controller is traversed;

[0109] The ninth logic unit is used to skip the target interrupt if the interrupt number of the target interrupt is not stored in the initialization array, and determine the next interrupt in the interrupt controller as the target interrupt until the last interrupt in the interrupt controller is traversed.

[0110] In an optional embodiment, multiple operating systems are started in sequence, and the device further includes:

[0111] The storage submodule is used to store the reserved list and the initialization list of the target operating system into the reserved array and the initialization array respectively when the target operating system is started;

[0112] The deletion module is used to delete the reserved list and the initialization list of the target operating system stored in the reserved array and the initialization array respectively.

[0113] In an exemplary embodiment, an electronic device is also provided, including: a processor; and a memory for storing instructions executable by the processor; wherein the processor is used for the instructions to implement the interrupt configuration method in the embodiment of the present disclosure.

[0114] Figure 8 is a block diagram of an electronic device for interrupt controller configuration according to an exemplary embodiment. The electronic device may be a terminal, and its internal structure diagram may be as shown in FIG. Figure 8 As shown. The electronic device includes a processor, a memory, a network interface, a display screen and an input device connected through a system bus. Among them, the processor of the electronic device is used to provide computing and control capabilities. The memory of the electronic device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the electronic device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, an interrupt configuration method is implemented. The display screen of the electronic device can be a liquid crystal display screen or an electronic ink display screen, and the input device of the electronic device can be a touch layer covering the display screen, or a button, trackball or touchpad set on the housing of the electronic device, or an external keyboard, touchpad or mouse, etc.

[0115] Those skilled in the art will understand that Figure 8 The structure shown in the figure is merely a block diagram of a partial structure related to the scheme of the present disclosure, and does not constitute a limitation on the electronic device to which the scheme of the present disclosure is applied. The specific electronic device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0116] In an exemplary embodiment, a storage medium is also provided. When instructions in the storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute the interrupt configuration method in the embodiment of the present disclosure.

[0117] In an exemplary embodiment, a computer program product including instructions is also provided. When the computer program product is executed on a computer, the computer is enabled to execute the interrupt configuration method in the embodiment of the present disclosure.

[0118] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided by the present disclosure can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0119] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. The present disclosure is intended to cover any variations, uses or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The description and examples are to be considered exemplary only, and the true scope and spirit of the present disclosure are indicated by the claims.

[0120] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. An interrupt configuration method, characterized in that: The method comprises: Configuring an interrupt request list corresponding to each of the plurality of operating systems, wherein the interrupt request list indicates call information of each interrupt in the interrupt controller by the corresponding operating system, and the plurality of operating systems share the interrupt controller; Based on the interrupt requirement list, each interrupt in the interrupt controller is configured into a corresponding operating system.

2. The method according to claim 1, characterized in that: The interrupt requirement lists corresponding to each of the multiple operating systems include a reserved list and an initialization list, the initialization list indicates interrupts that the target operating system needs to call, and the reserved list indicates interrupts that the target operating system does not need to call, and the target operating system is any one of the multiple operating systems.

3. The method according to claim 1, characterized in that: Each of the operating systems calls at least one interrupt in the interrupt controller, and each interrupt is called by no more than one operating system among the multiple operating systems.

4. The method according to claim 2, characterized in that The configuring of the interruption requirement lists corresponding to the multiple operating systems respectively includes: When the interrupt that the target operating system needs to call does not include the first interrupt in the interrupt controller, and the number of interrupts that the target operating system needs to call exceeds a preset number, writing the interrupt numbers corresponding to the interrupts that the target operating system does not need to call into a reserved list of the target operating system, and configuring the initialization list of the target operating system to be empty; When the interrupt that the target operating system needs to call does not include the first interrupt in the interrupt controller, and the number of interrupts that the target operating system needs to call does not exceed a preset number, the interrupt number corresponding to the preceding interrupt in the interrupt that the target operating system does not need to call is written into a reserved list of the target operating system, and the interrupt number corresponding to the interrupt that the target operating system needs to call is written into an initialization list of the target operating system, the preceding interrupt being an interrupt before the first interrupt that the target operating system needs to call in the interrupt controller; When the interrupt that the target operating system needs to call includes the first interrupt in the interrupt controller, the interrupt number corresponding to the interrupt that the target operating system needs to call is written into the initialization list of the target operating system, and the reserved list of the target operating system is configured to be empty.

5. The method according to claim 2 or 4, characterized in that: The interrupt controller is configured with a reserved array and an initialization array, the reserved array is used to store the reserved list, the initialization array is used to store the initialization list, and each interrupt in the interrupt controller is configured to a corresponding operating system based on the interrupt requirement list, including: Storing the reserved list and the initialization list in the reserved array and the initialization array respectively; Based on the preset interrupt configuration logic, the call information stored in the reserved array and the initialization array is configured to the corresponding target operating system.

6. The method according to claim 5, characterized in that The configuring the call information stored in the reserved array and the initialization array to the corresponding target operating system based on the preset interrupt configuration logic includes: Determine the first interrupt in the interrupt controller as the target interrupt, and determine whether the interrupt number stored in the reserved array is empty; In the case where the interrupt number stored in the reserved array is empty, determining whether the interrupt number stored in the initialization array is empty; In the case where the interrupt number stored in the reserved array is not empty, determining whether the interrupt number of the target interrupt is stored in the reserved array; In the case where the interrupt number of the target interrupt is stored in the reserved array, skipping the target interrupt, and determining the next interrupt in the interrupt controller as the target interrupt, until traversing to the last interrupt in the interrupt controller; In the case where the interrupt number of the target interrupt is not stored in the reserved array, determining whether the interrupt number stored in the initialization array is empty; In the case where the interrupt number stored in the initialization array is empty, configuring the target interrupt to the target operating system, and determining the next interrupt in the interrupt controller as the target interrupt, until traversing to the last interrupt in the interrupt controller; In the case where the interrupt number stored in the initialization array is not empty, determining whether the interrupt number of the target interrupt is stored in the initialization array; In a case where the interrupt number of the target interrupt is stored in the initialization array, configuring the target interrupt to the target operating system, and determining the next interrupt in the interrupt controller as the target interrupt until traversing to the last interrupt in the interrupt controller; In the case that the interrupt number of the target interrupt is not stored in the initialization array, the target interrupt is skipped, and the next interrupt in the interrupt controller is determined as the target interrupt until the last interrupt in the interrupt controller is traversed.

7. The method according to claim 5, characterized in that The multiple operating systems are started sequentially, and the method further comprises: When the target operating system is started, storing the reserved list and the initialization list of the target operating system into the reserved array and the initialization array respectively; After configuring the call information stored in the reserved array and the initialization array to the corresponding target operating system based on the preset interrupt configuration logic, the method also includes: deleting the reserved list and the initialization list of the target operating system stored in the reserved array and the initialization array respectively.

8. An interrupt configuration device, characterized in that: The device comprises: A first configuration module, configured to configure an interruption requirement list corresponding to each of the plurality of operating systems, wherein the interruption requirement list indicates a call status of each interrupt in the interruption controller by the corresponding operating system, and the plurality of operating systems share the interruption controller; The second configuration module is used to configure each interrupt in the interrupt controller to a corresponding operating system based on the interrupt requirement list.

9. An electronic device, characterized in that: include: processor; a memory for storing instructions executable by the processor; The processor is used for the instruction to implement the interrupt configuration method according to any one of claims 1 to 7.

10. A storage medium, characterized in that: When the instructions in the storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute the interrupt configuration method as claimed in any one of claims 1 to 7.