Carbon-silicon three-dimensional integration method and device based on Power Switch

Abstract

The present application relates to a carbon-silicon three-dimensional integration method and device based on Power Switch. The method includes: obtaining the operating voltage and maximum on-current of the silicon circuit part, and using CNTFET to realize Power Switch; calculating the number of Power Switch units in the power switch network according to the designed saturation current and IR‑drop, and further determining the arrangement type of the power switch network; according to the arrangement type, performing physical layout and wiring design of the power switch network, and using TSV technology or Wire‑bonding technology to perform carbon-silicon three-dimensional integration. The use of this method can significantly enhance the switching characteristics of the power switch network, while reducing the difficulty of silicon chip layout and wiring.

Description

Technical Field

[0001] The present application relates to the technical field of three-dimensional circuit integration, and in particular to a carbon-silicon three-dimensional integration method and device based on Power Switch. Background Art

[0002] Since the development of integrated circuits driven by Moore's Law, chip technology has been continuously improved, and the integration has been significantly improved, leading the information technology revolution. However, after the CMOS process entered the 10nm node, Moore's Law encountered a bottleneck. While further reducing the size brings performance and area benefits, the power consumption problem becomes prominent, and gradually becomes a key factor restricting future development. Especially for mobile devices, the increase in power consumption will increase the requirements for battery capacity, and the development of battery equipment is far less than the development speed of integrated circuits, which restricts the length of use and overall service life; at the same time, the heating problem caused by excessive power consumption will seriously reduce the reliability of the chip and significantly increase the failure rate of electronic products. Therefore, low-power design has become an important research direction of VLSI design in recent years. The power consumption of CMOS circuits is mainly divided into dynamic power consumption and static power consumption. Dynamic power consumption refers to the power consumption generated by the change of working state during the operation of transistors, mainly including switching power consumption and short-circuit power consumption; static power consumption refers to the power consumption generated by leakage current when the transistor stops working. With the entry into the deep nano-micron process stage, dynamic power consumption is limited as the transistor size and chip operating voltage decrease, but as the transistor threshold voltage decreases, the subthreshold current increases exponentially, and static power consumption accounts for an increasingly large proportion of the total power consumption of the chip. It is becoming increasingly important to use low-power technology to reduce the static power consumption of the chip. Common low-power technologies include: Multi-Threshold Voltage (MTCMOS), Power Gating, Dynamic Voltage and Frequency Scaling (DVFS), and Clock Gating. Among them, power gating technology is a low-power technology specifically used to reduce the static power consumption of chips and is widely used in actual chip design. This technology is also called power shutdown technology. Its working principle is to introduce a switch element in the power path. When the module is inactive, the switch is turned off and the power is cut off, thereby reducing the power consumption of the module. Only when needed, the switch will be turned on to restore the power supply. In order to cut off the power supply of inactive modules, it reduces leakage current and reduces overall power consumption. In mobile devices and low-power applications, power gating can significantly extend the battery life by reducing the power consumption in standby mode. The power switch network includes the Power Switch Cell, the top power ground network, and the regional power ground network. The design of the power switch network plays a very important role in circuit performance. When designing the power switch network, the selection of Power Switch Cell, the start-up sequence, the connection method and the power network layout are appropriately designed according to the design indicators: switch ratio (Ion / Ioff), inrush current, turn-on time and IR-drop.Although power gating technology can effectively reduce static power consumption, in actual implementation, since larger transistors are often used in Power Switch Cell to increase the threshold voltage of the switch, this has an impact on the back-end design of the chip and reduces the layout and wiring area of ​​the functional modules. Secondly, although power gating technology can reduce static power consumption, it also brings charging power consumption when waking up the circuit.

[0003] In the deep nano-micron process stage, traditional MOSFET has gradually approached its physical limit, and the global semiconductor industry has also entered the post-Moore era. As a new type of semiconductor material, carbon nanotube field effect transistor (CNTFET) stands out with its excellent electrical properties and high carrier transport capability, becoming a strong candidate for new semiconductor materials in the post-Moore era. Compared with MOSFET, CNTFET has higher carrier mobility and saturation speed, indicating that the transistor has faster switching speed and higher performance; it has lower operating voltage, so it has lower dynamic power consumption; the carbon nanotube CMOS circuit processing technology requires lower temperature and is easy to integrate in three dimensions. The working principle of CNTFET is similar to CMOS, and the CMOS architecture design can be directly used to simplify the design process and reduce costs. Its process is compatible with CMOS, which accelerates the commercialization process. Therefore, in-depth exploration of the application of CNTFET has great academic and engineering value.

[0004] In order to continue the development of Moore's Law, in addition to the use of new semiconductor materials, heterogeneous three-dimensional integration, as an advanced integrated circuit packaging technology, can modularly integrate and system-integrate multiple discrete modules of different types and materials in the three-dimensional vertical direction. By integrating multiple chips with different functions into one system, the integration of the chip is effectively improved, and the power consumption is reduced while the area is reduced, thereby improving the overall performance of the system. Three-dimensional integration technology mainly includes wire bonding, chip flip and TSV technology. Compared with traditional packaging methods, the three-dimensional integrated packaging method greatly improves the interconnection density of the chip, so that the chip connection area can be reduced; secondly, the length of the interconnection line is effectively reduced, thereby reducing the signal transmission delay and power loss; at the same time, the three-dimensional integration method can realize the heterogeneous integration of chips with different functions. Although the development momentum of three-dimensional integration technology is strong, it still faces several challenges. Among them, TSV technology provides a key path for three-dimensional integration, but it also introduces parasitic capacitance and increases static power consumption. In addition, the thermal stress problem accompanying the TSV production process may pose a potential threat to device performance. Multi-layer chip stacking may not only aggravate the thermal stress problem, but also lead to an increase in power consumption density. In addition, the large area occupied by TSV through holes brings certain difficulties to the back-end layout and wiring. Despite this, 3D integration technology still shows broad application prospects with its unique advantages. Summary of the invention

[0005] Based on this, it is necessary to provide a carbon-silicon three-dimensional integration method and device based on Power Switch to address the above technical problems.

[0006] A carbon-silicon three-dimensional integration method based on Power Switch, the method comprising:

[0007] Obtaining the operating voltage and maximum on-current of the silicon circuit part, designing the saturation current and IR-drop of the power switch network according to the operating voltage and the maximum on-current, and designing the Power Switch unit based on the constraints of maximizing the switch ratio and minimizing the inrush current; calculating the number of Power Switch units in the power switch network according to the designed saturation current and IR-drop; the Power Switch unit is implemented using a carbon nanotube transistor;

[0008] Determine the layout type of the power switch network based on the physical layout and routing requirements, the precision control requirements for the power switch network, the IR-drop size requirements, and the inrush current size requirements;

[0009] According to the arrangement type, a physical layout and wiring design of the power switch network is performed, and the power switch network with the physical layout and wiring design is three-dimensionally integrated with the silicon circuit part by using TSV technology or Wire-bonding technology.

[0010] In one of the embodiments, the power switch network includes a plurality of voltage domain areas, each voltage domain area corresponds to a metal pad, and the metal pad is a power access point of the corresponding voltage domain area.

[0011] In one of the embodiments, the arrangement types include: grid arrangement; the grid arrangement is equivalent to a regular dot matrix array, each node in the dot matrix array is a Power Switch unit, one end of the PowerSwitch unit is connected to the corresponding power supply network through a metal pad, and the other end is connected to the silicon circuit part in a three-dimensional integration manner through TSV technology, and the Power Switch unit in the voltage domain area is controlled by a separate control signal.

[0012] In one of the embodiments, the arrangement types include: chain arrangement; the chain arrangement connects multiple Power Switch units in series into a chain, inserts a Buffer between each Power Switch unit for connection, one end of the Power Switch unit receives the shutdown domain voltage through the power supply network through a metal pad, and the other end is connected to the silicon circuit part in a three-dimensional integration manner through TSV technology; wherein each Power Switch unit in the shutdown domain is controlled by a control signal.

[0013] In one of the embodiments, the arrangement types include: a ring arrangement; in the ring arrangement, each Power Switch unit is surrounded by a metal pad, one end of the Power Switch unit is connected to the metal pad to receive the shutdown domain voltage through the power supply network, when using the Wire-bonding technology, the other end of the Power Switch unit is connected to the metal pad to connect to the power supply of the lower silicon circuit part, and when using the TSV technology, the other end of the Power Switch unit is connected to the power supply network of the lower silicon circuit part through the TSV technology.

[0014] In one of the embodiments, it also includes: when the precision control requirement for the power switch network has the highest priority and meets the requirements of low IR-drop and low inrush current, determining the arrangement type of the power switch network to be a grid arrangement; when the physical layout and wiring requirements require fewer control signals and meet the requirements of low IR-drop at the same time, determining the arrangement type of the power switch network to be a chain arrangement; when the physical layout and wiring requirements limit the layout and wiring area of ​​the silicon circuit part, determining the arrangement type of the power switch network to be a ring arrangement.

[0015] In one of the embodiments, the method further includes: performing functional testing, performance testing and reliability testing on the chip that has completed three-dimensional integration.

[0016] A carbon-silicon three-dimensional integrated device based on Power Switch, the device comprising:

[0017] A parameter design module is used to obtain the operating voltage and maximum on-current of the silicon circuit part, design the saturation current and IR-drop of the power switch network according to the operating voltage and the maximum on-current, design the type of the Power Switch unit based on the constraints of maximizing the switch ratio and minimizing the inrush current; calculate the number of Power Switch units in the power switch network according to the designed saturation current and IR-drop; the Power Switch unit is implemented using a carbon nanotube transistor;

[0018] An arrangement type determination module is used to determine the arrangement type of the power switch network according to the physical layout and wiring requirements, the precision control requirements of the power switch network, the IR-drop size requirements, and the inrush current size requirements;

[0019] The three-dimensional integration module is used to perform physical layout and wiring design of the power switch network according to the arrangement type, and adopt TSV technology or Wire-bonding technology to three-dimensionally integrate the power switch network with the physical layout and wiring design with the silicon circuit part.

[0020] In one of the embodiments, the power switch network includes a plurality of voltage domain areas, each voltage domain area corresponds to a metal pad, and the metal pad is a power access point of the corresponding voltage domain area.

[0021] In one of the embodiments, the arrangement types include: grid arrangement; the grid arrangement is equivalent to a regular dot matrix array, each node in the dot matrix array is a Power Switch unit, one end of the PowerSwitch unit is connected to the corresponding power supply network through a metal pad, and the other end is connected to the silicon circuit part in a three-dimensional integrated manner through TSV technology, and the Power Switch unit in the voltage domain area is controlled by a separate control signal.

[0022] The above-mentioned carbon-silicon three-dimensional integration method and device based on Power Switch is intended to address the power management problems caused by the differences in the operating voltage domains between different functional modules, and to alleviate the layout and wiring challenges faced by traditional silicon-based circuits when implementing power switch networks. By integrating the power switch network implemented using CNTFET and the functional modules implemented by MOSFET through three-dimensional integration, this application effectively improves the utilization efficiency of the silicon circuit area, simplifies the layout and wiring complexity of the power network, and significantly enhances the switching characteristics of the power switch network. In addition, implementing Power Switch through three-dimensional integration can greatly reduce the length of the metal wire from the power supply to the functional circuit, which can effectively reduce IR-drop. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 A schematic diagram of a process of a carbon-silicon three-dimensional integration method based on Power Switch in one embodiment;

[0024] Figure 2 A schematic diagram of a grid-type distributed power switch network in one embodiment;

[0025] Figure 3 A schematic diagram of a chain-type distributed power switch network in one embodiment;

[0026] Figure 4 A schematic diagram of a ring-shaped distributed power switch network in one embodiment;

[0027] Figure 5 A carbon-silicon three-dimensional integration solution for a grid-type / chain-type distributed power switch network based on TSV in one embodiment;

[0028] Figure 6 A schematic diagram of carbon-silicon three-dimensional integration of a ring-shaped distributed power switch network based on TSV in one embodiment;

[0029] Figure 7 A schematic diagram of carbon-silicon three-dimensional integration of a ring-shaped distributed power switch network based on wire-bonding in one embodiment;

[0030] Figure 8 The figure is a flow chart of carbon-silicon three-dimensional integration based on Power Switch in one embodiment. DETAILED DESCRIPTION

[0031] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0032] In one embodiment, Figure 1 As shown, a carbon-silicon three-dimensional integration method based on Power Switch is provided, comprising the following steps:

[0033] Step 102, obtaining the operating voltage and maximum on-current of the silicon circuit part, designing the saturation current and IR-drop of the power switch network according to the operating voltage and the maximum on-current, and designing the Power Switch unit based on the constraints of maximizing the switch ratio and minimizing the inrush current; and calculating the number of power switch units in the power switch network according to the designed saturation current and IR-drop.

[0034] The Power Switch unit is implemented using carbon nanotube transistors (CNTFETs).

[0035] Step 104 , determining the arrangement type of the power switch network according to the physical layout and routing requirements, the precision control requirements for the power switch network, the IR-drop size requirements, and the inrush current size requirements.

[0036] Step 106 , performing physical layout and wiring design of the power switch network according to the arrangement type, and using TSV technology or wire-bonding technology to three-dimensionally integrate the power switch network with the silicon circuit part after the physical layout and wiring design.

[0037] The above-mentioned carbon-silicon three-dimensional integration method based on Power Switch is intended to address the power management problems caused by the differences in operating voltage domains between different functional modules, and to alleviate the layout and wiring challenges faced by traditional silicon-based circuits when implementing power switch networks. The power switch network implemented using CNTFET and the functional modules implemented by MOSFET are integrated together through three-dimensional integration. This application effectively improves the utilization efficiency of the silicon circuit area, simplifies the layout and wiring complexity of the power network, and significantly enhances the switching characteristics of the power switch network. In addition, implementing Power Switch through three-dimensional integration can greatly reduce the length of the metal wire from the power supply to the functional circuit, which can effectively reduce IR-drop.

[0038] In one of the embodiments, CNTFET is used as a substitute for traditional MOSFET to design and implement a CNTFET-based Power Switch unit. With its excellent carrier mobility and saturation speed characteristics, CNTFET can significantly improve the response speed of the switching action when implementing a gate-controlled switch, thereby effectively reducing the wake-up time of the circuit. In addition, the processing temperature required for CNTFET when constructing CMOS circuits is relatively low. This feature not only improves the feasibility and flexibility of manufacturing, but also greatly promotes its application potential in the field of three-dimensional integration. Compared with traditional technologies, the use of CNTFET helps to reduce the limitations and impacts of TSV on circuit layout and wiring design, and provides a new solution for high-density, high-performance integrated circuit design.

[0039] In one embodiment, the power switch network includes a plurality of voltage domain regions, each voltage domain region corresponds to a metal pad, and the metal pad is a power access point of the corresponding voltage domain region.

[0040] Specifically, for the functional modules based on silicon circuits due to their unique working voltage requirements, the present application carefully divides multiple independent voltage domain areas on the power switch network chip built based on CNTFET. Each area is equipped with a specially designed metal pad (PAD), which serves as the power access point of the voltage domain and is responsible for providing a stable and reliable power supply to the corresponding area. In order to achieve a close connection between the Power Switch unit and the functional module, the present application deploys the Power Switch Cell in the vertical area of ​​each shutdown domain or around the module, significantly shortening the length of the power metal wire, thereby effectively suppressing the voltage drop caused by the line resistance. In terms of the choice of connection method, the present application shows a high degree of flexibility and adaptability, and can flexibly select a variety of layout methods such as grid arrangement, chain arrangement or ring arrangement according to the layout requirements and performance expectations of the actual circuit. As for the means of implementing three-dimensional integration, the present application also provides a variety of options. TSV technology can be used to achieve vertical interconnection between chips, and wire bonding technology can also be used to achieve electrical connection. These options provide designers with a broad space to play to meet the specific needs of different application scenarios.

[0041] In addition, the realization of power switch network based on carbon silicon three-dimensional integration has great advantages. When the power switch network is realized in traditional silicon-based circuits, since the power switch unit and the logic unit are in the same plane, this will affect the layout and wiring of the unit, increase the complexity of the back-end design, and secondly, the power supply of each normally open domain unit must be considered, which makes the design difficulty of the power ground network of the entire chip increased. When the power switch network is realized by carbon silicon three-dimensional integration, the power switch network is placed on the carbon circuit, the power network of the normally open domain is realized on the silicon circuit, and the shutdown domain voltage is sent to the silicon circuit containing the logic module through TSV or wire bonding. The carbon silicon three-dimensional integration method effectively alleviates the layout and wiring pressure of the silicon circuit by separating the power networks of the normally open domain and the shutdown domain, and realizes them on the silicon circuit and the carbon circuit respectively, which can significantly improve the integration of the silicon circuit functional modules. As key interconnection technologies in three-dimensional integration, TSV and wire bonding can significantly reduce the interconnection size in the vertical direction and reduce the IR-drop caused by metal wire voltage division, thereby improving the power transmission efficiency. Through this innovative design, the present invention not only achieves low latency and high efficiency in power supply, but also effectively alleviates the thermal management pressure of the power supply network by reducing the generation of transient current, thereby improving the overall stability and reliability of the system.

[0042] In one embodiment, if Figure 2As shown, the arrangement types include: grid arrangement; the grid arrangement is equivalent to a regular dot matrix array, each node in the dot matrix array is a Power Switch unit, one end of the PowerSwitch unit is connected to the corresponding power supply network through a metal pad, and the other end is connected to the silicon circuit part in a three-dimensional integration manner through TSV technology, and the Power Switch unit in the voltage domain area is controlled by a separate control signal.

[0043] Specifically, the distribution pattern of the grid-type arrangement is similar to a regular dot matrix array. Each node (in the figure, a PMOS transistor is used as a schematic diagram of the Header Switch) represents a Power Switch unit. The Power Switch units are evenly distributed in the power domain. This layout helps to achieve uniform distribution and fast response of power signals. In the grid-type Power Switch Network, one end of each Switch Cell is directly connected to the corresponding power supply network, and the other end is connected to the power network of the silicon-based functional module through TSV technology and three-dimensional integration. Connecting to the power network of the silicon-based functional module through TSV, this method can generate smaller transient current, reduce the length of the power line, and generate smaller IR-drop. The grid-type arrangement can achieve more precise current control. Each Power Switch Cell is controlled by a separate control signal, allowing the number of Power Switch Cells to be turned on to be flexibly selected according to the current required by the current functional module. This method effectively avoids additional power consumption caused by excessive current, thereby optimizing overall energy efficiency. At the same time, since multiple switches can be independently controlled as needed, the current can be better managed to avoid sudden high currents, that is, to prevent excessive inrush currents. The grid-type arrangement adopts three-dimensional integration based on TSV, as shown in the schematic diagram. Figure 5 shown.

[0044] In one embodiment, if Figure 3 As shown, the arrangement types include: chain arrangement; the chain arrangement connects multiple Power Switch units in series into a chain, inserts a Buffer between each Power Switch unit for connection, one end of the PowerSwitch unit receives the shutdown domain voltage through the power supply network through a metal pad, and the other end is connected to the silicon circuit part in a three-dimensional integration manner through TSV technology; wherein, each Power Switch unit in the shutdown domain is controlled by a control signal.

[0045] Specifically, the chain arrangement uses the form of connecting multiple Power Switch cells in series into a chain, and inserting a buffer between each Power Switch Cell for connection. Similar to the grid arrangement, one end of the Power Switch cell is connected to the metal PAD for receiving the shutdown domain voltage, and the other end is connected to the underlying silicon circuit through TSV. The difference from the grid arrangement is that in the chain arrangement, each Power Switch Cell in the shutdown domain is controlled by a control signal. In view of the large current required for the normal operation of silicon-based functional modules, a shutdown domain often requires hundreds or even thousands of Power Switch cells. When the logic module is powered on from the standby state to the working state, all Power Switch cells will be turned on at the same time. In fact, the process of powering up the logic module to the required voltage through the power switch is a charging process. When the power switch is just turned on, due to the significant voltage difference between the two ends of the Power Switch cell, a very large inrush current will be generated. If the inrush current is large enough to exceed the safety range, it may cause abnormal chip function and seriously affect the reliability of the chip. Therefore, in the chain arrangement, in order to reduce the generation of inrush current, a buffer is inserted between each Power Switch unit to delay the control signal of the switch, so that the Power Switch unit is gradually turned on, and the on-current gradually increases with the number of turned-on power switches, thereby limiting the size of the inrush current. Using a chain arrangement to implement the power switch network can maintain a small IR-drop while effectively controlling the inrush current. The chain arrangement uses a TSV-based carbon-silicon three-dimensional integration method to connect the carbon circuit chain arrangement power switch network with the functional modules of the silicon circuit, avoiding the layout and wiring pressure caused by the insertion of the Power Switch Cell and the Buffer, significantly reducing the design difficulty of the power network and the length of the metal routing, and effectively improving the integration and reliability of the chip. The schematic diagram is shown below. Figure 5 shown.

[0046] In one embodiment, if Figure 4 As shown, the arrangement types include: a ring arrangement; in the ring arrangement, each Power Switch unit is surrounded by a metal pad, one end of the Power Switch unit is connected to the metal pad to receive the shutdown domain voltage through the power supply network, when using the Wire-bonding technology, the other end of the Power Switch unit is connected to the metal pad to connect to the power supply of the lower silicon circuit part, and when using the TSV technology, the other end of the Power Switch unit is connected to the power supply network of the lower silicon circuit part through the TSV technology.

[0047] Specifically, the ring arrangement shows unique advantages in carbon silicon three-dimensional integration, especially when dealing with designs with dense internal macro units, complex layout and wiring, and inconvenient TSV insertion. This method can achieve three-dimensional integration using TSV technology or based on wire-bonding technology by neatly arranging the PowerSwitch Cell around the metal PAD, thus providing a more flexible option. Compared with the grid arrangement and chain arrangement, the ring arrangement does not increase the design complexity of the silicon circuit in physical implementation. When using wire-bonding technology, one end of the PowerSwitch cell is connected to the metal PAD to connect to the shutdown domain voltage, and the other end is also connected to the metal PAD to connect to the power supply of the underlying silicon circuit. When using TSV technology, one end of the Power Switch unit is connected to the metal PAD, and the other end is connected to the periphery of the functional circuit power network through TSV, avoiding the insertion of through holes inside the functional circuit, thereby reducing the difficulty of physical design of silicon chips. When implementing a ring-arranged power switch network on traditional silicon, since the Power Switch Cell is arranged around the shutdown domain, it is difficult for the internal circuit to obtain a stable always-on power supply, resulting in the inability to use special units such as the state retention register (Retention Cell); although the ring arrangement will not change the original circuit physical layout in the area, the ring-arranged power switch will significantly increase the circuit area. Compared with the traditional silicon ring arrangement, the ring-arranged power switch network is realized using carbon silicon three-dimensional integration. Since the shutdown domain control is moved to the carbon circuit, the silicon circuit can have a metal PAD that can be connected to the always-on power supply, so that special units such as the state retention register can be used in the silicon circuit. At the same time, due to the advantages of three-dimensional integration, the power switch network is moved to the carbon circuit, effectively reducing the silicon circuit area. Therefore, according to the advantages and implementation characteristics of carbon-silicon three-dimensional integration in a ring-shaped arrangement, this solution is particularly suitable for designs with dense internal macro units, complex layout and wiring, and inconvenient TSV insertion. In addition, for circuits that have completed the layout and wiring of functional circuits but have not yet incorporated low-power gating designs, this method also provides a feasible low-power transformation path. In addition, the ring-shaped carbon-silicon three-dimensional integration solution is also highly versatile and suitable for SoC designs containing a large number of hard-core components and chips that have been manufactured but have not yet been optimized for low power consumption, providing an effective low-power solution for these designs. The schematic diagram of the three-dimensional integration based on TSV technology is shown below. Figure 6 As shown in the figure, the schematic diagram of carbon-silicon three-dimensional integration based on wire-bonding technology is as follows Figure 7 shown.

[0048] In one embodiment, if Figure 8 As shown in the figure, a specific step of a carbon-silicon three-dimensional integration method based on Power Switch is provided: First, the operating voltage V of the functional module (silicon circuit part) needs to be determined. 0 And the maximum on-current I. This is the basis for designing the power switch network. It is required that the saturation current that the power switch network can provide is greater than or equal to the maximum on-current of the functional module, while ensuring that the IR-drop of the power switch network (that is, the voltage division of the power switch network when the shutdown domain is working normally) will not cause the power supply voltage of the functional module to be less than the working voltage required for its normal operation. Next, based on the requirements of making the switching ratio as large as possible and the inrush current as small as possible, select a suitable Header as the Power Switch Cell. After determining the type of Power Switch Cell, it is necessary to determine the number of Power Switch Cells. It is required that the saturation current that the power switch network can provide is greater than or equal to the maximum on-current of the functional module. Assuming that the shutdown domain supply voltage is V and the IR-drop of the power switch network is V 1 , the equivalent resistance is R 0 , the on-resistance of a single Power Switch Cell is R 1 . In meeting V-V 1 >V 0 Under the premise of 0 =( V 0 *V 1 ) / I. Since each Power Switch Cell is connected in parallel, the required number of Power Switch Cells N can be calculated as: N = R 1 / R 0. Select the power network according to the requirements of physical layout and wiring, precision control of the power switch network, IR-drop, inrush current size, etc. The grid-type arrangement is suitable for scenarios where there are high requirements for precise control of the current size provided by the power switch network, while maintaining a small IR-drop and inrush current; if you want fewer control signals but at the same time meet the lower IR-drop, choose a chain arrangement; if there are restrictions on the layout and wiring of the functional module and it is not convenient to insert through holes in the internal circuit of the functional module or the circuit layout and wiring have been finalized but you want to add a power switch network, you can choose a ring arrangement. According to the selected power network arrangement, the physical layout and wiring design of the power switch network is carried out. The power switch network is integrated with the silicon circuit in three dimensions using TSV technology or Wire-bonding technology. Ensure that the connection of each component during the integration process is reliable and meets the requirements of electrical and thermal performance. After completing the carbon-silicon three-dimensional integration, the power switch network needs to be tested and verified to ensure that its performance meets the design requirements. The test content includes but is not limited to current control capability, IR-drop, inrush current, etc. According to the test results, necessary adjustments and optimizations are made to ensure the stability and reliability of the power switch network. Following the above steps, carbon-silicon three-dimensional integration based on Power Switch can be achieved.

[0049] It should be understood that although Figure 1 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 1 At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.

[0050] In one embodiment, a carbon-silicon three-dimensional integrated device based on Power Switch is provided, the device comprising:

[0051] A parameter design module is used to obtain the operating voltage and maximum on-current of the silicon circuit part, design the saturation current and IR-drop of the power switch network according to the operating voltage and maximum on-current, and design the type of the Power Switch unit based on the constraints of maximizing the switch ratio and minimizing the inrush current; calculate the number of Power Switch units in the power switch network according to the designed saturation current and IR-drop; the Power Switch unit is a CNTFET;

[0052] An arrangement type determination module is used to determine the arrangement type of the power switch network according to the physical layout and wiring requirements, the precision control requirements of the power switch network, the IR-drop size requirements, and the inrush current size requirements;

[0053] The three-dimensional integration module is used to perform physical layout and wiring design of the power switch network according to the arrangement type, and adopt TSV technology or Wire-bonding technology to three-dimensionally integrate the power switch network with the physical layout and wiring design with the silicon circuit part.

[0054] For the specific limitations of the carbon-silicon three-dimensional integrated device based on Power Switch, please refer to the limitations of the carbon-silicon three-dimensional integration method based on Power Switch above, which will not be repeated here.

[0055] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0056] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention. It should be pointed out that, for a person of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A carbon-silicon three-dimensional integration method based on Power Switch, characterized in that: The method comprises: Obtaining the operating voltage and maximum on-current of the silicon circuit part, designing the saturation current and IR-drop of the power switch network according to the operating voltage and the maximum on-current, and designing the type of the Power Switch unit based on the constraints of maximizing the switch ratio and minimizing the inrush current; calculating the number of the Power Switch units in the power switch network according to the designed saturation current and IR-drop; the Power Switch unit is implemented using a carbon nanotube transistor; Determine the arrangement type of the power switch network according to the physical layout and wiring requirements, the precision control requirements of the power switch network, the IR-drop size requirements, and the inrush current size requirements; the arrangement types include: grid arrangement, chain arrangement, and ring arrangement; According to the arrangement type, a physical layout and wiring design of the power switch network is performed, and the power switch network with the physical layout and wiring design is three-dimensionally integrated with the silicon circuit part by using TSV technology or Wire-bonding technology; wherein the grid arrangement and the chain arrangement are three-dimensionally integrated by using TSV technology, and the ring arrangement is three-dimensionally integrated by using Wire-bonding technology; the power switch network includes multiple voltage domain areas, each voltage domain area corresponds to a metal pad, and the metal pad is a power access point of the corresponding voltage domain area; The grid arrangement is equivalent to a regular dot matrix array, each node in the dot matrix array is a PowerSwitch unit, one end of the Power Switch unit is connected to the corresponding power supply network through a metal pad, and the other end is connected to the silicon circuit part in a three-dimensional integration manner through TSV technology, and the Power Switch unit in the voltage domain area is controlled by a separate control signal; The chain arrangement connects multiple Power Switch units in series into a chain, inserts a buffer between each Power Switch unit for connection, one end of the Power Switch unit receives the shutdown domain voltage through the power supply network through a metal pad, and the other end is connected to the silicon circuit part in a three-dimensional integration manner through TSV technology; wherein each Power Switch unit in the shutdown domain is controlled by a control signal; In the ring arrangement, each Power Switch unit is surrounded by a metal pad. One end of the Power Switch unit is connected to the metal pad to receive the shutdown domain voltage through the power supply network. When using Wire-bonding technology, the other end of the Power Switch unit is connected to the metal pad to connect to the power supply of the lower silicon circuit part. When using TSV technology, the other end of the PowerSwitch unit is connected to the power supply network of the lower silicon circuit part through TSV technology.

2. The method according to claim 1, characterized in that According to the physical layout and routing requirements, the precision control requirements for the power switch network, the IR-drop size requirements, and the inrush current size requirements, the layout type of the power switch network is determined, including: When the precision control requirement for the power switch network has the highest priority and low IR-drop and low inrush current are met, the arrangement type of the power switch network is determined to be a grid arrangement; When the physical layout and routing requirements require fewer control signals and low IR-drop at the same time, the arrangement type of the power switch network is determined to be a chain arrangement; When the layout and wiring area of ​​the silicon circuit part is limited in the physical layout and wiring requirements, the layout type of the power switch network is determined to be a ring layout.

3. The method according to claim 1, characterized in that The method further comprises: Perform functional testing, performance testing and reliability testing on chips that have completed three-dimensional integration.

4. A carbon-silicon three-dimensional integrated device based on Power Switch, characterized in that: The device comprises: A parameter design module is used to obtain the operating voltage and maximum on-current of the silicon circuit part, design the saturation current and IR-drop of the power switch network according to the operating voltage and the maximum on-current, design the type of the Power Switch unit based on the constraints of maximizing the switch ratio and minimizing the inrush current; calculate the number of Power Switch units in the power switch network according to the designed saturation current and IR-drop; the Power Switch unit is implemented using a carbon nanotube transistor; An arrangement type determination module is used to determine the arrangement type of the power switch network according to the physical layout and wiring requirements, the precision control requirements of the power switch network, the IR-drop size requirements and the inrush current size requirements; the arrangement types include: grid arrangement, chain arrangement and ring arrangement; A three-dimensional integration module is used to perform physical layout and wiring design of the power switch network according to the arrangement type, and to use TSV technology or Wire-bonding technology to three-dimensionally integrate the power switch network with the physical layout and wiring design with the silicon circuit part; wherein the grid arrangement and the chain arrangement use TSV technology for three-dimensional integration, and the ring arrangement uses Wire-bonding technology for three-dimensional integration; The power switch network includes a plurality of voltage domain areas, each voltage domain area corresponds to a metal pad, and the metal pad is a power access point of the corresponding voltage domain area; The grid-type arrangement is equivalent to a regular dot matrix array, in which each node is a power switch unit, one end of the power switch unit is connected to the corresponding power supply network through a metal pad, and the other end is connected to the silicon circuit part in a three-dimensional integration manner through TSV technology, and the power switch unit in the voltage domain area is controlled by a separate control signal; the chain arrangement connects multiple Power Switch units in series into a chain, inserts a buffer between each Power Switch unit for connection, one end of the Power Switch unit receives the shutdown domain voltage through the power supply network through a metal pad, and the other end is connected to the silicon circuit part in a three-dimensional integration manner through TSV technology; wherein, each Power Switch unit in the shutdown domain is controlled by a control signal; in the ring arrangement, each Power Switch unit is surrounded by a metal pad, one end of the Power Switch unit is connected to the metal pad to receive the shutdown domain voltage through the power supply network, when using the Wire-bonding technology, the other end of the Power Switch unit is connected to the metal pad to connect to the power supply of the lower silicon circuit part, and when using the TSV technology, the other end of the Power Switch unit is connected to the power supply network of the lower silicon circuit part through the TSV technology.

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