Power-off test method, device, equipment and medium

By setting the test buried point in the test program and simulating the power-off jump operation, the problem of low coverage of power-off tests in the existing technology and the inability to simulate multiple power-offs is solved, and efficient and widely covered power-off tests are achieved.

CN119694371APending Publication Date: 2025-03-25BEIJING TSINGTENG MICROSYSTEM CO LTD
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Patent Information

Application Number
CN202411771260.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-04
Publication Date
2025-03-25

AI Technical Summary

Technical Problem

The current technology has low test coverage in power-off tests, and cannot simulate tests of secondary power-offs and multiple power-offs, and the test efficiency is low.

Method used

By setting test buried points for the tested program, including jump marks and jump instructions, it simulates the power-off jump operation during transaction writing and power-on rollback, and realizes efficient testing of transaction writing and power-on rollback processes.

Benefits of technology

It improves test coverage, can quickly locate problems, facilitates analysis of errors, realizes continuous uninterrupted testing of transaction write and power-on rollback processes, and supports simulation of multiple power outages.

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Abstract

The invention relates to a power-off test method and device, equipment and a medium. Comprising the steps that a test burying point is set for a tested program, and the test burying point comprises a jump mark and a jump instruction; in the process of executing the tested program, obtaining a current jump mark; under the condition that the current jump mark is a first jump mark in the transaction writing process of the tested program, simulating a power-off jump operation of transaction writing based on a first jump instruction; wherein the first jump instruction is a jump instruction in a transaction writing process; under the condition that the current jump mark is a second jump mark in the power-on rollback process of the tested program, simulating a power-off jump operation of the power-on rollback based on a second jump instruction; wherein the second jump instruction is a jump instruction in a power-on rollback process; and continuing to execute the tested program until the current jump mark is the preset maximum value, and detecting whether the data stored in the target address is correct or not. The test coverage is high, and multiple times of outage can be simulated.
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Description

Technical Field

[0001] The present disclosure relates to the field of electronic technology, and in particular to a power-off test method, device, equipment and medium. Background Art

[0002] The transaction protection mechanism means that when writing data to the memory, it is necessary to ensure that the written data meets the expectations. When the power is turned off before the writing is completed, it is necessary to ensure that the value of the target address can be rolled back to the original "old data". After the writing is completed, the data is not rolled back. After each power-off reset, the chip needs to perform a rollback operation first, so as to determine whether the value of the target address needs to be overwritten as "old data" based on the value of the backup area.

[0003] At present, transaction protection power-off test methods generally include integrated testing based on power-off card readers and simulation based on compiler debug (fault elimination) functions. Among them, integrated testing based on power-off card readers is a blind test and cannot cover all scenarios. Simulation based on compiler debug functions can only simulate a power outage once using the reset function, and cannot simulate a second power outage or multiple power outages; at the same time, manual reset cannot perform automatic testing, and the efficiency is low. Summary of the invention

[0004] In order to solve the above technical problems, the present disclosure provides a power-off test method, device, equipment and medium.

[0005] According to one aspect of the present disclosure, a power-off test method is provided, comprising:

[0006] Setting a test point for the program under test, wherein the test point includes: a jump mark and a jump instruction; wherein the jump mark is used to instruct the program under test to execute a jump operation at the jump mark;

[0007] During the execution of the program under test, obtaining a current jump mark;

[0008] When the current jump mark is the first jump mark in the transaction writing process of the program under test, simulating the power-off jump operation of the transaction writing based on the first jump instruction; wherein the first jump instruction is a jump instruction in the transaction writing process;

[0009] In the case where the current jump mark is the second jump mark in the power-on rollback process of the program under test, simulating the power-off jump operation of the power-on rollback based on the second jump instruction; wherein the second jump instruction is a jump instruction in the power-on rollback process;

[0010] Continue to execute the program under test until the current jump mark reaches a preset maximum value, and then stop, and detect whether the data stored in the target address is correct.

[0011] According to another aspect of the present disclosure, there is also provided a power-off test device, comprising:

[0012] A test tracking module is used to set a test tracking point for the program under test, and the test tracking point includes: a jump mark and a jump instruction; wherein the jump mark is used to instruct the program under test to execute a jump operation at the jump mark;

[0013] A program execution module, used for obtaining a current jump mark during execution of the program under test;

[0014] A first simulation module, configured to simulate a power-off jump operation of a transaction write based on a first jump instruction when the current jump mark is a first jump mark in a transaction write process of the program under test; wherein the first jump instruction is a jump instruction in the transaction write process;

[0015] A second simulation module is used to simulate the power-off jump operation of the power-on rollback based on the second jump instruction when the current jump mark is the second jump mark in the power-on rollback process of the program under test; wherein the second jump instruction is a jump instruction in the power-on rollback process;

[0016] The stop and detection module is used to continue executing the program under test until the current jump mark reaches a preset maximum value, and then stop and detect whether the data stored in the target address is correct.

[0017] According to another aspect of the present disclosure, an electronic device is provided, the electronic device comprising:

[0018] processor;

[0019] a memory for storing instructions executable by the processor;

[0020] The processor is used to read the executable instructions from the memory and execute the instructions to implement the above method.

[0021] According to another aspect of the present disclosure, a computer-readable storage medium is provided, wherein the storage medium stores a computer program, and the computer program is used to execute the above method.

[0022] Compared with the prior art, the technical solution provided by the embodiments of the present disclosure has the following advantages:

[0023] The technical solution provided by the embodiment of the present disclosure sets test points for the transaction writing process and the power-on rollback process of the program under test, respectively, and can quickly perform point-testing on the program under test, with high test coverage, which is convenient for error analysis. On this basis, by judging the value of the current jump mark, it is determined whether to perform the power-off jump operation, so that whether in the transaction writing process or the power-on rollback process, when the jump instruction is triggered, the code will jump to the initial state for execution, which can facilitate the simulation of the power-off jump operation of the transaction writing process and the power-on rollback process. Specifically, for the transaction writing process, through the first jump mark and the first jump instruction, the transaction writing power-off test can be continuously and uninterruptedly performed; and for the power-on rollback process, the second jump mark and the second jump instruction can simulate the test of secondary power-off and multiple power-off. The test points set for the two processes of transaction writing and power-on rollback do not interfere with each other, so that multiple rollback power-offs can be performed after simulating the transaction writing power-off. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0025] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0026] Figure 1 This is a flow chart of the power-off test method described in an embodiment of the present disclosure;

[0027] Figure 2 A schematic diagram of a power-off jump according to an embodiment of the present disclosure;

[0028] Figure 3 It is a structural schematic diagram of the power-off test device according to an embodiment of the present disclosure;

[0029] Figure 4 It is a schematic diagram of the structure of the electronic device described in the embodiment of the present disclosure. DETAILED DESCRIPTION

[0030] In order to more clearly understand the above-mentioned objectives, features and advantages of the present disclosure, the scheme of the present disclosure will be further described below. It should be noted that the embodiments of the present disclosure and the features in the embodiments can be combined with each other without conflict.

[0031] In the following description, many specific details are set forth to facilitate a full understanding of the present disclosure, but the present disclosure may also be implemented in other ways different from those described herein; it is obvious that the embodiments in the specification are only part of the embodiments of the present disclosure, rather than all of the embodiments.

[0032] At present, the transaction protection power-off test method has problems such as low test coverage, inability to simulate secondary power outages and multiple power outages, and low test efficiency. In response to the above problems, the present invention provides a power-off test method, device, equipment and medium. By setting test points for the program under test, the transaction write power-off test can be continuously and uninterruptedly performed. At the same time, during the power-on rollback process, the points can be set to simulate secondary power outages and multiple power outages. The solution has high test coverage and is easy to quickly locate problems.

[0033] Figure 1 The flowchart of a power-off test method provided by an embodiment of the present disclosure is applicable to the scenario of software simulation test of the power-off process of the memory transaction protection mechanism, such as NFC (Near Field Communication) chip FLASH memory. The power-off test method can be executed by a power-off test device, which can be implemented by software and / or hardware. Figure 1 As shown, the power-off test method provided by the embodiment of the present disclosure may include the following steps.

[0034] S102, setting a test point for the program under test, the test point including: a jump mark and a jump instruction; wherein the jump mark is used to indicate whether the program under test executes a jump operation when it reaches the jump mark.

[0035] In this embodiment, test points are set for the transaction writing process and the power-on rollback process of the program under test, including:

[0036] The first jump mark and the first jump instruction are set for the transaction write process of the program under test; wherein, the first jump mark and the first jump instruction are both multiple and equal in number. Transaction write means that in the process of data storage, it is usually necessary to ensure the integrity and synchronization of data, that is, it is necessary to synchronize multiple blocks of data with different target addresses to ensure that all data is either completely written to the target address or the target address remains unchanged without new data being written. This write operation is transaction write.

[0037] Exemplarily, setting a test point for transaction write includes: setting the first jump instruction of transaction write to setjump in the program under test, and setting the first jump mark of transaction write to g_jumpnum. The first jump mark g_jumpnum is a variable whose value will change, and the first jump mark is preset with a maximum value; the value of the first jump mark g_jumpnum is used to determine whether to execute the jump.

[0038] A second jump mark and a second jump instruction are set for the power-on rollback process of the program under test; wherein the second jump mark and the second jump instruction are both multiple and equal in number. Exemplarily, the second jump instruction for power-on rollback is set as setjump_rool in the program under test, and the second jump mark for power-on rollback is set as g_jumpnum_rool. The second jump mark is a variable whose value will change, and the first jump mark is preset with a maximum value.

[0039] In this embodiment, two groups of test points are set for transaction write and power-on rollback respectively. The two groups of test points do not interfere with each other. In this way, multiple power-on rollbacks can be performed after simulating the power failure of transaction write.

[0040] S104, obtaining a current jump mark during execution of the program under test.

[0041] This embodiment can execute the program under test from the entry point of the program under test, or it can also execute the program under test after triggering a jump based on any test embedding point during the transaction write process or the power-on rollback process. In the process of executing the program under test, the current jump mark is obtained. It can be understood that the current jump mark can be a jump mark encountered for the first time during the execution of the program under test, and the value of the jump mark at this time is 1; or it can also be a jump mark that is not encountered for the first time during the execution of the program under test, and the jump mark at this time is a value greater than 1.

[0042] S106, when the current jump mark is the first jump mark in the transaction writing process of the program under test, simulating a power-off jump operation of the transaction writing based on the first jump instruction; wherein the first jump instruction is a jump instruction in the transaction writing process.

[0043] Reference Figure 2, in the case where the current jump mark obtained is the first jump mark in the transaction writing process, this embodiment can compare the current jump mark with the value of the first jump mark in the transaction writing process of the program under test. When the current jump mark is compared with the value of the first jump mark in the transaction writing process of the program under test and they are equal, a power outage is triggered, and after the power-off reset, the program under test is jumped to the initial state according to the first jump instruction. Specifically, if the current jump mark is equal to the value of the first jump mark in the transaction writing process of the program under test, the power-off jump operation of the transaction writing is simulated, that is, the power-off is triggered first, and then the power-off reset is performed and the jump back to the initial state indicated by the first jump instruction setjump of the program under test, and the initial state is consistent with the power-on reset state of the chip.

[0044] After jumping back to the initial state, this embodiment increases the value of the first jump mark by 1, and sets the value of the second jump mark preset in the power-on rollback process of the tested program to 0. By increasing the value of the first jump mark g_jumpnum by 1, when the tested program executes to the next jump mark in the transaction write process, the power-off jump operation of the transaction write will be triggered again. At the same time, by setting the value of the second jump mark g_jumpnum_rool in the power-on rollback process to 0, the jump of the power-on rollback can be executed cyclically from the first jump mark.

[0045] After jumping back to the initial state, the program under test is continued to be executed. During the execution of the program under test, a new current jump mark is obtained; S106 is re-executed for the new current jump mark. This is repeated until the current jump mark is the preset maximum value, indicating that the last jump mark written by the transaction is executed. At this time, the subsequent step S110 can be referred to to detect whether the data stored in the target address is correct, and the power-off test ends.

[0046] S108, when the current jump mark is the second jump mark in the power-on rollback process of the program under test, simulating the power-off jump operation of the power-on rollback based on the second jump instruction; wherein the second jump instruction is a jump instruction in the power-on rollback process.

[0047] In order to ensure that the power-off jump operation of the power-on rollback is executed after a transaction write power-off occurs, the present implementation can pre-set the rollback parameters and their values ​​in the program under test.

[0048] Based on this, when the acquired current jump mark is the first jump mark in the transaction write process, the power-off jump operation of simulating power-on rollback based on the second jump instruction in this embodiment may include the following contents.

[0049] First, the value of the second jump marker is increased by 1. By increasing the value of the second jump marker g_jumpnum_rool by 1, when the program under test executes to the next jump marker of the power-on rollback process, the power-off jump operation of the power-on rollback will be triggered again.

[0050] Secondly, determine whether the rollback parameter preset at the second jump mark in the power-on rollback process is the target value; wherein, the target value of the rollback parameter is used to control the execution of the rollback jump after the transaction write power failure occurs; for example: set the rollback parameter to backup_jumpnum, and its target value is 0xFF, which means that the rollback jump is executed after the transaction write power failure occurs, or it can be said that the rollback jump is enabled before writing new data.

[0051] If the rollback parameter is the target value, the current jump mark is compared to see whether it is equal to the value of the second jump mark in the power-on rollback process of the tested program. Correspondingly, if the rollback parameter is not the target value, the current jump mark is no longer compared with the value of the second jump mark, and the rollback jump is not triggered.

[0052] If the current jump mark is equal to the value of the second jump mark, a power failure is triggered, and after the power failure reset, the program under test is jumped to the initial state according to the second jump instruction. In specific implementation, if the current jump mark is equal to the value of the second jump mark in the power-on rollback process of the program under test, the power failure jump operation of the power-on rollback is simulated, that is, the power failure is triggered first, and then the power failure reset and jump back to the initial state indicated by the first jump instruction setjump_rool of the program under test, which is consistent with the power-on reset state of the chip.

[0053] If the rollback parameter is not the target value, or the current jump marker and the second jump marker have different values, the power-on rollback of the program under test will be terminated. If the rollback parameter is not the target value, or the current jump marker and the second jump marker have different values, it is usually the last jump marker in the rollback process, or there is an abnormal point, etc. In this case, the power-on rollback of the program under test can be terminated.

[0054] In the above embodiment, by setting the rollback parameter backup_jumpnum to the target value 0xFF, the following execution sequence can be formed: transaction write → trigger power off → rollback jump → write new data, so as to ensure the rollback to the initial state, ensure that the data is complete and new data is not confused with old and new data.

[0055] Based on the above embodiments, after the power-on rollback of the tested program is completed, the method provided in this embodiment may further include:

[0056] Detect whether the data stored at the target address is old data or new data; if it is not old data or new data, terminate the execution of the program under test; if it is old data, control the current jump mark to be disabled and continue to write the old data to the target address; if it is new data, control the current jump mark to be enabled, jump the program under test to the initial state, and write new data to the target address.

[0057] In this embodiment, in order to verify whether the final result of the power-off test is correct, the target address needs to be written as old data first, and the current jump flag needs to be disabled before writing the old data to prohibit the jump from occurring. Secondly, the current jump flag needs to be enabled before writing the new data to allow the jump to occur. This ensures that the power-off is simulated only during the process of writing the new data.

[0058] S110, continue to execute the program under test until the current jump mark reaches a preset maximum value, and then stop, and detect whether the data stored in the target address is correct.

[0059] According to the above embodiments, multiple test points are set in the tested program; for the transaction writing process, each time a test point (the first jump mark and the first jump instruction) is encountered, the power-off jump operation of simulating transaction writing is looped once; similarly, for the power-on rollback process, each time a test point (the second jump mark and the second jump instruction) is encountered, the power-off jump operation of simulating power-on rollback is looped once. Each time the loop is repeated, the value of the jump mark will increase by 1, and it will be repeated many times until the current jump mark is the preset maximum value, and the power-off test ends. In this case, it is detected whether the data stored in the target address is correct.

[0060] In one embodiment, detecting whether the data stored at the target address is correct may include:

[0061] Detect whether the data stored at the target address is complete old data or complete new data; if yes, determine that the transaction protection mechanism is correct; if no, determine that the transaction protection mechanism is wrong.

[0062] In this embodiment, the result verification is to determine whether the data stored at the target address is complete old data or complete new data. When the acquired data is neither old data nor new data, it is determined that the transaction protection mechanism fails. When the acquired data is old data or new data, it is determined that the transaction protection mechanism is correct.

[0063] In summary, the power-off test method provided by the embodiment of the present disclosure includes: setting test tracking points for the program under test, the test tracking points include: jump marks and jump instructions; wherein, the jump mark is used to indicate that the program under test executes a jump operation at the jump mark; in the process of executing the program under test, obtaining the current jump mark; when the current jump mark is the first jump mark in the transaction writing process of the program under test, simulating the power-off jump operation of the transaction writing based on the first jump instruction; wherein the first jump instruction is a jump instruction in the transaction writing process; when the current jump mark is the second jump mark in the power-on rollback process of the program under test, simulating the power-off jump operation of the power-on rollback based on the second jump instruction; wherein the second jump instruction is a jump instruction in the power-on rollback process; continuing to execute the program under test until the current jump mark is a preset maximum value and stopping, and detecting whether the data stored at the target address is correct.

[0064] This technical solution sets test points for the transaction writing process and power-on rollback process of the program under test, respectively, and can quickly perform test points on the program under test, with high test coverage, which is convenient for error analysis. On this basis, by judging the value of the current jump mark, it is determined whether to perform the power-off jump operation. In this way, whether in the transaction writing process or the power-on rollback process, when the jump instruction is triggered, the code will jump to the initial state for execution, which can facilitate the simulation of the power-off jump operation of the transaction writing process and the power-on rollback process. Specifically, for the transaction writing process, through the first jump mark and the first jump instruction, the transaction writing power-off test can be continuously and uninterruptedly performed; and for the power-on rollback process, the second jump mark and the second jump instruction can simulate the test of secondary power-off and multiple power-off. The test points set for the two processes of transaction writing and power-on rollback do not interfere with each other, so that multiple rollback power-offs can be performed after simulating the transaction writing power-off.

[0065] Figure 3 The present invention provides a schematic diagram of a power failure test device according to an embodiment of the present invention, which can be used to implement the above power failure test method. The power failure test device can include the following modules.

[0066] The tracking module 310 is used to set a test tracking point for the program under test, and the test tracking point includes: a jump mark and a jump instruction; wherein the jump mark is used to instruct the program under test to execute a jump operation at the jump mark;

[0067] A program execution module 320, used to obtain a current jump mark during execution of the program under test;

[0068] A first simulation module 330 is used to simulate a power-off jump operation of a transaction write based on a first jump instruction when the current jump mark is a first jump mark in the transaction write process of the program under test; wherein the first jump instruction is a jump instruction in the transaction write process;

[0069] A second simulation module 340 is used to simulate the power-off jump operation of the power-on rollback based on the second jump instruction when the current jump mark is the second jump mark in the power-on rollback process of the program under test; wherein the second jump instruction is a jump instruction in the power-on rollback process;

[0070] The stop and detection module 350 is used to continue executing the program under test until the current jump mark reaches a preset maximum value, and then stop and detect whether the data stored in the target address is correct.

[0071] In one embodiment, the first simulation module 330 is further configured to:

[0072] When comparing the current jump mark and the first jump mark in the transaction writing process of the program under test, the values ​​are equal, triggering power failure, and after power failure and reset, jumping the program under test to an initial state according to the first jump instruction;

[0073] The value of the first jump mark is increased by 1, and the value of the second jump mark preset during the power-on rollback process of the tested program is set to 0.

[0074] The implementation principle and technical effects of the device provided in this embodiment are the same as those of the aforementioned method embodiment. For the sake of brief description, for matters not mentioned in the device embodiment, reference may be made to the corresponding contents in the aforementioned method embodiment.

[0075] Figure 4 The structure diagram of an electronic device provided by the embodiment of the present disclosure is shown in FIG. Figure 4 As shown, the electronic device 400 includes one or more processors 401 and a memory 402 .

[0076] The processor 401 may be a central processing unit (CPU) or other forms of processing units having data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device 400 to perform desired functions.

[0077] The memory 402 may include one or more computer program products, and the computer program product may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, a random access memory (RAM) and / or a cache memory (cache), etc. The non-volatile memory may include, for example, a read-only memory (ROM), a hard disk, a flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage medium, and the processor 401 may run the program instructions to implement the power-off test method of the embodiment of the present disclosure described above and / or other desired functions. Various contents such as input signals, signal components, noise components, etc. may also be stored in the computer-readable storage medium.

[0078] In one example, the electronic device 400 may further include: an input device 403 and an output device 404, and these components are interconnected via a bus system and / or other forms of connection mechanisms (not shown).

[0079] In addition, the input device 403 may also include, for example, a keyboard, a mouse, and the like.

[0080] The output device 404 can output various information to the outside, including the determined distance information, direction information, etc. The output device 404 can include, for example, a display, a speaker, a printer, a communication network and a remote output device connected thereto, and the like.

[0081] Of course, to simplify, Figure 4 Only some of the components related to the present disclosure in the electronic device 400 are shown, and components such as a bus, an input / output interface, etc. are omitted. In addition, according to specific application situations, the electronic device 400 may also include any other appropriate components.

[0082] Furthermore, this embodiment also provides a computer-readable storage medium, wherein the storage medium stores a computer program, and the computer program is used to execute the above-mentioned power-off test method.

[0083] A computer program product of a power-off test method, device, electronic device, and medium provided in the embodiments of the present disclosure includes a computer-readable storage medium storing program code. The instructions included in the program code can be used to execute the methods described in the previous method embodiments. The specific implementation can be found in the method embodiments and will not be repeated here.

[0084] It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0085] The above description is only a specific embodiment of the present disclosure, so that those skilled in the art can understand or implement the present disclosure. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure will not be limited to the embodiments described herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A power-off test method, characterized in that: include: Setting a test point for the program under test, wherein the test point includes: a jump mark and a jump instruction; wherein the jump mark is used to instruct the program under test to execute a jump operation at the jump mark; During the execution of the program under test, obtaining a current jump mark; When the current jump mark is the first jump mark in the transaction writing process of the program under test, simulating the power-off jump operation of the transaction writing based on the first jump instruction; wherein the first jump instruction is a jump instruction in the transaction writing process; In the case where the current jump mark is the second jump mark in the power-on rollback process of the program under test, simulating the power-off jump operation of the power-on rollback based on the second jump instruction; wherein the second jump instruction is a jump instruction in the power-on rollback process; Continue to execute the program under test until the current jump mark reaches a preset maximum value, and then stop, and detect whether the data stored in the target address is correct.

2. The method according to claim 1, characterized in that The power-off jump operation based on the first jump instruction simulation transaction write includes: When comparing the current jump mark and the first jump mark in the transaction writing process of the program under test, the values ​​are equal, triggering power failure, and after power failure and reset, jumping the program under test to an initial state according to the first jump instruction; The value of the first jump mark is increased by 1, and the value of the second jump mark preset during the power-on rollback process of the tested program is set to 0.

3. The method according to claim 1, characterized in that The power-off jump operation of simulating power-on rollback based on the second jump instruction includes: Increasing the value of the second jump mark by 1; Determine whether the rollback parameter preset at the second jump mark in the power-on rollback process is a target value; wherein the target value of the rollback parameter is used to control the execution of the rollback jump after a transaction write power failure occurs; If the rollback parameter is the target value, comparing whether the current jump mark is equal to the value of the second jump mark in the power-on rollback process of the tested program; If the values ​​of the current jump mark and the second jump mark are equal, a power outage is triggered, and after power off and reset, the program under test is jumped to an initial state according to the second jump instruction; If the rollback parameter is not the target value, or the values ​​of the current jump mark and the second jump mark are not equal, the power-on rollback of the program under test is terminated.

4. The method according to claim 3, characterized in that After the power-on rollback of the program under test is finished, the method further includes: Detect whether the data stored at the target address is old data or new data; If it is not the old data or the new data, then terminate the execution of the tested program; If it is old data, controlling the current jump mark to be disabled and continuing to write the old data to the target address; If it is new data, the current jump mark is controlled to be enabled, and the program under test is jumped to the initial state, and the new data is written to the target address.

5. The method according to claim 1, characterized in that The step of detecting whether the data stored in the target address is correct includes: Detect whether the data stored at the target address is complete old data or complete new data; If yes, it is determined that the transaction protection mechanism is correct; If not, it is determined that the transaction protection mechanism is wrong.

6. The method according to claim 1, characterized in that The step of setting a test point for the program under test includes: Setting a first jump mark and a first jump instruction for the transaction write process of the program under test; wherein the first jump mark and the first jump instruction are both multiple and equal in number; A second jump mark and a second jump instruction are set for the power-on rollback process of the program under test; wherein the second jump mark and the second jump instruction are both multiple and equal in number.

7. A power-off test device, characterized in that: include: A test tracking module is used to set a test tracking point for the program under test, and the test tracking point includes: a jump mark and a jump instruction; wherein the jump mark is used to instruct the program under test to execute a jump operation at the jump mark; A program execution module, used for obtaining a current jump mark during execution of the program under test; A first simulation module, configured to simulate a power-off jump operation of a transaction write based on a first jump instruction when the current jump mark is a first jump mark in a transaction write process of the program under test; wherein the first jump instruction is a jump instruction in the transaction write process; A second simulation module is used to simulate the power-off jump operation of the power-on rollback based on the second jump instruction when the current jump mark is the second jump mark in the power-on rollback process of the program under test; wherein the second jump instruction is a jump instruction in the power-on rollback process; The stop and detection module is used to continue executing the program under test until the current jump mark reaches a preset maximum value, and then stop and detect whether the data stored in the target address is correct.

8. The device according to claim 7, characterized in that The first simulation module is also used for: When comparing the current jump mark and the first jump mark in the transaction writing process of the program under test, the values ​​are equal, triggering power failure, and after power failure and reset, jumping the program under test to an initial state according to the first jump instruction; The value of the first jump mark is increased by 1, and the value of the second jump mark preset during the power-on rollback process of the tested program is set to 0.

9. An electronic device, characterized in that: The electronic device comprises: processor; a memory for storing instructions executable by the processor; The processor is used to read the executable instructions from the memory and execute the instructions to implement the method described in any one of claims 1 to 6.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores instructions, and when the instructions are executed on a terminal device, the terminal device implements the method according to any one of claims 1 to 6.