Radiation-resistant semiconductor power device

Abstract

A radiation resistant semiconductor device is provided that includes a heavily doped substrate of the semiconductor device, a drift layer having a substantially uniform doping concentration and thickness. The doping concentration and thickness of the drift layer are such that an electric field profile in the drift layer extends less than 80% of the thickness of the drift layer when the semiconductor device is operating at a maximum voltage rating, thereby providing an anti-radiation property of the device.

Description

Government interests

[0001] This invention was made with government support awarded by NASA under Contract No. 80NSSC21K0766. The government has certain rights in this invention. Technical Field

[0002] These teachings relate generally to semiconductor power devices and, more particularly, to radiation-hardened semiconductor power devices. Background Art

[0003] Semiconductor devices can be used in a variety of applications. These semiconductor devices, such as silicon carbide (SiC) power MOSFETs (metal oxide semiconductor field effect transistors), provide commercial advantages such as high power applications. It is believed that due to the large band gap of SiC-based power electronic devices, these devices will be more tolerant to radiation effects in these applications. However, SiC semiconductor power devices may be at least susceptible to single event effects and particularly susceptible to single event burnout, as well as failure at high blocking voltages due to radiation intolerance. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] Various needs are met, at least in part, by providing radiation-hardened semiconductor power devices as described in the following detailed description, particularly when studied in conjunction with the accompanying drawings, wherein a complete and enabling disclosure of aspects of the present description, including the best mode thereof, to one of ordinary skill in the art is set forth in the specification with reference to the accompanying drawings, in which:

[0005] Figure 1A A conventional semiconductor device as known in the art is shown;

[0006] Figure 1B including a diagram of a conventional semiconductor device operated at its breakdown voltage as known in the art;

[0007] Figure 2A including a graph of drift layer resistance as a function of drift doping for a known semiconductor device;

[0008] Figure 2B including a graph of drift layer thickness as a function of drift doping for known semiconductor devices;

[0009] Figure 3A A first prior art semiconductor device is shown;

[0010] Figure 3B including a graph of a first prior art semiconductor device operating at its breakdown voltage;

[0011] Figure 3C A second prior art semiconductor device is shown;

[0012] Figure 3D including a graph of a second prior art semiconductor device operating at its breakdown voltage;

[0013] Figure 4 A third prior art semiconductor device is shown;

[0014] Figure 5A FIG. 1 illustrates a radiation-hardened semiconductor power device according to an embodiment;

[0015] Figure 5B Depicts the operating voltage at its breakdown Figure 5A Diagram of radiation-hardened semiconductor power devices;

[0016] Fig. 6A Describe and Figure 5A a graph of drift layer resistance as a function of drift doping of a known semiconductor device compared to a radiation hardened semiconductor power device;

[0017] Figure 6B Describe and Figure 5A a graph of drift layer thickness as a function of drift doping of a known semiconductor device compared to a radiation hardened semiconductor power device of the type described herein; and

[0018] Figure 7 A method of forming a radiation-hardened semiconductor power device is described according to one embodiment.

[0019] The elements in the drawings are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the size and / or relative positioning of some of the elements in the drawings may be exaggerated relative to other elements to help improve the understanding of the various embodiments of the present teachings. In addition, common but well-known elements that are useful or necessary in commercially feasible embodiments are generally not depicted in order to promote a less obstructive view of these different embodiments of the present teachings. Certain actions and / or steps may be described or depicted in a specific order of occurrence, and those skilled in the art will understand that such specificity regarding sequence is not actually required. DETAILED DESCRIPTION

[0020] The terms and expressions used herein have the common technical meanings consistent with such terms and expressions given by those skilled in the art as set forth above, unless a different specific meaning has been set forth elsewhere herein. Unless otherwise specifically indicated, the word "or" when used herein should be interpreted as having a separate configuration rather than a combined configuration. The terms "coupled", "fixed", "attached" and the like refer to both direct coupling, fixing or attachment and indirect coupling, fixing or attachment through one or more intermediate components or features, unless otherwise specified herein.

[0021] The singular forms "a," "an," and "the" include plural references unless the context clearly dictates otherwise.

[0022] Approximate language as used throughout the specification and claims herein is applied to modify any quantitative representation that allows for variation without causing a change in the basic function associated with it. Therefore, values ​​modified by one or more terms such as "approximately," "approximately," and "substantially" are not intended to be limited to the exact values ​​specified. In at least some instances, approximate language may correspond to the accuracy of an instrument used to measure the value, or the accuracy of a method or machine used to construct or manufacture a component and / or system. For example, approximate language may refer to within a 10 percent margin.

[0023] like Figure 1A As shown in , a conventional semiconductor device 10 generally includes a p-type layer 12, an epitaxial layer 14 used as a drift or depletion layer, and a substrate 16. The conventional semiconductor device 10 also includes a junction 18 between the epitaxial layer 14 and the substrate 16, and a junction 19 between the epitaxial layer 14 and the p-type layer 12. The conventional semiconductor device 10 may additionally include a source region 17 and a drain region 15. In addition, the conventional semiconductor device 10 may include a gate dielectric layer 13 and a gate electrode 11. The conventional semiconductor device 10 can provide a high blocking voltage and may therefore be useful for high power applications as discussed above. However, the conventional semiconductor device 10 may suffer from failure due to radiation intolerance at a high blocking voltage and cannot withstand radiation events. As is known in the art, when a semiconductor device is hit by heavy ions, beta, gamma, or neutrons while operating near its maximum voltage rating, an exemplary radiation event may occur. The high energy associated with these ions makes it difficult to shield the semiconductor device and leaves many electron-hole pairs. These radiation events can be characterized as single-particle effects and / or single-particle burnouts. Ultimately, in some instances, these radiation events may cause device failure. The prior art provides solutions to this, however, in doing so, creates additional challenges and complexities, as discussed below.

[0024] Figure 1B A one-dimensional cross-sectional graph 22 illustrating a conventional semiconductor device 10 operating at its breakdown voltage, with linear distance on the x-axis and magnitude of the electric field on the y-axis, as known in the art. Graph 22 illustrates depletion of the epitaxial layer of the conventional semiconductor device 10, with the strength of the electric field distribution across the epitaxial layer 14 toward the junction 18 and the substrate 16. Figure 1B A semiconductor device with a 9um epitaxial layer operating at a maximum voltage rating of 1600V is illustrated. Figure 1BThe conventional semiconductor device 10 is shown just before breakdown. When the semiconductor device breaks down at the junction 19, the resulting electric field distribution is a trapezoidal electric field across the epitaxial layer and substrate of the conventional semiconductor device 10, as shown in the graph 22. The trapezoidal electric field distribution indicates that the epitaxial layer is completely depleted. When continued breakdown occurs, or the operation of the conventional semiconductor device 10 occurs at a higher operating voltage, the conventional semiconductor device 10 may be damaged over time.

[0025] refer to Figure 2A and Figure 2B , Graphs 26 and 28 illustrate exemplary design curves for known semiconductor power devices. Specifically, Graph 26 illustrates a design curve for a unipolar SiC device blocking region, which shows the barrier layer resistance as a function of the barrier layer doping for certain specific design blocking voltages. Graph 28 illustrates a design curve for a unipolar SiC device blocking region, which shows the barrier layer thickness as a function of the barrier layer doping for certain specific design blocking voltages. The triangular electric field breakdown limit is illustrated by the diagonal lines on both Graphs 26 and 28. The design curves to the left of the triangular breakdown voltage limit range illustrate known devices for device classes from 1.2 kV to 7.5 kV. The design curves illustrate devices that result in a trapezoidal electric field distribution, i.e., devices that include a drift layer that is fully depleted at the maximum voltage rating. In addition, as shown in Graphs 26 and 28, the design curves extend substantially vertically at the triangular field breakdown limit for each device class design curve. This means that given a constant drift layer doping, no additional drift thickness can increase the breakdown voltage.

[0026] In use, charts 26 and 28 can be used in the design process of conventional semiconductor devices (such as conventional semiconductor devices 10) of different ratings, and in particular the design process of epitaxial layers or drift layers (such as epitaxial layers 14). Typically, the design process starts with selecting a target breakdown voltage that will be used for the application of conventional semiconductor devices 10. Once selected, the doping concentration for the target breakdown voltage is selected. Using the expected specific device category, the doping concentration is generally selected near the minimum of the design curve of chart 26. The minimum of the design curve tends to approach the triangular breakdown limit of the device category curve. The minimum of the design curve indicates the minimum drift layer resistance. Charts 28 and 26 provide the required thickness and the resulting resistance, respectively. As described above, the design of these conventional devices has a doping concentration and thickness combination that is selected to be within the threshold of the triangular field breakdown limit for the expected device category. For devices designed at the triangular field breakdown limit, as the applied voltage increases toward the limit, the drift layer is completely depleted only when the device reaches breakdown. For devices below the triangular field breakdown limit, the drift layer is depleted before the device reaches breakdown. The resulting electric field distribution is trapezoidal and extends partially into the substrate. Graphs 26 and 28 are provided only as illustrations of the design process, and in practice, the epitaxial doping / thickness specifications may include tolerances such that the specifications will result in a rectangular shape on a thickness versus doping plot and a more complex contour on a resistance versus doping plot.

[0027] Figure 3A , Figure 3C and Figure 4 Several different ways to provide radiation-hardened semiconductor power devices are illustrated. Conventional ways to provide radiation protection include derating and the inclusion of buffer layers. Derating a device involves adopting a semiconductor device design with a higher voltage rating and setting a lower maximum operating voltage from the voltage that the device was originally designed to handle. Compared to an unhardened semiconductor device originally designed to operate at the same maximum operating voltage, a device that is derated to operate at the maximum operating voltage typically has a less doped and thicker drift layer. Therefore, compared to an unhardened semiconductor device designed to operate at the same maximum operating voltage, the derated device has significantly higher on-state losses. Figure 3A and Figure 3C The diagram shows devices that can be used as derated devices.

[0028] like Figure 3A As shown in FIG. 1 , a first prior art device 30 is shown to include a p-type layer 32, a large lightly doped epitaxial layer 34, a heavily doped substrate 36, and a junction 38 where the large lightly doped epitaxial layer 34 and the heavily doped substrate 36 meet. As used herein, the heavily doped substrate may include a layer having a thickness of 1×10^18 cm -3 and less than 4x10^19cm-3 For illustration purposes only, only a portion of the heavily doped substrate 36 is shown. Figure 3B , the graph 40 illustrates the depletion of the first prior art device 30 by the extent to which the electric field distribution extends into the large lightly doped epitaxial layer 34 toward the junction 38 and the heavily doped substrate 36. Specifically, the graph 40 illustrates a one-dimensional cross-sectional graph of the first prior art device 30 operating at its breakdown voltage, with linear distance on the x-axis and the magnitude of the electric field on the y-axis. The first prior art device 30 is a 4.5 kV class device operating at a 5 kV breakdown voltage. Similar to the conventional semiconductor device 10 and the graph 22, the first prior art device 30 operating at the breakdown voltage has a trapezoidal electric field across the drift layer of the first prior art device 30.

[0029] exist Figure 3C A second prior art solution using a device is provided in Figure 3C A second prior art device 50 is shown including a p-type layer 52, a large lightly doped epitaxial layer 54, a heavily doped substrate 56, and a junction 58 where the large lightly doped epitaxial layer 54 and the heavily doped substrate 56 meet. For purposes of illustration only, the heavily doped substrate 56 is shown as being smaller than the large lightly doped epitaxial layer 54. Graph 60 illustrates the depletion of the second prior art device 50 by the extent to which the electric field distribution extends into the large lightly doped epitaxial layer 54, as shown in FIG. Figure 3D . Specifically, the graph 60 illustrates a one-dimensional cross-sectional view of the second prior art device 50 operating at its breakdown voltage, with linear distance on the x-axis and the magnitude of the electric field on the y-axis. The second prior art device 50 is a 4.5 kV class device operating at a 5.5 kV breakdown voltage. Compared to the first prior art device 30, the second prior art device 50 can avoid complete depletion of the large lightly doped epitaxial layer 54 when operating at the maximum operating voltage. In this example, the second prior art device 50 breaks down before the large lightly doped epitaxial layer 54 is completely depleted and provides blocking at high voltages.

[0030] Due to the size of the large lightly doped epitaxial layer 54 of the second prior art device 50, the device breaks down at approximately full depletion, as compared to the size of the large lightly doped epitaxial layer 34 of the first prior art device 30. Because the second prior art device 50, and in particular the large lightly doped epitaxial layer 54, breaks down at approximately full depletion, rather than after full depletion, as shown in graph 40 of the first prior art device 30, the second prior art device 50 may be more useful for blocking high voltages. Although the large lightly doped epitaxial layer 54 is not fully depleted, as shown in graph 60, the large lightly doped epitaxial layer 54 has a depletion of nearly 100%. Comparing the first prior art device 30 and the second prior art device 50, and in particular the large lightly doped epitaxial layer 34 and the large lightly doped epitaxial layer 54, adding approximately 40% additional thickness in the epitaxial layer results in an increase in breakdown voltage of approximately 10%.

[0031] Figure 3A and Figure 3C The device shown in Figure 26 can be operated as a derated device. As discussed above, a derated device is a device that operates at a much lower voltage, such as the first prior art device 30 and the second prior art device 50 that operate at 1.2 kV. In doing so, the device is more likely to survive a radiation event, resulting in a radiation hardened device. However, due to the lower doping concentration, based on the design curves in Figures 26 and 28, the on-state resistance losses of such a device will be much higher than a device originally designed for 1.2 kV. Specifically, as Figure 2A and discussed below Fig. 6A and Figure 6B As shown in FIG. 1 , the drift layer resistance of the first prior art device 30 and the second prior art device 50 is much higher than that of the conventional semiconductor device 10, which is a 1.2 kV class device. In addition, due to the light doping of the epitaxial layer, the first prior art device 30 and the second prior art device 50 may also be more expensive because consistent and uniform epitaxial layer doping is required at lower doping.

[0032] refer to Figure 4 , a semiconductor device 80 with a buffer layer is shown. The semiconductor device 80 includes a p-type layer 82, a drift layer 84, a buffer layer 83, and a substrate 86. The semiconductor device 80 includes a drift-to-buffer junction 85 and a buffer-to-substrate junction 87.

[0033] During a radiation event, the buffer layer 83 disperses at least a portion of the generated electric field created in the drift layer 84 by the buffer layer 83 before reaching the substrate 86. The dispersion can additionally extend the electric field across the entire buffer layer 83 and slow the depletion of the drift layer 84. In doing so, the semiconductor device 80 can withstand radiation events, such as single-particle effects and / or single-particle burnouts when the semiconductor device is hit by heavy ions, beta, gamma or neutrons while operating near its maximum voltage rating. Similar to the first prior art device 30 and the second prior art device 50 operated as derated devices, although the semiconductor device 80 can be considered radiation-resistant, the drift layer 84 can be completely and / or substantially depleted, in the range of 90% or more depletion. In addition, due to the added buffer layer 83, the construction of the semiconductor device 80 is more complicated than the conventional semiconductor device 10, the first prior art device 30 and the second prior art device 50. The complex construction is more time-consuming and expensive due to the need for more complex epitaxial layer growth.

[0034] In general, various aspects of the present disclosure provide radiation-resistant semiconductor devices that balance the need to block high voltages while minimizing and / or reducing additional on-state resistance losses. This can be achieved by using heavily doped and thick drift layers compared to the epitaxial layers of the devices discussed above. When doing so, the amount of depletion of the present disclosure is substantially less than the other devices described. Although those skilled in the art may consider this to be wasteful and / or to increase additional resistance due to the doping or length of the thick drift layer, when doing so, the device of the present disclosure can block high voltages and withstand radiation events while maintaining a lower amount of on-state resistance losses. In addition, since the buffer layer 83 of the semiconductor device 80 creates a complex structure to be manufactured, and the lightly doped properties of the large lightly doped epitaxial layers 34 and 54 of the corresponding first prior art device 30 and the second prior art device 50 create a more expensive epitaxial layer with higher resistance, the device of the present disclosure can be produced more cost-effectively.

[0035] refer to Figure 5A , a radiation-hardened semiconductor device 100 is shown. The radiation-hardened semiconductor device 100 includes a p-type layer 102, a drift layer 104 (such as, for example, a large heavily doped epitaxial layer), a substrate 106, and a junction 108. The drift layer 104 is designed so that the radiation-hardened semiconductor device 100 can block high voltages and survive radiation events while maintaining relatively low on-state resistance losses compared to derated devices. In some embodiments, the drift layer 104 includes a 1×10 15 cm -3 and 1.5×10 16 cm -3In some embodiments, the drift layer 104 includes a doping concentration between 100 μm and 50 μm and a thickness between 15 μm and 200 μm for uses where the maximum voltage rating is about 1200 V, and includes a thickness between 50 μm and 200 μm for uses where the maximum voltage rating is about 4500 V. As used herein, the drift layer 104 is heavily doped compared to the large lightly doped epitaxial layers 34 and 54 as described above. The drift layer 104 has a lower doping than the substrate 106.

[0036] exist Figure 5B The electric field generated from operating the radiation-hardened semiconductor device 100 at the maximum voltage rating is shown in FIG. Figure 5B A one-dimensional cross-sectional diagram of a radiation-hardened semiconductor device 100 operating at its breakdown voltage is illustrated, with linear distance on the x-axis and the magnitude of the electric field on the y-axis. The radiation-hardened semiconductor device 100 is a 1.2 kV class device. As illustrated by the diagram 110, the electric field distribution generated is essentially a triangular electric field. This is because the radiation-hardened semiconductor device 100 is depleted by about 80% or less, or in other words, the electric field only penetrates 80% of the drift layer 104. In this example, the electric field distribution penetrates about 40% of the large drift layer 104. As shown in the diagram 110, the depletion of the radiation-hardened semiconductor device 100 is illustrated by the extent to which the electric field distribution extends into the drift layer 104 toward the junction 108 and the substrate 106.

[0037] Compared to the devices described above, the additional thickness and doping of the drift layer 104 results in a device in which 80% or less of the drift layer 104 is depleted when breakdown occurs while operating at the maximum voltage rating. Because the drift layer 104, and thus the radiation-hardened semiconductor device 100, is not completely depleted, the radiation-hardened semiconductor device 100 is able to survive a radiation event while minimizing and / or optimizing on-state resistance losses.

[0038] In some embodiments, when operating at a predetermined maximum operating voltage, the drift layer 104 may be depleted by less than 60%, so that the electric field extends into the drift layer 104 by less than 60%. In some other embodiments, the drift layer 104 may be depleted by less than 50%-20%. The radiation-hardened semiconductor device 100 may be a unipolar radiation-hardened semiconductor device. As an example, the radiation-hardened semiconductor device 100 may be a silicon carbide diode or a metal oxide semiconductor field effect transistor (MOSFET). In addition, the radiation-hardened semiconductor device 100 may be a junction barrier Schottky (JBS) diode.

[0039] Compared to conventional semiconductor devices 10, for the same voltage rating, the radiation-protected semiconductor device 100 maintains a similar doping level of the drift layer 104 compared to the epitaxial layer 14 of the unprotected device design. In contrast, the radiation-protected semiconductor device 100 provides a substantially thicker drift layer 104 compared to the epitaxial layer 14. It has been found that the thickness of the drift layer 104 provides the advantages described herein as it relates to blocking high voltages, withstanding radiation events, avoiding complete depletion, and optimizing on-state resistance losses. By increasing the thickness of the drift layer 104 and maintaining similar doping as the conventional semiconductor device 10, radiation protection is achieved in the radiation-protected semiconductor device 100.

[0040] In some embodiments, by including a highly doped and thick drift layer, the radiation-hardened semiconductor device 100 is substantially less susceptible to single event effects and / or single event burnouts. Single event burnouts may occur when a semiconductor device is struck by heavy ions, beta, gamma, or neutrons while operating near its maximum voltage rating. This is a known failure point for conventional semiconductor devices 10.

[0041] refer to Fig. 6A and 6B , Figures 120 and 122 illustrate the Figure 5A 100 . Graph 120 illustrates drift layer resistance as a function of drift doping, similar to graph 26 . Graph 122 illustrates drift layer thickness as a function of drift doping, similar to graph 28 . The triangular electric field breakdown limit is illustrated by the diagonal lines on both graphs 120 and 122 . The drift layer resistance, drift doping, and drift layer thickness of the radiation-proof semiconductor device 100 are provided as points 101 on both graphs 120 and 122 .

[0042] As shown in graph 120, the radiation-hardened semiconductor device 100 includes a drift doping and a drift layer resistance that is greater than a conventional 1.2 kV class design device, but less than the 4.5 kV class design device described above, as shown by point 31 associated with the first prior art device 30 and point 51 associated with the second prior art device 50. Similarly, as shown in graph 122, the radiation-hardened semiconductor device 100 includes a drift doping that is comparable to a conventional 1.2 kV class design device and greater than the 4.5 kV class design device described above. Finally, the radiation-hardened semiconductor device 100 has a drift layer thickness that is greater than a conventional 1.2 kV class design device but comparable to the 4.5 kV class design device described above. As discussed above, because the radiation-hardened semiconductor device 100 includes a more heavily doped and thicker drift layer, the device is able to survive radiation events, unlike conventional semiconductor devices. This is due to the drift layer not being fully depleted at the breakdown voltage, with at least a 20% margin, which is contrary to the conventional design curves illustrated in graphs 120 and 122. The design process for the radiation hardened semiconductor device 100 provides a device with doping concentration and thickness combinations that would be outside of the designs that would be produced by the conventional design process.

[0043] like Figure 7 As shown in , in designing and forming a radiation-hardened semiconductor device 100, a substrate 106 is provided. At step 710, a drift layer 104 is grown and / or formed on the substrate 106 using an epitaxial growth chamber. At step 720, source, gate, and drain structures are formed over the drift layer 104. At step 730 and as discussed above, a drift layer doping concentration and a drift layer thickness (n) are selected. Finally, at step 740, a drift layer 104 having a drift layer thickness and a drift layer doping concentration that are at least 20% greater than n is formed.

[0044] As discussed above, the device of the present disclosure can block high voltages and withstand radiation events while maintaining and allowing for a lower amount of on-state resistance losses. This results in the present device being optimized and more cost-effective to produce than the known devices described above. In this way, the present device is more cost-effective while providing additional benefits compared to the buffer layer 83 of the semiconductor device 80 (which creates a complex structure to manufacture), and compared to the lightly doped nature of the large lightly doped epitaxial layers 34 and 54 of the corresponding first prior art device 30 and second prior art device 50 (which creates a more expensive epitaxial layer with higher on-state resistance losses).

[0045] Further aspects of the disclosure are provided by the subject matter of the following clauses:

[0046] A semiconductor device comprises: a heavily doped substrate; and a drift layer disposed on the heavily doped substrate, the drift layer having a doping concentration and a thickness; wherein the doping concentration and the thickness of the drift layer are such that when the semiconductor device operates at a predetermined target operating voltage, an electric field distribution in the drift layer extends less than 80% of the thickness of the drift layer.

[0047] A semiconductor device as described in any preceding clause, wherein the electric field distribution is substantially triangular.

[0048] A semiconductor device as claimed in any preceding clause, wherein the electric field distribution in the drift layer extends over less than 60% of the thickness of the drift layer when the semiconductor device is operated at a predetermined target operating voltage.

[0049] A semiconductor device as claimed in any preceding clause, wherein the electric field distribution in the drift layer extends for less than 50% of the thickness of the drift layer when the semiconductor device is operated at a predetermined target operating voltage.

[0050] A semiconductor device as claimed in any preceding clause, wherein the electric field distribution in the drift layer extends less than 30% of the thickness of the drift layer when the semiconductor device is operated at a predetermined target operating voltage.

[0051] A semiconductor device as claimed in any preceding clause, wherein the electric field distribution in the drift layer extends less than 20% of the thickness of the drift layer when the semiconductor device is operated at a predetermined target operating voltage.

[0052] A semiconductor device as claimed in any preceding clause, wherein the electric field distribution in the drift layer extends less than 45% of the thickness of the drift layer when the semiconductor device is operated at a predetermined target operating voltage.

[0053] A semiconductor device as described in any preceding clause, wherein the semiconductor device is a unipolar radiation hard semiconductor device.

[0054] A semiconductor device as claimed in any preceding clause, wherein the semiconductor device is a silicon carbide diode or a metal oxide semiconductor field effect transistor (MOSFET).

[0055] A semiconductor device as claimed in any preceding clause, wherein the predetermined target operating voltage is 1.2 kV.

[0056] A semiconductor device as claimed in any preceding clause, wherein, at a predetermined target operating voltage, the electric field distribution in the drift layer extends to 17 μm into the drift layer.

[0057] A semiconductor device as described in any preceding clause, wherein when the semiconductor device is operated at a predetermined target operating voltage, the doping concentration of the drift layer is within 6×10 15 cm -3and 1.5×10 16 cm -3 and the thickness of the drift layer is between 15 μm and 50 μm.

[0058] A semiconductor device as claimed in any preceding clause, wherein the predetermined target operating voltage is 4.5 kV.

[0059] A semiconductor device as claimed in any preceding clause, wherein, at a predetermined target operating voltage, the electric field distribution in the drift layer extends to 54 μm into the drift layer.

[0060] A semiconductor device as described in any preceding clause, wherein when the semiconductor device is operated at a predetermined target operating voltage of 4500 V, the doping concentration of the drift layer is within a range of 1×10 15 cm -3 and 2×10 15 cm -3 and the thickness of the drift layer is between 50 μm and 200 μm.

[0061] A method of forming a semiconductor as described in any preceding clause, comprising forming a drift layer on a substrate by epitaxy; and forming source, gate and drain structures on the drift layer.

[0062] A method of forming a semiconductor as described in any preceding clause, comprising selecting a drift layer doping concentration and a drift layer thickness (n) based on reducing the on-state resistivity of the drift layer at a predetermined operating voltage; and forming a drift layer having a drift layer thickness and a drift layer doping concentration that are at least 20% greater than n.

[0063] A semiconductor device includes a heavily doped substrate; and a drift layer on the heavily doped substrate, the drift layer having a doping concentration and a thickness; wherein the doping concentration is selected based on reducing the resistivity of the drift layer when operated at a predetermined target operating voltage, wherein the electric field distribution in the drift layer extends to nμm into the drift layer at the predetermined target operating voltage, and wherein the thickness of the drift layer is at least 20% greater than nμm.

[0064] A semiconductor device as claimed in any preceding clause, wherein the thickness of the drift layer is at least 40% greater than n μm when the semiconductor device is operated at a predetermined target operating voltage.

[0065] A semiconductor device as claimed in any preceding clause, wherein the thickness of the drift layer is at least 50% greater than n μm when the semiconductor device is operated at a predetermined target operating voltage.

[0066] This written description uses examples, including the best mode, to disclose the present disclosure, and also to enable those skilled in the art to practice the present disclosure, including making and using any device or system, and performing any combined method. The patentable scope of the present disclosure is defined by the claims, and may include other examples that occur to those skilled in the art. Such other examples are intended to be within the scope of the claims if they include structural elements that do not differ from the literal language of the claims, or if they include equivalent structural elements that do not differ substantially from the literal language of the claims.

Claims

1. A semiconductor device, comprising: Heavily doped substrate; as well as A drift layer disposed on the heavily doped substrate, the drift layer having a doping concentration and a thickness; The doping concentration and the thickness of the drift layer are such that when the semiconductor device is operated at a predetermined target operating voltage, an electric field distribution in the drift layer extends to less than 80% of the thickness of the drift layer.

2. The semiconductor device according to claim 1, wherein The electric field distribution is substantially triangular.

3. The semiconductor device according to claim 1, wherein When the semiconductor device operates at the predetermined target operating voltage, the electric field distribution in the drift layer extends less than 60% of the thickness of the drift layer.

4. The semiconductor device according to claim 1, wherein: When the semiconductor device operates at the predetermined target operating voltage, the electric field distribution in the drift layer extends less than 50% of the thickness of the drift layer.

5. The semiconductor device according to claim 1, wherein When the semiconductor device operates at the predetermined target operating voltage, the electric field distribution in the drift layer extends less than 30% of the thickness of the drift layer.

6. The semiconductor device according to claim 1, wherein When the semiconductor device operates at the predetermined target operating voltage, the electric field distribution in the drift layer extends less than 20% of the thickness of the drift layer.

7. The semiconductor device according to claim 1, wherein When the semiconductor device operates at the predetermined target operating voltage, the electric field distribution in the drift layer extends less than 45% of the thickness of the drift layer.

8. The semiconductor device according to claim 1, wherein The semiconductor device is a unipolar radiation-resistant semiconductor device.

9. The semiconductor device according to claim 1, wherein: The semiconductor device is a silicon carbide diode or a metal oxide semiconductor field effect transistor (MOSFET).

10. The semiconductor device according to claim 1, wherein The predetermined target operating voltage is 1.2 kV.

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