Power device protection circuit and device protection board
By integrating power device protection circuits with digital temperature sensors, voltage regulators, digital potentiometers, operational amplifiers and microcontrollers, the complex problems of GaN power supply bias protection circuit stability and temperature compensation are solved, and high-performance and reliable GaN device protection is achieved.
Patent Information
- Application Number
- CN202411649682.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-19
- Publication Date
- 2025-03-25
- Estimated Expiration
- 2044-11-19
AI Technical Summary
The existing GaN power supply bias protection circuit cannot achieve constant current and constant voltage, resulting in poor stability and complex design of temperature compensation circuits, which increases cost and maintenance difficulty, and limits the widespread application of GaN devices in high-performance application scenarios.
A power device protection circuit is designed, integrating digital temperature sensors, voltage regulators, digital potentiometers, operational amplifiers and microcontrollers to achieve accurate temperature compensation, stable voltage and current output, flexible resistance control, and reliable switching timing control.
It significantly improves the performance, stability and reliability of the circuit, simplifies the design and debugging process, and is suitable for the protection of gallium nitride devices in various scenarios.
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Figure CN119695795A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of circuit protection, and in particular, to a power device protection circuit and a device protection board. Background Art
[0002] With the continuous advancement of semiconductor technology, gallium nitride (GaN) material has become one of the important materials for the research and development of microelectronic devices and optoelectronic devices due to its excellent electrical properties. In particular, microwave power amplifiers based on GaN have strict requirements on power supply timing, stability and temperature adaptability. However, the existing GaN power supply bias protection circuits often have shortcomings, such as the inability to achieve constant current and constant voltage, resulting in poor stability; in addition, the temperature compensation circuit design is complex, which increases costs and maintenance difficulties. These problems limit the widespread application of GaN devices in certain high-performance application scenarios.
[0003] Therefore, the present application provides a power device protection circuit and a device protection board to solve one of the above-mentioned technical problems. Summary of the invention
[0004] The purpose of this application is to provide a power device protection circuit and a device protection board, which can solve at least one of the above-mentioned technical problems. The specific solution is as follows:
[0005] According to a specific implementation of the present application, in a first aspect, the present application provides a power device protection circuit, including:
[0006] A basic protection circuit, including resistors R1, R2, R3, R4, R5, R6, R7, R8, R9, capacitors C1, C2, field effect transistors Q1, first transistors Q2 and second transistors Q3; a digital temperature sensor U1, wherein a power pin VCC of the digital temperature sensor U1 is connected to a power supply terminal V+, a ground pin GND1 of the digital temperature sensor U1 is grounded, a data pin SCL of the digital temperature sensor U1 is connected to an I2C interface A4 of a microcontroller U5, and a data pin SDA of the digital temperature sensor U1 is connected to an I2C interface A5 of the microcontroller U5; the voltage regulator U2, wherein the voltage regulator U 2 is connected to the second voltage output terminal VGG through a fuse, the output pin OUT of the voltage regulator U2 is connected to the power supply terminal V+, the adjustment pin ADJ of the voltage regulator U2 is connected to the ground GND through the resistor R1, the resistor R2, the capacitor C1 of the voltage divider network, and through the resistor R9, and the other end of the resistor R2 is connected to the negative voltage terminal V-; the digital potentiometer U3, the power pin VCC of the digital potentiometer U3 is connected to the power supply terminal V+, the ground pin GND2 of the digital potentiometer U3 is grounded, and the data pins CLK, DATA, and LOAD of the digital potentiometer U3 are respectively connected to the SPI interfaces D10, D11, and D13 of the microcontroller U5. The sliding end W0 of the digital potentiometer U3 is connected to the non-inverting input pin In+ of the operational amplifier U4; the operational amplifier U4, the positive power supply pin Vcc of the operational amplifier U4 is connected to the power supply terminal V+, the negative power supply pin GND3 of the operational amplifier U4 is grounded, and the output pin Out of the operational amplifier U4 is connected to one end of the fourth resistor R4 and the sixth resistor R6; wherein the gate of the field effect transistor Q1 is connected to the GPIO pin D8 of the microcontroller U5, the first transistor Q2 and the second transistor Q3 are connected through the base, and the PWM output pin D9 of the microcontroller U5 is connected to the base of the first transistor Q2 and the base of the second transistor Q3 through the resistor R10. 3; the emitter E of the first triode Q2 is connected to the drain of the field effect tube Q1 through the resistor R4, and the collector C of the first triode Q2 is grounded through the resistor R5; the emitter E of the second triode Q3 is connected to the drain of the field effect tube Q1 through the resistor R6, and is connected to the first voltage output terminal VDD, the collector C of the second triode Q3 is connected to one end of the first capacitor C1, and is connected to the second voltage output terminal VGG and one end of the resistor R8; the source of the field effect tube Q1 is connected to the power supply terminal V+, and is connected to one end of the resistor R3 and the capacitor C2, and the gate of the field effect tube Q1 is also connected to the other end of the resistor R3 and the capacitor C2 respectively.
[0007] In one embodiment, the basic protection circuit includes a switching timing circuit; the switching timing circuit is composed of the field effect tube Q1, the resistor R1, the resistor R2, the resistor R3, the resistor R9 and the capacitor C1; wherein the gate of the field effect tube is connected to one end of the resistor R1; the source of the field effect tube is connected to the power supply end; the drain of the field effect tube is connected to the constant voltage and constant current circuit; one end of the resistor R1 is connected to one end of the resistor R3; the other end of the resistor R1 is connected to one end of the resistor R2; the other end of the resistor R2 is connected to the negative voltage end; the other end of the resistor R3 is connected to the power supply end; one end of the capacitor C1 is connected to one end of the resistor R2; the other end of the capacitor C1 is grounded; wherein the connection node between the resistor R2 and the resistor R1 is a preset node, and when the voltage of the preset node meets the preset condition, the field effect tube is turned on.
[0008] In one embodiment, the basic protection circuit includes a constant voltage and constant current circuit; the constant voltage and constant current circuit is composed of the first transistor Q2, the second transistor Q3, the resistor R4, the resistor R5 and the resistor R6; wherein the base of the first transistor Q2 is respectively connected to the base of the second transistor Q3 and the collector of the first transistor Q2; the emitter of the first transistor Q2 is connected to one end of the resistor R4, and the other end of the resistor R4 is connected to the drain of the field effect transistor Q1; the first The collector of the transistor Q2 is connected to one end of the resistor R5, and the other end of the resistor R5 is grounded; the emitter of the second transistor Q3 is connected to one end of the resistor R6, and the other end of the resistor R6 is connected to the drain of the field effect transistor Q1, and the emitter of the second transistor Q3 is connected to the first voltage output terminal VDD; the collector of the second transistor Q3 is connected to one end of the first capacitor C1 via the resistor R7, and the collector of the second transistor Q3 is connected to the second voltage output terminal VGG via the resistor R7.
[0009] In one embodiment, the basic protection circuit includes a temperature compensation circuit; the temperature compensation circuit includes the first transistor Q2 and the second transistor Q3; wherein the base of the first transistor Q2 is respectively connected to the base of the second transistor Q3 and the collector of the first transistor Q2; the emitter of the first transistor Q2 is connected to the drain of the field effect transistor Q1; the collector of the first transistor Q2 is grounded; the emitter of the second transistor Q3 is connected to the drain of the field effect transistor Q1, and the emitter of the second transistor Q3 is connected to the first voltage output terminal VDD; the collector of the second transistor Q3 is connected to one end of the first capacitor C1 via the resistor R7, and the collector of the second transistor Q3 is connected to the second voltage output terminal VGG via the resistor R7.
[0010] In one embodiment, one end of the resistor R7 is connected to the collector of the second transistor, the other end of the resistor R7 is connected to one end of the capacitor C1, and the other end of the resistor R7 is connected to the second voltage output terminal VGG; one end of the resistor R8 is connected to the other end of the resistor R7 and connected to the second voltage output terminal VGG; the resistor R9, one end of the resistor R9 is connected to the other end of the capacitor C1, the other end of the resistor R9 is connected to the other end of the resistor R8, and the branch composed of the resistor R9 and the capacitor C1 is connected in parallel with the resistor R8.
[0011] According to a specific implementation of the present application, in a second aspect, the present application provides a device protection board, which is equipped with a power device protection circuit as described in any one of the first aspects.
[0012] Compared with the prior art, the above scheme of the embodiment of the present application has at least the following beneficial effects: the power device protection circuit provided by the present application realizes accurate temperature compensation, stable voltage and current output, flexible resistance control and reliable switch timing control by integrating a digital temperature sensor, a voltage regulator, a digital potentiometer, an operational amplifier and a microcontroller, which significantly improves the performance, stability and reliability of the circuit, simplifies the design and debugging process, and is suitable for gallium nitride device protection in various scenarios. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 A power device protection circuit diagram in the related art is shown.
[0014] Figure 2 The power device protection circuit diagram in this application is shown.
[0015] Figure 3a A top-level schematic diagram of a device protection board in the related art is shown.
[0016] Figure 3b The bottom schematic diagram of the device protection board in the related art is shown.
[0017] Figure 4a A top schematic diagram of a device protection board in this application is shown.
[0018] Figure 4b The bottom schematic diagram of the device protection board in this application is shown. DETAILED DESCRIPTION
[0019] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application.
[0020] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings, and "multiple" generally includes at least two.
[0021] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.
[0022] It should be understood that although the terms first, second, third, etc. may be used to describe in the embodiments of the present application, these descriptions should not be limited to these terms. These terms are only used to distinguish the descriptions. For example, without departing from the scope of the embodiments of the present application, the first may also be referred to as the second, and similarly, the second may also be referred to as the first.
[0023] As used herein, the words "if" and "if" may be interpreted as "at the time of" or "when" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrases "if it is determined" or "if (stated condition or event) is detected" may be interpreted as "when it is determined" or "in response to determining" or "when detecting (stated condition or event)" or "in response to detecting (stated condition or event)", depending on the context.
[0024] It should also be noted that the term "includes", "comprising" or any other variation thereof is intended to cover non-exclusive inclusion, so that a commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprising a ..." do not exclude the existence of other identical elements in the commodity or device including the elements.
[0025] It should be particularly noted that any symbols and / or numbers in the specification that are not marked in the accompanying drawings are not drawing marks.
[0026] With the continuous advancement of semiconductor technology, gallium nitride (GaN) material has become one of the important materials for the research and development of microelectronic devices and optoelectronic devices due to its excellent electrical properties. In particular, microwave power amplifiers based on GaN have strict requirements on power supply timing, stability and temperature adaptability. However, the existing GaN power supply bias protection circuit has some shortcomings, such as the inability to achieve constant current and constant voltage, resulting in poor stability; in addition, the temperature compensation circuit design is complex, which increases the cost and maintenance difficulty. These problems limit the widespread application of GaN devices in certain high-performance application scenarios.
[0027] In the related art, a protection circuit for gallium nitride power devices is provided.
[0028] Figure 1 A power device protection circuit diagram in the related art is shown.
[0029] In related technologies, such as Figure 1 As shown, the protection circuit includes a power input part, a power management part, a switch timing circuit, a temperature monitoring part, an I2C communication interface, a protection and status monitoring part, and a general input and output part. The power input part provides the main power supply and ground line, and the power management part converts the main power supply into VDD and VGG outputs through a power converter, which respectively supply the operating voltage and gate drive voltage of the GaN power device. The switch timing circuit receives an external clock signal and generates a control signal to control the switching timing of the GaN power device. The temperature monitoring part monitors the circuit temperature through a thermistor and provides temperature feedback. The I2C communication interface is used for the transmission of data and clock signals. The protection and status monitoring part outputs power-on and normal status signals and provides interrupt output. The general input and output part is used to read the status of external devices and control external devices.
[0030] However, although the protection circuit in the related art has complete basic functions, it has some deficiencies in power management, timing control and protection functions. For example, the lack of accurate temperature compensation mechanism leads to unstable circuit performance under different temperature conditions; the voltage and current control are not accurate enough to ensure that the load works under stable voltage and current; the switch timing control is inaccurate, which affects the response speed and reliability of the circuit; the resistance value adjustment is not flexible and difficult to adapt to different application scenarios; the lack of effective filtering and current stabilization measures leads to large fluctuations in the power supply voltage, affecting the stability and reliability of the circuit. The improved circuit solves these problems by integrating digital temperature sensors, voltage regulators, digital potentiometers, operational amplifiers and microcontrollers, significantly improving the performance, stability and reliability of the circuit.
[0031] In view of this, the present application provides a power device protection circuit capable of efficiently protecting gallium nitride power devices.
[0032] The optional embodiments of the present application are described in detail below with reference to the accompanying drawings.
[0033] The embodiment provided in the present application is an embodiment of a power device protection circuit.
[0034] Combine the following Figure 2 The embodiments of the present application are described in detail.
[0035] Figure 2 The flowchart of the power device protection circuit of the present application is shown as follows: Figure 2 As shown, the non-integrated components in the power device protection circuit include resistor R1, resistor R2, resistor R3, resistor R4, resistor R5, resistor R6, resistor R7, resistor R8, resistor R9, resistor R10, fuse F1, capacitor C1, capacitor C2, field effect transistor Q1, first transistor Q2 and second transistor Q3, and the integrated components include digital temperature sensor U1, voltage regulator U2, digital potentiometer U3, operational amplifier U4, and microcontroller U5.
[0036] In the present application, the power pin VCC of the digital temperature sensor U1 is connected to the power supply terminal V+, the ground pin GND1 of the digital temperature sensor U1 is grounded, the data pin SCL of the digital temperature sensor U1 is connected to the I2C interface A4 of the microcontroller U5, and the data pin SDA of the digital temperature sensor U1 is connected to the I2C interface A5 of the microcontroller U5.
[0037] In the present application, the input pin IN of the voltage regulator U2 is connected to the second voltage output terminal VGG through a fuse, the output pin OUT of the voltage regulator U2 is connected to the power supply terminal V+, the adjustment pin ADJ of the voltage regulator U2 is connected to the ground GND through the resistor R1, resistor R2, capacitor C1 of the voltage divider resistor network, and through the resistor R9, and the other end of the resistor R2 is connected to the negative voltage terminal V-.
[0038] In the present application, the power pin VCC of the digital potentiometer U3 is connected to the power supply terminal V+, the ground pin GND2 of the digital potentiometer U3 is grounded, the data pins CLK, DATA, and LOAD of the digital potentiometer U3 are respectively connected to the SPI interfaces D10, D11, and D13 of the microcontroller U5, and the sliding end W0 of the digital potentiometer U3 is connected to the non-inverting input pin In+ of the operational amplifier U4.
[0039] In the present application, the positive power pin Vcc of the operational amplifier U4 is connected to the power supply terminal V+, the negative power pin GND3 of the operational amplifier U4 is grounded, and the output pin Out of the operational amplifier U4 is connected to one end of the fourth resistor R4 and the sixth resistor R6.
[0040] Among them, the gate of the field effect transistor Q1 is connected to the GPIO pin D8 of the microcontroller U5, the first transistor Q2 is connected to the second transistor Q3 through the base, and the PWM output pin D9 of the microcontroller U5 is connected to the base of the first transistor Q2 and the base of the second transistor Q3 through the resistor R10. The emitter E of the first transistor Q2 is connected to the drain of the field effect transistor Q1 through the resistor R4, and the collector C of the first transistor Q2 is grounded through the resistor R5. The emitter E of the second transistor Q3 is connected to the drain of the field effect transistor Q1 through the resistor R6, and is connected to the first voltage output terminal VDD, and the collector C of the second transistor Q3 is connected to one end of the first capacitor C1, and is connected to the second voltage output terminal VGG and one end of the resistor R8.
[0041] In the present application, the source of the field effect transistor Q1 is connected to the power supply terminal V+, and is connected to one end of the resistor R3 and the capacitor C2, and the gate of the field effect transistor Q1 is also connected to the other end of the resistor R3 and the capacitor C2 respectively.
[0042] In the present application, the basic protection circuit is composed of non-integrated components including resistor R1, resistor R2, resistor R3, resistor R4, resistor R5, resistor R6, resistor R7, resistor R8, resistor R9, capacitor C1, capacitor C2, field effect transistor Q1, first transistor Q2 and second transistor Q3. In addition, based on the combination of components, the basic protection circuit may include a switch timing circuit, a constant voltage and constant current circuit, and a temperature compensation circuit.
[0043] In an embodiment of the present application, the basic protection circuit includes a switch timing circuit. The switch timing circuit is composed of a field effect tube Q1, a resistor R1, a resistor R2, a resistor R3, a resistor R9 and a capacitor C1. Among them, the gate of the field effect tube is connected to one end of the resistor R1. The source of the field effect tube is connected to the power supply end. The drain of the field effect tube is connected to the constant voltage and constant current circuit. One end of the resistor R1 is connected to one end of the resistor R3. The other end of the resistor R1 is connected to one end of the resistor R2. The other end of the resistor R2 is connected to the negative voltage end. The other end of the resistor R3 is connected to the power supply end. One end of the capacitor C1 is connected to one end of the resistor R2. The other end of the capacitor C1 is grounded. Among them, the connection node between the resistor R2 and the resistor R1 is a preset node, and when the voltage of the preset node meets the preset condition, the field effect tube is turned on.
[0044] In the embodiment of the present application, the basic protection circuit includes a constant voltage and constant current circuit. The constant voltage and constant current circuit is composed of a first triode Q2, a second triode Q3, a resistor R4, a resistor R5 and a resistor R6. Among them, the base of the first triode Q2 is connected to the base of the second triode Q3 and the collector of the first triode Q2 respectively. The emitter of the first triode Q2 is connected to one end of the resistor R4, and the other end of the resistor R4 is connected to the drain of the field effect tube Q1. The collector of the first triode Q2 is connected to one end of the resistor R5, and the other end of the resistor R5 is grounded. The emitter of the second triode Q3 is connected to one end of the resistor R6, and the other end of the resistor R6 is connected to the drain of the field effect tube Q1, and the emitter of the second triode Q3 is connected to the first voltage output terminal VDD. The collector of the second triode Q3 is connected to one end of the first capacitor C1 via a resistor R7, and the collector of the second triode Q3 is connected to the second voltage output terminal VGG via a resistor R7.
[0045] In an embodiment of the present application, the basic protection circuit includes a temperature compensation circuit. The temperature compensation circuit includes a first triode Q2 and a second triode Q3. Among them, the base of the first triode Q2 is connected to the base of the second triode Q3 and the collector of the first triode Q2 respectively. The emitter of the first triode Q2 is connected to the drain of the field effect tube Q1. The collector of the first triode Q2 is grounded. The emitter of the second triode Q3 is connected to the drain of the field effect tube Q1, and the emitter of the second triode Q3 is connected to the first voltage output terminal VDD. The collector of the second triode Q3 is connected to one end of the first capacitor C1 by a resistor R7, and the collector of the second triode Q3 is connected to the second voltage output terminal VGG by a resistor R7.
[0046] In the embodiment of the present application, one end of the resistor R7 is connected to the collector of the second transistor, the other end of the resistor R7 is connected to one end of the capacitor C1, and the other end of the resistor R7 is connected to the second voltage output terminal VGG.
[0047] In the present application, one end of the resistor R8 is connected to the other end of the resistor R7 and is also connected to the second voltage output terminal VGG.
[0048] In the present application, resistor R9, one end of resistor R9 is connected to the other end of capacitor C1, the other end of resistor R9 is connected to the other end of resistor R8, and the branch composed of resistor R9 and capacitor C1 is connected in parallel with resistor R8. Such a design is because considering the problem of overvoltage of the external microcontroller U5 directly connected to the protection circuit provided in the relevant technology, the other end of resistor R8 is adjusted from one end of capacitor C1 to the other end, and an additional wire is extended from one end of capacitor C1 to the other end of R8, so that resistor R8 is connected in parallel with capacitor C1, and the newly added resistor R9 is connected in series between capacitor C1 and grounding to achieve single-channel steady current, thereby ensuring that its constant current and constant voltage function is not affected.
[0049] In addition, it should be noted that the pins that need to complete specific functions are all in Figure 2 The respective connection modes are shown in FIG. Figure 2 The pins shown in the connection method all adopt a conventional connection method, or are unconnected and unused pins, and this application will not elaborate on them here.
[0050] In some embodiments, the power device protection circuit monitors the ambient temperature in real time through the digital temperature sensor U1, and transmits the temperature data to the microcontroller U5. The microcontroller U5 adjusts the resistance value of the digital potentiometer U3 according to the temperature data to achieve temperature compensation. The voltage regulator U2 stabilizes the input 12V voltage to 5V, providing a stable power supply for the entire circuit. The gate of the field effect tube Q1 is controlled by the GPIO pin D8 of the microcontroller U5 to achieve precise switching timing control. The operational amplifier U4 ensures the stability of the output voltage and current through the feedback network. Resistor R8 is connected in parallel with capacitor C1, and resistor R9 is connected in series between capacitor C1 and ground to achieve single-channel current stabilization and ensure that the load operates under stable voltage and current.
[0051] In some embodiments, the power device protection circuit uses a digital temperature sensor U1 to monitor the ambient temperature, and transmits the temperature data to the microcontroller U5 through the I2C interface of the microcontroller U5. The microcontroller U5 adjusts the resistance value of the digital potentiometer U3 according to the temperature data to achieve temperature compensation. The voltage regulator U2 is connected to the second voltage output terminal VGG through a fuse, and the input 12V voltage is stabilized to 5V, providing a stable power supply for the circuit. The gate of the field effect tube Q1 is controlled by the GPIO pin D8 of the microcontroller U5 to achieve accurate switch timing control. The first transistor Q2 and the second transistor Q3 are connected through the base to form a constant voltage and constant current circuit to ensure the stability of the output voltage and current. Resistor R8 is connected in parallel with capacitor C1, and resistor R9 is connected in series between capacitor C1 and ground to achieve single-channel steady current and ensure that the load works under stable voltage and current.
[0052] In some embodiments, the power device protection circuit monitors the ambient temperature through a digital temperature sensor U1 and transmits the temperature data to a microcontroller U5. The microcontroller U5 adjusts the resistance value of the digital potentiometer U3 according to the temperature data to achieve temperature compensation. The voltage regulator U2 stabilizes the input 12V voltage to 5V through the voltage divider resistor network R1 and R2, providing a stable power supply for the circuit. The gate of the field effect transistor Q1 is controlled by the GPIO pin D8 of the microcontroller U5 to achieve precise switching timing control. The first transistor Q2 and the second transistor Q3 are connected through the base to form a temperature compensation circuit to ensure the stable performance of the circuit under different temperature conditions. Resistor R8 is connected in parallel with capacitor C1, and resistor R9 is connected in series between capacitor C1 and ground to achieve single-channel current stabilization and ensure that the load operates under stable voltage and current.
[0053] In some embodiments, the power device protection circuit monitors the ambient temperature through a digital temperature sensor U1 and transmits the temperature data to a microcontroller U5. The microcontroller U5 adjusts the resistance value of the digital potentiometer U3 according to the temperature data to achieve temperature compensation. The voltage regulator U2 is connected to the second voltage output terminal VGG through a fuse, stabilizes the input 12V voltage to 5V, and provides a stable power supply for the circuit. The gate of the field effect tube Q1 is controlled by the GPIO pin D8 of the microcontroller U5 to achieve precise switch timing control. The operational amplifier U4 ensures the stability of the output voltage and current through a feedback network. Resistor R8 is connected in parallel with capacitor C1, and resistor R9 is connected in series between capacitor C1 and ground to achieve single-channel current stabilization and ensure that the load operates under stable voltage and current. In addition, the circuit also includes an electrolytic capacitor C2, which is connected between the power supply terminal V+ and ground for filtering to reduce the fluctuation of the power supply voltage.
[0054] In some embodiments, the power device protection circuit monitors the ambient temperature through a digital temperature sensor U1 and transmits the temperature data to a microcontroller U5. The microcontroller U5 adjusts the resistance value of the digital potentiometer U3 according to the temperature data to achieve temperature compensation. The voltage regulator U2 stabilizes the input 12V voltage to 5V through the voltage divider resistor network R1 and R2, providing a stable power supply for the circuit. The gate of the field effect tube Q1 is controlled by the GPIO pin D8 of the microcontroller U5 to achieve accurate switch timing control. The first triode Q2 and the second triode Q3 are connected through the base to form a constant voltage and constant current circuit to ensure the stability of the output voltage and current. Resistor R8 is connected in parallel with capacitor C1, and resistor R9 is connected in series between capacitor C1 and ground to achieve single-channel steady current and ensure that the load works under stable voltage and current. In addition, the circuit also includes an electrolytic capacitor C2, which is connected between the power supply terminal V+ and the ground for filtering to reduce the fluctuation of the power supply voltage.
[0055] The above embodiments of the present application demonstrate different application methods of the improved power device protection circuit. By integrating a digital temperature sensor, a voltage regulator, a digital potentiometer, an operational amplifier and a microcontroller, accurate temperature compensation, stable voltage and current output, flexible resistance control and reliable switch timing control are achieved, which significantly improves the performance, stability and reliability of the circuit.
[0056] In the related art, a device protection board is also deployed corresponding to the protection circuit provided in the related art.
[0057] Figure 3a A top-level schematic diagram of a device protection board in the related art is shown.
[0058] Figure 3b The bottom schematic diagram of the device protection board in the related art is shown.
[0059] In the present application, taking into account the problems in the related technology regarding the production link, such as high cost of board modification and the fact that the manufactured boards cannot be returned and can only be scrapped, a device protection board is provided accordingly, which is equipped with the power device protection circuit described in any of the above embodiments.
[0060] For example, in the device protection board provided in the present application, non-integrated components such as resistor R1, resistor R2, resistor R3, resistor R4, resistor R5, resistor R6, resistor R7, resistor R8, resistor R9, resistor R10, fuse F1, capacitor C1, capacitor C2, field effect transistor Q1, first transistor Q2 and second transistor Q3 are configured accordingly, as well as integrated components such as digital temperature sensor U1, voltage regulator U2, digital potentiometer U3, the operational amplifier U4, and microcontroller U5.
[0061] Figure 4a A top schematic diagram of a device protection board in this application is shown.
[0062] Figure 4b The bottom schematic diagram of the device protection board in this application is shown.
[0063] For example, Figure 4a and 4b As shown, the present application provides a device protection board layout suitable for the power device protection circuit of the present application on the basis of citing some devices of the original circuit and making the smallest layout changes possible. On this basis, in the production process, only a simple board expansion is required to complete the design update of the board. In addition, the manufactured boards can be reused by withdrawing the boards, thereby improving the protection effect of the gallium nitride power devices while providing the production factory with the smallest possible production transformation cost, which is more in line with production needs.
[0064] Although operations are described in a particular order in the drawings, this should not be understood as requiring that the operations be performed in the particular order shown or in serial order, or that all shown operations be performed to achieve desired results. In certain circumstances, multitasking and parallel processing may be advantageous.
[0065] Any steps, operations or procedures described herein may be performed or implemented using one or more hardware or software modules, either alone or in combination with other devices. In one embodiment, the software module is implemented using a computer program product including a computer-readable medium containing computer program code, which can be executed by a computer processor to perform any or all of the described steps, operations or procedures.
[0066] The foregoing description of the implementation of the present application has been given for the purpose of illustration and description. The foregoing description is not exhaustive nor is it intended to limit the present application to the exact form disclosed, and various variations and modifications may exist according to the above teachings or may be obtained from the practice of the present application. These embodiments are selected and described in order to illustrate the principles of the present application and its practical application, so that those skilled in the art can utilize the present application in various embodiments and various modifications suitable for the specific purpose contemplated.
[0067] It can be further understood that, unless otherwise specified, “connection” includes a direct connection without other components between the two, and also includes an indirect connection with other components between the two.
[0068] It is further understood that, although the operations are described in a specific order in the drawings in the embodiments of the present application, it should not be understood as requiring the operations to be performed in the specific order or serial order shown, or requiring the execution of all the operations shown to obtain the desired results. In certain environments, multitasking and parallel processing may be advantageous.
[0069] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to encompass any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the field of the present application that are not disclosed in the present application. The specification and embodiments are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the following scope of rights.
[0070] It should be understood that the present application is not limited to the precise structures described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the scope of the appended claims.
[0071] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims
1. A power device protection circuit, characterized in that: include: A basic protection circuit includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a capacitor C1, a capacitor C2, a field effect transistor Q1, a first transistor Q2, and a second transistor Q3; A digital temperature sensor U1, wherein a power pin VCC of the digital temperature sensor U1 is connected to a power supply terminal V+, a ground pin GND1 of the digital temperature sensor U1 is grounded, a data pin SCL of the digital temperature sensor U1 is connected to an I2C interface A4 of a microcontroller U5, and a data pin SDA of the digital temperature sensor U1 is connected to an I2C interface A5 of the microcontroller U5; The voltage regulator U2, the input pin IN of the voltage regulator U2 is connected to the second voltage output terminal VGG through a fuse, the output pin OUT of the voltage regulator U2 is connected to the power supply terminal V+, the adjustment pin ADJ of the voltage regulator U2 is connected to the ground GND through the resistor R1, the resistor R2, the capacitor C1 of the voltage divider resistor network, and through the resistor R9, and the other end of the resistor R2 is connected to the negative voltage terminal V-; A digital potentiometer U3, wherein a power pin VCC of the digital potentiometer U3 is connected to a power supply terminal V+, a ground pin GND2 of the digital potentiometer U3 is grounded, data pins CLK, DATA, and LOAD of the digital potentiometer U3 are respectively connected to SPI interfaces D10, D11, and D13 of the microcontroller U5, and a sliding end W0 of the digital potentiometer U3 is connected to a non-inverting input pin In+ of an operational amplifier U4; The operational amplifier U4, the positive power supply pin Vcc of the operational amplifier U4 is connected to the power supply terminal V+, the negative power supply pin GND3 of the operational amplifier U4 is grounded, and the output pin Out of the operational amplifier U4 is connected to one end of the fourth resistor R4 and the sixth resistor R6; Wherein, the gate of the field effect transistor Q1 is connected to the GPIO pin D8 of the microcontroller U5, the first transistor Q2 and the second transistor Q3 are connected through the base, and the PWM output pin D9 of the microcontroller U5 is connected to the base of the first transistor Q2 and the base of the second transistor Q3 through the resistor R10; the emitter E of the first transistor Q2 is connected to the drain of the field effect transistor Q1 through the resistor R4, and the collector C of the first transistor Q2 is grounded through the resistor R5; the emitter E of the second transistor Q3 is connected to the drain of the field effect transistor Q1 through the resistor R6, and is connected to the first voltage output terminal VDD, and the collector C of the second transistor Q3 is connected to one end of the first capacitor C1, and is connected to the second voltage output terminal VGG and one end of the resistor R8; The source of the field effect transistor Q1 is connected to the power supply terminal V+, and is connected to one end of the resistor R3 and the capacitor C2. The gate of the field effect transistor Q1 is also connected to the other end of the resistor R3 and the capacitor C2 respectively.
2. The power device protection circuit according to claim 1, characterized in that: The basic protection circuit includes a switch timing circuit; The switch timing circuit is composed of the field effect tube Q1, the resistor R1, the resistor R2, the resistor R3, the resistor R9 and the capacitor C1; wherein the gate of the field effect tube is connected to one end of the resistor R1; the source of the field effect tube is connected to the power supply end; the drain of the field effect tube is connected to the constant voltage and constant current circuit; one end of the resistor R1 is connected to one end of the resistor R3; the other end of the resistor R1 is connected to one end of the resistor R2; the other end of the resistor R2 is connected to the negative voltage end; the other end of the resistor R3 is connected to the power supply end; one end of the capacitor C1 is connected to one end of the resistor R2; the other end of the capacitor C1 is grounded; wherein the connection node between the resistor R2 and the resistor R1 is a preset node, and when the voltage of the preset node meets the preset condition, the field effect tube is turned on.
3. The power device protection circuit according to claim 1, characterized in that: The basic protection circuit includes a constant voltage and constant current circuit; The constant voltage and constant current circuit is composed of the first transistor Q2, the second transistor Q3, the resistor R4, the resistor R5 and the resistor R6; wherein the base of the first transistor Q2 is connected to the base of the second transistor Q3 and the collector of the first transistor Q2 respectively; the emitter of the first transistor Q2 is connected to one end of the resistor R4, and the other end of the resistor R4 is connected to the drain of the field effect transistor Q1; the collector of the first transistor Q2 is connected to one end of the resistor R5, and the other end of the resistor R5 is grounded; the emitter of the second transistor Q3 is connected to one end of the resistor R6, and the other end of the resistor R6 is connected to the drain of the field effect transistor Q1, and the emitter of the second transistor Q3 is connected to the first voltage output terminal VDD; the collector of the second transistor Q3 is connected to one end of the first capacitor C1 via the resistor R7, and the collector of the second transistor Q3 is connected to the second voltage output terminal VGG via the resistor R7.
4. The power device protection circuit according to claim 1, characterized in that: The basic protection circuit includes a temperature compensation circuit; The temperature compensation circuit includes the first transistor Q2 and the second transistor Q3; wherein the base of the first transistor Q2 is connected to the base of the second transistor Q3 and the collector of the first transistor Q2 respectively; the emitter of the first transistor Q2 is connected to the drain of the field effect transistor Q1; the collector of the first transistor Q2 is grounded; the emitter of the second transistor Q3 is connected to the drain of the field effect transistor Q1, and the emitter of the second transistor Q3 is connected to the first voltage output terminal VDD; the collector of the second transistor Q3 is connected to one end of the first capacitor C1 via the resistor R7, and the collector of the second transistor Q3 is connected to the second voltage output terminal VGG via the resistor R7.
5. The power device protection circuit according to claim 1, characterized in that: One end of the resistor R7 is connected to the collector of the second transistor, the other end of the resistor R7 is connected to one end of the capacitor C1, and the other end of the resistor R7 is connected to the second voltage output terminal VGG; One end of the resistor R8 is connected to the other end of the resistor R7 and is also connected to the second voltage output end VGG; The resistor R9, one end of the resistor R9 is connected to the other end of the capacitor C1, the other end of the resistor R9 is connected to the other end of the resistor R8, and a branch consisting of the resistor R9 and the capacitor C1 is connected in parallel with the resistor R8.
6. A device protection board, characterized in that: The invention is provided with the power device protection circuit as claimed in claims 1 to 5.
Citation Information
Patent Citations
Protective circuit
CN107565913A
Methods and apparatus to transmit signals in isolated gate drivers
CN112585855A
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CN118259060A
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CN206164492U
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US20240136433A1