Photoconductive device based on periodic surface microstructure and preparation method thereof
By embedding regular polygon n+ epitaxial layer and setting high reverse dielectric layer on the semi-insulating substrate of the light guide switching device, the problems of device damage, breakdown and low light energy utilization at high voltage are solved, and more stable and efficient working performance is achieved.
Patent Information
- Application Number
- CN202411790144.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-06
- Publication Date
- 2025-03-25
- Estimated Expiration
- 2044-12-06
AI Technical Summary
Existing light guide switching devices are prone to damage at high bias voltages, and there are problems such as breakdown, thermal damage and low light energy utilization due to electric field shielding effects.
The periodic surface microstructure design is adopted, including the embedded regular polygon n+ epitaxial layer on the semi-insulating substrate, and a high reverse dielectric layer and connecting electrodes are provided between the electrodes to optimize the electric field and current distribution, improve thermal management and light energy utilization.
By uniformly dispersing stress and optimizing electric field distribution, the device's working stability and efficiency are improved, the risk of thermal damage and breakdown is reduced, and the light energy utilization is improved.
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Figure CN119698080A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of microelectronic technology, and in particular relates to a photoconductive switch device which can be used for an ultra-wideband electromagnetic pulse generator, a dielectric wall accelerator and a solid-state compact pulse power supply. Background Art
[0002] In recent years, with the emergence of microwave photonics, it has become possible to use photoconductive switching devices to generate high-power pulses with flexible and adjustable parameters. The high-power pulses generated by this method have the advantages of fast response speed, low time jitter, high repetition frequency and easy integration. Under high bias voltage, the photoconductive switch uses a certain energy trigger laser to realize the opening and closing of the device. It is easy to form a high-density current filament between the two electrodes, thereby damaging the photoconductive switch device. At the same time, due to the electric field shielding effect, there is often a strong electric field in the electrode contact area of the photoconductive switch, which can easily cause the device to break down. Optimizing the electric field distribution and current distribution of the device is conducive to improving the stability of the device. Thermal damage is another important factor affecting the working stability of the photoconductive switch device. Another problem encountered in the research process of photoconductive switch devices is the low light energy utilization rate, which will lead to low working efficiency of the photoconductive switch. How to improve the light energy utilization rate is an important issue that photoconductive switch devices have always needed to consider.
[0003] In "Wide Bandgap Extrinsic Photoconductive Switches", JS Sullivan proposed the method of adding heavily doped p-type layers and n-type layers under the p+ and n+ contact metallization layers, respectively, to make the current distribution at the electrode contact of the photoconductive switch device more uniform, reduce the current density, improve the reliability of the device, and extend the working life of the device. However, this method will reduce the dark resistance of the photoconductive switch device, resulting in excessive leakage current of the device, failure to achieve good insulation shutdown, and low working efficiency.
[0004] In "Investigation of high electrical fields at the electrical interface in photo-switches", CMFessler proposed to eliminate the three-point acute angle by inserting the formed electrode into the substrate, that is, to eliminate the enhanced electric field at the intersection of the substrate, electrode and packaging material of the device, to avoid the problem of device breakdown, thereby reducing field crowding and homogenizing the current density, thereby improving the reliability of device operation. However, since the contour geometry of the inserted formed electrode is not easy to make, plasma etching cannot etch such a deep contour with a radius of 100 microns without grooving, and if laser etching is used, it cannot be guaranteed that the contour shape is engraved. Therefore, this method is difficult to achieve the desired contour shape of the formed electrode, which may cause device breakdown. Summary of the invention
[0005] The purpose of the present invention is to address the deficiencies of the above-mentioned prior art and provide a photoconductive device with a periodic surface microstructure and a preparation method, so as to optimize the electric field current distribution of the device, improve the thermal failure of the device, enhance the light energy utilization rate of the device, and improve the working stability and working efficiency of the device.
[0006] To achieve the above object, the technical solution of the present invention includes the following:
[0007] 1. A photoconductive device based on a periodic surface microstructure, comprising a semi-insulating substrate 1, a metal electrode 2 and a connecting electrode 3, characterized in that:
[0008] The semi-insulating substrate 1 has symmetrical regular polygonal periodic epitaxial layers 4 embedded on its front and back surfaces, which are used to homogenize stress and improve thermal management of the device;
[0009] The metal electrode 2 is located on the surface of each epitaxial layer, and a highly reflective dielectric layer 5 having the same thickness as the metal electrode is provided on the semi-insulating substrate between the metal electrodes to reflect light and reduce the loss of light energy;
[0010] The connecting electrode 3 is located on the surface of the high reflective dielectric layer and the metal electrode.
[0011] Preferably, the semi-insulating substrate 1 is in a cube or cylinder shape with a thickness of 0.35 mm to 1 mm; its material is any one of silicon carbide, gallium nitride, gallium arsenide, gallium oxide or diamond.
[0012] Preferably, the epitaxial layer 4 is an n+ epitaxial layer, and its embedding depth is 1-5 μm.
[0013] Preferably, the metal electrode 2 is consistent in shape and size with the n+ epitaxial layer 4 and is in ohmic contact therewith, and the material is any one of a Ni / Ti / Pt / Au composite metal layer, a Ti / Pt / Au composite metal layer, a W / Ti / Au composite metal layer, a Ni / Ti / Au composite metal layer or a Ni / Au composite metal layer.
[0014] Preferably, the high reflective dielectric layer 5 is a Ti3O5 / SiO2 composite layer, and the thickness of each layer is 640nm-660nm and 840nm-860nm respectively.
[0015] Preferably, the connecting electrode 3 is made of copper, gold, or a copper-gold metal layer, with a length greater than half of the semi-insulating substrate, a width of 3 mm to 8 mm, and a thickness of 0.05 mm to 0.1 mm.
[0016] 2. A method for manufacturing a photoconductive device based on a periodic surface microstructure, characterized in that it comprises the following steps:
[0017] 1) Clean the semi-insulating substrate, evenly apply photoresist on the front side of the cleaned semi-insulating substrate, and perform photolithography and development on the front side of the semi-insulating substrate with the photoresist applied on the front side through a mask with a prepared pattern to form a plurality of regular polygonal shallow grooves.
[0018] 2) The front side of the semi-insulating substrate on which a plurality of regular polygonal shallow grooves are prepared is etched to a depth of 1 μm-5 μm to form regular polygonal grooves arranged periodically on the front side of the semi-insulating substrate.
[0019] 3) Firstly, homogeneous epitaxy is performed in the regular polygonal groove on the front side of the semi-insulating substrate to form an n+ epitaxial layer, and then metal is evaporated, sputtered and electroplated on the front side of the semi-insulating substrate to form a metal layer.
[0020] 4) The metal layers outside the several regular polygonal epitaxial layer regions on the front side of the semi-insulating substrate are completely peeled off and removed to form several metal electrodes.
[0021] 5) Evenly apply photoresist on the front side of the semi-insulating substrate with the metal electrode, perform photolithography on it through a mask with a prepared pattern, develop it, and expose the area without the epitaxial layer.
[0022] 6) Magnetron sputtering is performed on the front side of the developed semi-insulating substrate to prepare a Ti3O5 / SiO2 composite layer, and the photoresist remaining on the front side of the semi-insulating substrate after magnetron sputtering is stripped off.
[0023] 7) Sputtering is performed on the front side of a semi-insulating substrate having a Ti3O5 / SiO2 composite layer to prepare a connecting electrode.
[0024] 8) Clean the back side of the semi-insulating substrate, evenly apply photoresist on the cleaned back side of the semi-insulating substrate, and perform photolithography and development on the back side of the semi-insulating substrate with the photoresist applied on the back side through a mask with a prepared pattern to form a number of regular polygonal shallow grooves.
[0025] 9) Perform the same operation on the back side of the semi-insulating substrate according to the same process as steps 2) to 7) to complete the fabrication of the photoconductive switching device.
[0026] Compared with the prior art, the present invention has the following advantages:
[0027] Firstly, since the present invention embeds regular polygonal n+ epitaxial layers on the upper and lower surfaces of the semi-insulating substrate, it can not only utilize the rotational symmetry and thermal management capabilities of the regular polygon to evenly disperse stress in all directions of the device, provide a more uniform electron transmission channel, improve carrier mobility, and avoid the occurrence of hot spots in the device, but also can reduce the local electric field concentration effect through the regulation of the electric field distribution of the n+ epitaxial layer.
[0028] Secondly, the present invention prepares high reflective dielectric layers on the upper and lower surfaces of the semi-insulating substrate, and can utilize the high reflectivity of the high reflective dielectric layers to trigger light to improve the light energy utilization rate of the device.
[0029] Thirdly, the present invention prepares a connecting electrode on the surface of the high reflective dielectric layer, which can make it play the role of a field plate, thereby optimizing the electric field distribution of the device. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] Figure 1 The structure diagram of the device of the present invention;
[0031] Figure 2 Schematic diagram of the preparation process of the device of the present invention. Specific implementation methods
[0033] The specific examples of the present invention are described in detail below with reference to the accompanying drawings.
[0034] Reference Figure 1 This example is based on a periodic surface microstructure photoconductive device, including a semi-insulating substrate 1, a metal electrode 2, a connecting electrode 3, an epitaxial layer 4 and a high reflective dielectric layer 5, wherein:
[0035] The semi-insulating substrate 1 is in the shape of a cube or a cylinder, has a thickness of 0.35 mm to 1 mm, and is made of any one of silicon carbide, gallium nitride, gallium arsenide, gallium oxide or diamond.
[0036] The epitaxial layer 4 is symmetrically embedded in the upper and lower surfaces of the semi-insulating substrate 1, and adopts the same n-type heavily doped material as the semi-insulating substrate material to form an n+ epitaxial layer with a thickness of 1 to 5 μm.
[0037] The metal electrode 2 is consistent in shape and size with the epitaxial layer 4, distributed on the surface of each epitaxial layer 4, and in ohmic contact with each epitaxial layer, and the metal material is any one of a Ni / Ti / Pt / Au composite metal layer, a Ti / Pt / Au composite metal layer, a W / Ti / Au composite metal layer, a Ni / Ti / Au composite metal layer, or a Ni / Au composite metal layer;
[0038] The high reflective dielectric layer 5 is located on the semi-insulating substrate between the metal electrodes 2 and has the same thickness as the metal electrodes. The material is a Ti3O5 / SiO2 composite layer, and the thickness of each layer is 640nm-660nm and 840nm-860nm respectively.
[0039] The connecting electrode 3 is located on the surface of the high reflective dielectric layer 5 and the metal electrode 2, and is made of copper, gold or a copper-gold metal layer with a thickness of 0.001 mm to 0.1 mm.
[0040] Reference Figure 2 The method of preparing the above-mentioned device of the present invention is given in the following three embodiments.
[0041] Example 1: A periodic surface microstructure photoconductive device is prepared on a semi-insulating silicon carbide substrate, wherein the epitaxial layer thickness is 2 μm, the high reflective dielectric layer Ti3O5 / SiO2 thickness is 650 nm / 850 nm respectively, the metal electrode material is Ni / Ti / Pt / Au, and the connecting electrode is Cu.
[0042] Step 1: Prepare a periodic regular polygonal pattern on the front side of the silicon carbide semi-insulating substrate, such as Figure 2 As shown in a.
[0043] 1.1) placing the silicon carbide semi-insulating substrate in BOE solution, deionized water, acetone, isopropanol, and deionized water in turn for ultrasonic cleaning for 120 s, 180 s, 600 s, 180 s, and 180 s, respectively;
[0044] 1.2) Evenly apply photoresist on the front side of the cleaned silicon carbide semi-insulating substrate, and perform photolithography and development on the front side of the semi-insulating substrate with the photoresist applied on the front side through a mask with a prepared pattern to form a plurality of periodic regular polygonal patterns.
[0045] Step 2: Prepare periodic regular polygonal grooves on the front side of the silicon carbide semi-insulating substrate, such as Figure 2 As shown in b.
[0046] The silicon carbide semi-insulating substrate is dry-etched. Under the process conditions of a mixture of sulfur hexafluoride and oxygen, a radio frequency power of 200 W, and a reaction chamber pressure of 1.5 mTorr, periodically arranged regular polygonal grooves with a depth of 2 μm are etched on the front side of the semi-insulating substrate.
[0047] Step 3: Embed n+ epitaxy on the front side of the silicon carbide semi-insulating substrate and make a metal layer, such as Figure 2 As shown in c.
[0048] 3.1) homogeneous epitaxy is first performed in the regular polygonal groove on the front side of the silicon carbide semi-insulating substrate to form an n+ epitaxial layer;
[0049] 3.2) Ni / Ti / Pt / Au metals were first evaporated and sputtered on the front side of the silicon carbide semi-insulating substrate, and the thickness of each layer was 200nm / 150nm / 150nm / 200nm respectively; then an electroplating solution with a composition of potassium gold cyanide and potassium citrate and a pH value of 4 was selected, and the temperature was 50 degrees Celsius and the current density was 0.2A / dm 2 Under the process conditions of a stirring paddle speed of 200 rpm, Au is electroplated with a thickness of 800 nm to form a Ni / Ti / Pt / Au metal layer.
[0050] Step 4: Prepare a metal electrode on the front side of the silicon carbide semi-insulating substrate, such as Figure 2 As shown in d.
[0051] 4.1) A layer of blue film is attached to the front side of the silicon carbide semi-insulating substrate, and then it is torn off to remove most of the metal layer outside the several regular polygonal epitaxial layer regions on the front side of the silicon carbide semi-insulating substrate;
[0052] 4.2) Use a stripping machine to strip off all the residual metal layers outside the several regular polygonal epitaxial layer regions to form several metal electrodes.
[0053] Step 5: Prepare a high reflective dielectric layer pattern on the front side of the silicon carbide substrate, such as Figure 2 As shown in e.
[0054] The photoresist is evenly coated on the front side of the silicon carbide semi-insulating substrate with the metal electrode, and is photolithographically processed through a mask with a prepared pattern, and developed to expose the area without the epitaxial layer.
[0055] Step 6: Prepare a high reflective dielectric layer on the front side of the silicon carbide semi-insulating substrate, such as Figure 2 f.
[0056] 6.1) Magnetron sputtering is performed on the front side of the developed silicon carbide semi-insulating substrate to prepare Ti3O5 / SiO2 composite layers, each layer having a thickness of 650nm and 850nm respectively;
[0057] 6.2) The photoresist remaining on the front side of the semi-insulating substrate after magnetron sputtering is removed by a stripping machine to form a high reflective dielectric layer.
[0058] Step 7: Prepare a connection electrode on the front side of the silicon carbide semi-insulating substrate, such as Figure 2 As shown in g.
[0059] A Cu metal with a thickness of 0.1 mm is sputtered on the front side of a silicon carbide semi-insulating substrate prepared with a Ti3O5 / SiO2 composite layer to form a connecting electrode.
[0060] Step 8: Prepare a periodic regular polygonal pattern on the back of the silicon carbide semi-insulating substrate, such as Figure 2 h.
[0061] 8.1) The back side of the silicon carbide semi-insulating substrate was ultrasonically cleaned with BOE solution, deionized water, acetone, isopropanol, and deionized water for 120 s, 180 s, 600 s, 180 s, and 180 s, respectively;
[0062] 8.2) Evenly apply photoresist on the back side of the cleaned silicon carbide semi-insulating substrate, and perform photolithography and development on the back side of the semi-insulating substrate with the photoresist applied on the front side through a mask with a prepared pattern to form a plurality of periodic regular polygonal patterns.
[0063] Step 9: Prepare periodic regular polygonal grooves on the back side of the silicon carbide semi-insulating substrate, such as Figure 2 As shown in i.
[0064] The silicon carbide semi-insulating substrate is dry-etched. Under the process conditions of a mixture of sulfur hexafluoride and oxygen, a radio frequency power of 200 W, and a reaction chamber pressure of 1.5 mTorr, periodically arranged regular polygonal grooves with a depth of 2 μm are etched on the back of the semi-insulating substrate.
[0065] Step 10: Embed n+ epitaxy on the back of the silicon carbide semi-insulating substrate and make a metal layer, such as Figure 2 j shown.
[0066] 10.1) Perform homoepitaxial growth in the regular polygonal groove on the back side of the silicon carbide semi-insulating substrate to form an n+ epitaxial layer;
[0067] 10.2) Ni / Ti / Pt / Au metals were first evaporated and sputtered on the back of the silicon carbide semi-insulating substrate, and the thickness of each layer was 200nm / 150nm / 150nm / 200nm respectively; then an electroplating solution with a composition of potassium gold cyanide and potassium citrate and a pH value of 4 was selected, and the temperature was 50 degrees Celsius and the current density was 0.2A / dm 2 Under the process conditions of a stirring paddle speed of 200 rpm, Au is electroplated with a thickness of 800 nm to form a Ni / Ti / Pt / Au metal layer.
[0068] Step 11: Prepare a metal electrode on the back of the silicon carbide semi-insulating substrate, such as Figure 2 k shown.
[0069] 11.1) A layer of blue film is attached to the back of the silicon carbide semi-insulating substrate, and then it is torn off to remove most of the metal layer outside the several regular polygonal epitaxial layer regions on the back of the silicon carbide semi-insulating substrate;
[0070] 11.2) Use a stripping machine to strip off all the residual metal layers outside the several regular polygonal epitaxial layer regions to form several metal electrodes.
[0071] Step 12: Prepare a high reflective dielectric layer pattern on the back of the silicon carbide substrate, such as Figure 2 l shown.
[0072] The photoresist is evenly coated on the back of the silicon carbide semi-insulating substrate with the metal electrode, and is photolithographically processed through a mask with a prepared pattern, and developed to expose the area without the epitaxial layer.
[0073] Step 13: Prepare a high reflective dielectric layer on the back of the silicon carbide semi-insulating substrate, such as Figure 2 m shown.
[0074] 13.1) Magnetron sputtering is performed on the back side of the developed silicon carbide semi-insulating substrate to prepare Ti3O5 / SiO2 composite layers, each layer having a thickness of 650nm and 850nm respectively;
[0075] 13.2) The photoresist remaining on the back of the semi-insulating substrate after magnetron sputtering is removed by a stripping machine to form a high reflectivity dielectric layer.
[0076] Step 14: Prepare a connection electrode on the back side of the silicon carbide semi-insulating substrate, such as Figure 2 n shown.
[0077] A Cu metal with a thickness of 0.1 mm is sputtered on the back of a silicon carbide semi-insulating substrate prepared with a Ti3O5 / SiO2 composite layer to form a connecting electrode, thereby completing the preparation of the photoconductive switch device of this example.
[0078] Example 2: A periodic surface microstructure photoconductive device is prepared on a semi-insulating gallium nitride substrate, with an epitaxial layer thickness of 1 μm, high reflective dielectric layer Ti3O5 / SiO2 thicknesses of 640 nm / 840 nm respectively, metal electrode materials of Ni / Au, and connecting electrodes of Au.
[0079] Step 1: Prepare a periodic regular polygonal pattern on the front side of the GaN semi-insulating substrate, such as Figure 2 As shown in a.
[0080] The specific implementation of this step is the same as step 1 of Example 1.
[0081] Step 2: Prepare periodic regular polygonal grooves on the front side of the GaN semi-insulating substrate, such as Figure 2 As shown in b.
[0082] The gallium nitride semi-insulating substrate was dry-etched, and the gas was set to a mixture of sulfur hexafluoride and oxygen, the radio frequency power was 250W, and the reaction chamber pressure was 1.6mTorr. Periodically arranged regular polygonal grooves with a depth of 1μm were etched on the front side of the semi-insulating substrate.
[0083] Step 3: Embed n+ epitaxy on the front side of the GaN semi-insulating substrate and make a metal layer, such as Figure 2 As shown in c.
[0084] First, homoepitaxial growth is performed in a regular polygonal groove on the front side of a GaN semi-insulating substrate to form an n+ epitaxial layer;
[0085] Next, Ni / Au metals with thicknesses of 200nm / 280nm respectively were evaporated and sputtered on the front side of the silicon carbide semi-insulating substrate;
[0086] Then, set the temperature to 60 degrees Celsius and the current density to 0.3A / dm 2 The process condition is that the stirring paddle speed is 250rpm, and the plating solution with the components of potassium gold cyanide and potassium citrate and a pH value of 4 is selected. Au is electroplated on the front side of the gallium nitride semi-insulating substrate with a thickness of 1000nm to form a Ni / Au metal layer.
[0087] Step 4: Prepare a metal electrode on the front side of the GaN semi-insulating substrate, such as Figure 2 As shown in d.
[0088] The specific implementation of this step is the same as step 4 of Example 1.
[0089] Step 5: Prepare a high reflective dielectric layer pattern on the front side of the GaN substrate, such as Figure 2 As shown in e.
[0090] The specific implementation of this step is the same as step 5 of Example 1.
[0091] Step 6: Prepare a high reflective dielectric layer on the front side of the GaN semi-insulating substrate, such as Figure 2 f.
[0092] Magnetron sputtering of Ti3O5 / SiO2 composite layers with thicknesses of 640nm and 840nm respectively was performed on the front side of the developed GaN semi-insulating substrate;
[0093] The photoresist remaining on the front side of the semi-insulating substrate after magnetron sputtering is then removed by a stripping machine to form a high reflective dielectric layer.
[0094] Step 7: Prepare the connection electrode on the front side of the GaN semi-insulating substrate, such as Figure 2 As shown in g.
[0095] Au metal with a thickness of 0.005 mm was sputtered on the front side of the gallium nitride semi-insulating substrate prepared with a Ti3O5 / SiO2 composite layer to form a connecting electrode.
[0096] Step 8: Prepare a periodic regular polygonal pattern on the back of the GaN semi-insulating substrate, such as Figure 2 h.
[0097] The specific implementation of this step is the same as step 8 in Example 1.
[0098] Step nine: Perform the same operation on the back side of the gallium nitride semi-insulating substrate according to the same process as steps two to seven to complete the fabrication of the photoconductive switch device of this example.
[0099] Example 3: A periodic surface microstructure photoconductive device is prepared on a semi-insulating gallium arsenide substrate, with an epitaxial layer thickness of 1.5 μm, high reflective dielectric layer Ti3O5 / SiO2 thicknesses of 660 nm / 860 nm respectively, metal electrode materials of Ni / Ti / Au, and connecting electrodes of Cu / Au.
[0100] Step A: Prepare a periodic regular polygonal pattern on the front side of the GaAs semi-insulating substrate, such as Figure 2 As shown in a.
[0101] The specific implementation of this step is the same as step 1 of Example 1.
[0102] Step B: Prepare periodic regular polygonal grooves on the front side of the GaAs semi-insulating substrate, such as Figure 2 As shown in b.
[0103] The gallium arsenide semi-insulating substrate is dry-etched to form periodically arranged regular polygonal grooves with a depth of 1.5 μm on the front side of the semi-insulating substrate. The etching process conditions are: the gas is a mixture of sulfur hexafluoride and oxygen, the RF power is 300 W, and the reaction chamber pressure is 2 mTorr.
[0104] Step C: Embed n+ epitaxy on the front side of the GaAs semi-insulating substrate and make a metal layer, such as Figure 2 As shown in c.
[0105] C1) homoepitaxial growth is first performed in the regular polygonal groove on the front side of the gallium arsenide semi-insulating substrate to form an n+ epitaxial layer;
[0106] C2) evaporating and sputtering Ni / Ti / Au metals with thicknesses of 200nm / 300nm / 240nm respectively on the front side of the silicon carbide semi-insulating substrate;
[0107] C3) using an electroplating solution with a composition of potassium gold cyanide and potassium citrate and a pH value of 4, electroplating Au with a thickness of 800 nm on the front side of the GaAs semi-insulating substrate to form a Ni / Ti / Au metal layer, wherein the electroplating temperature is set to 50 degrees Celsius and the current density is set to 0.25 A / dm 2 , the stirring paddle speed is 300 rpm.
[0108] Step D: Prepare a metal electrode on the front side of the GaAs semi-insulating substrate, such as Figure 2 As shown in d.
[0109] The specific implementation of this step is the same as step 4 of Example 1.
[0110] Step E: Prepare a high reflective dielectric layer pattern on the front side of the GaAs substrate, such as Figure 2 As shown in e.
[0111] The specific implementation of this step is the same as step 5 of Example 1.
[0112] Step F: Prepare a high reflective dielectric layer on the front side of the GaAs semi-insulating substrate, such as Figure 2 f.
[0113] F1) magnetron sputtering Ti3O5 / SiO2 composite layers with thicknesses of 660nm and 860nm respectively on the front side of the developed GaAs semi-insulating substrate;
[0114] F2) The photoresist remaining on the front side of the semi-insulating substrate after magnetron sputtering is then removed by a stripping machine to form a high reflectivity dielectric layer.
[0115] Step G: Prepare a connecting electrode on the front side of the GaAs semi-insulating substrate, such as Figure 2 As shown in g.
[0116] A Cu / Au metal layer with a thickness of 500 μm / 1 μm is sputtered on the front side of a gallium arsenide semi-insulating substrate prepared with a Ti3O5 / SiO2 composite layer to form a connecting electrode.
[0117] Step H: Prepare a periodic regular polygonal pattern on the back of the GaAs semi-insulating substrate, such as Figure 2 h.
[0118] The specific implementation of this step is the same as step 8 in Example 1.
[0119] Step I: Perform the same operation on the back side of the gallium arsenide semi-insulating substrate according to the same process as steps B to G to complete the fabrication of the photoconductive switch device of this example.
[0120] The above descriptions are only several specific examples of the present invention and do not constitute any limitation to the present invention. Obviously, after understanding the content and principle of the present invention, professionals in the field may make various modifications and changes in form and details without departing from the principle and structure of the present invention. For example, the material of the semi-insulating substrate may also be gallium oxide and diamond; the metal electrode material may also be any one of Ti / Pt / Au composite metal layer and W / Ti / Au composite metal layer; the n+ epitaxial layer, Ti3O5 / SiO2 and the connecting electrode may also be of other thicknesses than those in Embodiments 1 to 3. However, these modifications and changes based on the idea of the present invention are still within the scope of protection of the claims of the present invention.
Claims
1. A photoconductive device based on a periodic surface microstructure, comprising a semi-insulating substrate (1), a metal electrode (2) and a connecting electrode (3), characterized in that: The semi-insulating substrate (1) has symmetrical regular polygonal periodic epitaxial layers (4) embedded on its front and back surfaces, which are used to homogenize stress and improve thermal management of the device; The metal electrode (2) is located on the surface of each epitaxial layer, and a high reflective dielectric layer (5) having the same thickness as the metal electrode is provided on the semi-insulating substrate between the metal electrodes to reflect light and reduce the loss of light energy; The connecting electrode (3) is located on the surface of the high reflective dielectric layer and the metal electrode.
2. The device according to claim 1, characterized in that The epitaxial layer (4) is an n+ epitaxial layer, and its embedding depth is 1 μm to 5 μm.
3. The device according to claim 1, characterized in that The high reflective dielectric layer (5) is a Ti3O5 / SiO2 composite layer, and the thickness of each layer is 640nm-660nm and 840nm-860nm respectively.
4. The device according to claim 1, characterized in that The metal electrode (2) is consistent in shape and size with the n+ epitaxial layer (4) and is in ohmic contact with the n+ epitaxial layer (4). The material is any one of a Ni / Ti / Pt / Au composite metal layer, a Ti / Pt / Au composite metal layer, a W / Ti / Au composite metal layer, a Ni / Ti / Au composite metal layer or a Ni / Au composite metal layer.
5. The device according to claim 1, characterized in that The semi-insulating substrate (1) is in the shape of a cube or a cylinder, with a thickness of 0.35 mm to 1 mm; its material is any one of silicon carbide, gallium nitride, gallium arsenide, gallium oxide or diamond.
6. The device according to claim 1, characterized in that The connecting electrode (3) is made of copper, gold, or a copper-gold metal layer, and has a thickness of 0.001 mm to 0.1 mm.
7. A method for manufacturing a photoconductive device based on a periodic surface microstructure, characterized in that it comprises the following steps: 1) Clean the semi-insulating substrate, evenly apply photoresist on the front side of the cleaned semi-insulating substrate, and perform photolithography and development on the front side of the semi-insulating substrate with the photoresist applied on the front side through a mask with a prepared pattern to form several regular polygonal patterns. 2) Etching the front side of the semi-insulating substrate with a plurality of regular polygonal patterns prepared on the front side to a depth of 1 μm to 5 μm to form regular polygonal grooves arranged periodically on the front side of the semi-insulating substrate. 3) Firstly, homogeneous epitaxy is performed in the regular polygonal groove on the front side of the semi-insulating substrate to form an n+ epitaxial layer, and then metal is evaporated, sputtered and electroplated on the front side of the semi-insulating substrate to form a metal layer. 4) The metal layers outside the several regular polygonal epitaxial layer regions on the front side of the semi-insulating substrate are completely peeled off and removed to form several metal electrodes. 5) Evenly apply photoresist on the front side of the semi-insulating substrate with the metal electrode, perform photolithography on it through a mask with a prepared pattern, develop it, and expose the area without the epitaxial layer. 6) Magnetron sputtering is performed on the front side of the developed semi-insulating substrate to prepare a Ti3O5 / SiO2 composite layer, and the photoresist remaining on the front side of the semi-insulating substrate after magnetron sputtering is stripped off. 7) Sputtering is performed on the front side of a semi-insulating substrate having a Ti3O5 / SiO2 composite layer to prepare a connecting electrode. 8) Cleaning the back side of the semi-insulating substrate, evenly applying photoresist on the cleaned back side of the semi-insulating substrate, photolithography and developing the back side of the semi-insulating substrate with the photoresist applied on the back side through a mask with a prepared pattern, to form several regular polygonal patterns. 9) Perform the same operation on the back side of the semi-insulating substrate according to the same process as steps 2) to 7) to complete the fabrication of the photoconductive switching device.
8. The method according to claim 7, characterized in that The semi-insulating substrate wafer is cleaned by sequentially placing the semi-insulating substrate wafer into BOE solution, deionized water, acetone, isopropanol, and deionized water for ultrasonic cleaning for 120s, 180s, 600s, 180s, and 180s, respectively.
9. The method according to claim 7, characterized in that: The etching of the semi-insulating substrate is performed by dry etching, and the process conditions are as follows: The gas is a mixture of sulfur hexafluoride and oxygen. RF power is 100W~500W, The pressure of the reaction chamber is 1mTorr~100mTorr.
10. The method according to claim 7, characterized in that The electroplating process parameters are as follows: The plating solution uses potassium gold cyanide and conductive salt, and its pH value is 3.8 to 4.
6. The conductive salt is composed of potassium citrate or dipotassium hydrogen phosphate. The electroplating temperature is 40 degrees Celsius to 60 degrees Celsius. The current density is 0.1A / dm 2 ~0.5A / dm 2 , The rotation speed of the stirring paddle is 100 rpm to 300 rpm.
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