Optical guide devices based on periodic surface microstructures and their fabrication methods

Abstract

This invention discloses a photoconductive device based on a periodic surface microstructure and its fabrication method, mainly addressing the problem of uneven electric field distribution during operation in existing similar devices. It comprises a semi-insulating substrate (1), metal electrodes (2), connecting electrodes (3), an epitaxial layer (4), and a highly reflective dielectric layer (5). The epitaxial layer (4) is embedded in symmetrical regular polygonal periodic grooves on the upper and lower surfaces of the semi-insulating substrate; the metal electrodes (2) are distributed on the surface of each epitaxial layer; the highly reflective dielectric layer (5) is located on the semi-insulating substrate between the metal electrodes; and the connecting electrodes (3) are located on the surfaces of the highly reflective dielectric layer and the metal electrodes. This invention can uniformly distribute the electric field during device operation, improve thermal failure, enhance the light energy utilization rate, and improve the stability and efficiency of device operation. It can be used in ultra-wideband electromagnetic pulse generators, dielectric wall accelerators, and solid-state compact pulse power supplies.

Description

Technical Field

[0001] This invention belongs to the field of microelectronics technology, and specifically relates to a photoconductive switching device that can be used in ultra-wideband electromagnetic pulse generators, dielectric wall accelerators, and solid-state compact pulse power supplies. Background Technology

[0002] In recent years, with the emergence of microwave photonics, it has become possible to generate high-power pulses with flexible and adjustable parameters using photoconductive switching devices. These high-power pulses offer advantages such as fast response speed, low timing jitter, high repetition frequency, and ease of integration. However, under high bias voltage, photoconductive switches use a trigger laser of a certain energy to turn the device on and off, which can easily create a high-density current filament between the two electrodes, potentially damaging the device. Simultaneously, due to the electric field shielding effect, a strong electric field often exists in the electrode contact area of ​​the photoconductive switch, easily leading to device breakdown. Optimizing the electric field and current distribution of the device is beneficial for improving its operational stability. Thermal damage is another important factor affecting the operational stability of photoconductive switching devices. Another challenge encountered in the research of photoconductive switching devices is low light energy utilization, which leads to low operating efficiency. How to improve light energy utilization is a crucial issue that photoconductive switching devices have always needed to address.

[0003] In his paper "Wide Bandgap Extrinsic Photoconductive Switches," JSSullivan proposed a method of adding heavily doped p-type and n-type layers under the p+ and n+ contact metallization layers, respectively. This method results in a more uniform current distribution at the electrode contacts of the photoconductive switch, reduces current density, improves device reliability, and extends device lifespan. However, this method reduces the dark resistance of the photoconductive switch, leading to excessive leakage current, inadequate insulation turn-off, and lower operating efficiency.

[0004] In their paper "Inception of High Electroc Fields at the Electrode-Sic Interface in Photo-Switches," CMFessler proposed a method to eliminate three acute angles by inserting shaped electrodes into the substrate. This method aims to eliminate the enhanced electric field at the junction of the substrate, electrode, and packaging material, thus preventing device breakdown and reducing field congestion. It also homogenizes current density, thereby improving device reliability. However, the geometry of the inserted shaped electrode is difficult to fabricate. Plasma etching cannot etch such a deep contour with a radius of 100 micrometers without trenching, and laser etching cannot guarantee the desired contour shape. Therefore, this method struggles to achieve the desired shaped electrode contour, potentially leading to device breakdown. Summary of the Invention

[0005] The purpose of this invention is to address the shortcomings of the prior art by providing a photoconductive device with a periodic surface microstructure and its fabrication method, so as to optimize the electric field and current distribution of the device, improve the thermal failure of the device, enhance the light energy utilization of the device, and improve the stability and efficiency of the device operation.

[0006] To achieve the above objectives, the technical solution of the present invention includes the following:

[0007] 1. A photoconductive device based on a periodic surface microstructure, comprising a semi-insulating substrate 1, a metal electrode 2, and a connecting electrode 3, characterized in that:

[0008] The semi-insulating substrate 1 has symmetrical regular polygonal periodic epitaxial layers 4 embedded on its front and back surfaces to homogenize stress and improve the thermal management of the device.

[0009] The metal electrode 2 is located on the surface of each epitaxial layer, and a highly reflective dielectric layer 5 with the same thickness as the metal electrode is provided on the semi-insulating substrate between the metal electrodes to reflect light and reduce the loss of light energy.

[0010] The connecting electrode 3 is located on the surface of the high-reflectivity dielectric layer and the metal electrode.

[0011] Preferably, the semi-insulating substrate 1 is in the shape of a cube or cylinder and has a thickness of 0.35 mm to 1 mm; its material is any one of silicon carbide, gallium nitride, gallium arsenide, gallium oxide or diamond.

[0012] Preferably, the epitaxial layer 4 is an n+ epitaxial layer with an embedding depth of 1-5 μm.

[0013] Preferably, the metal electrode 2 has the same shape and size as the n+ epitaxial layer 4 and is in ohmic contact with it. The material is any one of Ni / Ti / Pt / Au composite metal layer, Ti / Pt / Au composite metal layer, W / Ti / Au composite metal layer, Ni / Ti / Au composite metal layer or Ni / Au composite metal layer.

[0014] Preferably, the highly reflective dielectric layer 5 is a Ti3O5 / SiO2 composite layer with thicknesses of 640nm-660nm and 840nm-860nm, respectively.

[0015] Preferably, the connecting electrode 3 is made of copper, gold, or a copper-gold metal layer, with a length greater than half that of the semi-insulating substrate, a width of 3 mm to 8 mm, and a thickness of 0.05 mm to 0.1 mm.

[0016] 2. A method for fabricating a photoconductive device based on a periodic surface microstructure, characterized by comprising the following steps:

[0017] 1) Clean the semi-insulating substrate, uniformly apply photoresist to the front side of the cleaned semi-insulating substrate, and perform photolithography and development on the front side of the semi-insulating substrate with photoresist applied through a mask with a prepared pattern to form several regular polygonal shallow grooves.

[0018] 2) The front side of the semi-insulating substrate with several regular polygonal shallow grooves is etched to a depth of 1μm-5μm to form periodically arranged regular polygonal grooves on the front side of the semi-insulating substrate.

[0019] 3) Homogeneous epitaxy is first performed in the regular polygonal groove on the front side of the semi-insulating substrate to form an n+ epitaxial layer, and then metal is evaporated, sputtered, and electroplated on the front side of the semi-insulating substrate to form a metal layer.

[0020] 4) Remove all the metal layers outside the several regular polygonal epitaxial layer regions on the front side of the semi-insulating substrate to form several metal electrodes.

[0021] 5) Apply photoresist uniformly to the front side of the semi-insulating substrate with metal electrodes, and perform photolithography and development on the substrate using a mask with the prepared pattern to expose the areas without epitaxial layers.

[0022] 6) Perform magnetron sputtering on the front side of the developed semi-insulating substrate to prepare a Ti3O5 / SiO2 composite layer, and remove the photoresist remaining on the front side of the semi-insulating substrate after magnetron sputtering.

[0023] 7) Sputtering is performed on the front side of a semi-insulating substrate with a Ti3O5 / SiO2 composite layer to prepare a connecting electrode.

[0024] 8) Clean the back side of the semi-insulating substrate, uniformly apply photoresist to the back side of the cleaned semi-insulating substrate, and perform photolithography and development on the back side of the semi-insulating substrate with photoresist applied through a mask with a prepared pattern to form several regular polygonal shallow trenches.

[0025] 9) Perform the same operation on the back side of the semi-insulating substrate as in steps 2)-7) to complete the fabrication of the photoconductive switch device.

[0026] Compared with the prior art, the present invention has the following advantages:

[0027] Firstly, by embedding regular polygonal n+ epitaxial layers on the upper and lower surfaces of the semi-insulating substrate, this invention can not only utilize the rotational symmetry and thermal management capabilities of regular polygons to uniformly distribute stress in all directions, providing a more uniform electron transport channel, improving carrier mobility, and avoiding hot spots in the device, but also reduce the local electric field concentration effect through the regulation of electric field distribution by the n+ epitaxial layer.

[0028] Secondly, by preparing highly reflective dielectric layers on the upper and lower surfaces of a semi-insulating substrate, the high reflectivity of the high reflective dielectric layers for trigger light can be used to improve the light energy utilization of the device.

[0029] Third, by preparing connecting electrodes on the surface of the highly reflective dielectric layer, the present invention can make them act as field plates, thereby optimizing the electric field distribution of the device. Attached Figure Description

[0030] Figure 1 Device structure diagram of the present invention;

[0031] Figure 2 A schematic diagram of the fabrication process of the device of the present invention. Specific implementation methods

[0032] The following detailed description of specific examples of the present invention is provided in conjunction with the accompanying drawings.

[0033] Reference Figure 1 This example is based on a periodic surface microstructure photoconductive device, including a semi-insulating substrate 1, a metal electrode 2, a connecting electrode 3, an epitaxial layer 4, and a highly reflective dielectric layer 5, wherein:

[0034] The semi-insulating substrate 1 is in the shape of a cube or cylinder, with a thickness of 0.35 mm to 1 mm, and is made of any one of silicon carbide, gallium nitride, gallium arsenide, gallium oxide, or diamond.

[0035] The epitaxial layer 4 is symmetrically embedded on the upper and lower surfaces of the semi-insulating substrate 1. It is made of the same n-type heavily doped material as the semi-insulating substrate material, forming an n+ epitaxial layer with a thickness of 1 to 5 μm.

[0036] The metal electrode 2 has the same shape and size as the epitaxial layer 4, is distributed on the surface of each epitaxial layer 4, and is in ohmic contact with each epitaxial layer. The metal material is any one of Ni / Ti / Pt / Au composite metal layer, Ti / Pt / Au composite metal layer, W / Ti / Au composite metal layer, Ni / Ti / Au composite metal layer, or Ni / Au composite metal layer.

[0037] The highly reflective dielectric layer 5 is located on a semi-insulating substrate between the metal electrodes 2 and has the same thickness as the metal electrodes. The material is a Ti3O5 / SiO2 composite layer with thicknesses of 640nm-660nm and 840nm-860nm, respectively.

[0038] The connecting electrode 3 is located on the surface of the high-reflectivity dielectric layer 5 and the metal electrode 2, and the material is one of copper, gold or copper-gold metal layer with a thickness of 0.001 mm to 0.1 mm.

[0039] Reference Figure 2 The present invention provides a method for preparing the above-mentioned device, and the following three embodiments are given.

[0040] Example 1: A periodic surface microstructure photoconductor device with an epitaxial layer thickness of 2 μm, a highly reflective dielectric layer Ti3O5 / SiO2 thickness of 650 nm / 850 nm, a metal electrode material of Ni / Ti / Pt / Au, and a connecting electrode of Cu was fabricated on a semi-insulating silicon carbide substrate.

[0041] Step 1: Prepare a periodic regular polygonal pattern on the front side of a silicon carbide semi-insulating substrate, such as... Figure 2 As shown in a.

[0042] 1.1) The silicon carbide semi-insulating substrate was sequentially immersed in BOE solution, deionized water, acetone, isopropanol, and deionized water for ultrasonic cleaning for 120s, 180s, 600s, 180s, and 180s, respectively.

[0043] 1.2) Photoresist is uniformly applied to the front side of the cleaned silicon carbide semi-insulating substrate. The photoresist-coated front side of the semi-insulating substrate is then photolithographically etched and developed using a mask with a pre-prepared pattern to form several periodic regular polygonal patterns.

[0044] Step 2: Fabricate periodic regular polygonal grooves on the front side of the silicon carbide semi-insulating substrate, such as... Figure 2 As shown in b.

[0045] Dry etching was performed on a silicon carbide semi-insulating substrate. Under process conditions of a mixed gas of sulfur hexafluoride and oxygen, an RF power of 200W, and a reaction chamber pressure of 1.5mTorr, periodically arranged regular polygonal grooves with a depth of 2μm were etched on the front side of the semi-insulating substrate.

[0046] Step 3: Embed n+ epitaxial growth on the front side of the silicon carbide semi-insulating substrate and fabricate a metal layer, such as... Figure 2 As shown in c.

[0047] 3.1) Homogeneous epitaxy is first performed in the regular polygonal groove on the front side of the silicon carbide semi-insulating substrate to form an n+ epitaxial layer;

[0048] 3.2) Ni / Ti / Pt / Au metal was first evaporated and sputtered on the front side of the silicon carbide semi-insulating substrate, with each layer having a thickness of 200 nm / 150 nm / 150 nm / 200 nm, respectively; then, an electroplating solution consisting of potassium gold cyanide and potassium citrate with a pH of 4 was selected, and the plating was carried out at a temperature of 50 degrees Celsius and a current density of 0.2 A / dm³. 2 Under the process conditions of stirring paddle speed of 200 rpm, Au is electroplated to a thickness of 800 nm to form a Ni / Ti / Pt / Au metal layer.

[0049] Step 4: Fabricate a metal electrode on the front side of the silicon carbide semi-insulating substrate, such as... Figure 2 As shown in d.

[0050] 4.1) Apply a blue film to the front side of the silicon carbide semi-insulating substrate, and then peel it off to remove most of the metal layer outside the several regular polygonal epitaxial layer areas on the front side of the silicon carbide semi-insulating substrate.

[0051] 4.2) Use a stripping machine to strip away all the residual metal layers outside the several regular polygonal epitaxial layer regions to form several metal electrodes.

[0052] Step 5: Fabricate a highly reflective dielectric layer pattern on the front side of the silicon carbide substrate, such as... Figure 2 As shown in e.

[0053] Photoresist is uniformly coated on the front side of a silicon carbide semi-insulating substrate with metal electrodes. The substrate is then photolithographically etched and developed using a patterned mask to expose areas without epitaxial layers.

[0054] Step 6: Fabricate a highly reflective dielectric layer on the front side of the silicon carbide semi-insulating substrate, such as... Figure 2 As shown in f.

[0055] 6.1) Magnetron sputtering was performed on the front side of the developed silicon carbide semi-insulating substrate to prepare Ti3O5 / SiO2 composite layers with thicknesses of 650 nm and 850 nm, respectively.

[0056] 6.2) The photoresist remaining on the front side of the semi-insulating substrate after magnetron sputtering is removed by a stripper to form a highly reflective dielectric layer.

[0057] Step 7: Fabricate connection electrodes on the front side of the silicon carbide semi-insulating substrate, such as... Figure 2 As shown in g.

[0058] A Cu metal layer with a thickness of 0.1 mm was sputtered onto the front side of a silicon carbide semi-insulating substrate with a Ti3O5 / SiO2 composite layer to form a connecting electrode.

[0059] Step 8: Fabricate a periodic regular polygonal pattern on the back side of the silicon carbide semi-insulating substrate, such as... Figure 2 As shown in h.

[0060] 8.1) The back side of the silicon carbide semi-insulating substrate was ultrasonically cleaned for 120s, 180s, 600s, 180s, and 180s respectively using BOE solution, deionized water, acetone, isopropanol, and deionized water.

[0061] 8.2) Photoresist is uniformly applied to the back side of the cleaned silicon carbide semi-insulating substrate. The back side of the semi-insulating substrate with photoresist applied to the front side is photolithographically etched and developed using a mask with a pre-prepared pattern to form several periodic regular polygonal patterns.

[0062] Step 9: Fabricate periodic regular polygonal grooves on the back side of the silicon carbide semi-insulating substrate, such as... Figure 2 As shown in i.

[0063] Dry etching was performed on a silicon carbide semi-insulating substrate. Under process conditions of a mixed gas of sulfur hexafluoride and oxygen, an RF power of 200W, and a reaction chamber pressure of 1.5mTorr, periodically arranged regular polygonal grooves with a depth of 2μm were etched on the back side of the semi-insulating substrate.

[0064] Step 10: Embed n+ epitaxy on the back side of the silicon carbide semi-insulating substrate and fabricate a metal layer, such as... Figure 2 As shown in j.

[0065] 10.1) Homogeneous epitaxy is first performed in the regular polygonal groove on the back side of the silicon carbide semi-insulating substrate to form an n+ epitaxial layer;

[0066] 10.2) Ni / Ti / Pt / Au metal was first evaporated and sputtered onto the back side of the silicon carbide semi-insulating substrate, with each layer having a thickness of 200 nm / 150 nm / 150 nm / 200 nm, respectively; then, an electroplating solution consisting of potassium gold cyanide and potassium citrate, with a pH of 4, was used, and the plating was carried out at a temperature of 50 degrees Celsius and a current density of 0.2 A / dm³. 2 Under the process conditions of stirring paddle speed of 200 rpm, Au is electroplated to a thickness of 800 nm to form a Ni / Ti / Pt / Au metal layer.

[0067] Step 11: Fabricate a metal electrode on the back side of a silicon carbide semi-insulating substrate, such as... Figure 2 As shown in k.

[0068] 11.1) Apply a blue film to the back of the silicon carbide semi-insulating substrate and then peel it off to remove most of the metal layer outside the several regular polygonal epitaxial layer regions on the back of the silicon carbide semi-insulating substrate.

[0069] 11.2) Use a stripper to strip away all the residual metal layers outside the several regular polygonal epitaxial layer regions to form several metal electrodes.

[0070] Step 12: Fabricate a highly reflective dielectric layer pattern on the back side of the silicon carbide substrate, such as... Figure 2 As shown in l.

[0071] Photoresist is uniformly coated on the back side of a silicon carbide semi-insulating substrate with metal electrodes. The substrate is then photolithographically etched and developed using a patterned mask to expose areas without epitaxial layers.

[0072] Step 13: Prepare a highly reflective dielectric layer on the back side of a silicon carbide semi-insulating substrate, such as... Figure 2 As shown in m.

[0073] 13.1) A Ti3O5 / SiO2 composite layer was prepared by magnetron sputtering on the back side of the developed silicon carbide semi-insulating substrate, with each layer having a thickness of 650 nm and 850 nm, respectively.

[0074] 13.2) The photoresist remaining on the back side of the semi-insulating substrate after magnetron sputtering is removed by a stripper to form a highly reflective dielectric layer.

[0075] Step 14: Fabricate connection electrodes on the back side of the silicon carbide semi-insulating substrate, such as... Figure 2 As shown in n.

[0076] A Cu metal layer with a thickness of 0.1 mm was sputtered onto the back side of a silicon carbide semi-insulating substrate with a Ti3O5 / SiO2 composite layer to form a connecting electrode, thus completing the fabrication of the photoconductive switch device in this example.

[0077] Example 2: A periodic surface microstructure photoconductor device with an epitaxial layer thickness of 1 μm, a highly reflective dielectric layer Ti3O5 / SiO2 thickness of 640 nm / 840 nm, a metal electrode material of Ni / Au, and a connecting electrode of Au was fabricated on a semi-insulating gallium nitride substrate.

[0078] Step 1: Fabricate a periodic regular polygonal pattern on the front side of a gallium nitride semi-insulating substrate, such as... Figure 2 As shown in a.

[0079] The specific implementation of this step is the same as step 1 in Example 1.

[0080] Step 2: Fabricate periodic regular polygonal grooves on the front side of the gallium nitride semi-insulating substrate, such as... Figure 2 As shown in b.

[0081] Dry etching was performed on a gallium nitride semi-insulating substrate. The process conditions were set as follows: gas mixture of sulfur hexafluoride and oxygen, RF power of 250W, and reaction chamber pressure of 1.6mTorr. Periodically arranged regular polygonal grooves with a depth of 1μm were etched on the front side of the semi-insulating substrate.

[0082] Step 3: Embed n+ epitaxy on the front side of the gallium nitride semi-insulating substrate and fabricate a metal layer, such as... Figure 2 As shown in c.

[0083] First, homogeneous epitaxy is performed in the regular polygonal groove on the front side of the gallium nitride semi-insulating substrate to form an n+ epitaxial layer;

[0084] Next, Ni / Au metal layers with thicknesses of 200 nm and 280 nm were evaporated and sputtered on the front side of the silicon carbide semi-insulating substrate.

[0085] Then, the temperature was set to 60 degrees Celsius and the current density to 0.3 A / dm³. 2 Under process conditions of 250 rpm stirring speed, an electroplating solution consisting of potassium gold cyanide and potassium citrate with a pH of 4 was selected. Au was electroplated on the front side of a gallium nitride semi-insulating substrate to a thickness of 1000 nm to form a Ni / Au metal layer.

[0086] Step 4: Fabricate a metal electrode on the front side of the gallium nitride semi-insulating substrate, such as... Figure 2 As shown in d.

[0087] The specific implementation of this step is the same as step 4 in Example 1.

[0088] Step 5: Fabricate a highly reflective dielectric layer pattern on the front side of the gallium nitride substrate, such as... Figure 2 As shown in e.

[0089] The specific implementation of this step is the same as step 5 in Example 1.

[0090] Step Six: Fabricate a highly reflective dielectric layer on the front side of the gallium nitride semi-insulating substrate, such as... Figure 2 As shown in f.

[0091] On the front side of the developed gallium nitride semi-insulating substrate, Ti3O5 / SiO2 composite layers with thicknesses of 640 nm and 840 nm were sputtered by magnetron sputtering.

[0092] The photoresist remaining on the front side of the semi-insulating substrate after magnetron sputtering is then removed by a stripper to form a highly reflective dielectric layer.

[0093] Step 7: Fabricate connection electrodes on the front side of the gallium nitride semi-insulating substrate, such as... Figure 2 As shown in g.

[0094] A 0.005 mm thick layer of Au metal was sputtered onto the front side of a gallium nitride semi-insulating substrate with a Ti3O5 / SiO2 composite layer to form a connecting electrode.

[0095] Step 8: Fabricate a periodic regular polygonal pattern on the back side of the gallium nitride semi-insulating substrate, such as... Figure 2 As shown in h.

[0096] The specific implementation of this step is the same as step 8 in Example 1.

[0097] Step 9: Perform the same operation on the back side of the gallium nitride semi-insulating substrate as in Steps 2 to 7 to complete the fabrication of the photoconductive switch device in this example.

[0098] Example 3: A periodic surface microstructure photoconductor device with an epitaxial layer thickness of 1.5 μm, a highly reflective dielectric layer Ti3O5 / SiO2 thickness of 660 nm / 860 nm, a metal electrode material of Ni / Ti / Au, and a connecting electrode of Cu / Au was fabricated on a semi-insulating gallium arsenide substrate.

[0099] Step A: Fabricate a periodic regular polygonal pattern on the front side of a gallium arsenide semi-insulating substrate, such as... Figure 2 As shown in a.

[0100] The specific implementation of this step is the same as step 1 in Example 1.

[0101] Step B: Fabricate periodic regular polygonal grooves on the front side of the gallium arsenide semi-insulating substrate, such as... Figure 2 As shown in b.

[0102] Dry etching was performed on a gallium arsenide semi-insulating substrate to etch periodically arranged regular polygonal grooves with a depth of 1.5 μm on the front side of the semi-insulating substrate. The etching process conditions were: the gas was a mixture of sulfur hexafluoride and oxygen, the radio frequency power was 300 W, and the reaction chamber pressure was 2 mTorr.

[0103] Step C: Embed n+ epitaxy on the front side of the gallium arsenide semi-insulating substrate and fabricate a metal layer, such as... Figure 2 As shown in c.

[0104] C1) Homoein epitaxy is first performed in the regular polygonal groove on the front side of the gallium arsenide semi-insulating substrate to form an n+ epitaxial layer;

[0105] C2) Evaporate and sputter Ni / Ti / Au metal layers with thicknesses of 200nm / 300nm / 240nm on the front side of the silicon carbide semi-insulating substrate;

[0106] C3) An electroplating solution consisting of potassium gold cyanide and potassium citrate, with a pH of 4, was used to electroplate an 800 nm thick layer of Au onto the front side of a gallium arsenide semi-insulating substrate, forming a Ni / Ti / Au metal layer. The electroplating temperature was set at 50 degrees Celsius, and the current density at 0.25 A / dm³. 2 The stirring paddle speed is 300 rpm.

[0107] Step D: Fabricate a metal electrode on the front side of the gallium arsenide semi-insulating substrate, such as... Figure 2 As shown in d.

[0108] The specific implementation of this step is the same as step 4 in Example 1.

[0109] Step E: Fabricate a highly reflective dielectric layer pattern on the front side of the gallium arsenide substrate, such as... Figure 2 As shown in e.

[0110] The specific implementation of this step is the same as step 5 in Example 1.

[0111] Step F: Fabricate a highly reflective dielectric layer on the front side of the gallium arsenide semi-insulating substrate, such as... Figure 2 As shown in f.

[0112] F1) On the front side of the developed gallium arsenide semi-insulating substrate, a Ti3O5 / SiO2 composite layer with thicknesses of 660 nm and 860 nm is sputtered by magnetron sputtering.

[0113] F2) The photoresist remaining on the front side of the semi-insulating substrate after magnetron sputtering is then removed by a stripper to form a highly reflective dielectric layer.

[0114] Step G: Fabricate connection electrodes on the front side of the gallium arsenide semi-insulating substrate, such as... Figure 2 As shown in g.

[0115] A Cu / Au metal layer with a thickness of 500 μm / 1 μm was sputtered on the front side of a gallium arsenide semi-insulating substrate with a Ti3O5 / SiO2 composite layer to form a connecting electrode.

[0116] Step H: Prepare a periodic regular polygonal pattern on the back side of the gallium arsenide semi-insulating substrate, such as... Figure 2 As shown in h.

[0117] The specific implementation of this step is the same as step 8 in Example 1.

[0118] Step I: Perform the same operation on the back side of the gallium arsenide semi-insulating substrate as in Steps B to G to complete the fabrication of the photoconductive switch device in this example.

[0119] The above descriptions are merely a few specific examples of the present invention and do not constitute any limitation on the present invention. Obviously, those skilled in the art, after understanding the content and principles of the present invention, may make various modifications and changes in form and detail without departing from the principles and structure of the present invention. For example, the material of the semi-insulating substrate can also be gallium oxide and diamond; the metal electrode material can also be any one of Ti / Pt / Au composite metal layer and W / Ti / Au composite metal layer; the n+ epitaxial layer, Ti3O5 / SiO2 and the connecting electrode can also be other thicknesses than those in Examples 1 to 3. However, these modifications and changes based on the concept of the present invention are still within the scope of protection of the claims of the present invention.

Claims

1. A photoconductive device based on a periodic surface microstructure, comprising a semi-insulating substrate (1), a metal electrode (2), and a connecting electrode (3), characterized in that: The semi-insulating substrate (1) has symmetrical regular polygonal periodic epitaxial layers (4) embedded on its front and back surfaces for stress homogenization and improving the thermal management of the device. The metal electrode (2) is located on the surface of each epitaxial layer, and a highly reflective dielectric layer (5) with the same thickness as the metal electrode is provided on the semi-insulating substrate between the metal electrodes to reflect light and reduce the loss of light energy; The connecting electrode (3) is located on the surface of the high-reflectivity dielectric layer and the metal electrode; The epitaxial layer (4) is an n+ epitaxial layer with an embedding depth of 1μm to 5μm; The highly reflective dielectric layer (5) is a Ti3O5 / SiO2 composite layer, and the thickness of each layer is 640nm~660nm and 840nm~860nm respectively; The metal electrode (2) has the same shape and size as the n+ epitaxial layer (4) and is in ohmic contact with it. The material is any one of Ni / Ti / Pt / Au composite metal layer, Ti / Pt / Au composite metal layer, W / Ti / Au composite metal layer, Ni / Ti / Au composite metal layer or Ni / Au composite metal layer. The semi-insulating substrate (1) is in the shape of a cube or cylinder and has a thickness of 0.35 mm to 1 mm; its material is any one of silicon carbide, gallium nitride, gallium arsenide, gallium oxide or diamond; The connecting electrode (3) is made of copper, gold, or a copper-gold metal layer, with a thickness of 0.001 mm to 0.1 mm.

2. A method for preparing the device according to claim 1, characterized in that, Includes the following steps: 1) Clean the semi-insulating substrate, uniformly apply photoresist to the front side of the cleaned semi-insulating substrate, and perform photolithography and development on the front side of the semi-insulating substrate with photoresist applied through a mask with a prepared pattern to form several regular polygonal patterns. 2) The front side of a semi-insulating substrate with several regular polygonal patterns is etched to a depth of 1μm to 5μm to form periodically arranged regular polygonal grooves on the front side of the semi-insulating substrate. 3) Homogeneous epitaxy is first performed in the regular polygonal groove on the front side of the semi-insulating substrate to form an n+ epitaxial layer, and then metal is evaporated, sputtered, and electroplated on the front side of the semi-insulating substrate to form a metal layer. 4) Remove all metal layers outside the several regular polygonal epitaxial layer regions on the front side of the semi-insulating substrate to form several metal electrodes; 5) Apply photoresist uniformly to the front side of the semi-insulating substrate with metal electrodes, and perform photolithography and development on the substrate through a mask with a pre-prepared pattern to expose the areas without epitaxial layers. 6) Perform magnetron sputtering on the front side of the developed semi-insulating substrate to prepare a Ti3O5 / SiO2 composite layer, and remove the photoresist remaining on the front side of the semi-insulating substrate after magnetron sputtering. 7) Sputtering is performed on the front side of a semi-insulating substrate with a Ti3O5 / SiO2 composite layer to prepare the connecting electrode; 8) Clean the back side of the semi-insulating substrate, uniformly apply photoresist to the back side of the cleaned semi-insulating substrate, and perform photolithography and development on the back side of the semi-insulating substrate with photoresist applied through a mask with a prepared pattern to form several regular polygonal patterns. 9) Perform the same operation on the back side of the semi-insulating substrate using the same process as in steps 2) to 7) to complete the fabrication of the photoconductive switch device.

3. The method according to claim 2, characterized in that, The cleaning of the semi-insulating substrate wafer involves sequentially immersing the semi-insulating substrate wafer in BOE solution, deionized water, acetone, isopropanol, and deionized water for ultrasonic cleaning for 120s, 180s, 600s, 180s, and 180s, respectively.

4. The method according to claim 2, characterized in that, The etching of the semi-insulating substrate is performed using a dry etching method, and the process conditions are as follows: The gas is a mixture of sulfur hexafluoride and oxygen. RF power ranges from 100W to 500W. The reaction chamber pressure is 1 mTorr to 100 mTorr.

5. The method according to claim 2, characterized in that, The electroplating process parameters are as follows: The electroplating solution uses potassium gold cyanide and conductive salts, with a pH value of 3.8–4.

6. The conductive salt is composed of potassium citrate or dipotassium hydrogen phosphate. The electroplating temperature is 40°C to 60°C. The current density is 0.1A / ~0.5A / , The stirring paddle rotates at a speed of 100 rpm to 300 rpm.

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