Display device having improved opening position

Abstract

A display device according to the present invention comprises: a substrate including a plurality of sub-pixels; a transistor disposed in each of the sub-pixels; a first planarization layer formed in an entire region of the substrate to cover the transistor; a light emitting device disposed in each of the sub-pixels, the light emitting device being electrically connected to the transistor through a contact hole formed in the first planarization layer; and a step prevention member formed in a prescribed region including the first contact hole in each of the sub-pixels.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to Korean Patent Application No. 10-2023-0127975 filed in Korea on September 25, 2023, the entire contents of which are hereby expressly incorporated by reference into this application. Technical Field

[0003] The present invention relates to a display device with improved aperture ratio. Background Art

[0004] Recently, with the development of multimedia, the importance of display devices has increased. Various display devices such as liquid crystal displays and organic light emitting displays have been proposed. Among these display devices, organic light emitting display devices are currently widely used due to their high response speed, high brightness and good viewing angle.

[0005] However, in the case of an organic light emitting display device that displays images using R (red) light emitting devices, G (green) light emitting devices, and B (blue) light emitting devices, there is a problem of a small aperture ratio. In particular, there is a problem of a reduced aperture ratio due to a bank layer separating the R light emitting devices, the G light emitting devices, and the B light emitting devices. Summary of the invention

[0006] An object of the present invention is to provide a display device having an improved aperture ratio.

[0007] In order to achieve the objective, a display device according to the present invention includes: a substrate including a plurality of sub-pixels; a transistor, the transistor being arranged in each sub-pixel; a first planarization layer, the first planarization layer being formed in the entire area of ​​the substrate to cover the transistor; a light-emitting device, the light-emitting device being arranged in each sub-pixel, the light-emitting device being electrically connected to the transistor through a contact hole formed in the first planarization layer; and a step prevention member, the step prevention member being formed in a prescribed area including the first contact hole in each sub-pixel.

[0008] The step prevention member may extend from the inside of the first contact hole to the upper surface of the first planarization layer. At this time, the light emitting device can include a first electrode disposed on the first planarization layer and inside the first contact hole in each sub-pixel, a light emitting layer disposed on the side surface and the upper surface of the step prevention member and on the upper surface of the first electrode, and a second electrode disposed on the light emitting layer.

[0009] The step prevention member may be filled only inside the first contact hole. In this case, the light emitting device may include a first electrode disposed on the first planarization layer and inside the first contact hole in each sub-pixel, a light emitting layer disposed on the upper surface of the step prevention member and on the upper surface of the first electrode, and a second electrode disposed on the light emitting layer.

[0010] The light emitting layer formed on the upper surface of the step preventing member and the light emitting layer formed on the upper surface of the first electrode may be at the same level.

[0011] The step preventing member may be disposed in a region where the transistor is formed and the step preventing member may be disposed in a boundary region of the plurality of sub-pixels.

[0012] The step preventing member may be made of at least one material selected from the group consisting of an inorganic insulating material, an organic insulating material, and a photosensitizer having a black pigment.

[0013] A protective layer may be disposed on an upper surface of the second electrode in each subpixel, a second planarization layer may be formed in the entire region of the substrate, and a connection electrode electrically connected to the second electrodes of the plurality of light emitting devices may be disposed on the second planarization layer.

[0014] The second planarization layer may be formed at the same level as the second electrode to expose the second electrode to the outside on a surface of the second planarization layer, so that the connection electrode may be electrically connected to the exposed second electrode.

[0015] The second electrode may be covered by a second planarization layer having a second contact hole thereon, so that the connection electrode may be electrically connected to the second electrode through the second contact hole.

[0016] A manufacturing method of a display device according to the present invention includes: providing a substrate including a plurality of sub-pixels; forming a transistor in each sub-pixel; forming a first planarization layer in the entire area of ​​the substrate, and etching the first planarization layer above the transistor to form a first contact hole; forming a first electrode inside the first contact hole in each sub-pixel and on the first planarization layer; forming a step prevention member in a prescribed portion including the first contact hole; depositing a material and a photoresist having orthogonality in the entire area of ​​the substrate; developing the photoresist to form a second pattern; over-etching the material having orthogonality using the second pattern to form a first pattern for forming an undercut shape with the second pattern; depositing a light-emitting material and a conductive material using the first and second patterns of the undercut shape as mask layers to form a light-emitting layer and a second electrode; and removing the first and second patterns through a stripping process.

[0017] A protective layer is formed over the second electrode using the first and second patterns of the undercut shape as mask layers, a second planarization layer is formed in the entire region of the substrate, and a connection electrode electrically connected to the light emitting device is formed on the second planarization layer.

[0018] The second electrode is exposed to the outside through the surface of the second planarization layer by etching the entire area of ​​the second planarization layer at a prescribed thickness, and the connection electrode is electrically connected to the exposed upper surface of the second electrode.

[0019] A second contact hole is formed by etching the second planarization layer over the second electrode, and the connection electrode is electrically connected to the second electrode through the second contact hole. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a schematic block diagram of an organic light emitting display device according to the present invention.

[0021] Figure 2 is a schematic block diagram of a sub-pixel of an organic light emitting display device according to the present invention.

[0022] Figure 3 is a circuit diagram conceptually showing a sub-pixel of a display device according to the present invention.

[0023] Figure 4 is a plan view schematically showing a sub-pixel of a display device according to the first embodiment of this specification.

[0024] Figure 5 is a plan view schematically showing a sub-pixel of a display device having a general structure.

[0025] Figure 6 is a cross-sectional view showing the structure of a sub-pixel of a display device according to the first embodiment of this specification.

[0026] 7A to 7J 1 is a view showing a method of manufacturing a display device according to a first embodiment of the present invention.

[0027] Figure 8 is a cross-sectional view showing the structure of a sub-pixel of a display device according to a second embodiment of the present specification. DETAILED DESCRIPTION

[0028] The advantages and features of the present disclosure and the methods for achieving the advantages and features will be clear from the embodiments described in detail below with reference to the accompanying drawings. However, the present disclosure can be implemented in many different forms and should not be construed as being limited to the embodiments set forth herein. The embodiments are provided so that the present disclosure will be thorough and complete, and the scope of the present disclosure will be fully conveyed to those skilled in the art to which the present disclosure relates, and the present disclosure is limited only by the scope of the appended claims.

[0029] The shapes, sizes, ratios, angles, quantities, etc. disclosed in the drawings used to describe the embodiments of the present disclosure are illustrative, and thus the present disclosure is not limited to the matters shown. The same reference numerals refer to the same parts throughout the present disclosure. In addition, in the following description of the present disclosure, when the detailed description of the known related art is determined to be unnecessarily obscure the gist of the present disclosure, its detailed description will be omitted here. When using terms such as "including", "having", "comprising", etc. mentioned in the present disclosure, other parts may be added unless the term "only" is used herein. When a component is represented as a singular, the plural is included unless otherwise specified.

[0030] When analyzing components, they are interpreted as including a margin of error even if not explicitly described.

[0031] When describing a positional relationship, for example, when the positional relationship of two parts is described as "on", "above", "below", "adjacent", etc., unless "immediately" or "directly" is used, one or more other parts may be located between the two parts.

[0032] When describing a tense relationship, for example, when a temporal precedent relationship is described as "after", "subsequently", "next", "before", etc., discontinuous cases may also be included unless "immediately" or "directly" is used.

[0033] Although the terms first, second, etc. are used to describe various components, these components are not substantially limited by these terms. These terms are only used to distinguish one component from another component. Therefore, the first component described below can be substantially the second component within the technical spirit of the present disclosure.

[0034] When describing the components of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used. These terms are only used to distinguish an element from other elements, and the nature, order or number of the elements are not limited by the terms. When a component is described as being "coupled" or "connected" to another component, the component may be directly "coupled" or "connected" to the other component, and may also be indirectly "coupled" or "connected" to the other component without special instructions. It should be understood that other components may be "interposed" between the components that are connected or can be connected.

[0035] As used herein, the term "device" may include display devices, for example, a liquid crystal module (LCM) including a display panel and a driving unit for driving the display panel, and an organic light emitting display module (OLED module). In addition, the term "device" may also include a notebook computer, a television, a computer monitor, a vehicle electronic device including a device for a vehicle or other types of transportation, and a mobile electronic device or electronic board such as a smart phone as a finished product (finished product or final product) including an LCM and an OLED module. Complete electronic devices or complete sets of devices.

[0036] Therefore, the device in the present invention may include the display device itself (eg, LCM, OLED module, etc.), as well as an application product including the LCM, OLED module, etc., or a complete set of devices as devices for end users.

[0037] Hereinafter, the present disclosure will be described in detail with reference to the accompanying drawings.

[0038] The present invention can be applied to various display devices. For example, the display device of the present invention can be applied to various display devices, such as organic light-emitting display devices, liquid crystal display devices, electrophoretic display devices, quantum dot display devices, micro-LED (light-emitting device) display devices, and mini LED display devices. However, in the following description, for the sake of convenience, the organic light-emitting display device will be used as an example for description.

[0039] Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

[0040] Figure 1 is a schematic block diagram of an organic light emitting display device 100 according to the present invention, Figure 2 yes Figure 1 Schematic block diagram of a sub-pixel SP shown in FIG.

[0041] like Figure 1 As shown, the organic light emitting display device 100 includes an image processing unit 102 , a timing control unit 104 , a gate driving unit 106 , a data driving unit 107 , a power supply unit 108 and a display panel 109 .

[0042] The image processing unit 102 outputs image data supplied from the outside and a driving signal for driving various devices. For example, the driving signal from the image processing unit 102 may include a data enable signal, a vertical synchronization signal, a horizontal synchronization signal, and a clock signal.

[0043] The image data and the driving signal are provided from the image processing unit 102 to the timing control unit 104. The timing control unit 104 writes and outputs a gate timing control signal GDC for controlling the driving timing of the gate driving unit 106 and a data timing control signal DDC for controlling the driving timing of the data driving unit 107 based on the driving signal from the image processing unit 102.

[0044] The gate driving unit 106 outputs a scan signal to the display panel 109 in response to a gate timing control signal GDC supplied from the timing control unit 104. The gate driving unit 106 outputs the scan signal through a plurality of gate lines GL1 to GLm. In this case, the gate driving unit 106 may be formed in the form of an integrated circuit (IC), but is not limited thereto.

[0045] The data driving unit 107 outputs a data voltage to the display panel 109 in response to a data timing control signal DDC input from the timing control unit 104. The data driving unit 107 samples and latches the digital data signal DATA supplied from the timing control unit 104 to convert it into an analog data voltage based on a gamma voltage. The data driving unit 107 outputs the data voltage through a plurality of data lines DL1 to DLn. In this case, the data driving unit 107 may be mounted on the upper surface of the display panel 109 in the form of an integrated circuit (IC), but is not limited thereto.

[0046] The power supply unit 108 outputs a high potential voltage VDD, a low potential voltage VSS, etc. and supplies them to the display panel 109. The high potential voltage VDD is supplied to the display panel 109 through the first power supply line EVDD and the low potential voltage VSS is supplied to the display panel 109 through the second power supply line EVSS. At this time, the voltage from the power supply unit 108 is applied to the data driving unit 107 or the gate driving unit 106 to drive the data driving unit 107 or the gate driving unit 106.

[0047] The display panel 109 displays an image based on the data voltage from the data driving unit 108 , the scan signal from the gate driving unit 106 , and the power from the power supply unit 108 .

[0048] The display panel PAN includes a plurality of sub-pixels SP to display an image. The sub-pixels SP may include red sub-pixels, green sub-pixels, and blue sub-pixels. In addition, the sub-pixels SP may include white sub-pixels, red sub-pixels, green sub-pixels, and blue sub-pixels. The white sub-pixels, red sub-pixels, green sub-pixels, and blue sub-pixels may be formed in the same region or may be formed in different regions.

[0049] like Figure 2As shown, one sub-pixel SP may be connected to the gate line GL1, the data line DL1, the first power line EVDD, and the second power line EVSS. The sub-pixel SP may include a plurality of thin film transistors and storage capacitors according to the configuration of the pixel circuit.

[0050] Figure 3 is a circuit diagram illustrating a sub-pixel SP of the organic light emitting display device 100 according to the present invention.

[0051] like Figure 3 As shown, the organic light emitting display device 100 according to the present invention includes gate lines GL, data lines DL and power lines PL crossing each other to define sub-pixels SP. A switching thin film transistor Ts, a driving thin film transistor DT, a storage capacitor Cst and a light emitting device D are disposed in the sub-pixel SP.

[0052] The switching thin film transistor Ts is connected to the gate line GL and the data line DL, and the driving thin film transistor Td and the storage capacitor Cst are connected between the switching thin film transistor Ts and the power line PL. The light emitting device D is connected to the driving thin film transistor Td.

[0053] In the organic light emitting display device having such a structure, when the switching thin film transistor Ts is turned on according to the gate signal applied to the gate line GL, the data signal applied to the data line DL is applied to the gate of the driving thin film transistor Td and one electrode of the storage capacitor Cst through the switching thin film transistor Ts.

[0054] The driving thin film transistor Td is turned on according to the data signal applied to the gate, and thus a current proportional to the data signal is supplied from the power line PL to the light emitting device D through the driving thin film transistor Td, and then the light emitting device D emits light at a brightness proportional to the current flowing through the driving thin film transistor Td.

[0055] At this time, the storage capacitor Cst is charged with a voltage proportional to the data signal to keep the voltage of the gate electrode of the driving thin film transistor Td constant during one frame.

[0056] In the figure, only two thin film transistors Td and Ts and one capacitor Cst are provided, but the present invention is not limited thereto. Three or more thin film transistors and two or more capacitors may be provided in the present invention.

[0057] Hereinafter, the structure of the display device according to the present invention is described in detail.

[0058] Figure 4 is a diagram showing a sub-pixel SP of the display device 100 according to the present invention.

[0059] like Figure 4As shown, the sub-pixel SP of the display device 100 according to the present invention may be formed in an approximately rectangular shape. However, the shape of the sub-pixel SP is not limited to the rectangular shape, and may be formed in various shapes according to the shape of an electronic product, etc.

[0060] Although only one sub-pixel SP is shown in the drawings, in the actual display device 100, a plurality of sub-pixels SP may be arranged in an n×m matrix shape (where n and m are natural numbers). For example, the sub-pixels SP may be green sub-pixels emitting green light, red sub-pixels emitting red light, and blue sub-pixels emitting blue light, but are not limited thereto. In addition, the sub-pixels SP may be white sub-pixels emitting white light.

[0061] A light emitting device D for emitting light and a thin film transistor (not shown in the figure) may be disposed in the sub-pixel SP. For example, the light emitting device D may be an organic light emitting device, but is not limited thereto.

[0062] Although not shown in the drawings, the light emitting device D may include a first electrode, a second electrode, and a light emitting layer therebetween. At this time, the light emitting device D is formed for each sub-pixel SP. That is, one light emitting device D is arranged in each sub-pixel SP.

[0063] The region where the light emitting device D is formed is a light emitting region that emits light. At this time, since the light emitting layer is formed only in the desired region by the evaporation method, the light emitting device D can be disposed in a region spaced a certain distance inward from the outer edge of the sub-pixel SP. Therefore, the area S1 of the light emitting region that emits light becomes S1=a1×b1.

[0064] In the sub-pixel SP, a hole H is formed for electrically connecting the thin film transistor and the light emitting device D, and a step prevention member CS is formed inside and around the hole H for preventing the light emitting layer from being damaged by the hole H. At this time, the area S2 of the step prevention member CS is S2=a2×b2. Since no light is emitted from the step prevention member CS, the actual area of ​​the light emitting region of the display device 100 according to the present invention becomes (a1×b1)-(a2×b2).

[0065] As described above, in the display device 100 according to the present invention, the light emitting layer of the light emitting device D is formed only in the sub-pixel SP, and the thin film transistor and the light emitting device D are electrically connected through the step prevention member CS, so that the aperture ratio of the display device 100 can be significantly improved. This will be described below.

[0066] Figure 5 is a schematic plan view showing a general structure of the organic light emitting display device 100 .

[0067] like Figure 5As shown, in a general display device 100, a bank layer BNK is formed around the sub-pixel SP so that each of the sub-pixels SP is separated from each other. In such a display device 100, the light-emitting layer of the light-emitting device D is formed by applying an organic material. Therefore, when applying the organic material, due to the fluidity of the organic material, the organic material of a specific color can be applied not only to the sub-pixel SP of the corresponding color, but also to the sub-pixel SP of a different color. The bank layer BNK is a partition that binds the organic material to the corresponding sub-pixel SP when forming the light-emitting layer, so that the organic material is not applied to the adjacent sub-pixel SP of a different color.

[0068] Since the bank layer BNK should be formed to the outside of the sub-pixel SP with a width greater than a set width to prevent the organic material applied when forming the light emitting layer from flowing to the adjacent sub-pixel SP, the bank layer BNK overlaps the outer area of ​​the light emitting device D.

[0069] Since the bank layer BNK is not a region that outputs light, the area of ​​the light-emitting region that actually outputs light in the display device 100 is the area of ​​the subpixel SP ( S1 ) minus the area of ​​the bank layer BNK ( 2a3 × 2b3 ).

[0070] That is, in the display device 100 according to the present invention, no bank layer is formed, and only the step prevention member CS is formed in the sub-pixel SP, so that the entire area of ​​the light-emitting device D minus the area of ​​the step prevention member CS is the actual light-emitting area. On the other hand, in the general display device 200, the area exposed by the bank layer BNK is the actual light-emitting area.

[0071] In a general display device, most of the sub-pixel SP is blocked by the bank layer BNK, so that the aperture ratio (ie, the ratio of the actual light emitting portion to the entire sub-pixel SP) is about 30.1%. In contrast, in the display device 100 according to the present invention, the aperture ratio is increased to about 60.7%.

[0072] As described above, in the display device 100 according to the present invention, the light emitting layer of the light emitting device D may be formed only in the corresponding sub-pixel SP by a deposition method without forming the bank layer BNK, thereby significantly improving the aperture ratio of the display device 100 .

[0073] Figure 6 is along Figure 4 The cross-sectional view taken along line II' shows the structure of the sub-pixel of the display device 100 according to the first embodiment of the present invention. Although a plurality of sub-pixels are actually arranged in the display device 100, only two adjacent sub-pixels SP1 and SP2 are shown in the drawing for ease of description.

[0074] like Figure 6As shown, a buffer layer 142 is formed on a substrate 140. The substrate 140 may be made of a hard material such as glass or a plastic material, but is not limited thereto. For example, the plastic material may include polyimide, polymethyl methacrylate, polyethylene terephthalate, polyether sulfone, and polycarbonate.

[0075] When the substrate 140 is made of polyimide, the substrate 140 may be made of a plurality of polyimide layers, and an inorganic layer may be further disposed between the polyimide layers, but is not limited thereto.

[0076] The buffer layer 142 may be formed in the entire region of the substrate 140 to enhance adhesion between the substrate 140 and the layers thereon. In addition, the buffer layer 142 may block various types of defects such as alkali components flowing out of the substrate 140. In addition, the buffer layer 142 may delay diffusion of moisture or oxygen penetrating into the substrate 140.

[0077] The buffer layer 142 may be a single layer made of silicon oxide (SiOx) or silicon nitride (SiNx), or a multilayer thereof. When the buffer layer 142 is made of a multilayer, SiOx and SiNx may be alternately formed. The buffer layer 142 may be omitted based on the type and material of the substrate 140, the structure and type of the thin film transistor, etc.

[0078] A thin film transistor is formed on the buffer layer in each sub-pixel SP1 and SP2. For convenience of description, only a driving thin film transistor is illustrated among various thin film transistors that can be provided in the display area AA, but other thin film transistors such as a switch thin film transistor may also be included. In the figure, a thin film transistor of a top gate structure is shown, but the thin film transistor is not limited to this structure and may be formed in other structures, such as a thin film transistor of a bottom gate structure.

[0079] The thin film transistor includes a semiconductor pattern 112 disposed on a buffer layer 142 , a gate insulating layer 144 covering the semiconductor pattern 112 , a gate 114 on the gate insulating layer 144 , an interlayer insulating layer 146 covering the gate 114 , and a source 115 and a drain 116 on the interlayer insulating layer 146 .

[0080] The semiconductor pattern 112 may be made of a polycrystalline semiconductor. For example, the polycrystalline semiconductor may be made of low temperature polysilicon (LTPS) having high mobility, but is not limited thereto.

[0081] The semiconductor pattern 112 may be made of an oxide semiconductor. For example, the semiconductor pattern 112 may be made of one of IGZO (Indium-Gallium-Zinc-Oxide), IZO (Indium-Zinc-Oxide), IGTO (Indium-Gallium-Tin-Oxide), and IGO (Indium-Gallium-Oxide), but is not limited thereto. The semiconductor pattern 112 includes a channel region 112a in a central region and a source region 112b and a drain region 112c as doping layers at both sides of the channel region 112a.

[0082] The gate insulating layer 144 may be formed in the entire region of the substrate 140 or only in a partial region of the substrate 140. The gate insulating layer 144 may be composed of a single layer or multiple layers made of an inorganic material such as SiOx or SiNx, but is not limited thereto.

[0083] The gate 114 is made of metal. For example, the gate 114 may be formed of a single layer or multiple layers made of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof, but is not limited thereto.

[0084] The interlayer insulating layer 146 may be made of an organic material such as a photo acrylic resin, or the interlayer insulating layer 146 may be formed by a single layer or multiple layers made of an inorganic material (such as SiOx or SiNx), but is not limited thereto. In addition, the interlayer insulating layer 146 may be formed by multiple layers of an organic material layer and an inorganic material layer, but is not limited thereto.

[0085] The source electrode 115 and the drain electrode 116 are formed by a single layer or a multilayer made of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) or an alloy thereof, but are not limited thereto. The source electrode 115 and the drain electrode 116 may be in contact with the source region 112b and the drain region 112c of the semiconductor through contact holes formed in the gate insulating layer 144 and the interlayer insulating layer 146, respectively.

[0086] Although not shown in the figure, a bottom shield metal layer may be provided on the substrate 140 below the semiconductor pattern 112. The bottom shield metal layer minimizes a back channel phenomenon caused by charges trapped in the substrate 140 to prevent an afterimage or degradation of transistor performance. The bottom shield metal layer may be composed of a single layer or multiple layers made of titanium (Ti), molybdenum (Mo), or an alloy thereof, but is not limited thereto.

[0087] A planarization layer 148 is formed on the substrate provided with the thin film transistor. The planarization layer 148 may be formed of an organic material such as photo-acryl, but is not limited thereto. The planarization layer 148 may include a plurality of layers including an inorganic layer and an organic layer.

[0088] A light emitting device D is disposed in each of the sub-pixels SP1 and SP2 on the planarization layer 148. The light emitting device D includes a first electrode 132, a light emitting layer 134, and a second electrode 136.

[0089] The first electrode 132 is disposed on the planarization layer 148 and is electrically connected to the drain electrode 116 of the thin film transistor through a contact hole formed in the planarization layer 148. The first electrode 132 may be formed of at least one of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or an alloy thereof. In addition, the first electrode 132 may be formed of a transparent metal oxide material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0090] When the display device 100 is a top emission type display device, the first electrode 132 may further include an opaque conductive material layer to function as a reflective electrode that reflects light. When the display device 110 is a bottom emission type display device, the first electrode 132 may be made of a transparent conductive material such as ITO or IZO.

[0091] The step prevention member CS is disposed inside the contact hole H in the first planarization layer 148 and on the first electrode 132 on the first planarization layer 148. The step prevention member CS is filled into the contact hole H so that the organic material is not formed inside the contact hole H, and thus the light emitting layer 134 does not have defects due to the step of the contact hole H. The step prevention member CS is filled into the contact hole H to planarize the region where the light emitting layer 134 is formed, thereby preventing defects of the light emitting layer 134.

[0092] The step prevention member CS may be formed to extend to the outside of one end of the first electrode 132 to surround the one end of the first electrode 132, but is not limited thereto. Since the area of ​​the step prevention member CS has a significant influence on the aperture ratio of the display device 100, it is desirable to minimize the area of ​​the step prevention member CS.

[0093] For example, the step preventing member CS may be disposed over the thin film transistor T in an area similar to that of the thin film transistor T. Since the thin film transistor T may be a non-luminescent portion, the step preventing member CS may be disposed over the thin film transistor T to minimize reduction in the luminescent area caused by the step preventing member CS.

[0094] In addition, the step prevention member CS can be disposed in the boundary region between the sub-pixels SP1 and SP2. Adjacent sub-pixels SP1 and SP2 output light of different colors. Therefore, when light output from a specific sub-pixel (e.g., SP1) is incident on an adjacent sub-pixel (e.g., SP2), defects due to color mixing may occur. In the present invention, color mixing defects can be prevented by providing a step prevention member CS in the boundary portion between the sub-pixels SP1 and SP2. In addition, since a portion of the step prevention member CS is formed in the boundary region between the sub-pixels SP1 and SP2 that do not output light, the reduction in the area of ​​the light-emitting region due to the step prevention member CS can be minimized.

[0095] The step prevention member CS may be made of at least one material selected from the group consisting of an inorganic insulating material such as SiNx or SiOx, an organic insulating material such as BCB (benzocyclobutene), acrylic resin, epoxy resin, phenolic resin, polyamide resin and polyimide resin, and a photosensitizer including a black pigment, but is not limited thereto.

[0096] The light emitting layer 134 is formed on the upper surface of the first electrode 132 and the inclined surface and the upper surface of the step preventing member CS. The light emitting layer 134 may be formed in the R pixel, the G pixel, and the B pixel and may include an R emission layer emitting red light, a G emission layer emitting green light, and a B emission layer emitting blue light. For example, the light emitting layer 134 may include an organic light emitting layer, an inorganic light emitting layer, a nano-sized material layer, a quantum dot, a micro LED light emitting layer, or a mini LED light emitting layer, but is not limited thereto.

[0097] The light-emitting layer 134 may also include an electron injection layer for injecting electrons into the light-emitting layer, a hole injection layer for injecting holes into the light-emitting layer, an electron transport layer for transporting injected electrons to the light-emitting layer, a hole transport layer for transporting injected holes to the light-emitting layer, an electron blocking layer, and a hole blocking layer, but are not limited thereto.

[0098] The light emitting layer 134 may be formed to be wider than the first electrode 132 to cover the side end portion of the first electrode 132 , but is not limited thereto.

[0099] The second electrode 136 is disposed on the light emitting layer 134 and may be formed of a single layer or multiple layers made of a metal or an alloy thereof. In addition, the second electrode 136 may be made of a transparent metal oxide material such as ITO or IZO, but is not limited thereto.

[0100] When the display device 100 is a top emission type, the second electrode 136 may be made of a semi-transparent conductive material that transmits light. For example, the second electrode 188 may be made of at least one or more of an alloy such as LiF / Al, CsF / Al, Mg:Ag, Ca / Ag, Ca:Ag, LiF / Mg:Ag, LiF / Ca / Ag, or LiF / Ca:Ag.

[0101] When the display device 100 is a bottom emission type, the second electrode 136 may be a reflective electrode made of an opaque conductive material. For example, the second electrode 188 may be made of at least one or more of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or an alloy thereof.

[0102] In addition, the light-emitting device D can be formed in a tandem structure. The tandem structure may include a plurality of organic light-emitting layers and a charge generating layer disposed between the organic light-emitting layers. The charge generating layer is configured to adjust the charge balance between the plurality of organic light-emitting layers, and may be formed of a plurality of layers including a first charge generating layer and a second charge generating layer. The charge generating layer may include an N-type charge generating layer and a P-type charge generating layer. In this case, the charge generating layer may be formed of a light-emitting layer doped with an alkali metal (e.g., Li, Na, K, or Cs) or an alkaline earth metal (e.g., Mg, Sr, Ba, or Ra), but is not limited thereto.

[0103] Like the first electrode 132 and the light emitting layer 134 , the second electrode 136 is also formed only in the sub-pixels SP1 and SP2 and is disconnected from adjacent sub-pixels.

[0104] The first electrode 132 of the light-emitting device D is disposed under the step prevention member CS, and the light-emitting layer 134 and the second electrode 136 are disposed on the side surface and the upper surface of the step prevention member CS, so that the first electrode 132 and the light-emitting layer 134 are separated by the step prevention member CS, thereby not emitting light in the portion where the step prevention member CS is disposed.

[0105] On the other hand, in the portion other than the step preventing member CS in the sub-pixels SP1 and SP2, the first electrode 132, the light emitting layer 134, and the second electrode 136 are sequentially formed so that light is emitted in the portion. Therefore, the actual light emitting region ER of the display device 100 according to the present invention is the portion where the light emitting device D is provided (i.e., the portion where the first electrode 132, the light emitting layer 134, and the second electrode 136 are formed) minus the portion that does not emit light due to the step preventing member CS.

[0106] In addition to the upper surface of the second electrode 136 above the step prevention member CS, a protective layer 152 is formed on the upper surface of the second electrode 136 formed on the side of the step prevention member CS and the upper surface of the second electrode 136 of the actual light emitting region ER. The protective layer 152 is formed to protect the lower light emitting device D from external influences such as chemicals when the light emitting device D is formed. The protective layer 152 may be formed of a single layer of an inorganic material such as SiOx or SiNx, but is not limited thereto. The protective layer 152 may be omitted as needed.

[0107] The second planarization layer 154 is formed on the entire area of ​​the substrate 140 except for the upper surface of the second electrode 136 above the step prevention member CS. At this time, since the second planarization layer 154 is formed at the same level as the upper surface of the second electrode 136 above the step prevention member CS, the upper surface of the second electrode 136 above the step prevention member CS is exposed to the outside between the second planarization layers 154.

[0108] The second planarization layer 154 may be formed of an organic material such as photo acrylic, but is not limited thereto, and may form a multi-layer including an inorganic layer and an organic layer.

[0109] A connection electrode 156 is formed on the upper surface of the second planarization layer 154 and the upper surface of the second electrode 136 above the step prevention member CS. The connection electrode 156 is in electrical contact with the second electrodes 136 of the sub-pixels SP1 and SP2 exposed to the outside through the second planarization layer 154, so that the second electrodes 136 of all the sub-pixels SP1 and SP2 of the display device 100 are electrically connected through the connection electrode 156.

[0110] In other words, in the present invention, the light emitting devices D are independently provided in the respective sub-pixels SP1 and SP2, but the second electrodes 136 of the light emitting devices D are electrically connected to each other through the connection electrode 156, so that a low potential voltage is applied to the entire light emitting device D by a single signal.

[0111] The connection electrode 156 may be formed of a transparent metal oxide such as ITO or IZO, but is not limited thereto.

[0112] The encapsulation layer 180 is formed over the connection electrode 156. When the light emitting device D is exposed to impurities such as moisture or oxygen, a pixel shrinkage phenomenon in which the light emitting area is reduced or defects such as dark spots in the light emitting area may occur. In addition, moisture or oxygen that penetrates into the light emitting device D oxidizes the metal electrode. The encapsulation layer 180 blocks impurities such as oxygen and moisture from the outside to prevent defects of the light emitting device D and various electrodes.

[0113] The encapsulation layer 180 may be formed of, but is not limited to, a first encapsulation layer 182, a second encapsulation layer 184, and a third encapsulation layer 186. The encapsulation layer 180 may be formed of two layers or four or more layers.

[0114] The first encapsulation layer 182 and the third encapsulation layer 186 may be made of an inorganic material (e.g., SiOx or SiNx), but are not limited thereto. The second encapsulation layer 184 may be made of an organic insulating material (e.g., acrylic resin, epoxy resin, polyimide, polyethylene, or silicon oxycarbon (SiOC)), but are not limited thereto. In addition, the third encapsulation layer 186 may be made of a thin metal (surface seal metal), but are not limited thereto.

[0115] Although not shown in the drawings, a touch member may be provided on the encapsulation layer 180. The touch member may detect external touch information using a user's finger or a touch pen.

[0116] As described above, in the display device 100 according to the present invention, since a bank layer that divides the sub-pixels SP1 and SP2 and overlaps the light emitting device is not provided, the aperture ratio can be significantly improved.

[0117] In addition, in the present invention, since the step prevention member CS is filled in the contact hole H formed in the first planarization layer 148 above the thin film transistor, defects caused by the contact hole H can be prevented.

[0118] Hereinafter, a method of manufacturing the display device 100 according to the first embodiment of the present invention will be described in detail.

[0119] 7A to 7J 1 is a view showing a method of manufacturing the display device 100 according to the first embodiment of the present invention.

[0120] First, if Fig. 7A As shown, a buffer layer 142 is formed on the entire substrate 140 including the plurality of sub-pixels SP1 and SP2.

[0121] The substrate 140 may be made of a hard material (eg, glass) or a plastic material. For example, the plastic material may include polyimide, polymethyl methacrylate, polyethylene terephthalate, polyethersulfone, and polycarbonate.

[0122] The buffer layer 142 may be formed of a single layer of SiNx or SiOx or a multilayer thereof.

[0123] Thereafter, a polycrystalline semiconductor material such as polysilicon or an oxide semiconductor material such as IGZO (Indium-Gallium-Zinc-Oxide), IZO (Indium-Zinc-Oxide), IGTO (Indium-Gallium-Tin-Oxide), and IGO (Indium-Gallium-Oxide) is deposited and etched to form a semiconductor layer 112 in each of the first to second sub-pixels SP1 to SP2 on the buffer layer 142. In addition, impurities are doped into both sides of the semiconductor layer 112 to form a channel region 112a, a source region 112b, and a drain region 112c.

[0124] Subsequently, a gate insulating layer 144 is formed by depositing an inorganic material such as SiOx or SiNx, and then a metal such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) is deposited by a sputtering method and etched by a wet etching method to form the gate 114. Thereafter, an organic material (e.g., a photo acrylic material) or an inorganic material (e.g., SiNx or SiOx) is deposited on the gate 114 to form an interlayer insulating layer 146, and then the interlayer insulating layer 146 over the source region 112b and the drain region 112c of the semiconductor layer 112 is dry-etched to form contact holes therein.

[0125] Subsequently, a metal such as Cr, Mo, Ta, Cu, Ti, Al or Al alloy is deposited by a sputtering method and etched to form a source electrode 115 and a drain electrode 116 that make ohmic contact with the source region 112b and the drain region 112c of the semiconductor layer 112 through contact holes in each of the first subpixel SP1 to the second subpixel SP2, respectively.

[0126] Thereafter, a planarization layer 148 is formed by depositing an organic material such as a photo acrylic resin on the source electrode 115 and the drain electrode 116 , and then the planarization layer 148 on the drain electrode 116 is dry-etched to form a contact hole.

[0127] Then, if Figure 7B As shown, at least one of an inorganic insulating material (e.g., SiNx or SiOx), an organic insulating material (e.g., BCB (benzocyclobutene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin), and a photosensitizer including a black pigment is deposited on the entire substrate 140 and etched using a dry etching method to form a step prevention member CS.

[0128] Afterwards, if Figure 7C As shown, a first pattern layer 174 a is formed, and a photoresist is deposited thereon and patterned to form a second pattern 176 .

[0129] The first pattern layer 174a can be made of a material with orthogonality. Orthogonality means that any two elements in a set have independent properties. The orthogonality means that different configurations formed inside the display device 100 have different properties. For example, since a specific layer inside the display device 100 has completely different properties from other layers, the material with orthogonality has almost no effect on other materials. In addition, the orthogonality can be understood as a property in which two objects are independent of each other and exist independently. For example, a material with orthogonality can be either hydrophobic with low affinity for water or oleophobic with low affinity for oil. In the present invention, a fluorine-containing polymer material in which carbon-carbon bonds are continuously formed in a chain structure and a large amount of fluorine (F) is contained in the functional group can be used as an orthogonal material, but is not limited to this.

[0130] Afterwards, if Fig.7D As shown, the second pattern 176 is used as a mask layer to etch the first pattern layer 174a to form the first pattern 174. At this time, a portion of the first pattern layer 174a below the second pattern 176 is etched so that the upper second pattern 176 and the lower first pattern 174 form an undercut shape.

[0131] Subsequently, an organic light emitting material is deposited on the entire area of ​​the substrate 140 to form an organic pattern 134a on the side surface and the upper surface of the step prevention member CS of the first sub-pixel SP1, on the upper surface of the first electrode 132 outside the step prevention member CS, and on the first pattern 174. Fig. 7E shown.

[0132] Subsequently, a metal or a transparent metal oxide is deposited in the entire area of ​​the substrate 140 to form a conductive layer 136a on the side and upper surfaces of the step prevention member CS of the first sub-pixel SP1, on the upper surface of the first electrode 132 outside the step prevention member CS, and on the first pattern 174. Thereafter, an inorganic material and / or an organic material is deposited in the entire area of ​​the substrate 140 to form a protection pattern 152a on the side and upper surfaces of the step prevention member CS of the first sub-pixel SP1, on the upper surface of the first electrode 132 outside the step prevention member CS, and on the first pattern 174.

[0133] Afterwards, if Figure 7F As shown, when the first pattern 174 is removed by a stripping method, the second pattern 176 on the upper side of the first pattern 174 and the light-emitting layer 134a, the conductive layer 136a and the protective pattern 154a above the second pattern 176 are also removed, thereby forming a light-emitting layer 134 and a second electrode 136 in the first sub-pixel SP1 to complete the light-emitting device D, and forming a protective layer 152 thereon.

[0134] The protective layer 152 is disposed over the light emitting device D to block external influence on the light emitting device D when the first pattern 174 is peeled off, thereby preventing defects of the light emitting device D.

[0135] Then, by repeating FIG. 7C to FIG. 7F In the second sub-pixel SP2, a light emitting device D is formed, such as Figure 7G Through this process, for example, a light emitting device D can be formed in all of the plurality of R sub-pixels, G sub-pixels, and B sub-pixels.

[0136] Afterwards, if Figure 7H As shown, an organic material such as photo acryl is deposited over the entire area of ​​the substrate 140 to form an organic layer 154a covering the light emitting devices D of the sub-pixels SP1 and SP2.

[0137] Then, if Fig.7I At this time, the protective layer 152 above the step prevention member CS is also etched together with the organic layer 154a, so that the second planarization layer 154 having the same level as the second electrode 136 above the step prevention member CS is formed in the entire area of ​​the substrate 140.

[0138] At this time, a portion of the second electrode 136 of the light emitting device D in the sub-pixels SP1 and SP2 , ie, the second electrode 136 disposed above the step prevention member CS, is exposed to the outside through the surface of the second planarization layer 154 .

[0139] Afterwards, if Figure 7J As shown, a transparent metal oxide such as ITO or IZO is deposited on the upper surface of the second planarization layer 154 and the upper surface of the protective layer 152 exposed to the outside to form a connection electrode 156, thereby electrically connecting the light emitting device D disposed in each of the electrically separated sub-pixels SP1 and SP2.

[0140] Subsequently, an inorganic material is coated over the entire area of ​​the substrate 140 to form a first encapsulation layer 382, ​​and an organic material is coated on the first encapsulation layer 382 to form a second encapsulation layer 384. Thereafter, an inorganic material is coated on the second encapsulation layer 384 to form a third encapsulation layer 386, thereby forming the encapsulation layer 380 to seal the display device 300.

[0141] As described above, in the present invention, a first pattern made of an orthogonal material and a second pattern made of a photoresist are formed, and an organic material, a conductive layer, and an inorganic material are deposited thereon, and then the first pattern, the second pattern, and the organic material, the conductive layer, and the inorganic material on the second pattern are removed by a stripping method, thereby forming a light-emitting layer 134, a second electrode 136, and a protective layer 152 in a sub-pixel.

[0142] Furthermore, due to the characteristics of the orthogonal material, damage to the underlying layer can be prevented compared to a process of directly etching the organic layer by a photo process.

[0143] Figure 8 is a cross-sectional view showing the structure of a display device 200 according to a second embodiment of the present invention. Figure 6 Description of the same structure as that of the first embodiment will be omitted or simplified, and only different structures will be described in detail.

[0144] like Figure 8 As shown, in the display device 200 according to the second embodiment of the present invention, the thin film transistor T and the light emitting device D are provided in each of the sub-pixels SP1 and SP2.

[0145] The thin film transistor T includes a semiconductor layer 212 disposed on the buffer layer 242 , a gate electrode 214 disposed on the gate insulating layer 244 , and a source electrode 215 and a drain electrode 216 disposed on the interlayer insulating layer 246 .

[0146] A first planarization layer 248 is formed over the thin film transistor T, and a light emitting device D is disposed on the first planarization layer 248. The light emitting device D includes a first electrode 232, a light emitting layer 234, and a second electrode 236. At this time, the first electrode 232 may be an anode and the second electrode 236 may be a cathode.

[0147] The first electrode 232 of the light emitting device D is electrically connected to the drain electrode 216 of the thin film transistor T through a first contact hole H formed in the first planarization layer 248 , so that a signal provided from the outside is applied to the light emitting device D through the thin film transistor T.

[0148] At this time, the step prevention member CS may be disposed inside the first contact hole H formed with the second electrode 236. Since the inside of the first contact hole H is filled with the step prevention member CS, a step caused by the second contact hole H may be removed, thereby preventing damage to the light emitting layer 234 caused by the step.

[0149] Since the step prevention member CS is formed to prevent a step, it may be formed to any thickness as long as it can prevent a step. For example, the step prevention member CS may be formed at the same level as the first electrode 232, but is not limited thereto.

[0150] The step prevention member CS may be made of at least one material selected from the group consisting of an inorganic insulating material (e.g., SiNx or SiOx), an organic insulating material (e.g., BCB (benzocyclobutene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin), and a photosensitizer including a black pigment, but is not limited thereto.

[0151] The first electrode 232 is disposed in each of the sub-pixels SP1 and SP2. The first electrode 232 may be formed of at least one of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), and alloys thereof, and may also be formed of a transparent metal oxide layer such as ITO or IZO.

[0152] The second electrode 236 is disposed in each of the sub-pixels SP1 and SP2. The second electrode 236 is made of a semi-transparent alloy such as LiF / Al, CsF / Al, Mg:Ag, Ca / Ag, Ca:Ag, LiF / Mg:Ag, LiF / Ca / Ag, and LiF / Ca:Ag, and a metal such as silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), and chromium (Cr). In addition, the second electrode 236 may be made of a transparent metal oxide that transmits light, such as ITO or IZO.

[0153] The protective layer 252 may be formed on the second electrode 236 to surround the second electrode 236. The protective layer 252 may be formed of a single layer of an inorganic material such as SiOx or SiNx, but is not limited thereto.

[0154] On the protective layer 252, a second planarization layer 254 is formed on the entire area of ​​the display device 200. The second planarization layer 254 may be formed of an organic material such as photo acryl, but is not limited thereto, and may be formed of a plurality of layers including an inorganic layer and an organic layer.

[0155] The second contact hole H2 is formed in the protective layer 252 and the second planarization layer 254 on the second electrode 236 of the sub-pixels SP1 and SP2, and the connection electrode 256 is formed in the entire area on the second planarization layer 254. The connection electrode 256 is electrically connected to the second electrode 236 provided in each of the sub-pixels SP1 and SP2 through the second contact hole H2 formed in each of the sub-pixels SP1 and SP2, thereby electrically connecting the second electrodes 236 provided in all the sub-pixels of the entire display device 200.

[0156] The connection electrode 256 is formed of a transparent metal oxide such as ITO or IZO, but is not limited thereto.

[0157] The encapsulation layer 280 including a first encapsulation layer 282 made of an inorganic material, a second encapsulation layer 284 made of an organic material, and a third encapsulation layer 236 made of an inorganic material is disposed on the connection electrode 256 .

[0158] In accordance with Figure 6In the display device 100 of the first embodiment shown in , the step prevention member CS is formed not only in the contact hole H but also on a portion of the first planarization layer 148. On the other hand, in the display device 200 of the present embodiment, the step prevention member CS is formed only in the first contact hole H1. Therefore, in the display device 200 according to the present embodiment, defects of the light emitting device D due to the step can be more effectively prevented.

[0159] The above description and drawings are only used to illustrate the technical spirit of the present disclosure. A person of ordinary skill in the art to which the present disclosure relates may combine configurations within the scope of not departing from the basic features of the present disclosure, and various modifications or changes, such as separation, replacement, and change, will be possible. Therefore, the embodiments disclosed in the present disclosure are not intended to limit the technical spirit of the present disclosure, but are used for explanation, and the scope of the technical spirit of the present disclosure is not limited by these embodiments.

Claims

1. A display device, comprising: a substrate, the substrate comprising a plurality of sub-pixels; A transistor, wherein the transistor is arranged in each sub-pixel; a first planarization layer formed in the entire region of the substrate and covering the transistor; a light emitting device, the light emitting device being disposed in each sub-pixel, the light emitting device being electrically connected to the transistor through a first contact hole formed in the first planarization layer; as well as A step preventing member is formed in a prescribed region including the first contact hole in each sub-pixel.

2. The display device according to claim 1, wherein: The step prevention member extends from the inside of the first contact hole to the upper surface of the first planarization layer.

3. The display device according to claim 2, wherein: The light emitting device comprises: a first electrode, the first electrode being disposed on the first planarization layer in each sub-pixel and inside the first contact hole; a light emitting layer provided on the side surfaces and the upper surface of the step preventing member and the upper surface of the first electrode; and A second electrode is disposed on the light-emitting layer.

4. The display device according to claim 1, wherein: The step preventing member is filled only inside the first contact hole.

5. The display device according to claim 2, wherein: The light emitting device comprises: a first electrode, the first electrode being disposed on the first planarization layer in each sub-pixel and inside the first contact hole; a light emitting layer provided on an upper surface of the step preventing member and an upper surface of the first electrode; and A second electrode is disposed on the light-emitting layer.

6. The display device according to claim 5, wherein: The light emitting layer formed on the upper surface of the step preventing member and the light emitting layer formed on the upper surface of the first electrode are at the same level.

7. The display device according to claim 1, wherein: The step preventing member is provided in a region where the transistor is formed.

8. The display device according to claim 1, wherein: The step preventing member is disposed in a boundary region of the plurality of sub-pixels.

9. The display device according to claim 1, wherein: The step preventing member is made of at least one material selected from the group consisting of an inorganic insulating material, an organic insulating material, and a photosensitizer having a black pigment.

10. The display device according to claim 3, further comprising: a protective layer formed on an upper surface of the second electrode disposed in each sub-pixel; a second planarization layer formed in the entire area of ​​the substrate; as well as A connecting electrode is disposed on the second planarization layer and is electrically connected to the second electrodes of the plurality of light emitting devices.

11. The display device according to claim 10, wherein: The second planarization layer is formed at the same level as the second electrode so that the second electrode is exposed to the outside on a surface of the second planarization layer, so that the connection electrode is electrically connected to the exposed second electrode.

12. The display device according to claim 10, wherein: The second electrode is covered by the second planarization layer and a second contact hole is formed on the second electrode, so that the connection electrode is electrically connected to the second electrode through the second contact hole. 13 . The display device according to claim 10 , further comprising an encapsulation layer over the connection electrode.

14. A method for manufacturing a display device, comprising: providing a substrate including a plurality of sub-pixels; forming a transistor in each sub-pixel; forming a first planarization layer in the entire area of ​​the substrate, and etching the first planarization layer above the transistor to form a first contact hole; forming a first electrode inside the first contact hole and on the first planarization layer in each sub-pixel; forming a step preventing member in a prescribed portion including the first contact hole; depositing a material and a photoresist having orthogonality in the entire area of ​​the substrate; developing the photoresist to form a second pattern; Over-etching the material having orthogonality using the second pattern to form a first pattern for forming an undercut shape with the second pattern; depositing a light emitting material and a conductive material using the first pattern and the second pattern of the undercut shape as a mask layer to form a light emitting layer and a second electrode; as well as The first pattern and the second pattern are removed through a lift-off process.

15. The method for manufacturing a display device according to claim 14, further comprising: forming a protective layer over the second electrode using the first pattern and the second pattern of the undercut shape as a mask layer; forming a second planarization layer in the entire area of ​​the substrate; as well as A connection electrode electrically connected to the light emitting device is formed on the second planarization layer.

16. The method for manufacturing a display device according to claim 15, further comprising: The second electrode is exposed to the outside through the surface of the second planarization layer by etching the entire area of ​​the second planarization layer to a predetermined thickness, and Wherein, the connecting electrode is electrically connected to the exposed upper surface of the second electrode.

17. The method for manufacturing a display device according to claim 15, further comprising: forming a second contact hole by etching the second planarization layer above the second electrode, and Wherein, the connecting electrode is electrically connected to the second electrode through the second contact hole.

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