Real-time CPU availability monitoring

Abstract

One or more processors of the computing device may determine processor availability of the one or more processors based at least in part on the one or more processor statistics and the one or more processor mode statistics. The one or more processors may determine whether the one or more processors are available to execute the one or more tasks based at least in part on processor availability of the one or more processors. The one or more processors may execute the one or more tasks by the one or more processors in response to determining that the one or more processors are available to execute the one or more tasks.

Description

Related Applications

[0001] This application claims priority to U.S. Patent Application No. 18 / 175,499, filed on February 27, 2023, which claims priority to U.S. Provisional Application No. 63 / 371,375, filed on August 12, 2022, the entire contents of each application are incorporated herein by reference. Background Art

[0002] A vehicle may include a so-called "head unit" or other integrated computing device that presents an interface (e.g., a graphical user interface - GUI) through which vehicle systems are controlled, such as a heating, ventilation, and air conditioning (HVAC) system, a lighting system (for controlling interior and / or exterior lights), an entertainment system, a seating system (for controlling the position of the driver and / or passenger seats), etc. The head unit may execute applications that provide various functionality of the head unit, such as a virtual assistant application, a navigation application, a music application, etc. During bootup of the head unit, different applications and processes may compete to execute tasks. Summary of the invention

[0003] The present disclosure generally describes techniques for monitoring real-time processor availability of a computing device, such as a vehicle host unit. When the computing device is booted up, various applications and / or services may perform various tasks so that the applications and / or services are ready for use by a user of the computing device, which may result in a high processing load on a processor of the computing device. A job scheduler may schedule tasks to be performed based on processor availability and task priority, and may suspend scheduling of new tasks to be performed by a processor of the computing device until the job scheduler determines that the processor has a processor availability percentage above a specified threshold.

[0004] According to aspects of the present disclosure, a computing device may be capable of scheduling tasks based on a processing load of a processor of the computing device. The computing device may determine the processor availability of one or more processors of the computing device. The computing device may determine whether the one or more processors are available to perform one or more tasks based at least in part on the processor availability of the one or more processors. The computing device may schedule the one or more tasks for execution in response to determining that the one or more processors are available to perform the one or more tasks.

[0005] In some aspects, the technology described herein relates to a method comprising: determining, by one or more processors, processor availability of one or more processors based at least in part on one or more processor statistics and one or more processor mode statistics; determining, by one or more processors, whether the one or more processors are available to perform one or more tasks based at least in part on the processor availability of the one or more processors; and in response to determining that the one or more processors are available to perform the one or more tasks, performing the one or more tasks by the one or more processors.

[0006] In some aspects, the technology described herein relates to a computing device comprising: a memory; and one or more processors, the one or more processors being communicatively coupled to the memory and configured to: determine processor availability of the one or more processors based at least in part on one or more processor statistics and one or more processor mode statistics; determine whether the one or more processors are available to perform one or more tasks based at least in part on the processor availability of the one or more processors; and perform the one or more tasks in response to determining that the one or more processors are available to perform the one or more tasks.

[0007] In some aspects, the technology described herein relates to an apparatus comprising: a device for determining processor availability of one or more processors based at least in part on one or more processor statistics and one or more processor mode statistics; a device for determining whether the one or more processors are available to perform one or more tasks based at least in part on the processor availability of the one or more processors; and a device for performing the one or more tasks in response to determining that the one or more processors are available to perform the one or more tasks.

[0008] In some aspects, the technology described herein relates to a non-transitory computer-readable storage medium having instructions stored thereon that, when executed, cause one or more processors of a computing device to: determine processor availability of one or more processors based at least in part on one or more processor statistics and one or more processor mode statistics; determine whether the one or more processors are available to perform one or more tasks based at least in part on the processor availability of the one or more processors; and perform the one or more tasks in response to determining that the one or more processors are available to perform the one or more tasks.

[0009] The details of one or more examples are set forth in the accompanying drawings and the description below.Other features, objects, and advantages will be apparent from the description and drawings, and from the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 is a block diagram illustrating an example computing device 102 configured to perform various aspects of the techniques described in this disclosure.

[0011] Figure 2A and Figure 2B is shown in more detail Figure 1 A block diagram of an example of a computing device.

[0012] Figure 3 It is shown Figure 1 A flow chart of example operations for use by an example computing device to manage disk access for an application. DETAILED DESCRIPTION

[0013] Figure 1 is a block diagram illustrating an example computing device 102 configured to perform various aspects of the techniques described in this disclosure. Figure 1 In the example of FIG. 1 , computing device 102 may be a host unit of vehicle 100. In other examples, computing device 102 may be a mobile computing device, a smart phone, a tablet computer, a wearable computing device, a laptop computer, a desktop computer, a server, or any other suitable computing device.

[0014] In the following description, it is assumed that the vehicle 100 is a car. However, the techniques described in the present disclosure are also applicable to any type of vehicle capable of transporting one or more occupants between locations, such as a motorcycle, bus, recreational vehicle (RV), semi-trailer truck, tractor or other type of agricultural equipment, train, airplane, drone, helicopter, personal transportation vehicle, etc. In addition, the techniques described in the present disclosure are also applicable to any type of computing device, such as a laptop computer, desktop computer, smart phone, wearable device, tablet computer, or any other device that may or may not be included in the vehicle.

[0015] exist Figure 1 In some examples, computing device 102 includes one or more processors 112, a graphics processing unit (GPU) 114, and a memory 116. In some examples, one or more processors 112, GPU 114, and a transceiver module ( Figure 1 (not shown) can be formed as an integrated circuit (IC). For example, the IC can be considered as a processing chip within a chip package and can be a system on chip (SoC).

[0016] Examples of one or more processors 112 and GPU 114 include, but are not limited to, one or more digital signal processors (DSPs), general-purpose microprocessors, application-specific integrated circuits (ASICs), field programmable logic arrays (FPGAs), or other equivalent integrated or discrete logic circuit systems. One or more processors 112 may represent a central processing unit (CPU) of the vehicle 100. In some examples, GPU 114 may be dedicated hardware including integrated and / or discrete logic circuit systems that provide GPU 114 with large-scale parallel processing capabilities suitable for graphics processing. In some cases, GPU 114 may also include general-purpose processing capabilities and may be referred to as a general-purpose GPU (GPGPU) when implementing general-purpose processing tasks (i.e., non-graphics-related tasks). Although shown as a dedicated GPU 114, GPU 114 may represent an integrated GPU that is integrated into an underlying circuit board (such as a so-called "motherboard") or otherwise incorporated into one or more processors 112.

[0017] In some examples, one or more processors 112 may include processor cores 118A-118M (“processor cores 118”). Each processor core may be a separate processing unit of one or more processors 112 on a single integrated circuit, and one or more processors 112 may execute instructions on separate processor cores 118 simultaneously.

[0018] One or more processors 112 may execute an operating system (OS) 130 and various types of applications 125A-125N ("applications 125") stored in memory 116. Examples of applications 125 include virtual assistant applications, navigation applications such as maps, music applications, video applications, dashcam applications, over the air (OTA) update applications, or other applications that generate visual objects for display. Memory 116 may act as a system memory for computing device 102 and may store instructions for executing application 125. Execution of the application by one or more processors 112 causes one or more processors 112 to generate graphics data of image content to be displayed. One or more processors 112 may transmit graphics data of image content to GPU 114 for further processing based on instructions or commands transmitted to GPU 114 by one or more processors 112. In some examples, one or more processors 112 may also execute applications that do not generate visual objects for display. For example, one or more processors 112 may execute background services, such as background services that act as core components of other applications that do generate visual objects for display.

[0019] One or more processors 112 may communicate with GPU 114 according to an application programming interface (API). Furthermore, the techniques described in this disclosure need not function according to an API, and one or more processors 112 and GPU 114 may utilize any technique for communicating with GPU 114.

[0020] The memory 116 may represent a memory for the vehicle 100. The memory 116 may include one or more computer-readable storage media. Examples of the memory 116 include one or more solid-state storage devices that may be used to carry or store desired program code in the form of instructions and / or data structures and may be accessed by a computer or processor.

[0021] In some aspects, the memory 116 may include instructions that cause the one or more processors 112 to perform functions attributed in the present disclosure to the one or more processors 112. Thus, the memory 116 may be a non-transitory computer-readable storage medium having stored thereon instructions that, when executed, cause the one or more processors (e.g., the one or more processors 112) to perform various functions.

[0022] Memory 116 is a non-transitory storage medium. The term "non-transitory" indicates that the storage medium is not embodied in a carrier wave or a propagated signal. However, the term "non-transitory" should not be interpreted to mean that memory 116 is non-removable or that its contents are static. As an example, memory 116 can be removed from vehicle 100, such as in the case of a secure digital (SD) card or a universal serial bus (USB) mass storage device, and moved to another device. As another example, a memory substantially similar to memory 116 can be inserted into autonomous vehicle 100. In some examples, a non-transitory storage medium can store data that can change over time.

[0023] like Figure 1As shown, the vehicle 100 may include vehicle systems 126. The vehicle systems 126 may include a heating, ventilation and air conditioning (HVAC) system, a temperature control system (e.g., which may include heated and / or cooled seats in addition to the HVAC system), a lighting system (for providing interior and / or exterior lighting), a seat control system (for adjusting the seated position of an occupant), a mirror control system (for controlling interior and / or exterior mirrors, including rearview mirrors, side view mirrors, sun visor mirrors, etc.), a windshield wiper control system, an entertainment system (for controlling radio playback, video playback, image display, etc.), a safety assistance system (for controlling parking assistance, backing assistance, etc.), a sunroof / moonroof control system (for controlling a sunroof and / or moonroof), and any other type of vehicle system that can be controlled via one or more processors 112. Examples of the vehicle systems 126 may include an electronic control unit (ECU), which may control any of the foregoing examples of the vehicle systems 126.

[0024] like Figure 1 As further shown in the example of FIG. 1 , the vehicle 100 may include a display 120 and a user interface 122, which may be integrated into the computing device 102 or may be communicatively coupled to the computing device 102. The display 120 may represent any type of passive reflective screen onto which an image may be projected, or an active reflective or emissive or transmissive display capable of displaying an image (such as a light emitting diode (LED) display, an organic LED (OLED) display, a liquid crystal display (LCD), or any other type of active display). Although shown as including a single display 120, the vehicle 100 may include multiple displays that may be positioned throughout the cabin of the vehicle 100. In some examples, a passive version of the display 120 or some type of active version of the display 120 (e.g., an OLED display) may be integrated into a seat, table, headlining, floor, window (or in a vehicle with no or few windows, a wall), or other aspect of the cabin of the vehicle. When display 120 represents a passive display, display 120 may also include a projector or other image projection device capable of projecting or otherwise reconstructing an image on passive display 120. Additionally, display 120 may include a display integrated into a driver's side instrument panel that virtually represents a physical instrument cluster (showing speed, rpm, engine temperature, etc.).

[0025] Display 120 may also represent a display in wired or wireless communication with autonomous vehicle 100. Display 120 may represent, for example, a computing device such as a laptop computer, a heads-up display, a head-mounted display, an augmented reality computing device or display (such as "smart glasses"), a virtual reality computing device or display, a mobile phone (including so-called "smart phones"), a tablet computer, a gaming system, or another type of computing device that can act as an extension of a display integrated into vehicle 100 or in place of the display.

[0026] The user interface 122 may represent any type of physical or virtual interface with which a user may interact to control various functionalities of the vehicle 100. The user interface 122 may include physical buttons, knobs, sliders, or other physical control tools. The user interface (UI) 122 may also include a virtual interface through which an occupant of the vehicle 100 interacts with a virtual button, knob, slider, or other virtual interface element via (as an example) a touch-sensitive screen or via a non-touch interface. The occupant may interact with the user interface 122 to control one or more of the following: the climate within the vehicle 100, the audio playback of the vehicle 100, the video playback of the vehicle 100, the transmission through the vehicle 100 (such as a cell phone call), or any other operation that can be performed by the vehicle 100.

[0027] The user interface 122 may also represent an interface extended to the display 120 when acting as an extension of or in place of a display integrated into the vehicle 100. That is, the user interface 122 may include a virtual interface presented via a heads-up display (HUD), an augmented reality computing device, a virtual reality computing device or display, a tablet computer, or any other different types of extended displays listed above.

[0028] In the context of the vehicle 100, the user interface 122 may further represent physical elements for manually or semi-manually controlling the vehicle 100. For example, the user interface 122 may include one or more steering wheels for controlling the driving direction of the vehicle 100, one or more pedals for controlling the driving speed of the vehicle 100, one or more handbrakes, and the like.

[0029] exist Figure 1 100, one or more processors 112, GPU 114, memory 116, display 120, and user interface 122 may collectively represent, at least in part, a so-called computing device 102. In the automotive context, computing device 102 may represent any integrated or separate computing device capable of interacting with various aspects of vehicle 100 (e.g., vehicle systems 126) and / or providing entertainment to occupants and / or providing information about vehicle 100 (where such a head unit may be referred to as an "infotainment unit" or "infotainment system").

[0030] Each processor core in processor core 118 may be associated with a corresponding CPU frequency policy (also referred to herein as CPU statistics or processor statistics). Such CPU frequency policies may be stored on a disk of computing device 102, such as in memory 116. The kernel of operating system 130 may expose available CPU frequency policies as files in a CPU frequency policy directory. In some examples, the available CPU frequency policies are at the path / sys / devices / system / cpu / cpufreq / policy{M} in memory 116, where M is a policy ID. Each policy directory contains the following files related to CPU processor statistics for a given policy: ● related_cpus – the ID of the online / offline CPU core related to this policy; ● impacted_cpus – ID of the online CPU core affected by this policy; ● cpuinfo_max_freq – the maximum CPU frequency at which this policy can be run; ● scaling_max_freq – the maximum CPU frequency at which this strategy can run' ● cpuinfo_cur_freq – the current CPU frequency obtained from the hardware. This file may not exist if the actual frequency cannot be determined; ● scaling_cur_freq – the frequency of the last P-state requested from the hardware by the scaling driver. This may or may not be the frequency the CPU is actually running at; and ● stats / time_in_state – The amount of CPU time spent in the various frequencies supported by the policy since the system was started or the frequency statistics were reset.

[0031] The contents of the related_cpus, cpuinfo_max_freq, and scaling_max_freq files are static. That is, these files do not change after the system boots. Therefore, these files can be read once after boot and may not need to be read again afterwards.

[0032] The cpuinfo_cur_freq and scaling_cur_freq files may specify the frequency at which the CPU is operating at any given moment. However, if operation 130 monitors the CPU frequency of one or more processors 112 by periodically polling these files, the frequencies reported in these files may not be an accurate representation of the frequency at which the CPU is operating between polling intervals.

[0033] The stats / time_in_state file specifies the amount of CPU time spent in various frequencies since the system was started or since a frequency reset has been performed. The statistical information provided in this file can be used to derive the CPU time spent in various frequencies between two different polling intervals. However, the stats / time_in_state file is only available when the kernel configuration CONFIG_CPU_FREQ_STAT is enabled. Further, this file can also report the CPU time spent in various frequencies even when the processor core or all processor cores associated with the CPU frequency policy are disabled.

[0034] In some examples, one or more processors 112 may also be associated with processor mode statistics, which may include statistics about the amount of time spent by one or more processors 112 in each of a plurality of processor modes. For example, the kernel may expose in the / proc / stat file the amount of CPU time spent in each CPU mode since the system boot or since the CPU has been enabled for all online CPU cores. Thus, the file may contain the amount of CPU time spent by each processor core in the processor cores 108 on idle tasks. The one or more processors 112 may execute the operating system 130 to monitor CPU availability by periodically polling the / proc / stat file, and may use the statistics reported in the file to derive the CPU time spent by one or more processor cores in the processor cores 108 in non-idle and idle modes between two polling periods. For disabled CPU cores, the / proc / stat file does not report the CPU time spent in various CPU modes, and when a previously disabled CPU core is re-enabled, the CPU time spent in various CPU modes is reset in the / proc / stat file.

[0035] It may be difficult to predict future CPU load or CPU availability because the resource usage of a CPU is dynamic and may depend on the tasks being scheduled and how one or more task schedulers of the CPU are implemented. The recent past CPU load may be used to determine load stability and CPU availability. When the CPU load is stable over a period of time, the CPU usage from that period may be used as an indicator of CPU availability.

[0036] When the system has multiple CPU cores with varying core sizes, the current operating frequency of each CPU core may be less than the corresponding maximum operating frequency. Therefore, the latest per-CPU core availability is scaled relative to the maximum CPU frequency.

[0037] According to aspects of the present disclosure, an application, such as application 125A, may schedule one or more tasks to be executed by one or more processors 112. An operating system 130 may be executed at one or more processors 112 to monitor statistics of one or more processors 112, such as by monitoring one or more processor statistics and / or processor mode statistics, to determine whether one or more processors 112 are available to execute the one or more tasks. One or more processors 112 may execute the operating system 130 to, in response to determining that one or more processors 112 are available to execute the one or more tasks, schedule the one or more tasks for execution by the one or more processors 112, or may otherwise cause the one or more processors 112 to execute the one or more tasks.

[0038] To determine whether one or more processors 112 are available to perform one or more tasks, operating system 130 may execute at one or more processors 112 to periodically (such as every N seconds) calculate a processor availability percentage (such as a processor availability percentage of a processor core in processor cores 118) using the following equation:

[0039] In equation (1), for a given processor core in processor cores 118, current CPU frequency may be the current processor frequency of the processor core, and maximum CPU frequency may be the maximum core frequency of the processor core. Milliseconds spent in idle task may be the amount of time the processor core has spent idle since the availability percentage of the processor core was last determined, such as in the last The amount of time spent idle in seconds.

[0040] Further, since N is specified in seconds in equation (1), and since the time spent in the idle task is specified in equation (1) as milliseconds spent in the idle task, N is multiplied by 1000 in the numerator and denominator in equation (1). If N and / or the time spent in the idle task is specified as another time unit, N may be multiplied by a different number. For example, if the time spent in the idle task is specified in nanoseconds in equation (1), N may be multiplied by 100 in equation (1).

[0041] In some examples, the operating system 130 can be executed at one or more processors 112 to determine the current processor frequency of the processor core by calculating the average current processor frequency from the processor time spent in various frequencies, which is reported by the kernel of the operating system 130 in the processor statistics of the processor core (e.g., the file / sys / devices / system / cpu / cpufreq / policy{M} / time_in_state, where M is the policy ID). The operating system 130 can read the maximum processor frequency of the processor core from the cpuinfo_max_freq file or the scaling_max_freq file at the location / sys / devices / system / cpu / cpufreq / policy{M}, where M is the policy ID. The operating system 130 can read the processor time spent in the idle task, and the total processor time can be read from the processor mode statistics (e.g., the / proc / stat file).

[0042] In an example where a CPU such as one or more processors 112 has multiple processor cores 118 (e.g., processor cores a through z) with varying operating frequencies, operating system 130 may execute at one or more processors 112 to calculate an average processor availability percentage of one or more processors 112 every N seconds using the following equation: (2)

[0043] In this equation (2), The processor core The current availability percentage of , as determined using equation (1), and The processor core As shown in equation (2), for a processor with arrive One or more processors 112 of the plurality of processor cores 118, the average processor availability percentage of the one or more processors 112 being a function of a sum of results of multiplying a current availability percentage of the processor core by a maximum processor frequency of the processor core for each processor core in the processor cores 118, divided by a sum of the maximum processor frequencies of the processor cores for each processor core in the processor cores 118.

[0044] In some examples, when the average CPU availability percentage is within a 5% range over a specified time period (such as 30 seconds, 60 seconds, etc.), operating system 130 can determine that the CPU load is stable, and operating system 130 can use the average CPU availability percentage as an indicator of CPU availability.

[0045] The processor core 118 may not always operate at its maximum processor frequency. The upper limit of the operating frequency of the processor core 118 may depend on various factors, such as the current processor scheduling policy or thermal throttling. Therefore, when determining the processor availability of a processor core, one or more processors 112 may consider the achievable processor frequency of the processor core 118, which may be based on historical processor statistics.

[0046] In some examples, one or more processors 112 can track the achievable processor frequency per processor scheduling policy and use such information when calculating the processor availability of processor core 118 given the current processor scheduling policy. For example, in equations (1) and (2) above, the maximum processor frequency can be the maximum processor frequency specified in the processor frequency policy and / or the achievable maximum processor frequency of the processor core. In addition, in some examples, equations (1) and (2) can be updated to take into account information such as processor thermal information to more accurately provide information about processor availability.

[0047] In this manner, the operating system 130 may be able to determine the processor availability of the one or more processors 112. For one or more tasks to be performed by the one or more processors 112, the operating system 130 may determine, based on the processor statistics and the processor mode statistics, whether the one or more processors 112 have availability to perform the one or more tasks, such as by determining an average processor availability percentage of the one or more processors 112. If the operating system 130 determines that the average processor availability percentage of the one or more processors 112 is above a specified threshold, such as 70%, the operating system 130 may determine that the one or more processors 112 have availability to perform the one or more tasks, and the operating system 130 may schedule the one or more tasks for execution at the one or more processors 112.

[0048] In some examples, the processor core 118 may include a large processor core and a small processor core. That is, the processor core 118 may include one or more small processor cores designed for power efficiency and one or more large processor cores designed for computing performance. In some examples, the large processor core and the small processor core are arranged in a big.LITTLE design, and such large processor core and small processor core may be arranged in any suitable configuration, such as clustered switching, in-kernel switcher, heterogeneous multi-processing, etc. Throughout this disclosure, one or more processors 112 are also referred to as central processing units (CPUs).

[0049] In cluster switching, the processor cores 118 are arranged into clusters of the same size of large processor cores and small processor cores, and at any given time, only one cluster in the big.LITTLE cluster pair can be online. That is, given a pairing of a large (big) cluster of large processor cores and a small (LITTLE) cluster of small processor cores, only one of the two clusters in the cluster pair is online at a given time. Each cluster of processor cores can be associated with a CPU frequency policy, and one or more processors 112 can execute an operating system 130 to determine the current CPU frequency according to the CPU frequency policy of the online cluster belonging to the processor core 118. One or more processors 112 can also execute an operating system to determine the maximum CPU frequency according to the CPU frequency policy belonging to the cluster containing the large processor core. Therefore, one or more processors 112 can execute an operating system 130 to calculate CPU availability using equations (1) and (2).

[0050] When the processor cores 118 are arranged in a plurality of big.LITTLE cluster pairs in a cluster switching configuration, one or more processors 112 may execute an operating system 130 to determine a mapping between large and small cluster pairs (i.e., which large cluster of the processor cores 118 is paired with which small cluster of the processor cores 118) to calculate CPU availability using equations (1) and (2). Such a mapping between large and small cluster pairs may be configured as a resource override configuration. The mapping may be specific to a given system on chip (SoC) (e.g., one or more processors 112) and scheduler implementation. The mapping between large and small cluster pairs may not change during runtime of the computing device 102, and thus the operating system 130 does not have to update the mapping between large and small cluster pairs during runtime.

[0051] In the in-core switch configuration, the kernel of the operating system 130 pairs the large processor core and the small processor core in the processor core 118 into a single virtual (or logical) core, and the kernel of the operating system 130 can be to maintain a CPU frequency policy per virtual core. The CPU frequency policy of the virtual core determines the current CPU frequency and the maximum CPU frequency based on the online core and the large core, respectively. When the processor core 118 is arranged according to the in-core switch configuration, the one or more processors 112 can therefore execute the operating system 130 to calculate the CPU availability of the one or more processors 112 based on the CPU frequency policy of the current online virtual core using equations (1) and (2).

[0052] In a heterogeneous multiprocessing configuration, all processor cores 118 may be available at all times, and a kernel scheduler of the operating system 130 may schedule tasks for the processor cores 118 based on, for example, the CPU load of the one or more processors 112. When the processor cores 118 are arranged according to the heterogeneous multiprocessing configuration, the one or more processors 112 may execute the operating system 130 to calculate the CPU availability of the one or more processors 112 based on the CPU frequency policy of the processor cores 118 using equations (1) and (2).

[0053] In a virtualized environment, the guest operating system kernel may provide CPU frequency information for the virtual CPUs assigned to the guest operating system. One or more processors 112 may execute an operating system 130 to calculate the CPU availability of the virtual CPUs using equations (1) and (2) based on such information provided by the guest operating system kernel. Therefore, the average CPU availability percentage is still valid because the availability is calculated for the virtual CPUs assigned to the guest OS.

[0054] In a virtualized environment, stolen CPU time may vary based on the amount of time a guest operating system spends waiting for a physical processor while the hypervisor is servicing another virtual processor. Stolen CPU time may affect the guest operating system's CPU availability percentage. CPU availability calculations in a virtualized environment may therefore include stolen CPU time. Thus, the average CPU availability percentage in a virtualized environment may reflect the actual percentage of CPU resources available for applications / services running on the guest OS.

[0055] In some examples, the kernel of the operating system 130 may provide a mechanism for assigning a set of CPUs (e.g., one or more processors 112) and memory nodes, which are online nodes containing memory (e.g., memory 116), to a set of tasks. Such mechanisms are referred to as CPU sets or cpusets. The operating system 130 may provide the following CPU sets available to all applications 125, depending on the application state: ● Top App – the running foreground application that the user is paying attention to; ● Foreground – all foreground applications; and ● Backgroudn (background) – all background applications.

[0056] Each CPU set may be associated with a CPU frequency policy, and one or more processors 112 may execute an operating system 130 to determine processor availability for the CPU set based on the CPU frequency policy associated with the CPU set. The processors available for each CPU set (e.g., processor cores 118 of one or more processors 112) may vary based on the system configuration. Typically, the Top App CPU set includes all available processor cores 118, while the Background CPU set includes small processor cores in the processor cores 118.

[0057] A foreground application in the applications 125 may use an exclusive CPU set configured for the Top App or a Foreground CPU set, which may be preset by the manufacturer of the computing device 102. The exclusive CPU set may guarantee exclusive access to the processor cores 118 in these CPU sets to any application in the applications 125 executing in the foreground. When an application is switched to the background, the application switched to the background may lose access to the processor cores 118 in these CPU sets. This mechanism of guaranteeing an exclusive CPU set for a foreground application may improve the performance of user-facing applications in the foreground.

[0058] Figure 2A and Figure 2B is shown in more detail Figure 1 A block diagram of an example of a computing device 102. Figure 2A The computing device 202A shown in the example is Figure 1 An example of a computing device 102 is shown in FIG. Computing device 202A may include one or more processors 212, memory 216, display 220, and UI 222. One or more processors 212 are Figure 1 The example of one or more processors 112 shown in FIG. 1 includes processor cores 218A-218M (processor cores 218), which are Figure 1An example of processor core 118 is shown. Memory 216 is Figure 1 The display 220 is an example of the memory 116. Figure 1 An example of a display 120. The UI 222 is Figure 1 The memory 216 may include an application 225 (which is Figure 1 An example of an application in the application 125 shown), an operating system 230 (which is Figure 1 ) and system files 236.

[0059] like Figure 2A As shown, the operating system 230 includes a performance manager 232 and operating system services 234. The one or more processors 212 may execute a software application 225 to register a processor availability change listener with the performance manager 232 and / or remove the processor availability change listener from the performance manager 232. For example, in order to execute one or more tasks at the one or more processors 212, the software application 225 may register a processor availability change listener with the performance manager 232 to receive notifications of changes in processor availability of the one or more processors 212.

[0060] The one or more processors 212 may execute the performance manager 232 to send a request to the operating system service 234 to begin monitoring the processor availability of the one or more processors 212 in response to the software application 215 registering a processor availability change listener with the performance manager 232. The request may indicate a current listener ID, which may be unique for each listener and each instance of the performance manager 232, a processor availability percentage lower and upper bounds, and a timeout value.

[0061] One or more processors 212 may execute operating system services 234 to periodically (such as every 10 seconds) generate a listener request in response to the listener being registered according to equations (1) and (2). seconds) to determine the average processor availability percentage of one or more processors 212. For example, Seconds can be 30 seconds, 45 seconds, 60 seconds, etc.

[0062] Each time the operating system service 234 determines the average processor availability percentage for one or more processors 212, the operating system service 234 can read the latest processor statistics from the system file 236. Each time the operating system service 234 determines the average processor availability percentage for one or more processors 212, the operating system service 234 can determine whether the average processor availability percentage has stabilized and whether the average processor availability percentage has crossed one of the specified limits. If the operating system service 234 determines that the average processor availability percentage has crossed one of the limits, the operating system service 234 can notify the performance manager 232 that the average processor availability percentage has crossed one of the specified limits.

[0063] The one or more processors 212 may execute the performance manager 232 to send a notification to the software application 215 accordingly in response to receiving a notification from the operating system service 234 that the average processor availability percentage has crossed one of the specified limits. For example, if the average processor availability percentage has crossed (e.g., is greater than) an upper limit for the average processor availability percentage, such crossing of the upper limit may indicate to the software application 225 that one or more tasks may be executed by the one or more processors 112. Thus, the software application 225 may cause the one or more tasks to be executed at the one or more processors 212, such as by scheduling the one or more tasks for processing by the one or more processors 212, in response to receiving the notification that the average processor availability percentage has crossed the upper limit for the average processor availability percentage.

[0064] Figure 2B The computing device 202B shown in the example is Figure 1 An example of a computing device 102 is shown in FIG. Computing device 202B may include one or more processors 212, memory 216, display 220, and UI 222. One or more processors 212 are Figure 1 The example of one or more processors 112 shown in FIG. 1 includes processor cores 218-218M (processor core 218), which are Figure 1 An example of processor core 118 is shown. Memory 216 is Figure 1 The display 220 is an example of the memory 116. Figure 1 An example of a display 120. The UI 222 is Figure 1 The memory 216 may include an application 225 (which is Figure 1 An example of an application in the application 125 shown), an operating system 230 (which is Figure 1 ) and system files 236.

[0065] like Figure 2B As shown, the operating system 230 includes a system server 250, which includes a job scheduler service 252 and a processor monitor 254. The operating system 230 also includes a processor information reader 328. One or more processors 212 can execute the operating system 230 to periodically, such as every Seconds (e.g., every 15 seconds, every 30 seconds, every 60 seconds, etc.) - determine the average processor availability percentage of one or more processors 212, such as by using equations (1) and (2). To determine the average processor availability percentage of one or more processors 212, operating system 230 may read information from system files 236, which may include files in / proc and / sys directories, such as files in / sys / devices / system / cpu / cpufreq / policy{M} directories, where M is a policy ID, as described throughout this disclosure. One or more processors 212 may execute operating system 230 to determine the average processor availability percentage of one or more processors 212, such as by using equations (1) and (2). To determine the average processor availability percentage of one or more processors 212, operating system 230 may read information from system files 236, which may include files in / proc and / sys directories, such as files in / sys / devices / system / cpu / cpufreq / policy{M} directories, where M is a policy ID, as described throughout this disclosure. One or more processors 212 may execute operating system 236 to determine the average processor availability percentage of one or more processors 212, such as by using equations (1) and (2). Information is read from system file 236 once every second (eg, every 15 seconds, every 30 seconds, every 60 seconds, etc.) to periodically determine an average processor availability percentage for one or more processors 212 .

[0066] In some examples, the frequency with which operating system 230 determines the average processor availability percentage of one or more processors 212 is configured as a read-only system property of computing device 202B, and operating system 230 may be able to adjust the read-only system property based on the performance overhead of calculating the average processor availability percentage of one or more processors 212. In some examples, the frequency with which operating system 230 determines the average processor availability percentage of one or more processors 212 varies based on the system state of computing device 202B. For example, the frequency may depend on whether computing device 202B is in a system boot state, a user switched state, or another state.

[0067] In some examples, operating system 230 can collect a Perfetto trace when operating system 230 determines an average processor availability percentage for one or more processors 212 to provide insight into the processor overhead used to perform these calculations. The processor overhead can be scaled to identify maximum and minimum processor overheads depending on the device specifications of computing device 202B, available power saving modes of computing device 202B (e.g., if computing device 202B uses battery power), etc.

[0068] The one or more processors 212 may execute the software application 225 to perform one or more tasks. In some examples, the software application 225 may communicate with the job scheduler service 252 to schedule the one or more tasks to be performed by the one or more processors 212. The job scheduler service 252 may execute to perform scheduling of the one or more tasks of the software application 225. To perform scheduling of the one or more tasks, the job scheduler service 252 may determine an average processor availability percentage of the one or more processors 212 that may be required in order for the one or more processors 212 to be available to perform the one or more tasks.

[0069] Thus, the job scheduler service 252 may register an associated listener with the processor monitor 254 to listen to the average processor availability percentage of one or more processors 212 determined by the processor monitor 254 in response to the software application 223 scheduling one or more tasks. In some examples, the job scheduler service 252 may register a processor availability change listener and / or a processor usage listener. The processor availability change listener may listen for processor availability change notifications. The processor monitor 254 may send a processor availability change notification to the job scheduler service 252 when the processor availability of one or more processors 212 crosses a threshold, which may be specified in a CpuAvailabilityMonitoringConfig configuration file or another configuration specified by the processor monitor 254. For example, the processor monitor 254 may determine a value of a processor availability percentage of one or more processors 212 that may indicate that the one or more processors 212 are available to execute one or more tasks, and may set the value of the processor availability percentage of the one or more processors 212 as a threshold.

[0070] In some examples, the processor usage monitor can monitor processor usage statistics of one or more processors 212. The processor monitor 254 can monitor the processor usage statistics of one or more processors 212. The usage statistics are sent to the job scheduler service 252 every seconds (such as every 15 seconds, every 30 seconds, every 60 seconds, etc.).

[0071] One or more processors 212 may execute processor monitor 254 to periodically (such as every In some examples, processor monitor 254 may determine the average processor availability percentage of one or more processors 212 periodically, such as every N seconds (e.g., every 15 seconds, every 30 seconds, every 60 seconds, etc.), in response to job scheduler service 252 registering a processor availability change listener.

[0072] Each time the processor monitor 254 calculates the average processor availability percentage of one or more processors 212, the processor monitor 254 can use the processor information reader 238 to read the latest processor statistics from the system file 236. The processor information reader 238 may include an information reader interface and an information reader daemon. Each time the processor monitor 254 calculates the average processor availability percentage of one or more processors 212, the processor monitor may communicate with the information reader interface of the processor information reader 238, and the information reader daemon of the processor information reader 238 may execute to read information from the system file 236, and the information reader interface of the processor information reader 238 may execute to enable the processor monitor 254 to read the information retrieved by the information reader daemon.

[0073] Each time the processor monitor 254 determines an average processor availability percentage for one or more processors 212, the processor monitor 254 may compare the currently determined average processor availability percentage and the average processor availability percentage determined in a previous time period (such as the last 30 seconds) to an average processor availability percentage threshold specified by the job scheduler service 252. If the currently determined average processor availability percentage and the average processor availability percentage determined in the previous time period exceed the average processor availability percentage threshold, the processor monitor 254 may notify the job scheduler service 252, such as by sending an indication that the one or more processors 212 are available to execute one or more tasks.

[0074] The one or more processors 212 may execute the job scheduler service 252 to remove the listener in response to receiving an indication that the one or more processors 212 are available to execute the one or more tasks, and may cause the one or more processors 212 to execute the one or more tasks, such as by scheduling the one or more tasks for execution by the one or more processors 212. In some examples, as long as at least one listener is registered with the processor monitor 254, the processor monitor 254 may continue to execute to periodically determine the average processor availability percentage of the one or more processors 212. If no listeners are registered with the processor monitor 254, the processor monitor 254 may stop determining the average processor availability percentage of the one or more processors 212 until a listener is registered with the processor monitor 254.

[0075] The following are Figure 2A and Figure 2B Example pseudo code for the various components of operating system 230 is shown in FIG.

[0076] CPU Monitor:

[0077] CPU availability monitoring configuration

[0078] CPU availability information

[0079] CPU usage statistics

[0080] Vehicle Performance Manager

[0081] Figure 3 It is shown Figure 1 A flowchart of example operations used by an example computing device 102 to manage disk access for an application. Figure 3 About Figure 1 Describing.

[0082] like Figure 3 As shown, one or more processors 112 of the computing device 102 may determine processor availability of the one or more processors 112 based at least in part on the one or more processor statistics and the one or more processor mode statistics (302). The one or more processors 112 may determine whether the one or more processors 112 are available to perform one or more tasks based at least in part on the processor availability of the one or more processors 112 (304). The one or more processors 112 may perform the one or more tasks in response to determining that the one or more processors 112 are available to perform the one or more tasks (306).

[0083] In some examples, one or more processors 112 include multiple processor cores 118, and to determine processor availability, one or more processors 112 may determine a corresponding processor availability for each of the multiple processor cores, determine an average processor availability of the one or more processors 112 based at least in part on the corresponding processor availability of each of the multiple processor cores, and determine whether the one or more processors 112 are available to perform one or more tasks based at least in part on the average processor availability of the one or more processors 112.

[0084] In some examples, to determine the respective processor availability for each processor core in the plurality of processor cores, the one or more processors 112 may determine the respective processor availability for a processor core in the plurality of processor cores based on the current processor frequency of the processor core, the maximum processor frequency, and the amount of idle time of the processor core. In some examples, to determine the respective processor availability for a processor core in the plurality of processor cores, the one or more processors 112 may determine the amount of time the processor core spends in each of the plurality of processor frequencies based at least in part on one or more processor statistics, and determine the current processor frequency of the processor core based at least in part on the amount of time the processor core spends in each of the plurality of processor frequencies.

[0085] In some examples, to determine a respective processor availability for a processor core among the plurality of processor cores, one or more processors 112 may determine an amount of idle time for the processor core based at least in part on one or more processor mode statistics.

[0086] In some examples, to determine the average processor availability, the one or more processors 112 may determine the average processor availability of the one or more processors 112 based on the respective processor availability of each of the plurality of processor cores and the respective maximum processor frequency of each of the plurality of processor cores. In some examples, to determine the respective processor availability for a processor core in the plurality of processor cores, the one or more processors 112 may determine the processor availability percentage of the processor core as: ,in is the number of seconds since the one or more processors 112 last determined the processor availability percentage. In some examples, to determine the average processor availability of one or more processors 112, one or more processors 112 may determine the average processor availability percentage of one or more processors 112 as: , where the number of processor cores ranges from To the processor core ,in The processor core The average processor percentage of The processor core The maximum processor frequency.

[0087] In some examples, in order to perform the one or more tasks in response to determining that one or more processors 112 are available to perform the one or more tasks, one or more processors 112 may monitor an indication of processor availability of one or more processors 112 by a software application executing at one or more processors 112, determine whether one or more processors 112 are available to perform the one or more tasks based at least in part on the indication of processor availability of one or more processors 112 by the software application executing at one or more processors 112, and perform the one or more tasks in response to determining that one or more processors 112 are available to perform the one or more tasks.

[0088] Aspects of the present disclosure include the following examples.

[0089] Example 1. A method, comprising: determining, by one or more processors, processor availability of the one or more processors based at least in part on one or more processor statistics and one or more processor mode statistics; determining, by the one or more processors, whether the one or more processors are available to perform one or more tasks based at least in part on the processor availability of the one or more processors; and in response to determining that the one or more processors are available to perform the one or more tasks, performing the one or more tasks by the one or more processors.

[0090] Example 2. A method according to Example 1, wherein the one or more processors include multiple processor cores, and wherein determining the processor availability includes: determining, by the one or more processors, a corresponding processor availability for each of the multiple processor cores; determining, by the one or more processors, an average processor availability of the one or more processors based at least in part on the corresponding processor availability of each of the multiple processor cores; and determining, by the one or more processors, whether the one or more processors are available to perform one or more tasks based at least in part on the average processor availability of the one or more processors.

[0091] Example 3. A method according to Example 2, wherein determining the corresponding processor availability for each processor core among the multiple processor cores further includes: determining, by the one or more processors, the corresponding processor availability for a processor core among the multiple processor cores based on a current processor frequency of the processor core, a maximum processor frequency, and an amount of idle time of the processor core.

[0092] Example 4. A method according to Example 3, wherein determining the corresponding processor availability for the processor core among the multiple processor cores further includes: determining, by the one or more processors, an amount of time that the processor core spends at each of a plurality of processor frequencies based at least in part on the one or more processor statistics; and determining, by the one or more processors, a current processor frequency of the processor core based at least in part on the amount of time that the processor core spends at each of the plurality of processor frequencies.

[0093] Example 5. A method according to any one of Examples 3 and 4, wherein determining the corresponding processor availability for the processor core among the plurality of processor cores further comprises: determining, by the one or more processors, the amount of idle time of the processor core based at least in part on the one or more processor mode statistics.

[0094] Example 6. A method according to any one of Examples 3 to 5, wherein determining the average processor availability further includes: the one or more processors determining the average processor availability of the one or more processors based on the corresponding processor availability of each processor core in the multiple processor cores and the corresponding maximum processor frequency of each processor core in the multiple processor cores.

[0095] Example 7. The method of Example 6, wherein determining the corresponding processor availability for the processor core among the multiple processor cores further comprises: determining, by the one or more processors, a processor availability percentage for the processor core as: , wherein N is the number of seconds since the one or more processors last determined the processor availability percentage.

[0096] Example 8. A method according to Example 7, wherein determining the average processor availability of the one or more processors further includes: determining, by the one or more processors, an average processor availability percentage of the one or more processors as: , wherein the multiple processor cores range from processor core a to processor core z, wherein is the average processor percentage of processor core i, and wherein is the maximum processor frequency of processor core i.

[0097] Example 9. A method according to any one of Examples 1 to 8, wherein executing the one or more tasks in response to determining that the one or more processors are available to execute the one or more tasks further includes: monitoring an indication of the processor availability of the one or more processors by a software application executed at the one or more processors; determining whether the one or more processors are available to execute the one or more tasks based at least in part on the indication of the processor availability of the one or more processors by the software application executed at the one or more processors; and executing the one or more tasks by the one or more processors in response to determining that the one or more processors are available to execute the one or more tasks.

[0098] Example 10. A computing device comprising: a memory; and one or more processors, the one or more processors being communicatively coupled to the memory and configured to: determine processor availability of the one or more processors based at least in part on one or more processor statistics and one or more processor mode statistics; determine whether the one or more processors are available to perform one or more tasks based at least in part on the processor availability of the one or more processors; and perform the one or more tasks in response to determining that the one or more processors are available to perform the one or more tasks.

[0099] Example 11. A computing device according to Example 10, wherein the one or more processors include multiple processor cores, and wherein, in order to determine the processor availability, the one or more processors are further configured to: determine a corresponding processor availability for each processor core in the multiple processor cores; determine an average processor availability of the one or more processors based at least in part on the corresponding processor availability of each processor core in the multiple processor cores; and determine whether the one or more processors are available to perform one or more tasks based at least in part on the average processor availability of the one or more processors.

[0100] Example 12. A computing device according to Example 11, wherein, in order to determine the corresponding processor availability for each processor core among the multiple processor cores, the one or more processors are further configured to: for a processor core among the multiple processor cores, determine the corresponding processor availability based on the current processor frequency of the processor core, the maximum processor frequency, and the amount of idle time of the processor core.

[0101] Example 13. A computing device according to Example 12, wherein, in order to determine the corresponding processor availability for the processor core among the multiple processor cores, the one or more processors are further configured to: determine the amount of time spent by the processor core in each of a plurality of processor frequencies based at least in part on the one or more processor statistics; and determine the current processor frequency of the processor core based at least in part on the amount of time spent by the processor core in each of the plurality of processor frequencies.

[0102] Example 14. A computing device according to any one of Examples 12 and 13, wherein, in order to determine the corresponding processor availability for the processor core among the multiple processor cores, the one or more processors are further configured to: determine the amount of idle time of the processor core based at least in part on the one or more processor mode statistics.

[0103] Example 15. A computing device according to any one of Examples 12 to 14, wherein, in order to determine the average processor availability, the one or more processors are further configured to: determine the average processor availability of the one or more processors based on the corresponding processor availability of each processor core in the multiple processor cores and the corresponding maximum processor frequency of each processor core in the multiple processor cores.

[0104] Example 16. A computing device according to Example 15, wherein, in order to determine the corresponding processor availability for the processor core among the multiple processor cores, the one or more processors are further configured to: determine the processor availability percentage of the processor core as: , wherein N is the number of seconds since the one or more processors last determined the processor availability percentage.

[0105] Example 17. A computing device according to Example 16, wherein, in order to determine the average processor availability of the one or more processors, the one or more processors are further configured to: determine the average processor availability percentage of the one or more processors as: , wherein the multiple processor cores range from processor core a to processor core z, wherein is the average processor percentage of processor core i, and wherein is the maximum processor frequency of processor core i.

[0106] Example 18. A computing device according to any one of Examples 10 to 17, wherein, in order to perform the one or more tasks in response to determining that the one or more processors are available to perform the one or more tasks, the one or more processors are further configured to: monitor an indication of the processor availability of the one or more processors through a software application executed at the one or more processors; determine whether the one or more processors are available to perform the one or more tasks based at least in part on the indication of the processor availability of the one or more processors through the software application executed at the one or more processors; and perform the one or more tasks in response to determining that the one or more processors are available to perform the one or more tasks.

[0107] Example 19. A non-transitory computer-readable storage medium having instructions stored thereon that, when executed, cause one or more processors of a computing device to: determine processor availability of the one or more processors based at least in part on one or more processor statistics and one or more processor mode statistics; determine whether the one or more processors are available to perform one or more tasks based at least in part on the processor availability of the one or more processors; and perform the one or more tasks in response to determining that the one or more processors are available to perform the one or more tasks.

[0108] Example 20. A non-transitory computer-readable storage medium according to Example 19, wherein the one or more processors include multiple processor cores, and wherein the instructions further cause the one or more processors to: determine a corresponding processor availability for each processor core in the multiple processor cores; determine an average processor availability of the one or more processors based at least in part on the corresponding processor availability of each processor core in the multiple processor cores; and determine whether the one or more processors are available to perform one or more tasks based at least in part on the average processor availability of the one or more processors.

[0109] The techniques described in this disclosure may be implemented at least in part in hardware, software, firmware, or any combination thereof. For example, various aspects of the described techniques may be implemented within one or more processors, including one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or any other equivalent integrated or discrete logic circuit systems, as well as any combination of such components. The term "processor" or "processing circuit system" may generally refer to any of the above-mentioned logic circuit systems, alone or in combination with other logic circuit systems, or any other equivalent circuit systems. A control unit including hardware may also perform one or more of the techniques of the present disclosure.

[0110] Such hardware, software, and firmware may be implemented in the same device or in separate devices to support the various operations and functions described in this disclosure. In addition, any of the described units, modules, or components may be implemented together or individually as discrete but interoperable logic devices. Depicting different features as modules or units is intended to highlight different functional aspects and does not necessarily imply that such modules or units must be implemented by separate hardware or software components. Rather, the functionality associated with one or more modules or units may be performed by separate hardware or software components, or integrated in shared or separate hardware or software components.

[0111] The techniques described in the present disclosure may also be embodied or encoded in a computer-readable medium containing instructions, such as a computer-readable storage medium. Instructions embedded or encoded in a computer-readable medium may cause a programmable processor or other processor to perform the method, for example, when the instructions are executed. Computer-readable media may include non-transitory computer-readable storage media and transient communication media. Computer-readable storage media are tangible and non-transitory and may include random access memory (RAM), read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electronically erasable programmable read-only memory (EEPROM), flash memory, hard disk, CD-ROM, floppy disk, cassette, magnetic media, optical media, or other computer-readable storage media. It should be understood that the term "computer-readable storage medium" refers to a physical storage medium, not a signal, carrier wave, or other transient medium.

[0112] Various examples have been described. These and other examples are within the scope of the following claims.

Claims

1. A method comprising: determining, by one or more processors, processor availability of the one or more processors based at least in part on the one or more processor statistics and the one or more processor mode statistics; determining, by the one or more processors, whether the one or more processors are available to perform one or more tasks based at least in part on the processor availability of the one or more processors; as well as In response to determining that the one or more processors are available to perform the one or more tasks, the one or more tasks are performed by the one or more processors.

2. The method according to claim 1, wherein: The one or more processors include a plurality of processor cores, and wherein determining the processor availability includes: determining, by the one or more processors, a respective processor availability for each processor core of the plurality of processor cores; determining, by the one or more processors, an average processor availability of the one or more processors based at least in part on the respective processor availability of each processor core in the plurality of processor cores; and Whether the one or more processors are available to perform one or more tasks is determined, by the one or more processors, based at least in part on the average processor availability of the one or more processors.

3. The method according to claim 2, wherein: Determining the corresponding processor availability for each processor core of the plurality of processor cores further comprises: The one or more processors determine, for a processor core among the plurality of processor cores, the corresponding processor availability based on a current processor frequency of the processor core, a maximum processor frequency, and an amount of idle time of the processor core.

4. The method according to claim 3, wherein: Determining the corresponding processor availability for the processor core among the plurality of processor cores further comprises: determining, by the one or more processors, an amount of time that the processor core spends at each of a plurality of processor frequencies based at least in part on the one or more processor statistics; and The current processor frequency of the processor core is determined, by the one or more processors, based at least in part on the amount of time the processor core spends at each of the plurality of processor frequencies.

5. The method according to any one of claims 3 and 4, wherein: Determining the corresponding processor availability for the processor core among the plurality of processor cores further comprises: The amount of idle time of the processor core is determined by the one or more processors based at least in part on the one or more processor mode statistics.

6. The method according to any one of claims 3 to 5, wherein: Determining the average processor availability further comprises: The average processor availability of the one or more processors is determined by the one or more processors as a function of the respective processor availability of each processor core in the plurality of processor cores and the respective maximum processor frequency of each processor core in the plurality of processor cores.

7. The method according to claim 6, wherein: Determining the corresponding processor availability for the processor core among the plurality of processor cores further comprises: The one or more processors determine a processor availability percentage for the processor core as: ,in, is the number of seconds since the one or more processors last determined the processor availability percentage.

8. The method according to claim 7, wherein: Determining the average processor availability of the one or more processors further comprises: An average processor availability percentage of the one or more processors is determined by the one or more processors as: , wherein the plurality of processor cores range from processor cores To the processor core ,in, The processor core The average processor percentage of The processor core The maximum processor frequency.

9. The method according to any one of claims 1 to 8, wherein: In response to determining that the one or more processors are available to perform the one or more tasks, performing the one or more tasks further comprises: monitoring, by a software application executing at the one or more processors, the one or more processors for an indication of the processor availability; determining, by the software application executing at the one or more processors, whether the one or more processors are available to perform the one or more tasks based at least in part on the indication of the processor availability of the one or more processors; and In response to determining that the one or more processors are available to perform the one or more tasks, the one or more tasks are performed by the one or more processors.

10. A computing device comprising: Memory; as well as one or more processors communicatively coupled to the memory and configured to: determining processor availability of the one or more processors based at least in part on the one or more processor statistics and the one or more processor mode statistics; determining whether the one or more processors are available to perform one or more tasks based at least in part on the processor availability of the one or more processors; as well as The one or more tasks are performed in response to determining that the one or more processors are available to perform the one or more tasks.

11. The computing device according to claim 10, wherein: The one or more processors include a plurality of processor cores, and wherein, to determine the processor availability, the one or more processors are further configured to: determining, for each processor core of the plurality of processor cores, a respective processor availability; determining an average processor availability of the one or more processors based at least in part on the respective processor availability of each processor core in the plurality of processor cores; and Whether the one or more processors are available to perform one or more tasks is determined based at least in part on the average processor availability of the one or more processors.

12. The computing device according to claim 11, wherein: To determine the corresponding processor availability for each processor core of the plurality of processor cores, the one or more processors are further configured to: For a processor core among the plurality of processor cores, the corresponding processor availability is determined based on a current processor frequency of the processor core, a maximum processor frequency, and an amount of idle time of the processor core.

13. The computing device of claim 12, wherein: To determine the corresponding processor availability for the processor core among the plurality of processor cores, the one or more processors are further configured to: determining an amount of time the processor core spends at each of a plurality of processor frequencies based at least in part on the one or more processor statistics; as well as The current processor frequency of the processor core is determined based at least in part on the amount of time the processor core spends at each of the plurality of processor frequencies.

14. The computing device according to any one of claims 12 and 13, wherein: To determine the corresponding processor availability for the processor core among the plurality of processor cores, the one or more processors are further configured to: The amount of idle time for the processor core is determined based at least in part on the one or more processor mode statistics.

15. The computing device according to any one of claims 12 to 14, wherein: To determine the average processor availability, the one or more processors are further configured to: The average processor availability of the one or more processors is determined as a function of the respective processor availability of each processor core of the plurality of processor cores and a respective maximum processor frequency of each processor core of the plurality of processor cores.

16. The computing device of claim 15, wherein: To determine the corresponding processor availability for the processor core among the plurality of processor cores, the one or more processors are further configured to: The processor availability percentage of the processor core is determined as: ,in, is the number of seconds since the one or more processors last determined the processor availability percentage.

17. The computing device of claim 16, wherein: To determine the average processor availability of the one or more processors, the one or more processors are further configured to: An average processor availability percentage of the one or more processors is determined as: , wherein the plurality of processor cores range from processor cores To the processor core ,in, The processor core The average processor percentage of The processor core The maximum processor frequency.

18. The computing device according to any one of claims 10 to 17, wherein: To perform the one or more tasks in response to determining that the one or more processors are available to perform the one or more tasks, the one or more processors are further configured to: monitoring, by a software application executing at the one or more processors, the one or more processors for an indication of the processor availability; determining, by the software application executing at the one or more processors, whether the one or more processors are available to perform the one or more tasks based at least in part on the indication of the processor availability of the one or more processors; as well as The one or more tasks are performed in response to determining that the one or more processors are available to perform the one or more tasks.

19. A non-transitory computer-readable storage medium having stored thereon instructions that, when executed, cause one or more processors of a computing device to: determining processor availability of the one or more processors based at least in part on the one or more processor statistics and the one or more processor mode statistics; determining whether the one or more processors are available to perform one or more tasks based at least in part on the processor availability of the one or more processors; as well as The one or more tasks are performed in response to determining that the one or more processors are available to perform the one or more tasks.

20. The non-transitory computer-readable storage medium of claim 19, wherein: The one or more processors include a plurality of processor cores, and wherein the instructions further cause the one or more processors to: determining, for each processor core of the plurality of processor cores, a respective processor availability; determining an average processor availability of the one or more processors based at least in part on the respective processor availability of each processor core in the plurality of processor cores; and Whether the one or more processors are available to perform one or more tasks is determined based at least in part on the average processor availability of the one or more processors.

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