Optical module and mixed InP / Si optical chip assembly

Abstract

The invention provides an optical module and a mixed InP / Si optical chip assembly. The mixed InP / Si optical chip assembly comprises a mixed InP / Si optical chip. The mixed InP / Si optical chip comprises a Si platform which is integrated with a silicon optical circuit and is provided with an InP area, and the InP area is not provided with a bonding pad; a radio frequency bonding pad and a direct current bias bonding pad are arranged on the top of the Si platform, the radio frequency bonding pad is located on one side of the InP area, and the direct current bias bonding pad is located on the other side of the InP area; the InP phase modulator is located in the InP region; the InP phase modulator comprises an InP waveguide and an electrode, the electrode is arranged at the top of the InP waveguide, and the InP waveguide is in coupling connection with the direct current bias bonding pad; one end of the radio frequency row waveguide is connected with the radio frequency bonding pad, and the radio frequency row waveguide extends to pass through the upper part of the InP waveguide and extends to the other side of the InP region; the radio frequency line waveguide is connected with the electrode. The modulation rate of the phase modulator is improved, and the requirement of a high-rate optical module is met.

Description

[0001] This application claims the priority of the Chinese patent application filed with the China Patent Office on September 28, 2023, with application number 202311270743.6 and invention name “An optical module and hybrid InP / Si optical chip component”, the entire contents of which are incorporated by reference in this application. Technical Field

[0002] The present disclosure relates to the field of optical communication technology, and in particular to an optical module and a hybrid InP / Si optical chip assembly. Background Art

[0003] With the development of new services and application models such as cloud computing, mobile Internet, and video, the advancement of optical communication technology has become increasingly important. In optical communication technology, optical modules, as one of the key components in optical communication equipment, can realize the conversion of optical and electrical signals. In the development of optical communication technology, the data transmission rate of optical modules is required to be continuously improved. Summary of the invention

[0004] The present disclosure provides an optical module and a hybrid InP / Si optical chip assembly, which meet the needs of high-speed optical modules.

[0005] In a first aspect, the present disclosure provides an optical module, comprising:

[0006] Circuit boards;

[0007] A hybrid InP / Si optical chip, electrically connected to the circuit board, for modulating and generating an optical signal;

[0008] Among them, the hybrid InP / Si optical chip includes:

[0009] A Si platform, an InP region is formed inside, and the top of the InP region has no pad; a radio frequency pad and a DC bias pad are arranged on the top of the Si platform, the radio frequency pad is located on one side of the InP region, and the DC bias pad is located on the other side of the InP region;

[0010] An InP phase modulator is located in the InP region; the InP phase modulator comprises an InP waveguide and an electrode, the coupling electrode is arranged above the InP waveguide, and the InP waveguide is electrically connected to a DC bias pad;

[0011] A radio frequency traveling waveguide has one end connected to the radio frequency pad, extends over the InP waveguide and extends to the other side of the InP region; the radio frequency traveling waveguide is electrically connected to the coupling electrode.

[0012] In a second aspect, the present disclosure provides an optical module, comprising:

[0013] Circuit boards;

[0014] a light source, electrically connected to the circuit board, and configured to emit light that does not carry a signal;

[0015] a hybrid InP / Si optical chip, electrically connected to the circuit board, for modulating light that does not carry a signal to generate an optical signal;

[0016] The hybrid InP / Si optical chip includes a Si platform; InP material is arranged in the Si platform, and the InP material forms an InP waveguide; a radio frequency pad, a DC bias pad, a radio frequency traveling waveguide and an electrode are arranged on the top of the Si platform; the coupling electrode is located above the InP material, the middle of the radio frequency traveling waveguide is located at the edge of the top of the InP waveguide, and the coupling electrode is electrically connected to the radio frequency traveling waveguide; the radio frequency pad and the DC bias pad are located outside the InP waveguide and away from the top of the InP waveguide; the radio frequency pad is connected to one end of the radio frequency traveling waveguide, and the DC bias pad is coupled and connected to the InP waveguide.

[0017] In a third aspect, the present disclosure provides a hybrid InP / Si optical chip assembly, comprising:

[0018] A substrate, on which a high frequency transmission line is arranged;

[0019] A driver, disposed on the substrate and connected to one end of the high-frequency transmission line;

[0020] A hybrid InP / Si optical chip is disposed on the substrate and connected to the other end of the high-frequency transmission line;

[0021] Wherein, the hybrid InP / Si optical chip comprises:

[0022] A Si platform is formed with an InP region, and the top of the InP region has no pad; a radio frequency pad and a DC bias pad are arranged on the top of the Si platform, the radio frequency pad is located on one side of the InP region and connected to the other end of the high-frequency transmission line, and the DC bias pad is located on the other side of the InP region;

[0023] An InP phase modulator is located in the InP region; the InP phase modulator comprises an InP waveguide and a coupling electrode, the coupling electrode is arranged above the InP waveguide, and the InP waveguide is coupled and connected to a DC bias pad;

[0024] A radio frequency traveling waveguide has one end connected to the radio frequency pad, extends over the InP waveguide and extends to the other side of the InP region; the radio frequency traveling waveguide is electrically connected to the coupling electrode.

[0025] In the optical module and hybrid InP / Si optical chip assembly provided by the present invention, no structures such as pads are set in the InP area. A high-speed modulation signal is input into the InP waveguide through RF traveling waveguide coupling, which can effectively avoid the stress generated by the bonding pad from affecting the InP waveguide in the InP area, thereby enabling the use of InP materials in the Si platform, thereby improving the modulation rate and reliability of the phase modulator to meet the needs of high-speed optical modules. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the present disclosure, the following briefly introduces the drawings used in some embodiments of the present disclosure. Obviously, the drawings described below are only drawings of some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can also be obtained based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams, and are not limitations on the actual size of the product involved in the embodiments of the present disclosure, the actual process of the method, the actual timing of the signal, etc.

[0027] Figure 1 A partial architecture diagram of an optical communication system provided according to some embodiments of the present disclosure;

[0028] Figure 2 A partial structural diagram of a host computer provided according to some embodiments of the present disclosure;

[0029] Figure 3 A structural diagram of an optical module provided according to some embodiments of the present disclosure;

[0030] Figure 4 An exploded view of an optical module provided according to some embodiments of the present disclosure;

[0031] Figure 5 A schematic diagram of the internal structure of an optical module provided according to some embodiments of the present disclosure;

[0032] Figure 6 A schematic diagram of the layout of a silicon photonic chip provided according to some embodiments of the present disclosure;

[0033] Figure 7 A schematic diagram of the layout of a hybrid InP / Si optical chip provided according to some embodiments of the present disclosure;

[0034] Figure 8 A schematic diagram of the local structure of a hybrid InP / Si optical chip provided according to some embodiments of the present disclosure Figure 1 ;

[0035] Fig. 9 A schematic diagram of the local structure of a hybrid InP / Si optical chip provided according to some embodiments of the present disclosure Figure 2 ;

[0036] Fig.10 A schematic diagram of the structure of a first radio frequency electrode provided according to some embodiments of the present disclosure;

[0037] Fig.11 A cross-sectional enlargement of a hybrid InP / Si optical chip provided according to some embodiments of the present disclosure Figure 1 ;

[0038] Fig.12 A cross-sectional enlargement of a hybrid InP / Si optical chip provided according to some embodiments of the present disclosure Figure 2 ;

[0039] Fig.13 A cross-sectional enlargement of a hybrid InP / Si optical chip provided according to some embodiments of the present disclosure Figure 3 ;

[0040] Fig.14 A cross-sectional enlargement of a hybrid InP / Si optical chip provided according to some embodiments of the present disclosure Figure 4 ;

[0041] Fig.15 An equivalent circuit diagram of a hybrid InP / Si optical chip provided according to some embodiments of the present disclosure;

[0042] Fig.16 A schematic diagram of a hybrid InP / Si optical chip assembly according to some embodiments of the present disclosure Figure 1 ;

[0043] Fig.17 A schematic diagram of a hybrid InP / Si optical chip assembly according to some embodiments of the present disclosure Figure 2 ;

[0044] Fig.18 A schematic flow chart of a method for preparing a hybrid InP / Si optical chip according to some embodiments of the present disclosure. DETAILED DESCRIPTION

[0045] In optical communication technology, in order to establish information transmission between information processing devices, it is necessary to load information onto light and use the propagation of light to achieve information transmission. Here, the light loaded with information is an optical signal. When the optical signal is transmitted in the information transmission equipment, the loss of optical power can be reduced, so high-speed, long-distance, and low-cost information transmission can be achieved. The signal that the information processing equipment can recognize and process is an electrical signal. Information processing equipment usually includes optical network terminals (Optical Network Unit, ONU), gateways, routers, switches, mobile phones, computers, servers, tablets, televisions, etc., and information transmission equipment usually includes optical fibers and third-coupled waveguides, etc.

[0046] The optical module can realize the mutual conversion between optical signals and electrical signals between information processing equipment and information transmission equipment. For example, at least one of the optical signal input end or the optical signal output end of the optical module is connected to an optical fiber, and at least one of the electrical signal input end or the electrical signal output end of the optical module is connected to an optical network terminal; the first optical signal from the optical fiber is transmitted to the optical module, and the optical module converts the first optical signal into a first electrical signal, and transmits the first electrical signal to the optical network terminal; the second electrical signal from the optical network terminal is transmitted to the optical module, and the optical module converts the second electrical signal into a second optical signal, and transmits the second optical signal to the optical fiber. Since multiple information processing devices can transmit information through electrical signals, at least one of the multiple information processing devices needs to be directly connected to the optical module, and all information processing devices do not need to be directly connected to the optical module. Here, the information processing device directly connected to the optical module is called the upper computer of the optical module. In addition, the optical signal input end or the optical signal output end of the optical module can be called an optical port, and the electrical signal input end or the electrical signal output end of the optical module can be called an electrical port.

[0047] Figure 1 FIG. 1 is a partial structural diagram of an optical communication system provided according to some embodiments of the present disclosure. Figure 1 As shown, the optical communication system mainly includes a remote information processing device 1000 , a local information processing device 2000 , a host computer 100 , an optical module 200 , an optical fiber 101 and a network cable 103 .

[0048] One end of the optical fiber 101 extends toward the remote information processing device 1000, and the other end of the optical fiber 101 is connected to the optical module 200 through the optical port of the optical module 200. The optical signal can be totally reflected in the optical fiber 101, and the propagation of the optical signal in the total reflection direction can almost maintain the original optical power. The optical signal undergoes multiple total reflections in the optical fiber 101 to transmit the optical signal from the remote information processing device 1000 to the optical module 200, or to transmit the optical signal from the optical module 200 to the remote information processing device 1000, thereby realizing long-distance, low-power loss information transmission.

[0049] The optical communication system may include one or more optical fibers 101, and the optical fibers 101 are detachably connected or fixedly connected to the optical module 200. The host computer 100 is configured to provide data signals to the optical module 200, receive data signals from the optical module 200, or monitor or control the working state of the optical module 200.

[0050] The host computer 100 includes a substantially rectangular housing and an optical module interface 102 disposed on the housing. The optical module interface 102 is configured to connect to the optical module 200 so that the host computer 100 and the optical module 200 establish a unidirectional or bidirectional electrical signal connection.

[0051] The host computer 100 also includes an external electrical interface, which can be connected to an electrical signal network. For example, the external electrical interface includes a Universal Serial Bus (USB) interface or a network cable interface 104, and the network cable interface 104 is configured to access the network cable 103 so that the host computer 100 establishes a unidirectional or bidirectional electrical signal connection with the network cable 103. One end of the network cable 103 is connected to the local information processing device 2000, and the other end of the network cable 103 is connected to the host computer 100, so as to establish an electrical signal connection between the local information processing device 2000 and the host computer 100 through the network cable 103. For example, the third electrical signal sent by the local information processing device 2000 is transmitted to the host computer 100 through the network cable 103, and the host computer 100 generates a second electrical signal according to the third electrical signal. The second electrical signal from the host computer 100 is transmitted to the optical module 200, and the optical module 200 converts the second electrical signal into a second optical signal, and transmits the second optical signal to the optical fiber 101, and the second optical signal is transmitted to the remote information processing device 1000 in the optical fiber 101. For example, the first optical signal from the remote information processing device 1000 is transmitted through the optical fiber 101, and the first optical signal from the optical fiber 101 is transmitted to the optical module 200, and the optical module 200 converts the first optical signal into a first electrical signal, and the optical module 200 transmits the first electrical signal to the host computer 100, and the host computer 100 generates a fourth electrical signal according to the first electrical signal, and transmits the fourth electrical signal to the local information processing device 2000. It should be noted that the optical module is a tool for realizing the mutual conversion between optical signals and electrical signals. During the conversion process between the optical signals and electrical signals, the information does not change, but the encoding and decoding methods of the information can change.

[0052] In addition to the optical network terminal, the host computer 100 also includes an optical line terminal (OLT), an optical network device (ONT), or a data center server.

[0053] Figure 2 1 is a partial structural diagram of a host computer provided according to some embodiments of the present disclosure. In order to clearly show the connection relationship between the optical module 200 and the host computer 100, Figure 2 Only the structure of the host computer 100 related to the optical module 200 is shown. Figure 2 As shown, the host computer 100 further includes a PCB circuit board 105 disposed in the housing, a cage 106 disposed on the surface of the PCB circuit board 105, a heat sink 107 disposed on the cage 106, and an electrical connector disposed inside the cage 106. The electrical connector is configured to access the electrical port of the optical module 200; the heat sink 107 has a protruding structure such as fins to increase the heat dissipation area.

[0054] The optical module 200 is inserted into the cage 106 of the host computer 100, and the cage 106 fixes the optical module 200. The heat generated by the optical module 200 is transferred to the cage 106 and then diffused through the heat sink 107. After the optical module 200 is inserted into the cage 106, the electrical port of the optical module 200 is connected to the electrical connector inside the cage 106, so that the optical module 200 establishes a bidirectional electrical signal connection with the host computer 100. In addition, the optical port of the optical module 200 is connected to the optical fiber 101, so that the optical module 200 establishes a bidirectional optical signal connection with the optical fiber 101.

[0055] Figure 3 is a structural diagram of an optical module provided according to some embodiments of the present disclosure, Figure 4 FIG. 1 is an exploded view of an optical module provided according to some embodiments of the present disclosure. Figure 3 and Figure 4 As shown, the optical module 200 includes a shell, a circuit board 300 disposed in the shell, an optical chip 400, and a light source 500. Exemplarily, the optical chip 400 and the light source 500 are electrically connected to the circuit board 300, respectively, and the light output end of the light source 500 is optically coupled to the optical chip 400. In some embodiments, the light output end of the light source 500 is coupled to the optical chip 400 via an optical fiber.

[0056] The housing comprises an upper housing 201 and a lower housing 202 . The upper housing 201 covers the lower housing 202 to form the housing having two openings 204 and 205 . The outer contour of the housing is generally a square body.

[0057] In some embodiments, the lower shell 202 includes a bottom plate 2021 and two lower side plates 2022 located on both sides of the bottom plate 2021 and arranged perpendicular to the bottom plate 2021; the upper shell 201 includes a cover plate 2011, and the cover plate 2011 covers the two lower side plates 2022 of the lower shell 202 to form the above-mentioned shell.

[0058] In some embodiments, the lower shell 202 includes a bottom plate 2021 and two lower side plates 2022 located on both sides of the bottom plate 2021 and vertically arranged with the bottom plate 2021; the upper shell 201 includes a cover plate 2011 and two upper side plates located on both sides of the cover plate 2011 and vertically arranged with the cover plate 2011, and the two upper side plates are combined with the two lower side plates 2022 to realize that the upper shell 201 covers the lower shell 202.

[0059] The direction of the line connecting the two openings 204 and 205 may be consistent with the length direction of the optical module 200, or may be inconsistent with the length direction of the optical module 200. For example, the opening 204 is located at the end of the optical module 200 ( Figure 3 The opening 205 is also located at the end of the optical module 200 ( Figure 3 Alternatively, the opening 204 is located at the end of the optical module 200, and the opening 205 is located at the side of the optical module 200. The opening 204 is an electrical port, and the gold finger 301 of the circuit board 300 extends from the opening 204 and is inserted into the electrical connector of the host computer 100; the opening 205 is an optical port, which is configured to access the external optical fiber 101 so that the optical fiber 101 is connected to the optical chip 400 in the optical module 200.

[0060] The upper housing 201 and the lower housing 202 are combined to facilitate the installation of the circuit board 300, the optical modulation chip 900, the light source 1100, etc. into the housing, and the upper housing 201 and the lower housing 202 can encapsulate and protect the above components. In addition, when assembling the circuit board 300, the optical chip 400, the light source 500, etc., it is convenient to deploy the positioning components, heat dissipation components, and electromagnetic shielding components of these components, which is conducive to automated production.

[0061] In some embodiments, the upper shell 201 and the lower shell 202 are made of metal materials to facilitate electromagnetic shielding and heat dissipation.

[0062] In some embodiments, the optical module 200 further includes an unlocking component 600 located outside its housing. The unlocking component 600 is configured to achieve a fixed connection between the optical module 200 and the host computer, or to release the fixed connection between the optical module 200 and the host computer.

[0063] For example, the unlocking component 600 is located on the outside of the two lower side plates 2022 of the lower housing 202, and includes a snap-fit ​​component that matches the cage 106 of the host computer 100. When the optical module 200 is inserted into the cage 106, the snap-fit ​​component of the unlocking component 600 fixes the optical module 200 in the cage 106; when the unlocking component 600 is pulled, the snap-fit ​​component of the unlocking component 600 moves accordingly, thereby changing the connection relationship between the snap-fit ​​component and the host computer, so as to release the fixation of the optical module 200 and the host computer, so that the optical module 200 can be pulled out of the cage 106.

[0064] The circuit board 300 includes circuit traces, electronic components and chips, etc. The electronic components and chips are connected according to the circuit design through the circuit traces to realize the functions of power supply, electrical signal transmission and grounding. The electronic components may include capacitors, resistors, transistors, metal-oxide-semiconductor field-effect transistors (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET). The chip may include a microcontroller unit (Microcontroller Unit, MCU), a laser driver chip, a transimpedance amplifier (Transimpedance Amplifier, TIA), a limiting amplifier (Limiting Amplifier, LA), a clock and data recovery chip (Clock and Data Recovery, CDR), a power management chip, and a digital signal processing (Digital Signal Processing, DSP) chip.

[0065] The circuit board 300 is generally a rigid circuit board. Due to its relatively hard material, the rigid circuit board can also realize the load-bearing function. For example, the rigid circuit board can stably carry the above-mentioned electronic components and chips; the rigid circuit board can also be inserted into the electrical connector in the cage 106 of the host computer 100.

[0066] The circuit board 300 also includes a gold finger 301 formed on the end surface thereof. The gold finger 301 is composed of a plurality of independent pins. The circuit board 300 is inserted into the cage 106, and the gold finger 301 is connected to the electrical connector in the cage 106. The gold finger 301 can be provided on only one side of the circuit board 300 (e.g. Figure 4 The upper surface shown in the figure) can also be set on the upper and lower surfaces of the circuit board 300 to provide more pins, so as to adapt to occasions where the number of pins is large. The gold finger 301 is configured to establish an electrical connection with the host computer to achieve power supply, grounding, two-wire synchronous serial (Inter-Integrated Circuit, I2C) signal transmission, data signal transmission, etc. Of course, flexible circuit boards are also used in some optical modules. Flexible circuit boards are generally used in conjunction with rigid circuit boards to supplement rigid circuit boards.

[0067] Figure 5 FIG. 1 is a schematic diagram of the internal structure of an optical module provided according to some embodiments of the present disclosure. Figure 5As shown, in some embodiments, the light source 500 is arranged on the side of the optical chip 400, and the light source 500 emits light from the side and is coupled to the optical chip 400. The light source 500 is used as an external light source of the optical chip 400, and the light emitted by the light source 500 enters the optical chip 400. The light source 500 can use a laser box, and the laser box encapsulates a laser inside. The laser emits light to generate a laser beam. The light source 500 is used to provide the emission laser to the optical chip 400. The laser has a good single wavelength characteristic and a good wavelength tuning characteristic and becomes the preferred light source for optical modules and even optical fiber transmission. Other types of light, such as LED light, are generally not used in common optical communication systems. Even if such a light source is used in a special optical communication system, the characteristics of the light source and the chip components are greatly different from those of the laser, so that there are great technical differences between the optical module using the laser and the optical module using other light sources. Those skilled in the art generally do not think that these two types of optical modules can give technical inspiration to each other.

[0068] The light emitted by the light source 500 is light that does not carry data and enters the optical chip 400. The optical chip 400 performs phase modulation on the light to load the electrical signal into the light to obtain light that carries data, that is, to generate an optical transmission signal, thereby realizing the transmission of the optical signal.

[0069] In some embodiments, the optical chip 400 is a silicon photonic chip, that is, the optical chip 400 is formed by packaging with silicon materials. The silicon photonic chip includes a Mach-Zehnder Modulator (MZM), and the MZM has a silicon photonic phase modulator integrated inside, which is used to realize the modulation and demodulation of optical signals. Since silicon photonic chips are easy to etch, other functional devices such as splitters, combiners, mixers, photodetectors, etc. can be integrated inside them to realize more functions.

[0070] Figure 6 FIG. 1 is a schematic diagram of a layout of a silicon photonic chip provided according to some embodiments of the present disclosure. Figure 6 As shown, a plurality of channels are integrated inside the silicon photonic chip, each channel includes a silicon photonic phase modulator 410, a thermal phase regulator 420, etc. The silicon photonic phase modulator 410, the thermal phase regulator 420, etc. are respectively formed by packaging with silicon materials, and the silicon photonic phase modulator 410, the thermal phase regulator 420, etc. are connected to each other through silicon waveguides.

[0071] However, the basic characteristics of silicon materials lead to defects in the realization of optical modulators, such as relatively low modulation efficiency, large capacitance, limited bandwidth, and large optical loss. Therefore, since silicon photonic phase modulators are based on carrier operation, the current transmission rate on each channel in long-distance 400G optical modules can only reach 50-60G baud. In the next generation of 1.6-3.2T PAM short-distance transmission and 800G-3.2T coherent long-distance transmission optical module products, the transmission rate on each channel in the optical module needs to exceed 100Gbaud, and the modulation rate of the silicon photonic phase modulator needs to exceed 100Gbaud. When the modulation rate of the silicon photonic phase modulator is close to 100Gbaud, the output voltage swing of the driver will be higher, resulting in high power consumption of the driver.

[0072] In some embodiments, the optical chip 400 is a hybrid InP / Si optical chip, that is, the optical chip 400 is formed by hybrid packaging of silicon material and InP material. Figure 7 FIG. 1 is a schematic diagram of the layout of a hybrid InP / Si optical chip provided according to some embodiments of the present disclosure. Figure 7 As shown, the hybrid InP / Si optical chip includes multiple channels, each of which includes an InP phase modulator 430, a thermal phase regulator 420, etc. The InP phase modulator 430 is formed by packaging with InP materials, and the thermal phase regulator 420, etc. are formed by packaging with silicon materials. The InP phase modulator 430, the thermal phase regulator 420, etc. are connected to each other through silicon waveguides to form a high-travel-wave MZM. The hybrid InP / Si optical chip provided in the embodiment of the present disclosure realizes the hybrid integration of Si materials and InP materials, so as to utilize InP materials to provide high-speed modulation and Si materials to provide highly integrated silicon optical circuits, so that the optical chip 400 can have the high-speed modulation characteristics of the InP material, so that the optical chip 400 can meet the requirements of high baud rate modulation.

[0073] In some embodiments, the hybrid InP / Si optical chip is formed by bonding an InP platform formed by InP material to a Si platform formed by Si material, and processing an InP phase modulator on the bonded InP platform, and forming a silicon optical circuit on the bonded Si platform. However, there is a large thermal expansion coefficient (CTE) mismatch between the InP platform and the Si platform, resulting in thermal stress concentration. Moreover, the InP-based material is a brittle material, and any mechanical and thermal stress will cause reliability problems in terms of temperature and aging, which is not conducive to the use of the hybrid InP / Si optical chip.

[0074] Figure 8 A schematic diagram of the local structure of a hybrid InP / Si optical chip provided according to some embodiments of the present disclosure Figure 1 , Fig. 9A schematic diagram of the local structure of a hybrid InP / Si optical chip provided according to some embodiments of the present disclosure Figure 2 , Figure 8 and Fig. 9 FIG. 4 shows the structure of an InP phase modulator 430 in a hybrid InP / Si optical chip. Figure 8 and Fig. 9 As shown, the hybrid InP / Si optical chip includes an InP region 431 and a Si platform 460, and the InP region 431 is located in the Si platform 460 so that the Si platform 460 wraps the InP region 431 from the front, back, left, right and bottom directions of the InP region 431. An InP waveguide 432 is arranged in the InP region 431; the InP waveguide 432 extends from one end of the InP region 431 to the other end of the InP region 431. An RF pad 440 is arranged on one side of the InP region 431, and the RF pad 440 is located on the top of the Si platform 460, that is, the RF pad 440 is located outside the InP region 431. The RF pad 440 is used to electrically connect the driver to input the RF electrical signal. In some embodiments, when the hybrid InP / Si optical chip includes multiple channels, there will be multiple pairs of InP / Si optical chips. Figure 8 and Fig. 9 The InP phase modulator 430 of the illustrated structural shape. Exemplarily, multiple pairs of InP phase modulators 430 are arranged side by side.

[0075] In some embodiments, the RF pad 440 includes a first RF pad 441 and a second RF pad 442, both of which are located outside the InP region 431, and the first RF pad 441 and the second RF pad 442 are insulated from each other and there is a gap between them. Exemplarily, the first RF pad 441 and the second RF pad 442 are arranged side by side on one side of the InP region 431.

[0076] A radio frequency waveguide 450 is disposed on the top of the hybrid InP / Si optical chip. One end of the radio frequency waveguide 450 is connected to the radio frequency pad 440. The radio frequency waveguide 450 extends to the top of the InP waveguide 432 and crosses the InP region 431 to the other side of the InP region 431. The radio frequency waveguide 450 is used to transmit radio frequency electrical signals, so as to transmit the radio frequency electrical signals input through the radio frequency pad 440 to the top of the InP waveguide 432. Exemplarily, the width of the radio frequency waveguide 450 is smaller than the width of the radio frequency pad 440, so as to reduce

[0077] In some embodiments, the RF traveling waveguide 450 includes a first RF electrode 450a and a second RF electrode 450b. The first RF electrode 450a crosses the InP region 431 along one side of the top of the InP waveguide 432, and the second RF electrode 450b crosses the InP region 431 along the other side of the top of the InP waveguide 432. The first RF electrode 450a extends from one side outside the InP region 431 to the other side outside the InP region 431, and one end of the first RF electrode 450a is connected to the first RF pad 441. The second RF electrode 450b extends from one side outside the InP region 431 to the other side outside the InP region 431, and one end of the second RF electrode 450b is connected to the second RF pad 442. In some embodiments, the middle of the first RF electrode 450a is located on one side of the top edge of the InP waveguide 432, and the middle of the second RF electrode 450b is located on the other side of the top edge of the InP waveguide 432.

[0078] Coupling electrodes 433 are arranged above the InP waveguide 432. The coupling electrodes 433 appear in pairs and are electrically connected to the RF traveling waveguide 450. The paired coupling electrodes 433 are used to couple the RF electrical signal transmitted to the top of the InP waveguide 432 through the RF traveling waveguide 450 into the InP waveguide 432. Exemplarily, multiple pairs of coupling electrodes 433 are arranged above the InP waveguide 432 from one end to the other end of the InP waveguide 432, each pair of coupling electrodes 433 is respectively connected to the RF traveling waveguide 450, and there is a gap between adjacent pairs of coupling electrodes 433.

[0079] In some embodiments, each pair of coupling electrodes 433 is located between the first RF electrode 450a and the second RF electrode 450b, one electrode in each pair of coupling electrodes 433 is electrically connected to the first RF electrode 450a, the other electrode is electrically connected to the second RF electrode 450b, and there is a gap between the two electrodes in each pair of coupling electrodes 433.

[0080] In some embodiments, each pair of coupling electrodes 433 includes a first electrode 4331 and a second electrode 4332, the first electrode 4331 and the second electrode 4332 are "T"-shaped electrodes, the first electrode 4331 and the second electrode 4332 are located above the InP waveguide 432, the top of the first electrode 4331 and the top of the second electrode 4332 are arranged opposite to each other with a gap therebetween, the bottom of the first electrode 4331 is electrically connected to the first RF electrode 450a, and the bottom of the second electrode 4332 is electrically connected to the second RF electrode 450b. A "T"-shaped electrode pair including the first electrode 4331 and the second electrode 4332 is arranged above the InP waveguide 432, which is used to slow down the microwave of the RF electrical signal and facilitate the coupling of the RF electrical signal into the InP waveguide 432.

[0081] In the InP phase modulator 430, an InP-MQW optical waveguide can have a high-speed modulation efficiency with a good quantum basis effect, realize a high bandwidth based on the InP traveling waveguide MZM, and thus meet the high-speed requirements of the optical module.

[0082] A DC bias pad 461 is also provided outside the InP region 431. The DC bias pad 461 is located on the Si platform 460. The DC bias pad 461 is electrically connected to the InP waveguide 432 and is used to provide a bias current to the PN junction in the InP waveguide 432. Exemplarily, a connecting waveguide 434 and a bias input electrode 462 are provided on the other side of the InP waveguide 432. The bias input electrode 462 is located outside the InP region 431. The connecting waveguide 434 is made of InP material, and a portion of the connecting waveguide 434 is located in the InP region 431 and a portion is located outside the InP region 431. One end of the connecting waveguide 434 is connected to the InP waveguide 432, and the other end of the connecting waveguide 434 is connected to one end of the bias input electrode 462. The other end of the bias input electrode 462 is connected to the DC bias pad 461. The width of the bias input electrode 462 is smaller than the width of the DC bias pad 461, and the bias input electrode 462 is used to realize the transition connection from the DC bias pad 461 to the connecting waveguide 434. The bias input electrode 462 couples the bias current input through the DC bias pad 461 to the connecting waveguide 434, and then loads it to the InP waveguide 432 through the connecting waveguide 434; the input electrode 462 is located on the Si platform 460, and the connecting waveguide 434 extends from the InP region 431 to the Si platform 460. In some embodiments, the connecting waveguide 434 first extends to the Si platform 460 along the length direction of the InP waveguide 432, and then extends in the direction of the DC bias pad 461 in the Si platform 460.

[0083] An end pad 463 is disposed outside the InP region 431 and connected to the other end of the RF traveling waveguide 450. In some embodiments, the end pad 463 connects the first RF electrode 450a and the second RF electrode 450b to form a closed loop.

[0084] In the embodiment of the present disclosure, the InP area 431 is a prohibited area in the hybrid circuit layout of the hybrid InP / Si optical chip, and no devices requiring bonding such as pads are provided in the nP area 431 to avoid any bonding, mechanical and thermal stresses and eliminate problems caused by temperature and aging.

[0085] Fig.10 is a schematic structural diagram of a first radio frequency electrode provided according to some embodiments of the present disclosure, Fig.10 A structural form of a first radio frequency electrode is shown in FIG. Fig.10As shown, the first RF electrode 450a includes a parallel section 452, which is arranged on one side of the upper edge of the InP waveguide 432, and the side of the parallel section 452 is connected to the bottom of the coupling electrode 433. The parallel section 452 is convenient for coupling and transmitting the RF electrical signal to each coupling electrode 433, so as to passively couple the RF electrical signal to the InP waveguide 432 through each coupling electrode 433. Exemplarily, the width of the parallel section 452 is smaller than that of the first RF pad 441, and the parallel section 452 is a straight thin strip structure.

[0086] In some embodiments, the first RF electrode 450a includes a first connecting section 451 and a second connecting section 453, one end of the parallel section 452 is connected to the first connecting section 451, and the other end of the parallel section 452 is connected to the second connecting section 453. One end of the first connecting section 451 is connected to the first RF pad 441, and the other end of the first connecting section 451 is connected to one end of the parallel section 452. The first connecting section 451 is used to achieve the transition from the first RF pad 441 to the RF traveling waveguide of the parallel section 452. One end of the second connecting section 453 is connected to the other end of the parallel section 452, and the other end of the second connecting section 453 is connected to the terminal pad 463. The second connecting section 453 is used to achieve the transition from the parallel section 452 to the end of the first RF electrode 450a. The first RF electrode 450a is used to adapt to the difference between the dielectric constant of InP and the dielectric constant of SiO2 in the Si platform 460, to ensure the signal integrity with a transmission rate greater than 100 Gbaud.

[0087] In some embodiments, the first connecting section 451 includes a first transition zone 4512, and the width of one end of the first transition zone 4512 is greater than the width of the other end. The first transition zone 4512 is used to adjust the width of one end of the first RF electrode 450a, and the first transition zone 4512 facilitates the coupling transmission of the RF electrical signal from the RF pad to the RF traveling waveguide. Exemplarily, the width of the first transition zone 4512 gradually decreases from one end to the other end.

[0088] In some embodiments, the first connecting section 451 includes a second transition zone 4514, and the width of one end of the second transition zone 4514 is greater than the width of the other end. The second transition zone 4514 is used to achieve the transition of the width of the first RF electrode 450a to the parallel section 452. The second transition zone 4514 facilitates the coupling transmission of the RF electrical signal from the RF pad to the RF traveling waveguide. Exemplarily, the width of the second transition zone 4514 gradually decreases from one end to the other end.

[0089] In some embodiments, the first connecting section 451 includes a first connecting area 4511 , one end of the first connecting area 4511 is connected to the first RF pad 441 , and the other end of the first connecting area 4511 is connected to one end of the first transition area 4512 , and the first connecting area 4511 is used to facilitate the connection of the first transition area 4512 to the first RF pad 441 .

[0090] In some embodiments, the first connection section 451 includes a second connection area 4513 , and the second connection area 4513 is connected to one end of the second transition area 4514 . The second connection area 4513 is used to facilitate the second transition area 4514 to connect to the first RF pad 441 .

[0091] In some embodiments, the first connection section 451 includes a first connection area 4511, a first transition area 4512, a second connection area 4513, and a second transition area 4514. One end of the first connection area 4511 is connected to the first RF pad 441, the other end of the first connection area 4511 is connected to one end of the first transition area 4512, the other end of the first transition area 4512 is connected to one end of the second connection area 4513, the other end of the second connection area 4513 is connected to one end of the second transition area 4514, and one end of the second transition area 4514 is connected to one end of the parallel section 452. The width of one end of the first transition area 4512 is greater than the width of the other end of the first transition area 4512, and the width of the first transition area 4512 changes gradually from one end to the other end; the width of one end of the second transition area 4514 is greater than the width of the other end of the second transition area 4514, and the width of the second transition area 4514 changes gradually from one end to the other end. The first connection region 4511 is located above the Si platform 460 ; one end of the first transition region 4512 is located above the Si platform 460 and the other end is located above the InP region 431 ; the second connection region 4513 and the second transition region 4514 are located above the InP region 431 .

[0092] In some embodiments, the second connecting section 453 includes a third transition zone 4531, the width of one end of the third transition zone 4531 is smaller than the width of the other end, and one end of the third transition zone 4531 is connected to the other end of the parallel section 452. The third transition zone 4531 is used to achieve the change adjustment of the width from the parallel section 452 to the other end of the first RF electrode 450a, so as to facilitate the adjustment of the width of the other end of the first RF electrode 450a, so as to ensure the coupling transmission performance of the RF electrical signal to the RF traveling waveguide. Exemplarily, the width of the third transition zone 4531 gradually increases from one end to the other end.

[0093] In some embodiments, the second connecting section 453 includes a fourth transition zone 4533, and the width of one end of the fourth transition zone 4533 is smaller than the width of the other end of the fourth transition zone 4533. The fourth transition zone 45331 is used to achieve the change adjustment of the width from the parallel section 452 to the other end of the first RF electrode 450a, so as to facilitate the adjustment of the width of the other end of the first RF electrode 450a, so as to ensure the coupling transmission performance of the RF electrical signal to the RF traveling waveguide. Exemplarily, the width of the fourth transition zone 4533 gradually increases from one end to the other end.

[0094] In some embodiments, the second connecting section 453 includes a third transition zone 4531, a third connecting zone 4532, and a fourth transition zone 4533. One end of the third transition zone 4531 is connected to the other end of the parallel section 452, and the other end of the third transition zone 4531 is connected to one end of the third connecting zone 4532; the other end of the third connecting zone 4532 is connected to one end of the fourth transition zone 4533. The width of one end of the third transition zone 4531 is less than the width of the other end of the third transition zone 4531, and the width of the third transition zone 4531 changes gradually from one end to the other end; the width of one end of the fourth transition zone 4533 is less than the width of the other end of the fourth transition zone 4533, and the width of the fourth transition zone 4533 changes gradually from one end to the other end. The third transition zone 4531 and the third connecting zone 4532 are located above the InP region 431, one end of the fourth transition zone 4533 is located above the InP region 431, and the other end of the fourth transition zone 4533 is located above the Si platform 460.

[0095] In some embodiments, the structural morphology of the second RF electrode 450b is the same as or similar to that of the first RF electrode 450a. Exemplarily, the second RF electrode 450b and the first RF electrode 450a are symmetrically arranged at the edge above the InP waveguide 432. The morphology of the portion extending from the Si platform 460 to the InP region 431 on the first RF electrode 450a and the second RF electrode 450b gradually changes, so as to adapt to the InP waveguide 432 with and without PN junctions, which is crucial to ensure the modulation rate of the phase modulator.

[0096] In some embodiments, the hybrid InP / Si optical chip further includes a first resistor 464, which is located outside the InP region 431. One end of the first resistor 464 is electrically connected to the other end of the first RF electrode 450a, and the other end of the first resistor 464 is electrically connected to the terminal pad 463. The first resistor 464 is used to match the impedance of the transmission circuit of the first RF electrode 450a. Exemplarily, the first resistor 464 is an on-chip resistor.

[0097] In some embodiments, the hybrid InP / Si optical chip further includes a second resistor 465, which is located outside the InP region 431. One end of the second resistor 465 is electrically connected to the second RF electrode 450b, and the other end of the second resistor 465 is electrically connected to the terminal pad 463. The second resistor 465 is used to match the impedance of the transmission circuit of the second RF electrode 450b. Exemplarily, the second resistor 465 is an on-chip resistor.

[0098] In some embodiments, the hybrid InP / Si optical chip further includes a first resistor 464, a second resistor 465 and a capacitor 466, wherein the first resistor 464 and the second resistor 465 are on-chip resistors, and the capacitor 466 is an on-chip capacitor. One end of the first resistor 464 is electrically connected to the other end of the first RF electrode 450a, and the other end of the first resistor 464 is electrically connected to the terminal pad 463; one end of the second resistor 465 is electrically connected to the second RF electrode 450b, and the other end of the second resistor 465 is electrically connected to the terminal pad 463; one end of the capacitor 466 is connected between the other end of the first resistor 464 and the other end of the second resistor 465, and the other end of the capacitor 466 is grounded. The first resistor 464, the second resistor 465 and the capacitor 466 form a matching circuit for matching the transmission circuits of the first RF electrode 450a and the second RF electrode 450b, and ensuring the performance of the first RF electrode 450a and the second RF electrode 450b coupling RF electrical signals to the InP waveguide 432. The first resistor 464 , the second resistor 465 and the capacitor 466 are located outside the InP region 431 , which can effectively reduce the adverse effects of mechanical stress, thermal stress and the like generated by the first resistor 464 , the second resistor 465 and the capacitor 466 on the InP waveguide 432 .

[0099] In some embodiments, the first resistor 464 and the second resistor 465 are disposed between the other end of the first RF electrode 450a and the other end of the second RF electrode 450b. The distance between the other end of the first RF electrode 450a and the other end of the second RF electrode 450b is greater than the distance between one end of the first RF electrode 450a and one end of the second RF electrode 450b, so that the first resistor 464 and the second resistor 465 are conveniently disposed.

[0100] Fig.11 A cross-sectional enlargement of a hybrid InP / Si optical chip provided according to some embodiments of the present disclosure Figure 1 , Fig.12 A cross-sectional enlargement of a hybrid InP / Si optical chip provided according to some embodiments of the present disclosure Figure 2 , Fig.13 A cross-sectional enlargement of a hybrid InP / Si optical chip provided according to some embodiments of the present disclosure Figure 3 , Fig.14 A cross-sectional enlargement of a hybrid InP / Si optical chip provided according to a series of embodiments of the present disclosure Figure 4 ; Fig.11 Shows Figure 8 The cross-sectional structure at A in the middle, Fig.12 Shows Figure 8 The interface structure at B in the figure is: Fig.13 It is shown in Figure 8 The cross-sectional structure at C in the middle, Fig.14 Shows Figure 8The cross-sectional structure of D. Fig.11 The cross-sectional structure of a hybrid InP / Si optical chip outside the InP region is shown, and the cross section does not intercept the InP region; Fig.12 The cross-sectional structure of a hybrid InP / Si optical chip at one edge of an InP waveguide is shown, where the cross section captures the InP region but does not capture the InP waveguide; Fig.13 The cross-sectional structure of a hybrid InP / Si optical chip on an InP waveguide is shown, and the cross section is taken to the InP waveguide; Fig.14 The structure of a hybrid InP / Si optical chip outside the other end of the InP waveguide is shown, and the cross section does not capture the InP waveguide; Figure 11-13 The main cross-sectional structure of an InP phase modulator 430 is shown in detail.

[0101] like Fig.11 As shown, the Si platform 460 includes a substrate layer 4601, a BOX layer 4602 is included above the substrate layer 4601, a Si waveguide layer 4603 and a SiO2 layer 4604 are arranged above the BOX layer 4602, the SiO2 layer 4604 wraps the Si waveguide layer 4603, and the Si waveguide layer 4603 includes a strip-shaped Si waveguide; the top of the SiO2 layer 4604 supports the arrangement of a first RF electrode 450a and a second RF electrode 450b. The Si waveguide in the Si waveguide layer 4603 includes a light input Si waveguide, and the light input Si waveguide is used to input light. Exemplarily, the substrate layer 4601 is formed by epitaxial growth of Si material, and the BOX layer 4602 is formed by epitaxial growth of SiO2 material.

[0102] In some embodiments, the cross-section of the light input Si waveguide is a "convex" structure, that is, the size of the top of the light input Si waveguide is smaller than the size of the bottom of the light input Si waveguide, which facilitates coupling of light input through the light input Si waveguide to the InP waveguide 432.

[0103] like Fig.12 As shown, the InP waveguide 432 is embedded in the SiO2 layer 4604, and the Si waveguide in the Si waveguide layer 4603 extends below one end of the InP waveguide 432. The Si waveguide layer 4603 is used to transmit light to one end of the InP waveguide 432 and couple light into the InP waveguide 432.

[0104] like Fig.12 and Fig.13As shown, the InP waveguide 432 includes an n-InP layer 4321, a first n-InP protrusion 4321a and a second n-InP protrusion 4321b are arranged on the top of the n-InP layer 4321, a gap is arranged between the first n-InP protrusion 4321a and the second n-InP protrusion 4321b, a first i-InP layer 4322, a quantum well layer (Quantum Well, QW) 4323, a second i-InP layer 4324 and a p-InP layer 4325 are arranged above the first n-InP protrusion 4321a, a first i-InP layer 4322, a quantum well layer (Quantum Well, QW) 4323, a second i-InP layer 4324 and a p-InP layer 4325 are arranged above the second n-InP protrusion 4321b, and a coupling electrode 433 is arranged above the p-InP layer 4325. Exemplarily, a first electrode 4331 is disposed on the p-InP layer 4325 above the first n-InP protrusion 4321a, and a second electrode 4332 is disposed on the p-InP layer 4325 above the second n-InP protrusion 4321b. The spaces between the first i-InP layer 4322, the quantum well (QW) layer 4323, the second i-InP layer 4324, and the p-InP layer 4325 above the first n-InP protrusion 4321a and the second n-InP protrusion 4321b are filled with SiO2 material, and then the InP waveguide 432 is wrapped by the SiO2 layer 4604, so that the InP waveguide 432 is a waveguide structure in the shape of two long strips.

[0105] In some embodiments, the first RF electrode 450a is located on a side of the first electrode 4331 away from the second electrode 4332, and the second RF electrode 450b is located on a side of the second electrode 4332 away from the first electrode 4331; the first RF electrode 450a is connected to the first electrode 4331, and the second RF electrode 450b is connected to the second electrode 4332.

[0106] In some embodiments, the RF electrical signal transmitted through the first RF electrode 450a and the second RF electrode 450b is coupled into the InP waveguide 432 through the first electrode 4331 and the second electrode 4332, and the InP waveguide 432 forms a PN junction. Under the action of the electric field formed by the RF electrical signal, the carrier phase of the PN junction changes, causing the refractive index of the light wave transmitted to the InP waveguide 432 through the Si waveguide coupling to change, thereby changing the phase of the light wave and realizing modulation of the light wave.

[0107] like Fig.14As shown, a Si waveguide layer 4603 is disposed below the other end of the InP waveguide 432, and the Si waveguide layer 4603 includes a strip-shaped Si waveguide. The Si waveguide in the Si waveguide layer 4603 includes a light output Si waveguide, and the light output Si waveguide extends from the lower direction of the other end of the InP waveguide 432 away from the InP waveguide 432. The light wave modulated by the InP waveguide 432 is coupled into the Si waveguide of the Si waveguide layer 4603 to be transmitted through the Si waveguide.

[0108] In some embodiments, the cross-section of the light output Si waveguide in the Si waveguide layer 4603 is a "convex" structure, that is, the size of the top of the light output Si waveguide is smaller than the size of the bottom of the light output Si waveguide, which facilitates coupling the light modulated by the InP waveguide 432 into the light output Si waveguide.

[0109] In some embodiments of the present application, when preparing a hybrid InP / Si optical chip, a Si platform 460 is prepared, and a groove is formed on the Si platform 460; an InP material including an n-InP layer 4321, a first i-InP layer 4322, a quantum hydrazine layer 4323, a second i-InP layer 4324 and a p-InP layer 4325 is arranged in the groove, and the InP material is processed to form an InP waveguide 432; SiO2 material is filled around the InP waveguide 432, so that a continuous SiO2 layer 4604 is wrapped around the InP waveguide 432; a coupling electrode 433 is formed on the top of the InP waveguide 432, and a first RF electrode 450a and a second RF electrode 450b are formed on the SiO2 layer 4604.

[0110] Fig.15 FIG. 1 is an equivalent circuit diagram of a hybrid InP / Si optical chip provided according to some embodiments of the present disclosure. Fig.15 As shown, each pair of coupling electrodes 433 and the InP waveguide 432 thereunder form a pair of diodes with cathodes facing each other. In some embodiments, the cathodes of the diode pair are connected to a bias voltage.

[0111] like Fig.15 As shown, in the hybrid InP / Si optical chip provided by the embodiment of the present disclosure, no structures such as pads are provided in the InP region 431, so that there is a relatively sufficient distance between the structures such as pads and the InP waveguide 432. The RF electrical signal is input to the InP waveguide 432 by coupling with the RF traveling waveguide 450, which can effectively avoid the stress generated by the bonding pad from affecting the InP waveguide 432 in the InP region 431, thereby enabling the use of InP materials in the Si platform, thereby improving the modulation rate and reliability of the phase modulator. Moreover, in the hybrid InP / Si optical chip, in the InP phase modulator formed by the InP material, a traveling waveguide with a T-guide structure is used for high-speed and efficient modulation of phase and impedance matching.

[0112] Fig.16 A schematic diagram of a hybrid InP / Si optical chip assembly according to some embodiments of the present disclosure Figure 1 , Fig.17 A schematic diagram of a hybrid InP / Si optical chip assembly according to some embodiments of the present disclosure Figure 2 , Fig.16 and Fig.17 The figure shows the appearance structure of a hybrid InP / Si optical chip component. Fig.16 and Fig.17 As shown, the hybrid InP / Si optical chip assembly 700 includes a substrate 710, a driver 720 and a hybrid InP / Si optical chip 730 are arranged above the substrate 710, and the side of the hybrid InP / Si optical chip 730 is connected to the optical fiber assembly 740. The driver 720 and the hybrid InP / Si optical chip 730 are respectively connected to the substrate 710 by welding, and the driver 720 is electrically connected to the hybrid InP / Si optical chip 730 through the high-frequency transmission line on the substrate 710; the hybrid InP / Si optical chip 730 is the hybrid InP / Si optical chip provided in the above embodiment, and InP material is arranged inside the Si platform to form an InP phase modulator. Exemplarily, the driver 720 and the hybrid InP / Si optical chip 730 are respectively connected to the substrate through solder balls, and one end of the high-frequency transmission line on the substrate 710 is connected to the driver 720, and the other end is connected to the RF pad on the hybrid InP / Si optical chip.

[0113] In the hybrid InP / Si optical chip assembly provided in the embodiment of the present disclosure, the bonding and termination of the hybrid InP / Si optical chip are both outside the InP phase modulator, which helps to reduce the impact of mechanical stress and thermal stress on the InP phase modulator; the optical fiber assembly 740 is also outside the InP phase modulator, eliminating the stress generated by connecting the optical fiber assembly 740, thereby reducing the impact of connecting the optical fiber assembly 740 on the InP phase modulator. The hybrid InP / Si optical chip assembly can be used in an optical module.

[0114] In some embodiments, other devices made of InP materials, such as lasers, semiconductor optical amplifiers (SOA), etc., may also be provided in the hybrid InP / Si optical chip assembly. Lasers, SOA, etc. made of InP materials may be integrated into the InP region where the InP phase modulator is located or the InP region outside the InP phase modulator integrated in the Si platform. The specific settings may refer to the settings of the InP phase modulator in the Si platform, which helps to reduce the influence of thermal stress and mechanical stress on the corresponding InP region, and facilitates the integration of lasers, SOA, etc. made of InP materials into the platform.

[0115] Based on the hybrid InP / Si optical chip provided in the embodiment of the present disclosure, a method for preparing the hybrid InP / Si optical chip is also provided in the embodiment of the present disclosure. The method for preparing the hybrid InP / Si optical chip provided in the embodiment of the present disclosure is used to facilitate the preparation of the hybrid InP / Si optical chip provided in the above embodiment. Fig.18 The following is a schematic flow chart of a method for preparing a hybrid InP / Si optical chip according to some embodiments of the present disclosure. Fig.18 The cross-sectional structure of the hybrid InP / Si optical chip is shown in each step. Fig.18 As shown, a method for preparing a hybrid InP / Si optical chip provided in an embodiment of the present disclosure includes:

[0116] S100: forming a first substrate, wherein the first substrate comprises a substrate layer and a BOX layer, wherein the BOX layer is located above the substrate layer.

[0117] The substrate layer 4601 is epitaxially grown, and the BOX layer 4602 is grown on the substrate layer 4601. The substrate layer 4601 is epitaxially grown using Si material, and the BOX layer 4602 is epitaxially grown using SiO2 material.

[0118] S200: forming a Si waveguide layer above the BOX layer, and etching the Si waveguide layer to form an input Si waveguide and an output Si waveguide, wherein a gap is provided between the input Si waveguide and the output Si waveguide.

[0119] A Si waveguide layer 4603 is epitaxially grown on the BOX layer 4602, a Si waveguide pattern is formed on the Si waveguide layer 4603 through masking, and an input Si waveguide and an output Si waveguide are formed by etching. There is a gap between the input Si waveguide and the output Si waveguide, and the InP waveguide 432 is arranged above the gap. The input Si waveguide is used to input light to transmit the light to the InP waveguide 432; the output Si waveguide is used to output light to transmit the light output by the InP waveguide 432.

[0120] In some embodiments, the cross-section of the input Si waveguide and the output Si waveguide is a "convex" structure, where the size of the top is smaller than that of the bottom, and can be formed by secondary etching.

[0121] S300: forming a first SiO2 layer around the etched Si waveguide layer, wherein the first SiO2 layer fills the etched region in the Si waveguide layer.

[0122] The first SiO2 layer 4604a is epitaxially grown so that the first SiO2 layer 4604a wraps around the side of the Si waveguide layer 4603 and the top of the Si waveguide layer 4603 is exposed.

[0123] S400: Disposing an InP bare chip above the first SiO2 layer, the InP bare chip including, from bottom to top, an n-InP layer, a first i-InP layer, a quantum hydrazine layer, a second i-InP layer, a p-InP layer and a second substrate.

[0124] The InP die 432a is disposed on the first SiO2 layer 4604a, the InP die covers the space between the input Si waveguide and the output Si waveguide, and the ends of the input Si waveguide and the output Si waveguide are located below the ends of the InP die 432a.

[0125] The InP die 432a includes a second substrate 4320, on which a p-InP layer 4325, a second i-InP layer 4324, a quantum hydrazine layer 4323, a first i-InP layer 4322 and an n-InP layer 4321 are sequentially arranged. The InP die 432a is inverted on the first SiO2 layer 4604a, so that the n-InP layer contacts the top surface of the first SiO2 layer 4604a.

[0126] In some embodiments, the InP die 432 a may be formed by sequentially growing a p-InP layer 4325 , a second i-InP layer 4324 , a quantum dot layer 4323 , a first i-InP layer 4322 , and an n-InP layer 4321 on a second substrate 4320 .

[0127] S500: Etching the InP bare chip to form an InP waveguide, the bottom of the InP waveguide forms a first n-InP protrusion and a second n-InP protrusion on the top of the n-InP layer, a gap is formed between the first n-InP protrusion and the second n-InP protrusion, and the top of the first n-InP protrusion and the top of the second n-InP protrusion respectively support the first i-InP layer, the quantum hydrazine layer, the second i-InP layer and the p-InP layer.

[0128] The second substrate 4320 is first etched away, and then etched to form the shape of the InP waveguide 432. In some embodiments, the InP bare chip 432a can be etched to form one InP waveguide 432, or can be etched to form multiple InP waveguides 432. When the InP bare chip 432a is etched to form one InP waveguide 432, the etching depth reaches the n-InP layer 4321, but does not reach the first SiO2 layer 4604a, so that the n-InP layer 4321 forms a first n-InP protrusion 4321a and a second n-InP protrusion 4321b, and there is a gap between the first n-InP protrusion 4321a and the second n-InP protrusion 4321b. The first i-InP layer 4322, quantum hydrazine layer 4323, second i-InP layer 4324 and p-InP layer 4325 above the spacer are etched away to etch a groove on the InP bare chip 432a that reaches the n-InP layer 4321. The first i-InP layer 4322, quantum hydrazine layer 4323, second i-InP layer 4324 and p-InP layer 4325 above the side of the first n-InP protrusion 4321a and above the side of the second n-InP protrusion 4321b away from the spacer are also etched away, leaving only the first i-InP layer 4322, quantum hydrazine layer 4323, second i-InP layer 4324 and p-InP layer 4325 supported above the first n-InP protrusion 4321a and above the second n-InP protrusion 4321b. When etching the InP bare chip 432 a to form a plurality of InP waveguides 432 , the etching is performed to the first SiO 2 layer 4604 a between adjacent InP waveguides 432 , so that adjacent InP waveguides 432 are not connected.

[0129] S600: forming a second SiO2 layer on the side of the InP waveguide, the first SiO2 layer and the second SiO2 layer forming a SiO2 layer.

[0130] The second SiO2 layer 4604b is epitaxially grown so that the second SiO2 layer 4604b is included on the side of the InP waveguide 432 and fills above the first n-InP protrusion 4321a and inside the second n-InP protrusion 4321b. The first SiO2 layer 4604a and the second SiO2 layer 4604b are adjacent to form a SiO2 layer 4604 so that the SiO2 layer 4604 wraps around the InP waveguide 432 from below and on the side.

[0131] The top surface of the second SiO 2 layer 4604 b is flush with the top surface of the p-InP layer 4325 .

[0132] In some embodiments, before forming the second SiO2 layer, the p-InP layer 4325 is further etched to make the size of the top of the p-InP layer 4325 larger than the size of the bottom of the p-InP layer 4325. Exemplarily, inclined surfaces are formed on both sides of the p-InP layer 4325.

[0133] S700: forming a radio frequency pad, a DC bias pad, a radio frequency traveling waveguide and an electrode on the top of the second SiO2 layer; wherein: the radio frequency pad is located on the side of one end of the InP waveguide, the radio frequency traveling waveguide is located on the side of the top edge of the InP waveguide, and one end of the radio frequency traveling waveguide is electrically connected to the radio frequency pad; the DC bias pad is located on the side of the other end of the InP waveguide, and the DC bias pad is electrically connected to the InP waveguide; the coupling electrode is located above the InP waveguide, and the coupling electrode is electrically connected to the radio frequency traveling waveguide.

[0134] The RF pad 440 , DC bias pad 461 , RF traveling waveguide 450 and coupling electrode 433 on the top of the second SiO2 layer 4604 are formed by electroplating. The coupling electrode 433 is located above the p-InP layer 4325 , and the RF traveling waveguide 450 is located on the side above the p-InP layer 4325 .

[0135] In some embodiments, a first resistor 464, a second resistor 465, a capacitor 466 and a terminal pad 463 are further formed on the top of the second SiO2 layer 4604. The first resistor 464, the second resistor 465, the capacitor 466 and the terminal pad 463 can be formed by electroplating.

[0136] The specific form of the hybrid InP / Si optical chip prepared by the method for preparing the hybrid InP / Si optical chip provided in the embodiment of the present disclosure can refer to the structure of the hybrid InP / Si optical chip provided in the above embodiment of the present disclosure.

[0137] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any changes or substitutions that can be thought of by any person skilled in the art within the technical scope disclosed in the present disclosure should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. An optical module, characterized in that: include: Circuit boards; A hybrid InP / Si optical chip, electrically connected to the circuit board, for modulating and generating an optical signal; Among them, the hybrid InP / Si optical chip includes: A Si platform, an InP region is formed inside, and the top of the InP region has no pad; a radio frequency pad and a DC bias pad are arranged on the top of the Si platform, the radio frequency pad is located on one side of the InP region, and the DC bias pad is located on the other side of the InP region; An InP phase modulator is located in the InP region; the InP phase modulator comprises an InP waveguide and a coupling electrode, the coupling electrode is arranged above the InP waveguide, and the InP waveguide is electrically connected to a DC bias pad; A radio frequency traveling waveguide has one end connected to the radio frequency pad, extends over the InP waveguide and extends to the other side of the InP region; the radio frequency traveling waveguide is electrically connected to the coupling electrode.

2. The optical module according to claim 1, characterized in that: The RF pad includes a first RF pad and a second RF pad, and the RF traveling waveguide includes a first RF electrode and a second RF electrode; one end of the first RF electrode is connected to the first RF pad, and one end of the second RF electrode is connected to the second RF pad; The middle of the first RF electrode is located above one edge of the InP waveguide, the middle of the second RF electrode is located above the other edge of the InP waveguide, and the first RF electrode and the second RF electrode correspond to electrodes connected to the top of the InP waveguide respectively.

3. The optical module according to claim 2, characterized in that: The first RF electrode includes a first connecting section, a parallel section, and a second connecting section, wherein the parallel section is located above one edge of the InP waveguide; one end of the first connecting section is connected to the first RF pad, the other end of the first connecting section is connected to one end of the parallel section, the other end of the parallel section is connected to one end of the second connecting section, and the other end of the second connecting section is located outside the InP region; the first connecting section is used for transition connection from the first RF pad to the parallel section, and the second connecting section is used for transition connection from the parallel section to the end of the first RF electrode.

4. The optical module according to claim 1, characterized in that: The InP waveguide includes an n-InP layer, the n-InP layer includes a first n-InP protrusion and a second n-InP protrusion, and a gap is formed between the first n-InP protrusion and the second n-InP protrusion; A first i-InP layer, a quantum hydrazine layer, a second i-InP layer and a p-InP layer are respectively arranged on the top of the first n-InP protrusion and the second n-InP protrusion in sequence; the coupling electrode includes a first electrode and a second electrode; the first electrode is arranged on the p-InP layer above the first n-InP protrusion, and the second electrode is arranged on the p-InP layer above the second n-InP protrusion.

5. The optical module according to claim 3, characterized in that: The first connecting section includes a first connecting area, a first transition area, a second connecting area, and a second transition area; One end of the first connection region is connected to the first RF pad, the other end of the first connection region is connected to one end of the first transition region, the other end of the first transition region is connected to one end of the second connection region, the other end of the second connection region is connected to one end of the second transition region, and the other end of the second transition region is connected to one end of the parallel section; The first connection zone is located outside the InP region, one end of the first transition zone is located outside the InP region and the other end is located within the InP region, and the second connection zone and the second transition zone are located outside the InP region; the width of one end of the first transition zone is greater than the width of the other end of the first transition zone, and the width of one end of the second transition zone is greater than the width of the other end of the second transition zone.

6. The optical module according to claim 3, characterized in that: The second connecting section includes a third transition zone, a third connecting zone and a fourth transition zone; One end of the third transition zone is connected to the other end of the parallel section, the other end of the third transition zone is connected to one end of the third connection zone, the other end of the third connection zone is connected to one end of the fourth transition zone, and the other end of the fourth transition zone is connected to the end of the first RF electrode; The third transition zone and the third connection zone are located in the InP region, one end of the fourth transition zone is located in the InP region and the other end is located outside the InP region; the width of one end of the third transition zone is smaller than the width of the other end of the third transition zone, and the width of one end of the fourth transition zone is smaller than the width of the other end of the fourth transition zone.

7. The optical module according to claim 2, characterized in that: The hybrid InP / Si optical chip further includes a first resistor, a second resistor, a capacitor and an end pad located outside the InP region; One end of the first resistor is electrically connected to the other end of the first RF electrode, and the other end of the first resistor is electrically connected to the terminal pad; one end of the second resistor is electrically connected to the second RF electrode, and the other end of the second resistor is electrically connected to the terminal pad; one end of the capacitor is connected between the other end of the first resistor and the other end of the second resistor, and the other end of the capacitor is grounded.

8. The optical module according to claim 2, characterized in that: A Si waveguide is arranged in the Si platform, and the Si waveguide includes a light input Si waveguide and a light output Si waveguide; One end of the light input Si waveguide is located outside the InP region and extends below the InP waveguide, and the other end of the light input Si waveguide is located below one end of the InP waveguide, so that the light input Si waveguide couples unmodulated light to the InP waveguide; One end of the light output Si waveguide is located below the other end of the InP waveguide and extends in a direction away from the InP waveguide, so that the light modulated by the InP waveguide is coupled to the light output Si waveguide and output through the light output Si waveguide.

9. An optical module, characterized in that: include: Circuit boards; a light source, electrically connected to the circuit board, and configured to emit light that does not carry a signal; a hybrid InP / Si optical chip, electrically connected to the circuit board, for modulating light that does not carry a signal to generate an optical signal; The hybrid InP / Si optical chip includes a Si platform; InP material is arranged in the Si platform, and the InP material forms an InP waveguide; a radio frequency pad, a DC bias pad, a radio frequency traveling waveguide and a coupling electrode are arranged on the top of the Si platform; the coupling electrode is located above the InP material, the middle of the radio frequency traveling waveguide is located at the edge of the top of the InP waveguide, and the coupling electrode is electrically connected to the radio frequency traveling waveguide; the radio frequency pad and the DC bias pad are located outside the InP waveguide and away from the top of the InP waveguide; the radio frequency pad is connected to one end of the radio frequency traveling waveguide, and the DC bias pad is coupled to the InP waveguide.

10. A hybrid InP / Si optical chip assembly, characterized in that: include: A substrate, on which a high frequency transmission line is arranged; A driver, disposed on the substrate and connected to one end of the high-frequency transmission line; A hybrid InP / Si optical chip is disposed on the substrate and connected to the other end of the high-frequency transmission line; Wherein, the hybrid InP / Si optical chip comprises: A Si platform is formed with an InP region, and the top of the InP region has no pad; a radio frequency pad and a DC bias pad are arranged on the top of the Si platform, the radio frequency pad is located on one side of the InP region and connected to the other end of the high-frequency transmission line, and the DC bias pad is located on the other side of the InP region; An InP phase modulator is located in the InP region; the InP phase modulator comprises an InP waveguide and a coupling electrode, the coupling electrode is arranged above the InP waveguide, and the InP waveguide is coupled and connected to a DC bias pad; A radio frequency traveling waveguide has one end connected to the radio frequency pad, extends over the InP waveguide and extends to the other side of the InP region; the radio frequency traveling waveguide is electrically connected to the coupling electrode.

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