Memory control method and device and storage medium

Abstract

The embodiment of the invention provides a memory management and control method and device and a storage medium. Supplementary specifications for ensuring memory bandwidth can be respectively calibrated for various instance specifications in advance. Based on this, according to a specified type of resource instance creation request initiated by a user, an instance specification corresponding to a resource instance requested to be created is determined; obtaining a supplementary specification pre-calibrated for the instance specification; searching a target physical host capable of meeting the instance specification and the supplementary specification; and controlling the target physical host to create a resource instance according to the instance specification and the supplementary specification, and performing memory bandwidth isolation on the resource instance. Therefore, sufficient memory bandwidth can be preferentially isolated for part of resource instances, and the isolated memory bandwidth is fully utilized, so that the resource instances can obtain higher memory access efficiency, and the bottleneck of memory access performance is broken through. And particularly, the memory access performance of various applications sensitive to memory bandwidth can be improved.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a memory control method, device and storage medium. Background Art

[0002] Different high performance computing (HPC) applications have different requirements for the host computer that performs the calculations. Some HPC applications have high requirements for the host's operating frequency, such as the ls-dyna application; some HPC applications have high requirements for memory performance; and some HPC applications have high requirements for network latency.

[0003] At present, for HPC applications with high requirements for memory performance, more memory capacity is usually allocated to them in the hope of improving their memory access performance. However, this method of stacking memory capacity for HPC applications has a bottleneck, that is, for some HPC applications, after the stacked memory capacity reaches a certain amount, even if more memory is stacked, the memory access performance of the HPC application cannot be improved. Summary of the invention

[0004] Multiple aspects of the present application provide a memory management method, device and storage medium to improve the memory access performance of an application.

[0005] The present application provides a memory management method, which is applicable to a management node. The method includes:

[0006] Upon receiving a request to create a resource instance of a specified type, determining an instance specification corresponding to the resource instance requested to be created;

[0007] Obtaining a supplementary specification pre-calibrated for the instance specification for guaranteeing memory bandwidth;

[0008] Find a target physical host that meets the instance specification and the supplementary specification;

[0009] The target physical host is controlled to create a resource instance according to the instance specification and the supplementary specification and perform memory bandwidth isolation for the resource instance.

[0010] The present application also provides a memory management method applicable to a physical host, the method comprising:

[0011] Receive a resource instance creation instruction sent by a control node, the resource instance creation instruction including the instance specifications corresponding to the resource instance to be created and the supplementary specifications for ensuring memory bandwidth;

[0012] Invoke the required processor cores and isolate the required memory bandwidth according to the supplemental specification;

[0013] Invoke other required physical resources except the processor core according to the instance specifications;

[0014] A resource instance is created based on the called processor core and other physical resources.

[0015] The embodiment of the present application also provides a physical device, including a memory, a processor, and a communication component;

[0016] The memory is used to store one or more computer instructions;

[0017] The processor is coupled to the memory and the communication component, and is used to execute the one or more computer instructions to execute the aforementioned memory management method.

[0018] An embodiment of the present application also provides a computer-readable storage medium storing computer instructions. When the computer instructions are executed by one or more processors, the one or more processors are caused to execute the aforementioned memory management method.

[0019] In an embodiment of the present application, in this embodiment, supplementary specifications for guaranteeing memory bandwidth can be pre-calibrated for various instance specifications. Based on this, users can be supported to initiate resource instance creation requests of specified types to trigger the memory management and control scheme provided in the embodiment. For this type of special resource instance creation request, the instance specification corresponding to the resource instance requested to be created can be determined; the supplementary specifications pre-calibrated for the instance specification can be obtained; and the target physical host that can meet the instance specification and the supplementary specification can be found; and the target physical host can be controlled to create a resource instance according to the instance specification and the supplementary specification, and memory bandwidth can be isolated for the resource instance. In this way, it can support the priority isolation of sufficient memory bandwidth for some resource instances, and make full use of the isolated memory bandwidth, so that these resource instances can obtain higher memory access efficiency and break through the bottleneck of memory access performance. In particular, the memory access performance of various applications that are sensitive to memory bandwidth can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0021] Figure 1 A logical schematic diagram of a memory management method provided for an exemplary embodiment of the present application;

[0022] Figure 2 A flowchart of a memory management method provided for an exemplary embodiment of the present application;

[0023] Figure 3A logical diagram of an optional implementation of a memory management and control method provided for an exemplary embodiment of the present application;

[0024] Figure 4 A flowchart of an implementation method for calibrating processor core usage rules and required memory bandwidth for instance specifications provided by an exemplary embodiment of the present application;

[0025] Figure 5 A flowchart of another memory management method provided for an exemplary embodiment of the present application;

[0026] Figure 6 A flowchart of a memory management method provided for another exemplary embodiment of the present application;

[0027] Figure 7 A structural schematic diagram of a physical device provided for yet another exemplary embodiment of the present application. DETAILED DESCRIPTION

[0028] In order to make the purpose, technical solution and advantages of the present application clearer, the technical solution of the present application will be clearly and completely described below in combination with the specific embodiments of the present application and the corresponding drawings. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application.

[0029] Before describing in detail the technical solutions provided by the embodiments of the present application, several technical concepts involved in the present application are briefly explained as follows.

[0030] High Performance Computing (HPC) refers to computing technology that provides higher computing power than traditional computers and servers. HPC places special emphasis on using distributed resources to combine storage, applications, computing power, and network resources to complete tasks that cannot be completed by other means. HPC can usually process TB, PB, or even ZB-level data and can process it in near real time, such as getting results in minutes or hours instead of days or weeks.

[0031] HPC applications can be understood as applications that run using HPC technology. HPC applications are usually heavy-load applications that put a lot of pressure on computing resources, and many HPC applications require multi-node parallel computing.

[0032] Resource instances can refer to computing units built for applications. Multiple resource instances can be configured under one application, and each resource instance can contain basic computing components such as processor cores, memory, operating system, network, and disk. Common resource instances include virtual machines or containers.

[0033] Instance specifications can be understood as the specifications of resource instances, including the specifications of various computing components such as processor cores, memory, and network allocated to resource instances. For example, the specifications of a virtual machine can be 2 CPU cores, 2G memory, and 500M / S network bandwidth.

[0034] Memory bandwidth, also known as memory transfer rate, is used to measure the ability of a processor core or its combination to move data from memory during the reading and writing process of the memory. It is often also called the transfer rate or data recovery rate.

[0035] The technical solutions provided by various embodiments of the present application are described in detail below in conjunction with the accompanying drawings.

[0036] Figure 1 A logical diagram of a memory management method provided by an exemplary embodiment of the present application. Figure 1 The memory control method of this embodiment can be implemented by the cooperation of the control node and the physical host. The control node can be an existing node used to control the physical host and resource instances. This embodiment can transform the existing node so that it can execute the memory control method provided by this embodiment.

[0037] The physical host in this embodiment can be a physical machine or a bare metal server. Among them, a bare metal server refers to a physical server without a pre-installed operating system and virtualization software. A bare metal server is similar to a dedicated physical server on the cloud. It has the flexibility and elasticity of a virtual machine and the performance advantages of a physical machine. It can achieve super-strong and super-stable computing capabilities, which is conducive to solving users' strong demand for high-performance computing. Bare metal servers have the characteristics and advantages of physical machines, and have the characteristics of high-performance computing capabilities and secure physical isolation. However, bare metal servers are not traditional physical machines. They are new computing server products built based on virtualization technology, which retain the elastic experience of ordinary cloud servers and the performance and characteristics of physical machines. The difference between bare metal servers and physical machines will not be introduced in more depth, and you can refer to existing public information for cognition. It should be understood that in this embodiment, both bare metal servers and physical machines can support the creation of resource instances, but the instance types of resource instances created on bare metal servers and physical machines may be different, which is related to the instantiation technology used on bare metal servers and physical machines. Exemplarily, the resource instances in this embodiment may include virtual machines or containers, etc. Of course, the instance types supported in this embodiment are not limited to these and are not exhaustively listed here.

[0038] As introduced in the background technology, many applications, especially HPC applications, currently have high requirements for memory access performance. In the prior art, physical resources are usually allocated to resource instances by virtual machine managers (VMMs), and the main focus of the allocation process is the quality of computing power delivery of resource instances, that is, processor cores that meet computing power requirements will be allocated to resource instances, while memory allocation is only the memory capacity required to deliver resource instances, but memory access capabilities are not involved.

[0039] In response to the memory enhancement requirements raised by users, we currently only allocate more memory capacity to the resource instances specified by users based on the memory capacity allocated to the original resource instances, in the hope of enhancing the memory access performance of the resource instances. However, for some HPC applications, such as the fluid mechanics simulation application fluent and the continuous medium mechanics simulation application star-ccm, the requirements for memory capacity are not high, and even if more memory capacity is allocated to them, the memory access performance of their resource instances will not be improved.

[0040] During the research process, the inventors found that such applications that cannot improve memory access performance by stacking memory capacity usually have relatively high requirements for memory bandwidth, that is, such applications need to access memory data as efficiently as possible within a unit of time.

[0041] To this end, this embodiment proposes an inventive concept for optimizing memory bandwidth for resource instances under such applications, so as to break through the memory access performance bottleneck of such applications.

[0042] The following will describe in detail the memory management method provided in this embodiment from the perspectives of the management node and the physical host.

[0043] Figure 2 A flowchart of a memory management method provided for an exemplary embodiment of the present application. Figure 2 The memory control method shown is applicable to a control node, and the method can be executed by a control device, which can be implemented as software, hardware, or a combination of software and hardware, and the control device can be integrated in the aforementioned control node. Figure 2 , the method may include:

[0044] Step 200: upon receiving a resource instance creation request of a specified type, determining an instance specification corresponding to the resource instance requested to be created;

[0045] Step 201: Obtain a supplementary specification that is pre-calibrated for an instance specification and is used to ensure memory bandwidth;

[0046] Step 202: Find a target physical host that meets the instance specification and the supplementary specification;

[0047] Step 203: Control the target physical host to create a resource instance according to the instance specification and the supplementary specification and perform memory bandwidth isolation for the resource instance.

[0048] refer to Figure 1 In this embodiment, users can be supported to initiate resource instance creation requests of specified types. Among them, the resource instance creation request of specified types indicates that the user expects to enhance the memory bandwidth of the resource instance requested to be created. In this embodiment, by agreeing on the request type, the user can initiate a resource instance creation request of specified types when the memory bandwidth is expected to be enhanced. In actual applications, the management and control node can provide a console to the user, and the user can perform request type selection and other configuration operations in the user interface of the console to generate a resource instance creation request. It should be understood that the user usually initiates a request in units of applications. For applications that expect to enhance memory bandwidth, the user can configure multiple resource instance creation requests for the application in the console to request to create multiple resource instances for the application, and in multiple resource instance creation requests, the user can select the request type separately. For ease of description, the memory management solution will be described from the perspective of a single resource instance creation request in this embodiment. Among them, the user can select different request types for different resource instance creation requests under the same application, and the disposal solution for resource instance creation requests of specified types will be mainly described in this embodiment.

[0049] refer to Figure 2 In step 200, the management and control node may receive a resource instance creation request of a specified type initiated by a user, and parse out the instance specifications corresponding to the resource instance requested to be created. Among them, the instance specifications may be configured by the user in the resource instance creation request by performing configuration operations in the user interface of the control platform mentioned above. The instance specifications here may include the specifications of various computing components such as processor cores, memory, network, etc. required for the resource instance. It should be understood that the instance specifications usually specify the occupancy of each type of resource, such as how many processor cores are required, how much memory capacity is occupied, etc.

[0050] Furthermore, in this embodiment, the field can also be subdivided, and the user can configure the field identifier to the resource instance creation request by performing a configuration operation in the user interface of the control platform mentioned above. In this way, in step 200, the target field corresponding to the target application targeted by the resource instance creation request can be determined; among the various instance specifications contained under the target field, the instance specification corresponding to the resource instance requested to be created by the resource instance creation request is searched. By carrying the field identifier, a more accurate query basis can be provided for the subsequent step 201. Among them, the field in this embodiment refers to the application field, for example, the field of mechanical simulation, the financial field, or the e-commerce field. The demand for memory bandwidth for the same instance specification in different fields may be different. For this reason, in this embodiment, it is proposed to subdivide the instance specifications from the field level.

[0051] In this embodiment, supplementary specifications for guaranteeing memory bandwidth are pre-calibrated for various instance specifications. Compared with traditional instance specifications, the supplementary specifications in this embodiment can supplement the restrictions on the resources required to be occupied by resource instances from the perspective of resource occupation methods. In this embodiment, the supplementary specifications may include processor core usage rules and the required memory bandwidth. Among them, the memory bandwidth calibrated for the instance specification can meet the requirements of the corresponding resource instance for the sensitivity of memory bandwidth. Therefore, the memory bandwidth calibrated for the instance specification will usually exceed the memory bandwidth that can be provided to the corresponding resource instance under the traditional resource instance creation method. The calibrated processor core usage rules can ensure in terms of physical performance that the processor core used by the resource instance is capable of occupying the calibrated memory bandwidth.

[0052] The processor core usage rules in this embodiment are used to describe which processor cores should be occupied to create a resource instance. The processor core usage rules may include but are not limited to the number of processor cores used, the structural position of each processor core used in the memory organization structure, or the memory access method used by each processor core used. Among them, the memory organization structure may include at least one layer of memory group, and the memory access method includes intra-group access or cross-group access. As mentioned above, the instance specification usually only limits the number of processor cores required, but does not limit which processor cores should be occupied to meet this number. The processor core usage rules in this embodiment additionally limit which processor cores are used to meet the number of processor cores specified in the instance specification.

[0053] Figure 3 A logical diagram of an optional implementation of a memory management method provided by an exemplary embodiment of the present application. Figure 3Optionally, the memory organization architecture in the physical host in this embodiment can be CPU socket (CPU slot)-core chiplet CCD (Core Chiplet Die)-processor module unit CCX (CPU Complex)-processor core. Among them, CPU socket, CCD and CCX correspond to memory groups respectively, and there is a hierarchical relationship between the three. Usually, a physical host may contain multiple CPU sockets, a CPU socket may contain multiple CCDs, a CDD may contain multiple CCXs, and a CCX may contain multiple processor cores. In addition to processor resources, the memory group must also contain memory resources. Moreover, in addition to defining the above-mentioned memory organization structure from a hardware-oriented perspective, the memory organization architecture can also be further optimized through NUMA (Non Uniform Memory Access) technology. Among them, NUMA nodes can also be used as a layer of memory groups. Based on the memory organization architecture, the access efficiency of the processor core is higher when accessing the memory in the same group, that is, the access efficiency can be higher in the intra-group access mode; the access efficiency of the processor core when accessing the memory in a different group will be lower than the access efficiency in the intra-group access mode, that is, the cross-group access mode can only obtain lower access efficiency. It is worth noting that the access efficiency here is affected by many factors such as memory bandwidth, access path length, and the read and write capabilities of the processor core.

[0054] refer to Figure 3 Several exemplary processor core usage rules may be:

[0055] Use 8 CCDs in the same socket, each CCD provides 8 processor cores, a total of 64 processor cores, all 64 processor cores use intra-group access mode;

[0056] Use 4 CCXs in the same socket, each CCX provides 8 processor cores, a total of 32 processor cores, of which the processor cores in two CCXs use the intra-group access method, and the processor cores in the other two CCXs use the cross-group access method (for this example, please refer to Figure 3 Virtual machine 2);

[0057] Use two sockets, each with 2 CCXs, each CCX provides 8 processor cores, a total of 32 processor cores, all 32 processor cores use intra-group access (for this example, refer to Figure 3 Virtual machine 1).

[0058] It should be understood that the above-mentioned processor core usage rules are merely exemplary and the present embodiment is not limited thereto.

[0059] The implementation method of pre-calibrating the supplementary specifications for various instance specifications will be described in detail later, and will not be explained in detail here. It should be understood that the implementation method of the pre-calibration link is not limited in this embodiment, and any implementation method that can ensure the rationality of the calibration can be used in this embodiment. In addition, the specification items included in the supplementary specifications in this embodiment are not limited to the processor core usage rules and the required memory bandwidth. The supplementary specifications may also include other specification items that can be used to guarantee the memory bandwidth. No more examples are given here.

[0060] Based on this, reference Figure 2 In step 201 , a supplementary specification pre-calibrated for the instance specification determined in step 200 may be obtained.

[0061] Following the further optimization scheme proposed in step 200 above, if the target domain selected by the user is also parsed in step 200, the supplementary specifications calibrated for the instance specifications under the target domain can be obtained in step 201. Among them, the same instance specifications may exist in different domains, and the supplementary specifications calibrated for the same instance specifications in different scenario domains may not be exactly the same. This is because the memory access requirements of resource instances of the same specifications in different domains may not be exactly the same. In this way, by introducing the domain, a more suitable supplementary specification can be found for the resource instance requested to be created by the user.

[0062] Of course, it should be understood that the field segmentation may not be performed in this embodiment, and it will not affect the solution of the technical problems in this embodiment.

[0063] Continue to refer Figure 2 In step 202, a target physical host that meets the instance specifications determined in step 200 and the supplementary specifications determined in step 201 can be searched. As mentioned above, the control node in this embodiment can be used to manage resource instances and physical hosts, so that the control node has a perception perspective of the resource status on all physical hosts. In actual applications, the control node can autonomously record the resource status on each physical host. Of course, each physical host can also actively report its own resource status to the control node. Based on this, in step 202, the control node can select a target physical host that is capable of responding to the resource instance creation request in step 200 from the physical hosts it controls.

[0064] Since the resource instance creation request has a guaranteed requirement for memory bandwidth, in step 202, the management and control node will select a physical host that can meet the required instance specifications and the required supplementary specifications as the target physical host.

[0065] Still taking the example of the processor core usage rules and the required memory bandwidth included in the supplementary specification, in an exemplary search scheme:

[0066] A physical host whose remaining resources meet the required instance specifications, whose unoccupied processor cores meet the processor core usage rules, and whose non-isolated memory bandwidth is greater than or equal to the memory bandwidth may be searched as a candidate physical host;

[0067] Determine the upper limit of memory bandwidth supported by the candidate physical host under the processor core usage rule;

[0068] From the candidate physical hosts, a physical host whose supported memory bandwidth upper limit is greater than or equal to the memory bandwidth is selected as the target physical host.

[0069] In this exemplary search scheme, the physical host is evaluated from two aspects: processor core usage rules and memory bandwidth. Among them, the unoccupied processor cores can meet the processor core usage rules, which means that the number of unoccupied processor cores and the memory group to which they belong can meet the processor core usage rules. For example, if the current processor core usage rule is "use two sockets, each socket has 2 CCXs, each CCX provides 8 processor cores, a total of 32 processor cores, and all 32 processor cores use the intra-group access method", although there are currently 32 unoccupied processor cores on physical host A, these 32 unoccupied processor cores are all in the same socket. In this case, physical host A will not meet the current processor core usage rules.

[0070] In addition, in this exemplary search scheme, it is also evaluated whether each candidate physical host can support the currently required memory bandwidth in terms of physical performance. Here, it is mainly evaluated whether the candidate physical host can achieve the currently required memory bandwidth in terms of physical performance when performing memory access according to the current processor core usage rules. The reason for this evaluation link is that the physical performance of different physical hosts may be different. When performing memory access according to the same processor core usage rules, some physical hosts may not be able to support the current memory bandwidth. This is mainly because the upper limit of the memory bandwidth that can be achieved in terms of physical performance will be affected by multiple physical levels such as bus bandwidth, bus frequency, and number of channels, and different physical hosts have different capabilities at these physical levels.

[0071] Furthermore, in this exemplary search solution, a physical host memory access performance database may be pre-built, and the memory bandwidth upper limit supported by the candidate physical host under the processor core usage rule may be queried from the pre-built physical host memory access performance database. The physical host memory access performance database may record the memory bandwidth upper limit supported by the physical host under various processor core usage rules.

[0072] The following is an optional construction scheme for the physical host access performance database:

[0073] Under various specified host types, select the physical host to be tested;

[0074] Set various processor core usage rules on a single physical host to be tested;

[0075] On a single physical host to be tested, test cases are used to measure the upper limit of memory access performance that can be achieved when memory access is performed according to various processor core usage rules. The upper limit of memory access performance includes the upper limit of memory bandwidth.

[0076] The upper limits of memory access performance that can be achieved under various processor core usage rules are recorded under various physical hosts to build a physical host memory access performance database.

[0077] In this optional construction scheme, different host types are tested separately. It should be understood that the physical hosts of the same type have little difference in physical performance and can share the test results. Therefore, in actual applications, one physical host to be tested can be selected under a single host type. Of course, this is not limited here, and multiple physical hosts to be tested can also be selected under a single host type.

[0078] In this optional construction scheme, multiple processor core usage rules can be set under a single physical host to be tested. The processor core usage rules set in this link should try to ensure that they can cover all processor core usage rules pre-calibrated for various instance specifications, thereby ensuring that the relevant memory bandwidth upper limit can be found from the physical host memory access performance database during the execution of step 202 as a basis for evaluating the candidate physical host.

[0079] In this optional construction scheme, test tools such as stream, Memtest or Fio can be used to perform tests separately under a single physical host to be tested according to the various processor core usage rules that are set. The principles of these test tools are not explained in detail here. At present, these test tools are only exemplary, and the test tools that can be used in this optional construction scheme are not limited to this. It should be understood that in this optional construction scheme, these test tools are used to measure the upper limit of the memory access performance that the physical host can achieve in terms of physical performance. The upper limit of memory access performance can at least include the upper limit of memory bandwidth. In addition, it can also include other measurement results such as access delay.

[0080] In this way, in this optional construction scheme, the upper limit of memory bandwidth that can be achieved by each physical host to be tested under the set multiple processor core usage rules can be determined and recorded in the physical host memory access performance database.

[0081] It is worth noting that the above optional construction scheme is exemplary, and other construction schemes can also be used in the exemplary search scheme to construct a physical host memory access performance database, for example, statistics based on empirical data, etc., and it is not limited to the above optional construction scheme.

[0082] In addition, in this embodiment, the search scheme for the target physical host is not limited to this, and other search schemes can be used to implement step 202. For example, a physical host that does not occupy any physical resources can be directly used as a candidate physical host, and the memory access performance of each candidate physical host can be evaluated to see whether it can meet the current processor core usage rules and the required memory bandwidth, and then the target physical host is selected. No further examples are given here.

[0083] In this way, the selected target physical host will meet the required instance specifications and supplementary specifications.

[0084] On this basis, continue to refer to Figure 2 In step 203, the target physical host may be controlled to create a resource instance according to the required instance specifications and supplementary specifications and perform memory bandwidth isolation for the resource instance.

[0085] That is, the control node in this embodiment can dispatch the received resource instance creation request of the specified type to the appropriate physical host based on the aforementioned steps 200-202, and control the hit physical host to respond to the resource instance creation request. Since the control node fully considers the memory bandwidth enhancement requirement revealed in the resource instance creation request in steps 200-201, the hit physical host can fully meet the user's memory bandwidth enhancement requirement for the resource instance.

[0086] In step 203, the management and control node may send a resource instance creation instruction to the target physical host hit in step 202, and carry the instance specifications and supplementary specifications required for the resource instance in the resource instance creation instruction. Of course, the resource instance creation request may also carry other information, such as the life cycle of the instance, which is not enumerated here.

[0087] In this way, the target physical host can respond to the resource instance creation instruction and create a resource instance that meets the user's needs. The processing logic on the physical host side will be described separately in the embodiments below. Based on the resource instance creation instruction sent to the target physical host, the control node in this embodiment can control the target physical host to isolate sufficient memory bandwidth for the resource instance to use, so as to meet the memory bandwidth requirements of the resource instance.

[0088] In summary, in this embodiment, supplementary specifications for guaranteeing memory bandwidth can be pre-calibrated for various instance specifications. Based on this, users can be supported to initiate resource instance creation requests of specified types to trigger the memory management and control scheme provided in the embodiment. For this type of special resource instance creation request, the instance specification corresponding to the resource instance requested to be created can be determined; the supplementary specifications pre-calibrated for the instance specification can be obtained; and the target physical host that can meet the instance specification and the supplementary specification can be found; and the target physical host can be controlled to create a resource instance according to the instance specification and the supplementary specification, and memory bandwidth can be isolated for the resource instance. In this way, it can support the priority isolation of sufficient memory bandwidth for some resource instances, and make full use of the isolated memory bandwidth, so that these resource instances can obtain higher memory access efficiency and break through the bottleneck of memory access performance. In particular, the memory access performance of various applications that are sensitive to memory bandwidth can be improved.

[0089] Figure 4 A flowchart of an implementation method for calibrating supplementary specifications for instance specifications is provided for an exemplary embodiment of the present application. Figure 4 , an optional calibration scheme may include the following steps:

[0090] Step 400: setting multiple candidate processor core usage rules under instance specifications;

[0091] Step 401: Create test instances respectively according to multiple candidate processor core usage rules;

[0092] Step 402: Run each test instance respectively to measure memory access performance data under each test instance, where the memory access performance data includes the occupied memory bandwidth;

[0093] Step 403: Select a target test case whose memory access performance data meets the specified selection criteria from each test instance;

[0094] Step 404: calibrate supplementary specifications for the instance specifications based on the processor core usage rules corresponding to the target test case and the occupied memory bandwidth.

[0095] It should be understood that the above steps 400 to 404 should be performed in Figure 1 The step 201 in the process is executed before the step 201 is completed to ensure that a query basis can be provided for the step 201.

[0096] In addition, following the preferred fields introduced in the previous embodiments, in this embodiment, representative applications can be selected as measurement objects in different fields. There is a need to create resource instances under each representative application, and each resource instance that needs to be created corresponds to an instance specification. This embodiment can perform calibration under various instance specifications. Since the calibration methods under various instance specifications are similar, for ease of description, this embodiment describes the calibration scheme from the perspective of the instance specification corresponding to a resource instance under a representative application.

[0097] refer to Figure 4 In step 400, a variety of candidate processor core usage rules can be set under the instance specifications. It should be understood that each candidate processor core usage rule set in step 400 should comply with the requirements for the number of processor cores in the current instance specifications. In the case where each virtual processing core (VCPU) in the default resource instance needs to occupy a physical processor core exclusively, the number of processor cores occupied in each candidate processor core usage rule should be equal to the number of virtual processing cores to be deployed in the resource instance corresponding to the current instance specification. Under this premise, there may be differences in the structural position of each processor core configured in each candidate processor core usage rule set for the current instance specification in the memory organization structure, as well as the memory access method adopted by each processor core used.

[0098] For example, if 32 VCPUs need to be configured in the resource instance under the current instance specifications, then the 32 processor cores need to be occupied in the usage rules of each candidate processor core set under the current instance specifications. As for the structural position of the 32 processor cores in the memory organization structure and the memory access method used by each, they can be configured as needed.

[0099] On this basis, in step 401, test instances can be created respectively according to a variety of candidate processor core usage rules. The process of creating a test instance here can generally include: initiating a test instance creation request to the physical host according to the current instance specification to be tested and the selected processor core usage rules, so as to control the physical host to create a test instance according to the instance specification and the processor core usage rules. Among them, the test instance is used to test the memory bandwidth that can be occupied under the corresponding processor core usage rules. The test instance here can be established according to the relevant requirements of the aforementioned representative application under the current instance specification. Of course, the processor core used by the established test instance complies with the corresponding candidate processor core usage rules.

[0100] Continuing to refer to step 402, each test instance created in step 401 can be run separately. It should be understood that running the test instance here means running the application function of the aforementioned selected representative application deployed under the current instance specification. For example, when the representative application adopts a fluent application, one or more test instances can be created for the application, and computing tasks can be issued to the application, and these test instances are used to execute the computing tasks, that is, these test instances are used to test the application functions of the representative application in real time.

[0101] In step 402, the memory access performance data of each test instance can be measured during the operation of the test instance. In this embodiment, each processor core used can record parameters related to memory access performance during the operation of the test instance. In actual applications, the processor core can implement the recording function here through existing components such as system energy monitoring counters. The physical host currently used for testing can summarize these parameters to calculate the memory access performance data corresponding to the test instance. Among them, the memory access performance data can at least include the occupied memory bandwidth. In addition, other data such as access delay can also be included, which are not enumerated here.

[0102] The memory bandwidths that different processor cores can occupy on a physical host are not exactly the same, which is affected by the memory organization structure adopted on the physical host and the internal structure of the physical CPU product loaded. In step 402, it is equivalent to trying the memory bandwidth that can be provided for the representative application under multiple processor core usage rules.

[0103] Based on this, in step 403, target test cases whose memory access performance data meets the specified selection criteria can be selected from various test instances. The specified selection criteria here can be set according to actual needs, for example, it can be set to the lowest access latency, or it can be set to the maximum occupied memory bandwidth, etc., which are not limited here. In step 403, it is equivalent to selecting a suitable processor core combination solution for the current instance specification to ensure that a sufficiently high memory bandwidth can be occupied under the current instance specification.

[0104] In a typical case, if the number of VCPUs to be deployed under the current instance specification is less than the number of processor cores in a single socket, usually, if only processor cores in the same socket are selected, then no matter how they are combined, at most they can only occupy the memory bandwidth that can be allocated to a single socket (usually, the memory bandwidth in the physical host is evenly distributed among each socket). In this embodiment, by setting the processor core usage rules more flexibly, some processor cores can be selected from multiple sockets respectively. Since different processor cores in a single socket can occupy different proportions of memory bandwidth, in this way, if the processor cores selected in each socket can occupy a relatively large proportion of the memory bandwidth in the corresponding socket, the memory bandwidth that can be occupied by this method of selecting processor cores in multiple sockets will exceed the memory bandwidth that can be allocated to a single socket. In this way, for instance specifications with higher memory bandwidth requirements, in step 403 of this embodiment, a test instance that adopts the aforementioned method of selecting processor cores in multiple sockets will be selected as the target test instance.

[0105] Accordingly, in step 404, the processor core usage rules and the occupied memory bandwidth corresponding to the target test case can be calibrated as the processor core usage rules and the required occupied memory bandwidth corresponding to the current instance specification. Thus, in the aforementioned typical case, the processor core usage rules calibrated under the current instance specification will usually select processor cores from multiple sockets to support the current instance specification to occupy sufficient memory bandwidth.

[0106] Based on this, the processor core usage rules and the required memory bandwidth can be calibrated for various instance specifications in different fields. Based on the above calibration scheme, calibration results that match the actual application needs in the field can be measured under various instance specifications. This ensures that the relevant applications can occupy sufficient memory bandwidth under the relevant instance specifications, thereby enhancing the memory bandwidth of the application and improving the memory access performance of the application.

[0107] It should be understood that the above calibration scheme provided in this embodiment is only exemplary. In this implementation, other calibration schemes may also be used to complete the calibration. For example, the memory bandwidth required for various instance specifications may be manually calibrated based on experience, and then, based on the calibrated memory bandwidth, the processor core usage rules that can achieve the memory bandwidth are found to complete the calibration. No further examples of implementation schemes are given here.

[0108] Figure 5 A flowchart of another memory management method provided by an exemplary embodiment of the present application. Figure 5 , the method may include:

[0109] Step 500: upon receiving a resource instance creation request of a specified type, determining an instance specification corresponding to the resource instance requested to be created;

[0110] Step 501: Obtain a supplementary specification pre-calibrated for an instance specification;

[0111] Step 502: Find a target physical host that meets the instance specification and the supplementary specification;

[0112] Step 503: Control the target physical host to create a resource instance according to the instance specification and the supplementary specification and perform memory bandwidth isolation for the resource instance;

[0113] Step 504: After the target physical host performs memory bandwidth isolation for the resource instance, if it is detected that there is still unisolated memory bandwidth on the target physical host, the remaining processor cores and memory resources on the target physical host are used to respond to subsequently received resource instance creation requests of specified type and / or non-specified type.

[0114] Among them, steps 500 to 503 can refer to the relevant descriptions in the above-mentioned embodiments, and will not be described in detail here to avoid repetition. In this embodiment, based on step 504, a further improvement scheme is provided.

[0115] Referring to step 504, after the memory bandwidth isolation for the resource instance is completed in the target physical host, there is usually still remaining memory bandwidth on the target physical host. For this part of memory bandwidth, in this embodiment, the control node can continue to schedule it. That is, the remaining memory bandwidth in the target physical host is scheduled for use by other resource instances.

[0116] The inventors found during the research that the memory bandwidth expected to be occupied by resource instances with memory enhancement requirements usually exceeds 50% of the memory bandwidth on the physical host. This results in that after a physical host is hit to host a memory-enhanced resource instance, since the remaining memory bandwidth is already less than 50%, it is usually not hit to host a memory-enhanced resource instance again. To this end, in this embodiment, the management and control node can schedule non-memory-enhanced resource instances to be created on the target physical host, thereby making full use of the remaining physical resources on its target physical host and improving the utilization rate of the physical resources on the target physical host.

[0117] Of course, if there is a memory-enhanced resource instance with a relatively small memory bandwidth requirement, the target physical host in this embodiment can still be hit to host the creation work of this type of resource instance.

[0118] Based on this, in this embodiment, the memory bandwidth occupancy requirements of memory bandwidth enhanced resource instances can be prioritized. Under this premise, the remaining physical resources and memory bandwidth on the physical host can be fully utilized through reasonable scheduling or migration of small-specification instances or shared instances to improve the utilization rate of physical resources and memory bandwidth on the physical host.

[0119] Figure 6 A flowchart of a memory management method provided for another exemplary embodiment of the present application. Figure 6 The method shown may be executed by a memory management and control device, which may be implemented as software, hardware, or a combination of software and hardware, and may be integrated in a physical host.

[0120] In different types of physical hosts, the host components that can play the role of the memory control device in this embodiment may be different. For example, if the physical host is an ordinary physical machine, the virtual machine manager (VMM) deployed in the physical machine, such as a hypervisor, can be used as the memory control device in this embodiment, that is, in the physical machine, the memory control method provided in this embodiment can be executed by the virtual machine manager. Of course, this is only exemplary, and this embodiment is not limited to this.

[0121] refer to Figure 6 The memory management method provided in this embodiment may include:

[0122] Step 600: Receive a resource instance creation instruction sent by a control node, the instance specification corresponding to the resource instance to be created in the resource instance creation instruction, and a supplementary specification for ensuring memory bandwidth;

[0123] Step 601: Call the required processor core according to the supplementary specification and isolate the required memory bandwidth;

[0124] Step 602: calling other required physical resources except the processor core according to the instance specification;

[0125] Step 603: Create a resource instance based on the called processor core and other physical resources.

[0126] Among them, regarding the processing logic of the control node before sending the resource instance creation instruction to the physical host in this embodiment, reference can be made to the relevant description in the aforementioned embodiment, and no detailed description is given here. It should be understood that the physical host in this embodiment can be understood as the target physical host hit by the control node in the aforementioned embodiment.

[0127] In this embodiment, after receiving the resource instance creation instruction, if the instruction carries the supplementary specification, the physical host triggers the execution of subsequent steps 601 to 604. In actual applications, if the received resource instance creation instruction carries the supplementary specification, the physical host can respond to the instruction in a conventional resource instance creation manner, that is, it is no longer necessary to consider the special links related to memory bandwidth guarantee.

[0128] refer to Figure 6 In step 601, the required processor core can be called and the required memory bandwidth can be isolated according to the supplementary specifications determined in step 600. It should be understood that the processor core selected here should meet the supplementary specifications. If the instance specifications also include other provisions for the processor core, the relevant provisions in the instance specifications should also be considered in step 601. To ensure that the selected processor core meets the user's needs.

[0129] In step 602, other required physical resources other than the processor core may be called according to the instance specifications. The other required physical resources here may include but are not limited to physical resources such as memory and network, which are not enumerated here.

[0130] After the selection of physical resources is completed, a resource instance can be created in step 603, and the memory bandwidth isolated in step 601 will be associated with the resource instance for occupation by the resource instance.

[0131] In actual applications, the memory bandwidth in the physical host is time-division multiplexed. The memory bandwidth isolation in this embodiment can be understood as allocating part of the memory bandwidth in the physical host to the resource instance created in step 603. This part of the memory bandwidth is no longer allowed to be time-division multiplexed to ensure that the resource instance can always occupy a sufficient amount of memory bandwidth.

[0132] In an exemplary solution, the supplementary specification may include a processor core usage rule and a required memory bandwidth. Based on this, the aforementioned step 601 may be specifically implemented as follows:

[0133] The required processor core can be called according to the processor core usage rules;

[0134] According to the memory bandwidth determined in step 600, an upper limit of the memory bandwidth occupied may be allocated to each of the called processor cores, and the sum of the upper limits of the memory bandwidth allocated to each of the processor cores is greater than or equal to the memory bandwidth;

[0135] Under each processor core, memory bandwidth is isolated according to the allocated memory bandwidth upper limit for use by resource instances.

[0136] It should be understood that the supplementary specification carried in the resource instance creation instruction sent by the control node only indicates the memory bandwidth required for the resource instance to be created, while the specific memory bandwidth that each processor core should occupy is allocated autonomously by the physical host, which can be allocated by the virtual machine manager in the physical host.

[0137] Generally, the upper limit of memory bandwidth allocated to each called processor core needs to be smaller than the upper limit of memory bandwidth recorded in the memory access performance upper limit of the processor core, so as to avoid problems such as insufficient actual occupied memory bandwidth due to unreasonable allocation.

[0138] The above isolation scheme is only exemplary, and the present embodiment is not limited thereto. For example, in other possible isolation schemes, the upper limit of memory bandwidth supported by the current physical host under the current processor core usage rule can be directly queried in the aforementioned physical host memory access performance data block, that is, the upper limit of memory bandwidth supported by the physical performance, and isolated for exclusive use of the currently created resource instance. No further examples are given here.

[0139] In summary, in this embodiment, after the control node issues a resource instance creation instruction, the physical host can create a resource instance in accordance with the instance specifications, processor core usage rules, and required memory bandwidth and other information specified in the resource instance creation instruction, and perform memory bandwidth isolation for the resource instance. This can ensure that the created resource instance can occupy sufficient memory bandwidth during its operation on the physical host. Moreover, through this isolation mechanism, other resource instances on the physical host are also restricted from interfering with the memory bandwidth usage status of the memory bandwidth enhanced resource instance, thereby ensuring the quality of memory bandwidth payment for such resource instances, and thus effectively improving the memory access performance of such resource instances.

[0140] It should be noted that in some of the processes described in the above embodiments and the accompanying drawings, multiple operations appearing in a specific order are included, but it should be clearly understood that these operations may not be executed in the order in which they appear in this document or may be executed in parallel, and the sequence numbers of the operations, such as 201, 202, etc., are only used to distinguish between different operations, and the sequence numbers themselves do not represent any execution order. In addition, these processes may include more or fewer operations, and these operations may be executed in sequence or in parallel.

[0141] Figure 7 A schematic diagram of a physical device structure is provided for another exemplary embodiment of the present application. Figure 7 As shown, the computing device includes: a memory 70 , a processor 71 and a communication component 72 , wherein the processor 71 is coupled to the memory 70 and the communication component 72 .

[0142] In some design solutions, the physical device may be used as the control node in the aforementioned embodiment. In this case, the processor 71 may be used to execute the computer program in the memory 70 to:

[0143] Upon receiving a request to create a resource instance of a specified type, determining an instance specification corresponding to the resource instance requested to be created;

[0144] Obtaining a supplementary specification pre-calibrated for the instance specification for guaranteeing memory bandwidth;

[0145] Find a target physical host that meets the instance specification and the supplementary specification;

[0146] The target physical host is controlled to create a resource instance according to the instance specification and the supplementary specification and perform memory bandwidth isolation for the resource instance.

[0147] In an optional embodiment, the supplementary specification includes processor core usage rules and required memory bandwidth.

[0148] In an optional embodiment, when the processor 71 controls the target physical host to create a resource instance according to the instance specification and the supplementary specification, it can be specifically used to:

[0149] Controlling the target physical host to create a resource instance according to the instance specification and the processor core usage rule;

[0150] Controlling the target physical host to constrain the memory bandwidth upper limit of the resource instance to be greater than or equal to the memory bandwidth;

[0151] The target physical host is controlled to isolate memory bandwidth according to the memory bandwidth upper limit for use by the resource instance.

[0152] In an optional embodiment, when pre-calibrating the supplementary specification for the instance specification, the processor 71 may be specifically configured to:

[0153] Under the instance specifications, setting a plurality of candidate processor core usage rules;

[0154] Creating test instances respectively according to the plurality of candidate processor core usage rules;

[0155] Running each test instance respectively to measure memory access performance data under each test instance, wherein the memory access performance data includes occupied memory bandwidth;

[0156] Selecting, from the various test instances, a target test case whose memory access performance data meets a specified selection criterion;

[0157] The supplementary specification is calibrated for the instance specification based on the processor core usage rule corresponding to the target test case and the occupied memory bandwidth.

[0158] In an optional embodiment, when searching for a target physical host that meets the instance specification and the supplementary specification, the processor 71 may be specifically configured to:

[0159] Find a physical host whose remaining resources meet the instance specifications, whose unoccupied processor cores can meet the processor core usage rules, and whose non-isolated memory bandwidth is greater than or equal to the memory bandwidth, as a candidate physical host;

[0160] querying, from a pre-built physical host memory access performance database, an upper limit of memory bandwidth supported by the candidate physical host under the processor core usage rule;

[0161] From the candidate physical hosts, a physical host whose supported memory bandwidth upper limit is greater than or equal to the memory bandwidth is selected as the target physical host.

[0162] In an optional embodiment, when pre-building the physical host memory access performance database, the processor 71 may be specifically used to:

[0163] Under various specified host types, select the physical host to be tested;

[0164] Set various processor core usage rules on a single physical host to be tested;

[0165] Under a single physical host to be tested, using test cases to respectively determine the upper limits of memory access performance that can be achieved when memory access is performed according to the plurality of processor core usage rules, wherein the upper limit of memory access performance includes an upper limit of memory bandwidth;

[0166] The upper limits of memory access performance that can be achieved under various processor core usage rules are recorded under various physical hosts respectively to construct the physical host memory access performance database.

[0167] In an optional embodiment, the processor core usage rules include the number of processor cores used, the structural position of each processor core used in the memory organization structure and / or the memory access method used by each processor core used; wherein the memory organization structure may include at least one layer of memory group, and the memory access method includes intra-group access or cross-group access.

[0168] In an optional embodiment, when determining the instance specification corresponding to the resource instance requested to be created, the processor 71 may be specifically configured to:

[0169] Determine a target domain corresponding to a target application targeted by the resource instance creation request;

[0170] Searching for the instance specification corresponding to the resource instance requested to be created by the resource instance creation request among the instance specifications contained in the target domain;

[0171] Among them, the supplementary specifications calibrated for the same instance specifications in different fields are not exactly the same.

[0172] In an optional embodiment, the physical host adopts a bare metal server or a physical machine, and the resource instance includes a virtual machine or a container.

[0173] In an optional embodiment, the processor 71 may also be configured to:

[0174] After the target physical host performs memory bandwidth isolation for the resource instance, if it is monitored that there is still unisolated memory bandwidth on the target physical host, the remaining processor cores and memory resources on the target physical host are used to respond to subsequently received resource instance creation requests of specified type and / or non-specified type.

[0175] In some other designs, the physical device may be used as the physical host in the aforementioned embodiment. In this case, the processor 71 may be used to execute the computer program in the memory 70 to:

[0176] Receive a resource instance creation instruction sent by a management and control node, the resource instance creation instruction including the instance specification corresponding to the resource instance to be created and the supplementary specification for ensuring memory bandwidth;

[0177] Invoke the required processor cores and isolate the required memory bandwidth according to the supplemental specification;

[0178] Invoke other required physical resources except the processor core according to the instance specifications;

[0179] A resource instance is created based on the called processor core and other physical resources.

[0180] In an optional embodiment, the supplementary specification includes a processor core usage rule and a required memory bandwidth. When the processor 71 calls the required processor core and isolates the required memory bandwidth according to the supplementary specification, it can be specifically used to:

[0181] Calling the required processor core according to the processor core usage rule;

[0182] According to the memory bandwidth, an upper limit of the memory bandwidth occupied is allocated to each called processor core, and the sum of the upper limits of the memory bandwidth allocated to each processor core is greater than or equal to the memory bandwidth;

[0183] Under each of the processor cores, memory bandwidth is isolated according to the allocated memory bandwidth upper limit for use by the resource instance.

[0184] Further, if Figure 7 As shown, the physical device also includes: a power supply component 73 and other components. Figure 7 Only some components are shown schematically, which does not mean that the physical device only includes Figure 7 Components shown.

[0185] It is worth noting that the technical details in the above-mentioned embodiments of the physical device can refer to the relevant description in the aforementioned method embodiment. In order to save space, they will not be repeated here, but this should not cause a loss in the scope of protection of this application.

[0186] Accordingly, an embodiment of the present application further provides a computer-readable storage medium storing a computer program, which, when executed, can implement the steps performed in the above method embodiment.

[0187] Above Figure 7 The memory in the computer is used to store computer programs and can be configured to store various other data to support operations on the computing platform. Examples of such data include instructions for any application or method operating on the computing platform, contact data, phone book data, messages, pictures, videos, etc. The memory can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0188] Above Figure 7 The communication component in is configured to facilitate wired or wireless communication between the device where the communication component is located and other devices. The device where the communication component is located can access a wireless network based on a communication standard, such as WiFi, 2G, 3G, 4G / LTE, 5G and other mobile communication networks, or a combination thereof. In an exemplary embodiment, the communication component receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0189] Above Figure 7The power supply component in the device provides power to various components of the device where the power supply component is located. The power supply component may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the device where the power supply component is located.

[0190] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.

[0191] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0192] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0193] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0194] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0195] The memory may include non-permanent storage in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.

[0196] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

[0197] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0198] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0199] The above is only the embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims

1. A memory management method, characterized in that: Applicable to the management and control node, the method includes: Upon receiving a request to create a resource instance of a specified type, determining an instance specification corresponding to the resource instance requested to be created; Obtaining a supplementary specification pre-calibrated for the instance specification for guaranteeing memory bandwidth; Find a target physical host that meets the instance specification and the supplementary specification; The target physical host is controlled to create a resource instance according to the instance specification and the supplementary specification, so as to perform memory bandwidth isolation for the resource instance.

2. The method according to claim 1, characterized in that The supplementary specifications include rules for processor core usage and required memory bandwidth.

3. The method according to claim 2, characterized in that Controlling the target physical host to create a resource instance according to the instance specification and the supplementary specification, including: Controlling the target physical host to create a resource instance according to the instance specification and the processor core usage rule; Controlling the target physical host to constrain the memory bandwidth upper limit of the resource instance to be greater than or equal to the memory bandwidth; The target physical host is controlled to isolate memory bandwidth according to the memory bandwidth upper limit for use by the resource instance.

4. The method according to claim 2, characterized in that: The process of pre-calibrating the supplementary specification for the instance specification comprises: Under the instance specifications, setting a plurality of candidate processor core usage rules; Creating test instances respectively according to the plurality of candidate processor core usage rules; Running each test instance respectively to measure memory access performance data under each test instance, wherein the memory access performance data includes occupied memory bandwidth; Selecting, from the various test instances, a target test case whose memory access performance data meets a specified selection criterion; The supplementary specification is calibrated for the instance specification based on the processor core usage rule corresponding to the target test case and the occupied memory bandwidth.

5. The method according to claim 2, characterized in that: Finding a target physical host that meets the instance specification and the supplementary specification includes: Find a physical host whose remaining resources meet the instance specifications, whose unoccupied processor cores can meet the processor core usage rules, and whose non-isolated memory bandwidth is greater than or equal to the memory bandwidth, as a candidate physical host; querying, from a pre-built physical host memory access performance database, an upper limit of memory bandwidth supported by the candidate physical host under the processor core usage rule; From the candidate physical hosts, a physical host whose supported memory bandwidth upper limit is greater than or equal to the memory bandwidth is selected as the target physical host.

6. The method according to claim 5, characterized in that The process of pre-building the physical host memory access performance database includes: Under various specified host types, select the physical host to be tested; Set various processor core usage rules on a single physical host to be tested; Under a single physical host to be tested, using test cases to respectively determine the upper limits of memory access performance that can be achieved when memory access is performed according to the plurality of processor core usage rules, wherein the upper limit of memory access performance includes an upper limit of memory bandwidth; The upper limits of memory access performance that can be achieved under various processor core usage rules are recorded under various physical hosts respectively to construct the physical host memory access performance database.

7. The method according to any one of claims 2 to 6, characterized in that: The processor core usage rules include the number of processor cores used, the structural position of each processor core used in the memory organization structure and / or the memory access method used by each processor core used; wherein the memory organization structure may include at least one layer of memory group, and the memory access method includes intra-group access or cross-group access.

8. The method according to claim 1, characterized in that Determine the instance specifications corresponding to the resource instance requested to be created, including: Determine a target domain corresponding to a target application targeted by the resource instance creation request; Searching for the instance specification corresponding to the resource instance requested to be created by the resource instance creation request among the instance specifications contained in the target domain; Among them, the supplementary specifications calibrated for the same instance specifications in different fields are not exactly the same.

9. The method according to claim 1, characterized in that: The physical host adopts a bare metal server or a physical machine, and the resource instance includes a virtual machine or a container.

10. The method according to claim 1, characterized in that Also includes: After the target physical host performs memory bandwidth isolation for the resource instance, if it is monitored that there is still unisolated memory bandwidth on the target physical host, the remaining processor cores and memory resources on the target physical host are used to respond to subsequently received resource instance creation requests of specified type and / or non-specified type.

11. A memory management method, characterized in that: Applicable to a physical host, the method comprises: Receive a resource instance creation instruction sent by the management and control node, wherein the resource instance creation instruction includes an instance specification corresponding to the resource instance to be created and a supplementary specification for ensuring memory bandwidth; Invoke the required processor cores and isolate the required memory bandwidth according to the supplemental specification; Invoke other required physical resources except the processor core according to the instance specifications; A resource instance is created based on the called processor core and the other physical resources.

12. The method according to claim 11, characterized in that The supplementary specification includes the processor core usage rules and the required memory bandwidth. The required processor core is called according to the supplementary specification and the required memory bandwidth is isolated, including: Calling the required processor core according to the processor core usage rule; According to the memory bandwidth, an upper limit of the memory bandwidth occupied is allocated to each called processor core, and the sum of the upper limits of the memory bandwidth allocated to each processor core is greater than or equal to the memory bandwidth; Under each of the processor cores, memory bandwidth is isolated according to the allocated memory bandwidth upper limit for use by the resource instance.

13. A physical device, characterized in that Includes memory, processor, and communication components; The memory is used to store one or more computer instructions; The processor is coupled to the memory and the communication component, and is used to execute the one or more computer instructions to execute the memory management method described in any one of claims 1-12.

14. A computer-readable storage medium storing computer instructions, characterized in that: When the computer instructions are executed by one or more processors, the one or more processors are caused to execute the memory management method described in any one of claims 1-12.

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